brcm80211/include/brcmu_d11.h

0001 // SPDX-License-Identifier: ISC
0002 /*
0003  * Copyright (c) 2010 Broadcom Corporation
0004  */
0005
0006 #ifndef _BRCMU_D11_H_
0007 #define _BRCMU_D11_H_
0008
0009 /* d11 io type */
0010 #define BRCMU_D11N_IOTYPE       1
0011 #define BRCMU_D11AC_IOTYPE      2
0012
0013 /* A chanspec (channel specification) holds the channel number, band,
0014  * bandwidth and control sideband
0015  */
0016
0017 /* chanspec binary format */
0018
0019 #define BRCMU_CHSPEC_INVALID        255
0020 /* bit 0~7 channel number
0021  * for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id
0022  */
0023 #define BRCMU_CHSPEC_CH_MASK        0x00ff
0024 #define BRCMU_CHSPEC_CH_SHIFT       0
0025 #define BRCMU_CHSPEC_CHL_MASK       0x000f
0026 #define BRCMU_CHSPEC_CHL_SHIFT      0
0027 #define BRCMU_CHSPEC_CHH_MASK       0x00f0
0028 #define BRCMU_CHSPEC_CHH_SHIFT      4
0029
0030 /* bit 8~16 for dot 11n IO types
0031  * bit 8~9 sideband
0032  * bit 10~11 bandwidth
0033  * bit 12~13 spectral band
0034  * bit 14~15 not used
0035  */
0036 #define BRCMU_CHSPEC_D11N_SB_MASK   0x0300
0037 #define BRCMU_CHSPEC_D11N_SB_SHIFT  8
0038 #define  BRCMU_CHSPEC_D11N_SB_L     0x0100  /* control lower */
0039 #define  BRCMU_CHSPEC_D11N_SB_U     0x0200  /* control upper */
0040 #define  BRCMU_CHSPEC_D11N_SB_N     0x0300  /* none */
0041 #define BRCMU_CHSPEC_D11N_BW_MASK   0x0c00
0042 #define BRCMU_CHSPEC_D11N_BW_SHIFT  10
0043 #define  BRCMU_CHSPEC_D11N_BW_10    0x0400
0044 #define  BRCMU_CHSPEC_D11N_BW_20    0x0800
0045 #define  BRCMU_CHSPEC_D11N_BW_40    0x0c00
0046 #define BRCMU_CHSPEC_D11N_BND_MASK  0x3000
0047 #define BRCMU_CHSPEC_D11N_BND_SHIFT 12
0048 #define  BRCMU_CHSPEC_D11N_BND_5G   0x1000
0049 #define  BRCMU_CHSPEC_D11N_BND_2G   0x2000
0050
0051 /* bit 8~16 for dot 11ac IO types
0052  * bit 8~10 sideband
0053  * bit 11~13 bandwidth
0054  * bit 14~15 spectral band
0055  */
0056 #define BRCMU_CHSPEC_D11AC_SB_MASK  0x0700
0057 #define BRCMU_CHSPEC_D11AC_SB_SHIFT 8
0058 #define  BRCMU_CHSPEC_D11AC_SB_LLL  0x0000
0059 #define  BRCMU_CHSPEC_D11AC_SB_LLU  0x0100
0060 #define  BRCMU_CHSPEC_D11AC_SB_LUL  0x0200
0061 #define  BRCMU_CHSPEC_D11AC_SB_LUU  0x0300
0062 #define  BRCMU_CHSPEC_D11AC_SB_ULL  0x0400
0063 #define  BRCMU_CHSPEC_D11AC_SB_ULU  0x0500
0064 #define  BRCMU_CHSPEC_D11AC_SB_UUL  0x0600
0065 #define  BRCMU_CHSPEC_D11AC_SB_UUU  0x0700
0066 #define  BRCMU_CHSPEC_D11AC_SB_LL   BRCMU_CHSPEC_D11AC_SB_LLL
0067 #define  BRCMU_CHSPEC_D11AC_SB_LU   BRCMU_CHSPEC_D11AC_SB_LLU
0068 #define  BRCMU_CHSPEC_D11AC_SB_UL   BRCMU_CHSPEC_D11AC_SB_LUL
0069 #define  BRCMU_CHSPEC_D11AC_SB_UU   BRCMU_CHSPEC_D11AC_SB_LUU
0070 #define  BRCMU_CHSPEC_D11AC_SB_L    BRCMU_CHSPEC_D11AC_SB_LLL
0071 #define  BRCMU_CHSPEC_D11AC_SB_U    BRCMU_CHSPEC_D11AC_SB_LLU
0072 #define BRCMU_CHSPEC_D11AC_BW_MASK  0x3800
0073 #define BRCMU_CHSPEC_D11AC_BW_SHIFT 11
0074 #define  BRCMU_CHSPEC_D11AC_BW_5    0x0000
0075 #define  BRCMU_CHSPEC_D11AC_BW_10   0x0800
0076 #define  BRCMU_CHSPEC_D11AC_BW_20   0x1000
0077 #define  BRCMU_CHSPEC_D11AC_BW_40   0x1800
0078 #define  BRCMU_CHSPEC_D11AC_BW_80   0x2000
0079 #define  BRCMU_CHSPEC_D11AC_BW_160  0x2800
0080 #define  BRCMU_CHSPEC_D11AC_BW_8080 0x3000
0081 #define BRCMU_CHSPEC_D11AC_BND_MASK 0xc000
0082 #define BRCMU_CHSPEC_D11AC_BND_SHIFT    14
0083 #define  BRCMU_CHSPEC_D11AC_BND_2G  0x0000
0084 #define  BRCMU_CHSPEC_D11AC_BND_3G  0x4000
0085 #define  BRCMU_CHSPEC_D11AC_BND_4G  0x8000
0086 #define  BRCMU_CHSPEC_D11AC_BND_5G  0xc000
0087
0088 #define BRCMU_CHAN_BAND_2G      0
0089 #define BRCMU_CHAN_BAND_5G      1
0090
0091 enum brcmu_chan_bw {
0092     BRCMU_CHAN_BW_20,
0093     BRCMU_CHAN_BW_40,
0094     BRCMU_CHAN_BW_80,
0095     BRCMU_CHAN_BW_80P80,
0096     BRCMU_CHAN_BW_160,
0097 };
0098
0099 enum brcmu_chan_sb {
0100     BRCMU_CHAN_SB_NONE = -1,
0101     BRCMU_CHAN_SB_LLL,
0102     BRCMU_CHAN_SB_LLU,
0103     BRCMU_CHAN_SB_LUL,
0104     BRCMU_CHAN_SB_LUU,
0105     BRCMU_CHAN_SB_ULL,
0106     BRCMU_CHAN_SB_ULU,
0107     BRCMU_CHAN_SB_UUL,
0108     BRCMU_CHAN_SB_UUU,
0109     BRCMU_CHAN_SB_L = BRCMU_CHAN_SB_LLL,
0110     BRCMU_CHAN_SB_U = BRCMU_CHAN_SB_LLU,
0111     BRCMU_CHAN_SB_LL = BRCMU_CHAN_SB_LLL,
0112     BRCMU_CHAN_SB_LU = BRCMU_CHAN_SB_LLU,
0113     BRCMU_CHAN_SB_UL = BRCMU_CHAN_SB_LUL,
0114     BRCMU_CHAN_SB_UU = BRCMU_CHAN_SB_LUU,
0115 };
0116
0117 /**
0118  * struct brcmu_chan - stores channel formats
0119  *
0120  * This structure can be used with functions translating chanspec into generic
0121  * channel info and the other way.
0122  *
0123  * @chspec: firmware specific format
0124  * @chnum: center channel number
0125  * @control_ch_num: control channel number
0126  * @band: frequency band
0127  * @bw: channel width
0128  * @sb: control sideband (location of control channel against the center one)
0129  */
0130 struct brcmu_chan {
0131     u16 chspec;
0132     u8 chnum;
0133     u8 control_ch_num;
0134     u8 band;
0135     enum brcmu_chan_bw bw;
0136     enum brcmu_chan_sb sb;
0137 };
0138
0139 /**
0140  * struct brcmu_d11inf - provides functions translating channel format
0141  *
0142  * @io_type: determines version of channel format used by firmware
0143  * @encchspec: encodes channel info into a chanspec, requires center channel
0144  *  number, ignores control one
0145  * @decchspec: decodes chanspec into generic info
0146  */
0147 struct brcmu_d11inf {
0148     u8 io_type;
0149
0150     void (*encchspec)(struct brcmu_chan *ch);
0151     void (*decchspec)(struct brcmu_chan *ch);
0152 };
0153
0154 void brcmu_d11_attach(struct brcmu_d11inf *d11inf);
0155
0156 #endif  /* _BRCMU_CHANNELS_H_ */