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0010 #ifndef _BRCM_PHY_HAL_H_
0011 #define _BRCM_PHY_HAL_H_
0012
0013 #include <brcmu_utils.h>
0014 #include <brcmu_wifi.h>
0015 #include <phy_shim.h>
0016
0017 #define IDCODE_VER_MASK 0x0000000f
0018 #define IDCODE_VER_SHIFT 0
0019 #define IDCODE_MFG_MASK 0x00000fff
0020 #define IDCODE_MFG_SHIFT 0
0021 #define IDCODE_ID_MASK 0x0ffff000
0022 #define IDCODE_ID_SHIFT 12
0023 #define IDCODE_REV_MASK 0xf0000000
0024 #define IDCODE_REV_SHIFT 28
0025
0026 #define NORADIO_ID 0xe4f5
0027 #define NORADIO_IDCODE 0x4e4f5246
0028
0029 #define BCM2055_ID 0x2055
0030 #define BCM2055_IDCODE 0x02055000
0031 #define BCM2055A0_IDCODE 0x1205517f
0032
0033 #define BCM2056_ID 0x2056
0034 #define BCM2056_IDCODE 0x02056000
0035 #define BCM2056A0_IDCODE 0x1205617f
0036
0037 #define BCM2057_ID 0x2057
0038 #define BCM2057_IDCODE 0x02057000
0039 #define BCM2057A0_IDCODE 0x1205717f
0040
0041 #define BCM2064_ID 0x2064
0042 #define BCM2064_IDCODE 0x02064000
0043 #define BCM2064A0_IDCODE 0x0206417f
0044
0045 #define PHY_TPC_HW_OFF false
0046 #define PHY_TPC_HW_ON true
0047
0048 #define PHY_PERICAL_DRIVERUP 1
0049 #define PHY_PERICAL_WATCHDOG 2
0050 #define PHY_PERICAL_PHYINIT 3
0051 #define PHY_PERICAL_JOIN_BSS 4
0052 #define PHY_PERICAL_START_IBSS 5
0053 #define PHY_PERICAL_UP_BSS 6
0054 #define PHY_PERICAL_CHAN 7
0055 #define PHY_FULLCAL 8
0056
0057 #define PHY_PERICAL_DISABLE 0
0058 #define PHY_PERICAL_SPHASE 1
0059 #define PHY_PERICAL_MPHASE 2
0060 #define PHY_PERICAL_MANUAL 3
0061
0062 #define PHY_HOLD_FOR_ASSOC 1
0063 #define PHY_HOLD_FOR_SCAN 2
0064 #define PHY_HOLD_FOR_RM 4
0065 #define PHY_HOLD_FOR_PLT 8
0066 #define PHY_HOLD_FOR_MUTE 16
0067 #define PHY_HOLD_FOR_NOT_ASSOC 0x20
0068
0069 #define PHY_MUTE_FOR_PREISM 1
0070 #define PHY_MUTE_ALL 0xffffffff
0071
0072 #define PHY_NOISE_FIXED_VAL (-95)
0073 #define PHY_NOISE_FIXED_VAL_NPHY (-92)
0074 #define PHY_NOISE_FIXED_VAL_LCNPHY (-92)
0075
0076 #define PHY_MODE_CAL 0x0002
0077 #define PHY_MODE_NOISEM 0x0004
0078
0079 #define BRCMS_TXPWR_DB_FACTOR 4
0080
0081
0082
0083
0084 #define BRCMS_TXPWR_MAX (127)
0085
0086 #define BRCMS_NUM_RATES_CCK 4
0087 #define BRCMS_NUM_RATES_OFDM 8
0088 #define BRCMS_NUM_RATES_MCS_1_STREAM 8
0089 #define BRCMS_NUM_RATES_MCS_2_STREAM 8
0090 #define BRCMS_NUM_RATES_MCS_3_STREAM 8
0091 #define BRCMS_NUM_RATES_MCS_4_STREAM 8
0092
0093 #define BRCMS_RSSI_INVALID 0
0094
0095 struct d11regs;
0096 struct phy_shim_info;
0097
0098 struct txpwr_limits {
0099 u8 cck[BRCMS_NUM_RATES_CCK];
0100 u8 ofdm[BRCMS_NUM_RATES_OFDM];
0101
0102 u8 ofdm_cdd[BRCMS_NUM_RATES_OFDM];
0103
0104 u8 ofdm_40_siso[BRCMS_NUM_RATES_OFDM];
0105 u8 ofdm_40_cdd[BRCMS_NUM_RATES_OFDM];
0106
0107 u8 mcs_20_siso[BRCMS_NUM_RATES_MCS_1_STREAM];
0108 u8 mcs_20_cdd[BRCMS_NUM_RATES_MCS_1_STREAM];
0109 u8 mcs_20_stbc[BRCMS_NUM_RATES_MCS_1_STREAM];
0110 u8 mcs_20_mimo[BRCMS_NUM_RATES_MCS_2_STREAM];
0111
0112 u8 mcs_40_siso[BRCMS_NUM_RATES_MCS_1_STREAM];
0113 u8 mcs_40_cdd[BRCMS_NUM_RATES_MCS_1_STREAM];
0114 u8 mcs_40_stbc[BRCMS_NUM_RATES_MCS_1_STREAM];
0115 u8 mcs_40_mimo[BRCMS_NUM_RATES_MCS_2_STREAM];
0116 u8 mcs32;
0117 };
0118
0119 struct tx_power {
0120 u32 flags;
0121 u16 chanspec;
0122 u16 local_chanspec;
0123 u8 local_max;
0124 u8 local_constraint;
0125 s8 antgain[2];
0126 u8 rf_cores;
0127 u8 est_Pout[4];
0128 u8 est_Pout_act[4];
0129
0130 u8 est_Pout_cck;
0131 u8 tx_power_max[4];
0132
0133 u8 tx_power_max_rate_ind[4];
0134
0135 u8 user_limit[WL_TX_POWER_RATES];
0136
0137 u8 reg_limit[WL_TX_POWER_RATES];
0138
0139 u8 board_limit[WL_TX_POWER_RATES];
0140
0141 u8 target[WL_TX_POWER_RATES];
0142 };
0143
0144 struct tx_inst_power {
0145 u8 txpwr_est_Pout[2];
0146 u8 txpwr_est_Pout_gofdm;
0147 };
0148
0149 struct brcms_chanvec {
0150 u8 vec[MAXCHANNEL / NBBY];
0151 };
0152
0153 struct shared_phy_params {
0154 struct si_pub *sih;
0155 struct phy_shim_info *physhim;
0156 uint unit;
0157 uint corerev;
0158 u16 vid;
0159 u16 did;
0160 uint chip;
0161 uint chiprev;
0162 uint chippkg;
0163 uint sromrev;
0164 uint boardtype;
0165 uint boardrev;
0166 u32 boardflags;
0167 u32 boardflags2;
0168 };
0169
0170
0171 struct shared_phy *wlc_phy_shared_attach(struct shared_phy_params *shp);
0172 struct brcms_phy_pub *wlc_phy_attach(struct shared_phy *sh,
0173 struct bcma_device *d11core, int bandtype,
0174 struct wiphy *wiphy);
0175 void wlc_phy_detach(struct brcms_phy_pub *ppi);
0176
0177 bool wlc_phy_get_phyversion(struct brcms_phy_pub *pih, u16 *phytype,
0178 u16 *phyrev, u16 *radioid, u16 *radiover);
0179 bool wlc_phy_get_encore(struct brcms_phy_pub *pih);
0180 u32 wlc_phy_get_coreflags(struct brcms_phy_pub *pih);
0181
0182 void wlc_phy_hw_clk_state_upd(struct brcms_phy_pub *ppi, bool newstate);
0183 void wlc_phy_hw_state_upd(struct brcms_phy_pub *ppi, bool newstate);
0184 void wlc_phy_init(struct brcms_phy_pub *ppi, u16 chanspec);
0185 void wlc_phy_watchdog(struct brcms_phy_pub *ppi);
0186 int wlc_phy_down(struct brcms_phy_pub *ppi);
0187 u32 wlc_phy_clk_bwbits(struct brcms_phy_pub *pih);
0188 void wlc_phy_cal_init(struct brcms_phy_pub *ppi);
0189 void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init);
0190
0191 void wlc_phy_chanspec_set(struct brcms_phy_pub *ppi, u16 chanspec);
0192 u16 wlc_phy_chanspec_get(struct brcms_phy_pub *ppi);
0193 void wlc_phy_chanspec_radio_set(struct brcms_phy_pub *ppi, u16 newch);
0194 u16 wlc_phy_bw_state_get(struct brcms_phy_pub *ppi);
0195 void wlc_phy_bw_state_set(struct brcms_phy_pub *ppi, u16 bw);
0196
0197 int wlc_phy_rssi_compute(struct brcms_phy_pub *pih, struct d11rxhdr *rxh);
0198 void wlc_phy_por_inform(struct brcms_phy_pub *ppi);
0199 void wlc_phy_noise_sample_intr(struct brcms_phy_pub *ppi);
0200 bool wlc_phy_bist_check_phy(struct brcms_phy_pub *ppi);
0201
0202 void wlc_phy_set_deaf(struct brcms_phy_pub *ppi, bool user_flag);
0203
0204 void wlc_phy_switch_radio(struct brcms_phy_pub *ppi, bool on);
0205 void wlc_phy_anacore(struct brcms_phy_pub *ppi, bool on);
0206
0207
0208 void wlc_phy_BSSinit(struct brcms_phy_pub *ppi, bool bonlyap, int rssi);
0209
0210 void wlc_phy_chanspec_ch14_widefilter_set(struct brcms_phy_pub *ppi,
0211 bool wide_filter);
0212 void wlc_phy_chanspec_band_validch(struct brcms_phy_pub *ppi, uint band,
0213 struct brcms_chanvec *channels);
0214 u16 wlc_phy_chanspec_band_firstch(struct brcms_phy_pub *ppi, uint band);
0215
0216 void wlc_phy_txpower_sromlimit(struct brcms_phy_pub *ppi, uint chan, u8 *_min_,
0217 u8 *_max_, int rate);
0218 void wlc_phy_txpower_sromlimit_max_get(struct brcms_phy_pub *ppi, uint chan,
0219 u8 *_max_, u8 *_min_);
0220 void wlc_phy_txpower_boardlimit_band(struct brcms_phy_pub *ppi, uint band,
0221 s32 *, s32 *, u32 *);
0222 void wlc_phy_txpower_limit_set(struct brcms_phy_pub *ppi, struct txpwr_limits *,
0223 u16 chanspec);
0224 int wlc_phy_txpower_get(struct brcms_phy_pub *ppi, uint *qdbm, bool *override);
0225 int wlc_phy_txpower_set(struct brcms_phy_pub *ppi, uint qdbm, bool override);
0226 void wlc_phy_txpower_target_set(struct brcms_phy_pub *ppi,
0227 struct txpwr_limits *);
0228 bool wlc_phy_txpower_hw_ctrl_get(struct brcms_phy_pub *ppi);
0229 void wlc_phy_txpower_hw_ctrl_set(struct brcms_phy_pub *ppi, bool hwpwrctrl);
0230 u8 wlc_phy_txpower_get_target_min(struct brcms_phy_pub *ppi);
0231 u8 wlc_phy_txpower_get_target_max(struct brcms_phy_pub *ppi);
0232 bool wlc_phy_txpower_ipa_ison(struct brcms_phy_pub *pih);
0233
0234 void wlc_phy_stf_chain_init(struct brcms_phy_pub *pih, u8 txchain, u8 rxchain);
0235 void wlc_phy_stf_chain_set(struct brcms_phy_pub *pih, u8 txchain, u8 rxchain);
0236 void wlc_phy_stf_chain_get(struct brcms_phy_pub *pih, u8 *txchain, u8 *rxchain);
0237 u8 wlc_phy_stf_chain_active_get(struct brcms_phy_pub *pih);
0238 s8 wlc_phy_stf_ssmode_get(struct brcms_phy_pub *pih, u16 chanspec);
0239 void wlc_phy_ldpc_override_set(struct brcms_phy_pub *ppi, bool val);
0240
0241 void wlc_phy_cal_perical(struct brcms_phy_pub *ppi, u8 reason);
0242 void wlc_phy_noise_sample_request_external(struct brcms_phy_pub *ppi);
0243 void wlc_phy_edcrs_lock(struct brcms_phy_pub *pih, bool lock);
0244 void wlc_phy_cal_papd_recal(struct brcms_phy_pub *ppi);
0245
0246 void wlc_phy_ant_rxdiv_set(struct brcms_phy_pub *ppi, u8 val);
0247 void wlc_phy_clear_tssi(struct brcms_phy_pub *ppi);
0248 void wlc_phy_hold_upd(struct brcms_phy_pub *ppi, u32 id, bool val);
0249 void wlc_phy_mute_upd(struct brcms_phy_pub *ppi, bool val, u32 flags);
0250
0251 void wlc_phy_antsel_type_set(struct brcms_phy_pub *ppi, u8 antsel_type);
0252
0253 void wlc_phy_txpower_get_current(struct brcms_phy_pub *ppi,
0254 struct tx_power *power, uint channel);
0255
0256 void wlc_phy_initcal_enable(struct brcms_phy_pub *pih, bool initcal);
0257 bool wlc_phy_test_ison(struct brcms_phy_pub *ppi);
0258 void wlc_phy_txpwr_percent_set(struct brcms_phy_pub *ppi, u8 txpwr_percent);
0259 void wlc_phy_ofdm_rateset_war(struct brcms_phy_pub *pih, bool war);
0260 void wlc_phy_bf_preempt_enable(struct brcms_phy_pub *pih, bool bf_preempt);
0261 void wlc_phy_machwcap_set(struct brcms_phy_pub *ppi, u32 machwcap);
0262
0263 void wlc_phy_runbist_config(struct brcms_phy_pub *ppi, bool start_end);
0264
0265 void wlc_phy_freqtrack_start(struct brcms_phy_pub *ppi);
0266 void wlc_phy_freqtrack_end(struct brcms_phy_pub *ppi);
0267
0268 const u8 *wlc_phy_get_ofdm_rate_lookup(void);
0269
0270 s8 wlc_phy_get_tx_power_offset_by_mcs(struct brcms_phy_pub *ppi,
0271 u8 mcs_offset);
0272 s8 wlc_phy_get_tx_power_offset(struct brcms_phy_pub *ppi, u8 tbl_offset);
0273 #endif