brcm80211/brcmsmac/main.h

0001 /*
0002  * Copyright (c) 2010 Broadcom Corporation
0003  *
0004  * Permission to use, copy, modify, and/or distribute this software for any
0005  * purpose with or without fee is hereby granted, provided that the above
0006  * copyright notice and this permission notice appear in all copies.
0007  *
0008  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
0009  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
0010  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
0011  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
0012  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
0013  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
0014  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
0015  */
0016
0017 #ifndef _BRCM_MAIN_H_
0018 #define _BRCM_MAIN_H_
0019
0020 #include <linux/etherdevice.h>
0021
0022 #include <brcmu_utils.h>
0023 #include "types.h"
0024 #include "d11.h"
0025 #include "scb.h"
0026
0027 #define INVCHANNEL      255 /* invalid channel */
0028
0029 /* max # brcms_c_module_register() calls */
0030 #define BRCMS_MAXMODULES    22
0031
0032 #define SEQNUM_SHIFT        4
0033 #define SEQNUM_MAX      0x1000
0034
0035 #define NTXRATE         64  /* # tx MPDUs rate is reported for */
0036
0037 /* Maximum wait time for a MAC suspend */
0038 /* uS: 83mS is max packet time (64KB ampdu @ 6Mbps) */
0039 #define BRCMS_MAX_MAC_SUSPEND   83000
0040
0041 /* responses for probe requests older that this are tossed, zero to disable */
0042 #define BRCMS_PRB_RESP_TIMEOUT  0   /* Disable probe response timeout */
0043
0044 /* transmit buffer max headroom for protocol headers */
0045 #define TXOFF (D11_TXH_LEN + D11_PHY_HDR_LEN)
0046
0047 /* Macros for doing definition and get/set of bitfields
0048  * Usage example, e.g. a three-bit field (bits 4-6):
0049  *    #define <NAME>_M  BITFIELD_MASK(3)
0050  *    #define <NAME>_S  4
0051  * ...
0052  *    regval = R_REG(osh, &regs->regfoo);
0053  *    field = GFIELD(regval, <NAME>);
0054  *    regval = SFIELD(regval, <NAME>, 1);
0055  *    W_REG(osh, &regs->regfoo, regval);
0056  */
0057 #define BITFIELD_MASK(width) \
0058         (((unsigned)1 << (width)) - 1)
0059 #define GFIELD(val, field) \
0060         (((val) >> field ## _S) & field ## _M)
0061 #define SFIELD(val, field, bits) \
0062         (((val) & (~(field ## _M << field ## _S))) | \
0063          ((unsigned)(bits) << field ## _S))
0064
0065 #define SW_TIMER_MAC_STAT_UPD       30  /* periodic MAC stats update */
0066
0067 /* max # supported core revisions (0 .. MAXCOREREV - 1) */
0068 #define MAXCOREREV      28
0069
0070 /* Double check that unsupported cores are not enabled */
0071 #if CONF_MSK(D11CONF, 0x4f) || CONF_GE(D11CONF, MAXCOREREV)
0072 #error "Configuration for D11CONF includes unsupported versions."
0073 #endif              /* Bad versions */
0074
0075 /* values for shortslot_override */
0076 #define BRCMS_SHORTSLOT_AUTO    -1 /* Driver will manage Shortslot setting */
0077 #define BRCMS_SHORTSLOT_OFF 0  /* Turn off short slot */
0078 #define BRCMS_SHORTSLOT_ON  1  /* Turn on short slot */
0079
0080 /* value for short/long and mixmode/greenfield preamble */
0081 #define BRCMS_LONG_PREAMBLE (0)
0082 #define BRCMS_SHORT_PREAMBLE    (1 << 0)
0083 #define BRCMS_GF_PREAMBLE       (1 << 1)
0084 #define BRCMS_MM_PREAMBLE       (1 << 2)
0085 #define BRCMS_IS_MIMO_PREAMBLE(_pre) (((_pre) == BRCMS_GF_PREAMBLE) || \
0086                       ((_pre) == BRCMS_MM_PREAMBLE))
0087
0088 /* TxFrameID */
0089 /* seq and frag bits: SEQNUM_SHIFT, FRAGNUM_MASK (802.11.h) */
0090 /* rate epoch bits: TXFID_RATE_SHIFT, TXFID_RATE_MASK ((wlc_rate.c) */
0091 #define TXFID_QUEUE_MASK    0x0007  /* Bits 0-2 */
0092 #define TXFID_SEQ_MASK      0x7FE0  /* Bits 5-15 */
0093 #define TXFID_SEQ_SHIFT     5   /* Number of bit shifts */
0094 #define TXFID_RATE_PROBE_MASK   0x8000  /* Bit 15 for rate probe */
0095 #define TXFID_RATE_MASK     0x0018  /* Mask for bits 3 and 4 */
0096 #define TXFID_RATE_SHIFT    3   /* Shift 3 bits for rate mask */
0097
0098 /* promote boardrev */
0099 #define BOARDREV_PROMOTABLE 0xFF    /* from */
0100 #define BOARDREV_PROMOTED   1   /* to */
0101
0102 #define DATA_BLOCK_TX_SUPR  (1 << 4)
0103
0104 /* Ucode MCTL_WAKE override bits */
0105 #define BRCMS_WAKE_OVERRIDE_CLKCTL  0x01
0106 #define BRCMS_WAKE_OVERRIDE_PHYREG  0x02
0107 #define BRCMS_WAKE_OVERRIDE_MACSUSPEND  0x04
0108 #define BRCMS_WAKE_OVERRIDE_TXFIFO  0x08
0109 #define BRCMS_WAKE_OVERRIDE_FORCEFAST   0x10
0110
0111 /* stuff pulled in from wlc.c */
0112
0113 /* Interrupt bit error summary.  Don't include I_RU: we refill DMA at other
0114  * times; and if we run out, constant I_RU interrupts may cause lockup.  We
0115  * will still get error counts from rx0ovfl.
0116  */
0117 #define I_ERRORS    (I_PC | I_PD | I_DE | I_RO | I_XU)
0118 /* default software intmasks */
0119 #define DEF_RXINTMASK   (I_RI)  /* enable rx int on rxfifo only */
0120 #define DEF_MACINTMASK  (MI_TXSTOP | MI_TBTT | MI_ATIMWINEND | MI_PMQ | \
0121              MI_PHYTXERR | MI_DMAINT | MI_TFS | MI_BG_NOISE | \
0122              MI_CCA | MI_TO | MI_GP0 | MI_RFDISABLE | MI_PWRUP)
0123
0124 #define MAXTXPKTS       6   /* max # pkts pending */
0125
0126 /* frameburst */
0127 #define MAXTXFRAMEBURST     8 /* vanilla xpress mode: max frames/burst */
0128 #define MAXFRAMEBURST_TXOP  10000   /* Frameburst TXOP in usec */
0129
0130 #define NFIFO           6   /* # tx/rx fifopairs */
0131
0132 /* PLL requests */
0133
0134 /* pll is shared on old chips */
0135 #define BRCMS_PLLREQ_SHARED 0x1
0136 /* hold pll for radio monitor register checking */
0137 #define BRCMS_PLLREQ_RADIO_MON  0x2
0138 /* hold/release pll for some short operation */
0139 #define BRCMS_PLLREQ_FLIP       0x4
0140
0141 #define CHANNEL_BANDUNIT(wlc, ch) \
0142     (((ch) <= CH_MAX_2G_CHANNEL) ? BAND_2G_INDEX : BAND_5G_INDEX)
0143
0144 #define OTHERBANDUNIT(wlc) \
0145     ((uint)((wlc)->band->bandunit ? BAND_2G_INDEX : BAND_5G_INDEX))
0146
0147 /*
0148  * 802.11 protection information
0149  *
0150  * _g: use g spec protection, driver internal.
0151  * g_override: override for use of g spec protection.
0152  * gmode_user: user config gmode, operating band->gmode is different.
0153  * overlap: Overlap BSS/IBSS protection for both 11g and 11n.
0154  * nmode_user: user config nmode, operating pub->nmode is different.
0155  * n_cfg: use OFDM protection on MIMO frames.
0156  * n_cfg_override: override for use of N protection.
0157  * nongf: non-GF present protection.
0158  * nongf_override: override for use of GF protection.
0159  * n_pam_override: override for preamble: MM or GF.
0160  * n_obss: indicated OBSS Non-HT STA present.
0161 */
0162 struct brcms_protection {
0163     bool _g;
0164     s8 g_override;
0165     u8 gmode_user;
0166     s8 overlap;
0167     s8 nmode_user;
0168     s8 n_cfg;
0169     s8 n_cfg_override;
0170     bool nongf;
0171     s8 nongf_override;
0172     s8 n_pam_override;
0173     bool n_obss;
0174 };
0175
0176 /*
0177  * anything affecting the single/dual streams/antenna operation
0178  *
0179  * hw_txchain: HW txchain bitmap cfg.
0180  * txchain: txchain bitmap being used.
0181  * txstreams: number of txchains being used.
0182  * hw_rxchain: HW rxchain bitmap cfg.
0183  * rxchain: rxchain bitmap being used.
0184  * rxstreams: number of rxchains being used.
0185  * ant_rx_ovr: rx antenna override.
0186  * txant: userTx antenna setting.
0187  * phytxant: phyTx antenna setting in txheader.
0188  * ss_opmode: singlestream Operational mode, 0:siso; 1:cdd.
0189  * ss_algosel_auto: if true, use wlc->stf->ss_algo_channel;
0190  *          else use wlc->band->stf->ss_mode_band.
0191  * ss_algo_channel: ss based on per-channel algo: 0: SISO, 1: CDD 2: STBC.
0192  * rxchain_restore_delay: delay time to restore default rxchain.
0193  * ldpc: AUTO/ON/OFF ldpc cap supported.
0194  * txcore[MAX_STREAMS_SUPPORTED + 1]: bitmap of selected core for each Nsts.
0195  * spatial_policy:
0196  */
0197 struct brcms_stf {
0198     u8 hw_txchain;
0199     u8 txchain;
0200     u8 txstreams;
0201     u8 hw_rxchain;
0202     u8 rxchain;
0203     u8 rxstreams;
0204     u8 ant_rx_ovr;
0205     s8 txant;
0206     u16 phytxant;
0207     u8 ss_opmode;
0208     bool ss_algosel_auto;
0209     u16 ss_algo_channel;
0210     u8 rxchain_restore_delay;
0211     s8 ldpc;
0212     u8 txcore[MAX_STREAMS_SUPPORTED + 1];
0213     s8 spatial_policy;
0214 };
0215
0216 #define BRCMS_STF_SS_STBC_TX(wlc, scb) \
0217     (((wlc)->stf->txstreams > 1) && (((wlc)->band->band_stf_stbc_tx == ON) \
0218      || (((scb)->flags & SCB_STBCCAP) && \
0219          (wlc)->band->band_stf_stbc_tx == AUTO && \
0220          isset(&((wlc)->stf->ss_algo_channel), PHY_TXC1_MODE_STBC))))
0221
0222 #define BRCMS_STBC_CAP_PHY(wlc) (BRCMS_ISNPHY(wlc->band) && \
0223                  NREV_GE(wlc->band->phyrev, 3))
0224
0225 #define BRCMS_SGI_CAP_PHY(wlc) ((BRCMS_ISNPHY(wlc->band) && \
0226                  NREV_GE(wlc->band->phyrev, 3)) || \
0227                 BRCMS_ISLCNPHY(wlc->band))
0228
0229 #define BRCMS_CHAN_PHYTYPE(x)     (((x) & RXS_CHAN_PHYTYPE_MASK) \
0230                    >> RXS_CHAN_PHYTYPE_SHIFT)
0231 #define BRCMS_CHAN_CHANNEL(x)     (((x) & RXS_CHAN_ID_MASK) \
0232                    >> RXS_CHAN_ID_SHIFT)
0233
0234 /*
0235  * core state (mac)
0236  */
0237 struct brcms_core {
0238     uint coreidx;       /* # sb enumerated core */
0239
0240     /* fifo */
0241     uint *txavail[NFIFO];   /* # tx descriptors available */
0242
0243     struct macstat *macstat_snapshot;   /* mac hw prev read values */
0244 };
0245
0246 /*
0247  * band state (phy+ana+radio)
0248  */
0249 struct brcms_band {
0250     int bandtype;       /* BRCM_BAND_2G, BRCM_BAND_5G */
0251     uint bandunit;      /* bandstate[] index */
0252
0253     u16 phytype;        /* phytype */
0254     u16 phyrev;
0255     u16 radioid;
0256     u16 radiorev;
0257     struct brcms_phy_pub *pi; /* pointer to phy specific information */
0258     bool abgphy_encore;
0259
0260     u8 gmode;       /* currently active gmode */
0261
0262     struct scb *hwrs_scb;   /* permanent scb for hw rateset */
0263
0264     /* band-specific copy of default_bss.rateset */
0265     struct brcms_c_rateset defrateset;
0266
0267     u8 band_stf_ss_mode;    /* Configured STF type, 0:siso; 1:cdd */
0268     s8 band_stf_stbc_tx;    /* STBC TX 0:off; 1:force on; -1:auto */
0269     /* rates supported by chip (phy-specific) */
0270     struct brcms_c_rateset hw_rateset;
0271     u8 basic_rate[BRCM_MAXRATE + 1]; /* basic rates indexed by rate */
0272     bool mimo_cap_40;   /* 40 MHz cap enabled on this band */
0273     s8 antgain;     /* antenna gain from srom */
0274
0275     u16 CWmin; /* minimum size of contention window, in unit of aSlotTime */
0276     u16 CWmax; /* maximum size of contention window, in unit of aSlotTime */
0277     struct ieee80211_supported_band band;
0278 };
0279
0280 /* module control blocks */
0281 struct modulecb {
0282     /* module name : NULL indicates empty array member */
0283     char name[32];
0284     /* handle passed when handler 'doiovar' is called */
0285     struct brcms_info *hdl;
0286
0287     int (*down_fn)(void *handle); /* down handler. Note: the int returned
0288                        * by the down function is a count of the
0289                        * number of timers that could not be
0290                        * freed.
0291                        */
0292
0293 };
0294
0295 struct brcms_hw_band {
0296     int bandtype;       /* BRCM_BAND_2G, BRCM_BAND_5G */
0297     uint bandunit;      /* bandstate[] index */
0298     u16 mhfs[MHFMAX];   /* MHF array shadow */
0299     u8 bandhw_stf_ss_mode;  /* HW configured STF type, 0:siso; 1:cdd */
0300     u16 CWmin;
0301     u16 CWmax;
0302     u32 core_flags;
0303
0304     u16 phytype;        /* phytype */
0305     u16 phyrev;
0306     u16 radioid;
0307     u16 radiorev;
0308     struct brcms_phy_pub *pi; /* pointer to phy specific information */
0309     bool abgphy_encore;
0310 };
0311
0312 struct brcms_hardware {
0313     bool _piomode;      /* true if pio mode */
0314     struct brcms_c_info *wlc;
0315
0316     /* fifo */
0317     struct dma_pub *di[NFIFO];  /* dma handles, per fifo */
0318
0319     uint unit;      /* device instance number */
0320
0321     /* version info */
0322     u16 vendorid;   /* PCI vendor id */
0323     u16 deviceid;   /* PCI device id */
0324     uint corerev;       /* core revision */
0325     u8 sromrev;     /* version # of the srom */
0326     u16 boardrev;   /* version # of particular board */
0327     u32 boardflags; /* Board specific flags from srom */
0328     u32 boardflags2;    /* More board flags if sromrev >= 4 */
0329     u32 machwcap;   /* MAC capabilities */
0330     u32 machwcap_backup;    /* backup of machwcap */
0331
0332     struct si_pub *sih; /* SI handle (cookie for siutils calls) */
0333     struct bcma_device *d11core;    /* pointer to 802.11 core */
0334     struct phy_shim_info *physhim; /* phy shim layer handler */
0335     struct shared_phy *phy_sh;  /* pointer to shared phy state */
0336     struct brcms_hw_band *band;/* pointer to active per-band state */
0337     /* band state per phy/radio */
0338     struct brcms_hw_band *bandstate[MAXBANDS];
0339     u16 bmac_phytxant;  /* cache of high phytxant state */
0340     bool shortslot;     /* currently using 11g ShortSlot timing */
0341     u16 SRL;        /* 802.11 dot11ShortRetryLimit */
0342     u16 LRL;        /* 802.11 dot11LongRetryLimit */
0343     u16 SFBL;       /* Short Frame Rate Fallback Limit */
0344     u16 LFBL;       /* Long Frame Rate Fallback Limit */
0345
0346     bool up;        /* d11 hardware up and running */
0347     uint now;       /* # elapsed seconds */
0348     uint _nbands;       /* # bands supported */
0349     u16 chanspec;   /* bmac chanspec shadow */
0350
0351     uint *txavail[NFIFO];   /* # tx descriptors available */
0352     const u16 *xmtfifo_sz;  /* fifo size in 256B for each xmt fifo */
0353
0354     u32 pllreq;     /* pll requests to keep PLL on */
0355
0356     u8 suspended_fifos; /* Which TX fifo to remain awake for */
0357     u32 maccontrol; /* Cached value of maccontrol */
0358     uint mac_suspend_depth; /* current depth of mac_suspend levels */
0359     u32 wake_override;  /* bit flags to force MAC to WAKE mode */
0360     u32 mute_override;  /* Prevent ucode from sending beacons */
0361     u8 etheraddr[ETH_ALEN]; /* currently configured ethernet address */
0362     bool noreset;       /* true= do not reset hw, used by WLC_OUT */
0363     bool forcefastclk;  /* true if h/w is forcing to use fast clk */
0364     bool clk;       /* core is out of reset and has clock */
0365     bool sbclk;     /* sb has clock */
0366     bool phyclk;        /* phy is out of reset and has clock */
0367
0368     bool ucode_loaded;  /* true after ucode downloaded */
0369
0370
0371     u8 hw_stf_ss_opmode;    /* STF single stream operation mode */
0372     u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic
0373                  * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board
0374                  */
0375     u32 antsel_avail;   /*
0376                  * put struct antsel_info here if more info is
0377                  * needed
0378                  */
0379 };
0380
0381 /*
0382  * Principal common driver data structure.
0383  *
0384  * pub: pointer to driver public state.
0385  * wl: pointer to specific private state.
0386  * hw: HW related state.
0387  * clkreq_override: setting for clkreq for PCIE : Auto, 0, 1.
0388  * fastpwrup_dly: time in us needed to bring up d11 fast clock.
0389  * macintstatus: bit channel between isr and dpc.
0390  * macintmask: sw runtime master macintmask value.
0391  * defmacintmask: default "on" macintmask value.
0392  * clk: core is out of reset and has clock.
0393  * core: pointer to active io core.
0394  * band: pointer to active per-band state.
0395  * corestate: per-core state (one per hw core).
0396  * bandstate: per-band state (one per phy/radio).
0397  * qvalid: DirFrmQValid and BcMcFrmQValid.
0398  * ampdu: ampdu module handler.
0399  * asi: antsel module handler.
0400  * cmi: channel manager module handler.
0401  * vendorid: PCI vendor id.
0402  * deviceid: PCI device id.
0403  * ucode_rev: microcode revision.
0404  * machwcap: MAC capabilities, BMAC shadow.
0405  * perm_etheraddr: original sprom local ethernet address.
0406  * bandlocked: disable auto multi-band switching.
0407  * bandinit_pending: track band init in auto band.
0408  * radio_monitor: radio timer is running.
0409  * going_down: down path intermediate variable.
0410  * wdtimer: timer for watchdog routine.
0411  * radio_timer: timer for hw radio button monitor routine.
0412  * monitor: monitor (MPDU sniffing) mode.
0413  * bcnmisc_monitor: bcns promisc mode override for monitor.
0414  * _rifs: enable per-packet rifs.
0415  * bcn_li_bcn: beacon listen interval in # beacons.
0416  * bcn_li_dtim: beacon listen interval in # dtims.
0417  * WDarmed: watchdog timer is armed.
0418  * WDlast: last time wlc_watchdog() was called.
0419  * edcf_txop[IEEE80211_NUM_ACS]: current txop for each ac.
0420  * wme_retries: per-AC retry limits.
0421  * bsscfg: set of BSS configurations, idx 0 is default and always valid.
0422  * cfg: the primary bsscfg (can be AP or STA).
0423  * modulecb:
0424  * mimoft: SIGN or 11N.
0425  * cck_40txbw: 11N, cck tx b/w override when in 40MHZ mode.
0426  * ofdm_40txbw: 11N, ofdm tx b/w override when in 40MHZ mode.
0427  * mimo_40txbw: 11N, mimo tx b/w override when in 40MHZ mode.
0428  * default_bss: configured BSS parameters.
0429  * mc_fid_counter: BC/MC FIFO frame ID counter.
0430  * country_default: saved country for leaving 802.11d auto-country mode.
0431  * autocountry_default: initial country for 802.11d auto-country mode.
0432  * prb_resp_timeout: do not send prb resp if request older
0433  *           than this, 0 = disable.
0434  * home_chanspec: shared home chanspec.
0435  * chanspec: target operational channel.
0436  * usr_fragthresh: user configured fragmentation threshold.
0437  * fragthresh[NFIFO]: per-fifo fragmentation thresholds.
0438  * RTSThresh: 802.11 dot11RTSThreshold.
0439  * SRL: 802.11 dot11ShortRetryLimit.
0440  * LRL: 802.11 dot11LongRetryLimit.
0441  * SFBL: Short Frame Rate Fallback Limit.
0442  * LFBL: Long Frame Rate Fallback Limit.
0443  * shortslot: currently using 11g ShortSlot timing.
0444  * shortslot_override: 11g ShortSlot override.
0445  * include_legacy_erp: include Legacy ERP info elt ID 47 as well as g ID 42.
0446  * PLCPHdr_override: 802.11b Preamble Type override.
0447  * stf:
0448  * bcn_rspec: save bcn ratespec purpose.
0449  * tempsense_lasttime;
0450  * tx_duty_cycle_ofdm: maximum allowed duty cycle for OFDM.
0451  * tx_duty_cycle_cck: maximum allowed duty cycle for CCK.
0452  * wiphy:
0453  * pri_scb: primary Station Control Block
0454  */
0455 struct brcms_c_info {
0456     struct brcms_pub *pub;
0457     struct brcms_info *wl;
0458     struct brcms_hardware *hw;
0459
0460     /* clock */
0461     u16 fastpwrup_dly;
0462
0463     /* interrupt */
0464     u32 macintstatus;
0465     u32 macintmask;
0466     u32 defmacintmask;
0467
0468     bool clk;
0469
0470     /* multiband */
0471     struct brcms_core *core;
0472     struct brcms_band *band;
0473     struct brcms_core *corestate;
0474     struct brcms_band *bandstate[MAXBANDS];
0475
0476     /* packet queue */
0477     uint qvalid;
0478
0479     struct ampdu_info *ampdu;
0480     struct antsel_info *asi;
0481     struct brcms_cm_info *cmi;
0482
0483     u16 vendorid;
0484     u16 deviceid;
0485     uint ucode_rev;
0486
0487     u8 perm_etheraddr[ETH_ALEN];
0488
0489     bool bandlocked;
0490     bool bandinit_pending;
0491
0492     bool radio_monitor;
0493     bool going_down;
0494
0495     bool beacon_template_virgin;
0496
0497     struct brcms_timer *wdtimer;
0498     struct brcms_timer *radio_timer;
0499
0500     /* promiscuous */
0501     uint filter_flags;
0502
0503     /* driver feature */
0504     bool _rifs;
0505
0506     /* AP-STA synchronization, power save */
0507     u8 bcn_li_bcn;
0508     u8 bcn_li_dtim;
0509
0510     bool WDarmed;
0511     u32 WDlast;
0512
0513     /* WME */
0514     u16 edcf_txop[IEEE80211_NUM_ACS];
0515
0516     u16 wme_retries[IEEE80211_NUM_ACS];
0517
0518     struct brcms_bss_cfg *bsscfg;
0519
0520     struct modulecb *modulecb;
0521
0522     u8 mimoft;
0523     s8 cck_40txbw;
0524     s8 ofdm_40txbw;
0525     s8 mimo_40txbw;
0526
0527     struct brcms_bss_info *default_bss;
0528
0529     u16 mc_fid_counter;
0530
0531     char country_default[BRCM_CNTRY_BUF_SZ];
0532     char autocountry_default[BRCM_CNTRY_BUF_SZ];
0533     u16 prb_resp_timeout;
0534
0535     u16 home_chanspec;
0536
0537     /* PHY parameters */
0538     u16 chanspec;
0539     u16 usr_fragthresh;
0540     u16 fragthresh[NFIFO];
0541     u16 RTSThresh;
0542     u16 SRL;
0543     u16 LRL;
0544     u16 SFBL;
0545     u16 LFBL;
0546
0547     /* network config */
0548     bool shortslot;
0549     s8 shortslot_override;
0550     bool include_legacy_erp;
0551
0552     struct brcms_protection *protection;
0553     s8 PLCPHdr_override;
0554
0555     struct brcms_stf *stf;
0556
0557     u32 bcn_rspec;
0558
0559     uint tempsense_lasttime;
0560
0561     u16 tx_duty_cycle_ofdm;
0562     u16 tx_duty_cycle_cck;
0563
0564     struct wiphy *wiphy;
0565     struct scb pri_scb;
0566     struct ieee80211_vif *vif;
0567
0568     struct sk_buff *beacon;
0569     u16 beacon_tim_offset;
0570     u16 beacon_dtim_period;
0571     struct sk_buff *probe_resp;
0572 };
0573
0574 /* antsel module specific state */
0575 struct antsel_info {
0576     struct brcms_c_info *wlc;   /* pointer to main wlc structure */
0577     struct brcms_pub *pub;      /* pointer to public fn */
0578     u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic
0579                  * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board
0580                  */
0581     u8 antsel_antswitch;    /* board level antenna switch type */
0582     bool antsel_avail;  /* Ant selection availability (SROM based) */
0583     struct brcms_antselcfg antcfg_11n; /* antenna configuration */
0584     struct brcms_antselcfg antcfg_cur; /* current antenna config (auto) */
0585 };
0586
0587 enum brcms_bss_type {
0588     BRCMS_TYPE_STATION,
0589     BRCMS_TYPE_AP,
0590     BRCMS_TYPE_ADHOC,
0591 };
0592
0593 /*
0594  * BSS configuration state
0595  *
0596  * wlc: wlc to which this bsscfg belongs to.
0597  * type: interface type
0598  * SSID_len: the length of SSID
0599  * SSID: SSID string
0600  *
0601  *
0602  * BSSID: BSSID (associated)
0603  * cur_etheraddr: h/w address
0604  * flags: BSSCFG flags; see below
0605  *
0606  * current_bss: BSS parms in ASSOCIATED state
0607  *
0608  *
0609  * ID: 'unique' ID of this bsscfg, assigned at bsscfg allocation
0610  */
0611 struct brcms_bss_cfg {
0612     struct brcms_c_info *wlc;
0613     enum brcms_bss_type type;
0614     u8 SSID_len;
0615     u8 SSID[IEEE80211_MAX_SSID_LEN];
0616     u8 BSSID[ETH_ALEN];
0617     struct brcms_bss_info *current_bss;
0618 };
0619
0620 int brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p);
0621 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
0622                uint *blocks);
0623
0624 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config);
0625 void brcms_c_mac_promisc(struct brcms_c_info *wlc, uint filter_flags);
0626 u16 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec, uint mac_len);
0627 u32 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
0628                    bool use_rspec, u16 mimo_ctlchbw);
0629 u16 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
0630                    u32 rts_rate, u32 frame_rate,
0631                    u8 rts_preamble_type, u8 frame_preamble_type,
0632                    uint frame_len, bool ba);
0633 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
0634                 struct ieee80211_sta *sta, void (*dma_callback_fn));
0635 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend);
0636 int brcms_c_set_nmode(struct brcms_c_info *wlc);
0637 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc, u32 bcn_rate);
0638 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type);
0639 void brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
0640               bool mute, struct txpwr_limits *txpwr);
0641 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v);
0642 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset);
0643 void brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
0644          int bands);
0645 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags);
0646 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val);
0647 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw);
0648 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw);
0649 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw);
0650 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
0651                      u32 override_bit);
0652 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
0653                        u32 override_bit);
0654 void brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset,
0655                 int len, void *buf);
0656 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate);
0657 void brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
0658                const void *buf, int len, u32 sel);
0659 void brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset,
0660                  void *buf, int len, u32 sel);
0661 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode);
0662 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw);
0663 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk);
0664 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk);
0665 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on);
0666 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant);
0667 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode);
0668 void brcms_c_init_scb(struct scb *scb);
0669
0670 #endif              /* _BRCM_MAIN_H_ */