broadcom/b43legacy/xmit.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef B43legacy_XMIT_H_
0003 #define B43legacy_XMIT_H_
0004
0005 #include "main.h"
0006
0007
0008 #define _b43legacy_declare_plcp_hdr(size)   \
0009     struct b43legacy_plcp_hdr##size {   \
0010         union {             \
0011             __le32 data;        \
0012             __u8 raw[size];     \
0013         } __packed; \
0014     } __packed
0015
0016 /* struct b43legacy_plcp_hdr4 */
0017 _b43legacy_declare_plcp_hdr(4);
0018 /* struct b43legacy_plcp_hdr6 */
0019 _b43legacy_declare_plcp_hdr(6);
0020
0021 #undef _b43legacy_declare_plcp_hdr
0022
0023
0024 /* TX header for v3 firmware */
0025 struct b43legacy_txhdr_fw3 {
0026     __le32 mac_ctl;             /* MAC TX control */
0027     __le16 mac_frame_ctl;           /* Copy of the FrameControl */
0028     __le16 tx_fes_time_norm;        /* TX FES Time Normal */
0029     __le16 phy_ctl;             /* PHY TX control */
0030     __u8 iv[16];                /* Encryption IV */
0031     __u8 tx_receiver[6];            /* TX Frame Receiver address */
0032     __le16 tx_fes_time_fb;          /* TX FES Time Fallback */
0033     struct b43legacy_plcp_hdr4 rts_plcp_fb; /* RTS fallback PLCP */
0034     __le16 rts_dur_fb;          /* RTS fallback duration */
0035     struct b43legacy_plcp_hdr4 plcp_fb; /* Fallback PLCP */
0036     __le16 dur_fb;              /* Fallback duration */
0037     PAD_BYTES(2);
0038     __le16 cookie;
0039     __le16 unknown_scb_stuff;
0040     struct b43legacy_plcp_hdr6 rts_plcp;    /* RTS PLCP */
0041     __u8 rts_frame[18];         /* The RTS frame (if used) */
0042     struct b43legacy_plcp_hdr6 plcp;
0043 } __packed;
0044
0045 /* MAC TX control */
0046 #define B43legacy_TX4_MAC_KEYIDX    0x0FF00000 /* Security key index */
0047 #define B43legacy_TX4_MAC_KEYIDX_SHIFT  20
0048 #define B43legacy_TX4_MAC_KEYALG    0x00070000 /* Security key algorithm */
0049 #define B43legacy_TX4_MAC_KEYALG_SHIFT  16
0050 #define B43legacy_TX4_MAC_LIFETIME  0x00001000
0051 #define B43legacy_TX4_MAC_FRAMEBURST    0x00000800
0052 #define B43legacy_TX4_MAC_SENDCTS   0x00000400
0053 #define B43legacy_TX4_MAC_AMPDU     0x00000300
0054 #define B43legacy_TX4_MAC_AMPDU_SHIFT   8
0055 #define B43legacy_TX4_MAC_CTSFALLBACKOFDM   0x00000200
0056 #define B43legacy_TX4_MAC_FALLBACKOFDM  0x00000100
0057 #define B43legacy_TX4_MAC_5GHZ      0x00000080
0058 #define B43legacy_TX4_MAC_IGNPMQ    0x00000020
0059 #define B43legacy_TX4_MAC_HWSEQ     0x00000010 /* Use Hardware Seq No */
0060 #define B43legacy_TX4_MAC_STMSDU    0x00000008 /* Start MSDU */
0061 #define B43legacy_TX4_MAC_SENDRTS   0x00000004
0062 #define B43legacy_TX4_MAC_LONGFRAME 0x00000002
0063 #define B43legacy_TX4_MAC_ACK       0x00000001
0064
0065 /* Extra Frame Types */
0066 #define B43legacy_TX4_EFT_FBOFDM    0x0001 /* Data frame fb rate type */
0067 #define B43legacy_TX4_EFT_RTSOFDM   0x0004 /* RTS/CTS rate type */
0068 #define B43legacy_TX4_EFT_RTSFBOFDM 0x0010 /* RTS/CTS fallback rate type */
0069
0070 /* PHY TX control word */
0071 #define B43legacy_TX4_PHY_ENC       0x0003 /* Data frame encoding */
0072 #define B43legacy_TX4_PHY_ENC_CCK   0x0000 /* CCK */
0073 #define B43legacy_TX4_PHY_ENC_OFDM  0x0001 /* Data frame rate type */
0074 #define B43legacy_TX4_PHY_SHORTPRMBL    0x0010 /* Use short preamble */
0075 #define B43legacy_TX4_PHY_ANT       0x03C0 /* Antenna selection */
0076 #define  B43legacy_TX4_PHY_ANT0     0x0000 /* Use antenna 0 */
0077 #define  B43legacy_TX4_PHY_ANT1     0x0100 /* Use antenna 1 */
0078 #define  B43legacy_TX4_PHY_ANTLAST  0x0300 /* Use last used antenna */
0079
0080
0081
0082 int b43legacy_generate_txhdr(struct b43legacy_wldev *dev,
0083                   u8 *txhdr,
0084                   const unsigned char *fragment_data,
0085                   unsigned int fragment_len,
0086                   struct ieee80211_tx_info *info,
0087                   u16 cookie);
0088
0089
0090 /* Transmit Status */
0091 struct b43legacy_txstatus {
0092     u16 cookie; /* The cookie from the txhdr */
0093     u16 seq;    /* Sequence number */
0094     u8 phy_stat;    /* PHY TX status */
0095     u8 frame_count; /* Frame transmit count */
0096     u8 rts_count;   /* RTS transmit count */
0097     u8 supp_reason; /* Suppression reason */
0098     /* flags */
0099     u8 pm_indicated;/* PM mode indicated to AP */
0100     u8 intermediate;/* Intermediate status notification */
0101     u8 for_ampdu;   /* Status is for an AMPDU (afterburner) */
0102     u8 acked;   /* Wireless ACK received */
0103 };
0104
0105 /* txstatus supp_reason values */
0106 enum {
0107     B43legacy_TXST_SUPP_NONE,   /* Not suppressed */
0108     B43legacy_TXST_SUPP_PMQ,    /* Suppressed due to PMQ entry */
0109     B43legacy_TXST_SUPP_FLUSH,  /* Suppressed due to flush request */
0110     B43legacy_TXST_SUPP_PREV,   /* Previous fragment failed */
0111     B43legacy_TXST_SUPP_CHAN,   /* Channel mismatch */
0112     B43legacy_TXST_SUPP_LIFE,   /* Lifetime expired */
0113     B43legacy_TXST_SUPP_UNDER,  /* Buffer underflow */
0114     B43legacy_TXST_SUPP_ABNACK, /* Afterburner NACK */
0115 };
0116
0117 /* Transmit Status as received through DMA/PIO on old chips */
0118 struct b43legacy_hwtxstatus {
0119     PAD_BYTES(4);
0120     __le16 cookie;
0121     u8 flags;
0122     u8 count;
0123     PAD_BYTES(2);
0124     __le16 seq;
0125     u8 phy_stat;
0126     PAD_BYTES(1);
0127 } __packed;
0128
0129
0130 /* Receive header for v3 firmware. */
0131 struct b43legacy_rxhdr_fw3 {
0132     __le16 frame_len;   /* Frame length */
0133     PAD_BYTES(2);
0134     __le16 phy_status0; /* PHY RX Status 0 */
0135     __u8 jssi;      /* PHY RX Status 1: JSSI */
0136     __u8 sig_qual;      /* PHY RX Status 1: Signal Quality */
0137     PAD_BYTES(2);       /* PHY RX Status 2 */
0138     __le16 phy_status3; /* PHY RX Status 3 */
0139     __le16 mac_status;  /* MAC RX status */
0140     __le16 mac_time;
0141     __le16 channel;
0142 } __packed;
0143
0144
0145 /* PHY RX Status 0 */
0146 #define B43legacy_RX_PHYST0_GAINCTL 0x4000 /* Gain Control */
0147 #define B43legacy_RX_PHYST0_PLCPHCF 0x0200
0148 #define B43legacy_RX_PHYST0_PLCPFV  0x0100
0149 #define B43legacy_RX_PHYST0_SHORTPRMBL  0x0080 /* Recvd with Short Preamble */
0150 #define B43legacy_RX_PHYST0_LCRS    0x0040
0151 #define B43legacy_RX_PHYST0_ANT     0x0020 /* Antenna */
0152 #define B43legacy_RX_PHYST0_UNSRATE 0x0010
0153 #define B43legacy_RX_PHYST0_CLIP    0x000C
0154 #define B43legacy_RX_PHYST0_CLIP_SHIFT  2
0155 #define B43legacy_RX_PHYST0_FTYPE   0x0003 /* Frame type */
0156 #define  B43legacy_RX_PHYST0_CCK    0x0000 /* Frame type: CCK */
0157 #define  B43legacy_RX_PHYST0_OFDM   0x0001 /* Frame type: OFDM */
0158 #define  B43legacy_RX_PHYST0_PRE_N  0x0002 /* Pre-standard N-PHY frame */
0159 #define  B43legacy_RX_PHYST0_STD_N  0x0003 /* Standard N-PHY frame */
0160
0161 /* PHY RX Status 2 */
0162 #define B43legacy_RX_PHYST2_LNAG    0xC000 /* LNA Gain */
0163 #define B43legacy_RX_PHYST2_LNAG_SHIFT  14
0164 #define B43legacy_RX_PHYST2_PNAG    0x3C00 /* PNA Gain */
0165 #define B43legacy_RX_PHYST2_PNAG_SHIFT  10
0166 #define B43legacy_RX_PHYST2_FOFF    0x03FF /* F offset */
0167
0168 /* PHY RX Status 3 */
0169 #define B43legacy_RX_PHYST3_DIGG    0x1800 /* DIG Gain */
0170 #define B43legacy_RX_PHYST3_DIGG_SHIFT  11
0171 #define B43legacy_RX_PHYST3_TRSTATE 0x0400 /* TR state */
0172
0173 /* MAC RX Status */
0174 #define B43legacy_RX_MAC_BEACONSENT 0x00008000 /* Beacon send flag */
0175 #define B43legacy_RX_MAC_KEYIDX     0x000007E0 /* Key index */
0176 #define B43legacy_RX_MAC_KEYIDX_SHIFT   5
0177 #define B43legacy_RX_MAC_DECERR     0x00000010 /* Decrypt error */
0178 #define B43legacy_RX_MAC_DEC        0x00000008 /* Decryption attempted */
0179 #define B43legacy_RX_MAC_PADDING    0x00000004 /* Pad bytes present */
0180 #define B43legacy_RX_MAC_RESP       0x00000002 /* Response frame xmitted */
0181 #define B43legacy_RX_MAC_FCSERR     0x00000001 /* FCS error */
0182
0183 /* RX channel */
0184 #define B43legacy_RX_CHAN_GAIN      0xFC00 /* Gain */
0185 #define B43legacy_RX_CHAN_GAIN_SHIFT    10
0186 #define B43legacy_RX_CHAN_ID        0x03FC /* Channel ID */
0187 #define B43legacy_RX_CHAN_ID_SHIFT  2
0188 #define B43legacy_RX_CHAN_PHYTYPE   0x0003 /* PHY type */
0189
0190
0191
0192 u8 b43legacy_plcp_get_ratecode_cck(const u8 bitrate);
0193 u8 b43legacy_plcp_get_ratecode_ofdm(const u8 bitrate);
0194
0195 void b43legacy_generate_plcp_hdr(struct b43legacy_plcp_hdr4 *plcp,
0196                    const u16 octets, const u8 bitrate);
0197
0198 void b43legacy_rx(struct b43legacy_wldev *dev,
0199         struct sk_buff *skb,
0200         const void *_rxhdr);
0201
0202 void b43legacy_handle_txstatus(struct b43legacy_wldev *dev,
0203                    const struct b43legacy_txstatus *status);
0204
0205 void b43legacy_handle_hwtxstatus(struct b43legacy_wldev *dev,
0206                  const struct b43legacy_hwtxstatus *hw);
0207
0208 void b43legacy_tx_suspend(struct b43legacy_wldev *dev);
0209 void b43legacy_tx_resume(struct b43legacy_wldev *dev);
0210
0211
0212 #define B43legacy_NR_QOSPARMS   22
0213 enum {
0214     B43legacy_QOSPARM_TXOP = 0,
0215     B43legacy_QOSPARM_CWMIN,
0216     B43legacy_QOSPARM_CWMAX,
0217     B43legacy_QOSPARM_CWCUR,
0218     B43legacy_QOSPARM_AIFS,
0219     B43legacy_QOSPARM_BSLOTS,
0220     B43legacy_QOSPARM_REGGAP,
0221     B43legacy_QOSPARM_STATUS,
0222 };
0223
0224 void b43legacy_qos_init(struct b43legacy_wldev *dev);
0225
0226
0227 /* Helper functions for converting the key-table index from "firmware-format"
0228  * to "raw-format" and back. The firmware API changed for this at some revision.
0229  * We need to account for that here. */
0230 static inline
0231 int b43legacy_new_kidx_api(struct b43legacy_wldev *dev)
0232 {
0233     /* FIXME: Not sure the change was at rev 351 */
0234     return (dev->fw.rev >= 351);
0235 }
0236 static inline
0237 u8 b43legacy_kidx_to_fw(struct b43legacy_wldev *dev, u8 raw_kidx)
0238 {
0239     u8 firmware_kidx;
0240     if (b43legacy_new_kidx_api(dev))
0241         firmware_kidx = raw_kidx;
0242     else {
0243         if (raw_kidx >= 4) /* Is per STA key? */
0244             firmware_kidx = raw_kidx - 4;
0245         else
0246             firmware_kidx = raw_kidx; /* TX default key */
0247     }
0248     return firmware_kidx;
0249 }
0250 static inline
0251 u8 b43legacy_kidx_to_raw(struct b43legacy_wldev *dev, u8 firmware_kidx)
0252 {
0253     u8 raw_kidx;
0254     if (b43legacy_new_kidx_api(dev))
0255         raw_kidx = firmware_kidx;
0256     else
0257         /* RX default keys or per STA keys */
0258         raw_kidx = firmware_kidx + 4;
0259     return raw_kidx;
0260 }
0261
0262 #endif /* B43legacy_XMIT_H_ */