0001
0002 #ifndef LINUX_B43_PHY_G_H_
0003 #define LINUX_B43_PHY_G_H_
0004
0005
0006 #include "phy_a.h"
0007
0008
0009 #define B43_PHY_VERSION_CCK B43_PHY_CCK(0x00)
0010 #define B43_PHY_CCKBBANDCFG B43_PHY_CCK(0x01)
0011 #define B43_PHY_PGACTL B43_PHY_CCK(0x15)
0012 #define B43_PHY_PGACTL_LPF 0x1000
0013 #define B43_PHY_PGACTL_LOWBANDW 0x0040
0014 #define B43_PHY_PGACTL_UNKNOWN 0xEFA0
0015 #define B43_PHY_FBCTL1 B43_PHY_CCK(0x18)
0016 #define B43_PHY_ITSSI B43_PHY_CCK(0x29)
0017 #define B43_PHY_LO_LEAKAGE B43_PHY_CCK(0x2D)
0018 #define B43_PHY_ENERGY B43_PHY_CCK(0x33)
0019 #define B43_PHY_SYNCCTL B43_PHY_CCK(0x35)
0020 #define B43_PHY_FBCTL2 B43_PHY_CCK(0x38)
0021 #define B43_PHY_DACCTL B43_PHY_CCK(0x60)
0022 #define B43_PHY_RCCALOVER B43_PHY_CCK(0x78)
0023
0024
0025 #define B43_PHY_CLASSCTL B43_PHY_EXTG(0x02)
0026 #define B43_PHY_GTABCTL B43_PHY_EXTG(0x03)
0027 #define B43_PHY_GTABOFF 0x03FF
0028 #define B43_PHY_GTABNR 0xFC00
0029 #define B43_PHY_GTABNR_SHIFT 10
0030 #define B43_PHY_GTABDATA B43_PHY_EXTG(0x04)
0031 #define B43_PHY_LO_MASK B43_PHY_EXTG(0x0F)
0032 #define B43_PHY_LO_CTL B43_PHY_EXTG(0x10)
0033 #define B43_PHY_RFOVER B43_PHY_EXTG(0x11)
0034 #define B43_PHY_RFOVERVAL B43_PHY_EXTG(0x12)
0035 #define B43_PHY_RFOVERVAL_EXTLNA 0x8000
0036 #define B43_PHY_RFOVERVAL_LNA 0x7000
0037 #define B43_PHY_RFOVERVAL_LNA_SHIFT 12
0038 #define B43_PHY_RFOVERVAL_PGA 0x0F00
0039 #define B43_PHY_RFOVERVAL_PGA_SHIFT 8
0040 #define B43_PHY_RFOVERVAL_UNK 0x0010
0041 #define B43_PHY_RFOVERVAL_TRSWRX 0x00E0
0042 #define B43_PHY_RFOVERVAL_BW 0x0003
0043 #define B43_PHY_RFOVERVAL_BW_LPF 0x0001
0044 #define B43_PHY_RFOVERVAL_BW_LBW 0x0002
0045 #define B43_PHY_ANALOGOVER B43_PHY_EXTG(0x14)
0046 #define B43_PHY_ANALOGOVERVAL B43_PHY_EXTG(0x15)
0047
0048
0049
0050 #define B43_GTAB(number, offset) (((number) << B43_PHY_GTABNR_SHIFT) | (offset))
0051 #define B43_GTAB_NRSSI B43_GTAB(0x00, 0)
0052 #define B43_GTAB_TRFEMW B43_GTAB(0x0C, 0x120)
0053 #define B43_GTAB_ORIGTR B43_GTAB(0x2E, 0x298)
0054
0055 u16 b43_gtab_read(struct b43_wldev *dev, u16 table, u16 offset);
0056 void b43_gtab_write(struct b43_wldev *dev, u16 table, u16 offset, u16 value);
0057
0058
0059
0060 #define has_tx_magnification(phy) \
0061 (((phy)->rev >= 2) && \
0062 ((phy)->radio_ver == 0x2050) && \
0063 ((phy)->radio_rev == 8))
0064
0065 #define has_loopback_gain(phy) \
0066 (((phy)->rev > 1) || ((phy)->gmode))
0067
0068
0069 struct b43_rfatt {
0070 u8 att;
0071 bool with_padmix;
0072 };
0073 struct b43_rfatt_list {
0074
0075 const struct b43_rfatt *list;
0076 u8 len;
0077
0078 u8 min_val;
0079 u8 max_val;
0080 };
0081
0082
0083 static inline bool b43_compare_rfatt(const struct b43_rfatt *a,
0084 const struct b43_rfatt *b)
0085 {
0086 return ((a->att == b->att) &&
0087 (a->with_padmix == b->with_padmix));
0088 }
0089
0090
0091 struct b43_bbatt {
0092 u8 att;
0093 };
0094 struct b43_bbatt_list {
0095
0096 const struct b43_bbatt *list;
0097 u8 len;
0098
0099 u8 min_val;
0100 u8 max_val;
0101 };
0102
0103
0104 static inline bool b43_compare_bbatt(const struct b43_bbatt *a,
0105 const struct b43_bbatt *b)
0106 {
0107 return (a->att == b->att);
0108 }
0109
0110
0111 #define B43_TXCTL_PA3DB 0x40
0112 #define B43_TXCTL_PA2DB 0x20
0113 #define B43_TXCTL_TXMIX 0x10
0114
0115 struct b43_txpower_lo_control;
0116
0117 struct b43_phy_g {
0118
0119 bool aci_enable;
0120 bool aci_wlan_automatic;
0121 bool aci_hw_rssi;
0122
0123
0124 bool radio_on;
0125 struct {
0126
0127
0128 bool valid;
0129 u16 rfover;
0130 u16 rfoverval;
0131 } radio_off_context;
0132
0133 u16 minlowsig[2];
0134 u16 minlowsigpos[2];
0135
0136
0137
0138 const s8 *tssi2dbm;
0139
0140 bool dyn_tssi_tbl;
0141
0142 int tgt_idle_tssi;
0143
0144 int cur_idle_tssi;
0145
0146 u8 average_tssi;
0147
0148 struct b43_bbatt bbatt;
0149 struct b43_rfatt rfatt;
0150 u8 tx_control;
0151
0152
0153 int bbatt_delta;
0154 int rfatt_delta;
0155
0156
0157 struct b43_txpower_lo_control *lo_control;
0158
0159 s16 max_lb_gain;
0160 s16 trsw_rx_gain;
0161 s16 lna_lod_gain;
0162 s16 lna_gain;
0163 s16 pga_gain;
0164
0165
0166 int interfmode;
0167
0168
0169
0170
0171
0172
0173
0174 #define B43_INTERFSTACK_SIZE 26
0175 u32 interfstack[B43_INTERFSTACK_SIZE];
0176
0177
0178 s16 nrssi[2];
0179 s32 nrssislope;
0180
0181 s8 nrssi_lt[64];
0182
0183 u16 lofcal;
0184
0185 u16 initval;
0186
0187
0188
0189
0190 u16 ofdmtab_addr;
0191 enum {
0192 B43_OFDMTAB_DIRECTION_UNKNOWN = 0,
0193 B43_OFDMTAB_DIRECTION_READ,
0194 B43_OFDMTAB_DIRECTION_WRITE,
0195 } ofdmtab_addr_direction;
0196 };
0197
0198 void b43_gphy_set_baseband_attenuation(struct b43_wldev *dev,
0199 u16 baseband_attenuation);
0200 void b43_gphy_channel_switch(struct b43_wldev *dev,
0201 unsigned int channel,
0202 bool synthetic_pu_workaround);
0203 u8 * b43_generate_dyn_tssi2dbm_tab(struct b43_wldev *dev,
0204 s16 pab0, s16 pab1, s16 pab2);
0205
0206 struct b43_phy_operations;
0207 extern const struct b43_phy_operations b43_phyops_g;
0208
0209 #endif