broadcom/b43/phy_ac.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef B43_PHY_AC_H_
0003 #define B43_PHY_AC_H_
0004
0005 #include "phy_common.h"
0006
0007 #define B43_PHY_AC_BBCFG            0x001
0008 #define  B43_PHY_AC_BBCFG_RSTCCA        0x4000  /* Reset CCA */
0009 #define B43_PHY_AC_BANDCTL          0x003   /* Band control */
0010 #define  B43_PHY_AC_BANDCTL_5GHZ        0x0001
0011 #define B43_PHY_AC_TABLE_ID         0x00d
0012 #define B43_PHY_AC_TABLE_OFFSET         0x00e
0013 #define B43_PHY_AC_TABLE_DATA1          0x00f
0014 #define B43_PHY_AC_TABLE_DATA2          0x010
0015 #define B43_PHY_AC_TABLE_DATA3          0x011
0016 #define B43_PHY_AC_CLASSCTL         0x140   /* Classifier control */
0017 #define  B43_PHY_AC_CLASSCTL_CCKEN      0x0001  /* CCK enable */
0018 #define  B43_PHY_AC_CLASSCTL_OFDMEN     0x0002  /* OFDM enable */
0019 #define  B43_PHY_AC_CLASSCTL_WAITEDEN       0x0004  /* Waited enable */
0020 #define B43_PHY_AC_BW1A             0x371
0021 #define B43_PHY_AC_BW2              0x372
0022 #define B43_PHY_AC_BW3              0x373
0023 #define B43_PHY_AC_BW4              0x374
0024 #define B43_PHY_AC_BW5              0x375
0025 #define B43_PHY_AC_BW6              0x376
0026 #define B43_PHY_AC_RFCTL_CMD            0x408
0027 #define B43_PHY_AC_C1_CLIP          0x6d4
0028 #define  B43_PHY_AC_C1_CLIP_DIS         0x4000
0029 #define B43_PHY_AC_C2_CLIP          0x8d4
0030 #define  B43_PHY_AC_C2_CLIP_DIS         0x4000
0031 #define B43_PHY_AC_C3_CLIP          0xad4
0032 #define  B43_PHY_AC_C3_CLIP_DIS         0x4000
0033
0034 struct b43_phy_ac {
0035 };
0036
0037 extern const struct b43_phy_operations b43_phyops_ac;
0038
0039 #endif /* B43_PHY_AC_H_ */