broadcom/b43/phy_a.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef LINUX_B43_PHY_A_H_
0003 #define LINUX_B43_PHY_A_H_
0004
0005 #include "phy_common.h"
0006
0007
0008 /* OFDM (A) PHY Registers */
0009 #define B43_PHY_VERSION_OFDM        B43_PHY_OFDM(0x00)  /* Versioning register for A-PHY */
0010 #define B43_PHY_BBANDCFG        B43_PHY_OFDM(0x01)  /* Baseband config */
0011 #define  B43_PHY_BBANDCFG_RXANT     0x180   /* RX Antenna selection */
0012 #define  B43_PHY_BBANDCFG_RXANT_SHIFT   7
0013 #define B43_PHY_PWRDOWN         B43_PHY_OFDM(0x03)  /* Powerdown */
0014 #define B43_PHY_CRSTHRES1_R1        B43_PHY_OFDM(0x06)  /* CRS Threshold 1 (phy.rev 1 only) */
0015 #define B43_PHY_LNAHPFCTL       B43_PHY_OFDM(0x1C)  /* LNA/HPF control */
0016 #define B43_PHY_LPFGAINCTL      B43_PHY_OFDM(0x20)  /* LPF Gain control */
0017 #define B43_PHY_ADIVRELATED     B43_PHY_OFDM(0x27)  /* FIXME rename */
0018 #define B43_PHY_CRS0            B43_PHY_OFDM(0x29)
0019 #define  B43_PHY_CRS0_EN        0x4000
0020 #define B43_PHY_PEAK_COUNT      B43_PHY_OFDM(0x30)
0021 #define B43_PHY_ANTDWELL        B43_PHY_OFDM(0x2B)  /* Antenna dwell */
0022 #define  B43_PHY_ANTDWELL_AUTODIV1  0x0100  /* Automatic RX diversity start antenna */
0023 #define B43_PHY_ENCORE          B43_PHY_OFDM(0x49)  /* "Encore" (RangeMax / BroadRange) */
0024 #define  B43_PHY_ENCORE_EN      0x0200  /* Encore enable */
0025 #define B43_PHY_LMS         B43_PHY_OFDM(0x55)
0026 #define B43_PHY_OFDM61          B43_PHY_OFDM(0x61)  /* FIXME rename */
0027 #define  B43_PHY_OFDM61_10      0x0010  /* FIXME rename */
0028 #define B43_PHY_IQBAL           B43_PHY_OFDM(0x69)  /* I/Q balance */
0029 #define B43_PHY_BBTXDC_BIAS     B43_PHY_OFDM(0x6B)  /* Baseband TX DC bias */
0030 #define B43_PHY_OTABLECTL       B43_PHY_OFDM(0x72)  /* OFDM table control (see below) */
0031 #define  B43_PHY_OTABLEOFF      0x03FF  /* OFDM table offset (see below) */
0032 #define  B43_PHY_OTABLENR       0xFC00  /* OFDM table number (see below) */
0033 #define  B43_PHY_OTABLENR_SHIFT     10
0034 #define B43_PHY_OTABLEI         B43_PHY_OFDM(0x73)  /* OFDM table data I */
0035 #define B43_PHY_OTABLEQ         B43_PHY_OFDM(0x74)  /* OFDM table data Q */
0036 #define B43_PHY_HPWR_TSSICTL        B43_PHY_OFDM(0x78)  /* Hardware power TSSI control */
0037 #define B43_PHY_ADCCTL          B43_PHY_OFDM(0x7A)  /* ADC control */
0038 #define B43_PHY_IDLE_TSSI       B43_PHY_OFDM(0x7B)
0039 #define B43_PHY_A_TEMP_SENSE        B43_PHY_OFDM(0x7C)  /* A PHY temperature sense */
0040 #define B43_PHY_NRSSITHRES      B43_PHY_OFDM(0x8A)  /* NRSSI threshold */
0041 #define B43_PHY_ANTWRSETT       B43_PHY_OFDM(0x8C)  /* Antenna WR settle */
0042 #define  B43_PHY_ANTWRSETT_ARXDIV   0x2000  /* Automatic RX diversity enabled */
0043 #define B43_PHY_CLIPPWRDOWNT        B43_PHY_OFDM(0x93)  /* Clip powerdown threshold */
0044 #define B43_PHY_OFDM9B          B43_PHY_OFDM(0x9B)  /* FIXME rename */
0045 #define B43_PHY_N1P1GAIN        B43_PHY_OFDM(0xA0)
0046 #define B43_PHY_P1P2GAIN        B43_PHY_OFDM(0xA1)
0047 #define B43_PHY_N1N2GAIN        B43_PHY_OFDM(0xA2)
0048 #define B43_PHY_CLIPTHRES       B43_PHY_OFDM(0xA3)
0049 #define B43_PHY_CLIPN1P2THRES       B43_PHY_OFDM(0xA4)
0050 #define B43_PHY_CCKSHIFTBITS_WA     B43_PHY_OFDM(0xA5)  /* CCK shiftbits workaround, FIXME rename */
0051 #define B43_PHY_CCKSHIFTBITS        B43_PHY_OFDM(0xA7)  /* FIXME rename */
0052 #define B43_PHY_DIVSRCHIDX      B43_PHY_OFDM(0xA8)  /* Divider search gain/index */
0053 #define B43_PHY_CLIPP2THRES     B43_PHY_OFDM(0xA9)
0054 #define B43_PHY_CLIPP3THRES     B43_PHY_OFDM(0xAA)
0055 #define B43_PHY_DIVP1P2GAIN     B43_PHY_OFDM(0xAB)
0056 #define B43_PHY_DIVSRCHGAINBACK     B43_PHY_OFDM(0xAD)  /* Divider search gain back */
0057 #define B43_PHY_DIVSRCHGAINCHNG     B43_PHY_OFDM(0xAE)  /* Divider search gain change */
0058 #define B43_PHY_CRSTHRES1       B43_PHY_OFDM(0xC0)  /* CRS Threshold 1 (phy.rev >= 2 only) */
0059 #define B43_PHY_CRSTHRES2       B43_PHY_OFDM(0xC1)  /* CRS Threshold 2 (phy.rev >= 2 only) */
0060 #define B43_PHY_TSSIP_LTBASE        B43_PHY_OFDM(0x380) /* TSSI power lookup table base */
0061 #define B43_PHY_DC_LTBASE       B43_PHY_OFDM(0x3A0) /* DC lookup table base */
0062 #define B43_PHY_GAIN_LTBASE     B43_PHY_OFDM(0x3C0) /* Gain lookup table base */
0063
0064 /*** OFDM table numbers ***/
0065 #define B43_OFDMTAB(number, offset) (((number) << B43_PHY_OTABLENR_SHIFT) | (offset))
0066 #define B43_OFDMTAB_AGC1        B43_OFDMTAB(0x00, 0)
0067 #define B43_OFDMTAB_GAIN0       B43_OFDMTAB(0x00, 0)
0068 #define B43_OFDMTAB_GAINX       B43_OFDMTAB(0x01, 0)    //TODO rename
0069 #define B43_OFDMTAB_GAIN1       B43_OFDMTAB(0x01, 4)
0070 #define B43_OFDMTAB_AGC3        B43_OFDMTAB(0x02, 0)
0071 #define B43_OFDMTAB_GAIN2       B43_OFDMTAB(0x02, 3)
0072 #define B43_OFDMTAB_LNAHPFGAIN1     B43_OFDMTAB(0x03, 0)
0073 #define B43_OFDMTAB_WRSSI       B43_OFDMTAB(0x04, 0)
0074 #define B43_OFDMTAB_LNAHPFGAIN2     B43_OFDMTAB(0x04, 0)
0075 #define B43_OFDMTAB_NOISESCALE      B43_OFDMTAB(0x05, 0)
0076 #define B43_OFDMTAB_AGC2        B43_OFDMTAB(0x06, 0)
0077 #define B43_OFDMTAB_ROTOR       B43_OFDMTAB(0x08, 0)
0078 #define B43_OFDMTAB_ADVRETARD       B43_OFDMTAB(0x09, 0)
0079 #define B43_OFDMTAB_DAC         B43_OFDMTAB(0x0C, 0)
0080 #define B43_OFDMTAB_DC          B43_OFDMTAB(0x0E, 7)
0081 #define B43_OFDMTAB_PWRDYN2     B43_OFDMTAB(0x0E, 12)
0082 #define B43_OFDMTAB_LNAGAIN     B43_OFDMTAB(0x0E, 13)
0083 #define B43_OFDMTAB_UNKNOWN_0F      B43_OFDMTAB(0x0F, 0)    //TODO rename
0084 #define B43_OFDMTAB_UNKNOWN_APHY    B43_OFDMTAB(0x0F, 7)    //TODO rename
0085 #define B43_OFDMTAB_LPFGAIN     B43_OFDMTAB(0x0F, 12)
0086 #define B43_OFDMTAB_RSSI        B43_OFDMTAB(0x10, 0)
0087 #define B43_OFDMTAB_UNKNOWN_11      B43_OFDMTAB(0x11, 4)    //TODO rename
0088 #define B43_OFDMTAB_AGC1_R1     B43_OFDMTAB(0x13, 0)
0089 #define B43_OFDMTAB_GAINX_R1        B43_OFDMTAB(0x14, 0)    //TODO remove!
0090 #define B43_OFDMTAB_MINSIGSQ        B43_OFDMTAB(0x14, 0)
0091 #define B43_OFDMTAB_AGC3_R1     B43_OFDMTAB(0x15, 0)
0092 #define B43_OFDMTAB_WRSSI_R1        B43_OFDMTAB(0x15, 4)
0093 #define B43_OFDMTAB_TSSI        B43_OFDMTAB(0x15, 0)
0094 #define B43_OFDMTAB_DACRFPABB       B43_OFDMTAB(0x16, 0)
0095 #define B43_OFDMTAB_DACOFF      B43_OFDMTAB(0x17, 0)
0096 #define B43_OFDMTAB_DCBIAS      B43_OFDMTAB(0x18, 0)
0097
0098 u16 b43_ofdmtab_read16(struct b43_wldev *dev, u16 table, u16 offset);
0099 void b43_ofdmtab_write16(struct b43_wldev *dev, u16 table,
0100              u16 offset, u16 value);
0101 u32 b43_ofdmtab_read32(struct b43_wldev *dev, u16 table, u16 offset);
0102 void b43_ofdmtab_write32(struct b43_wldev *dev, u16 table,
0103              u16 offset, u32 value);
0104
0105 #endif /* LINUX_B43_PHY_A_H_ */