ath/wcn36xx/wcn36xx.h

0001 /*
0002  * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
0003  *
0004  * Permission to use, copy, modify, and/or distribute this software for any
0005  * purpose with or without fee is hereby granted, provided that the above
0006  * copyright notice and this permission notice appear in all copies.
0007  *
0008  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
0009  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
0010  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
0011  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
0012  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
0013  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
0014  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
0015  */
0016
0017 #ifndef _WCN36XX_H_
0018 #define _WCN36XX_H_
0019
0020 #include <linux/completion.h>
0021 #include <linux/in6.h>
0022 #include <linux/printk.h>
0023 #include <linux/spinlock.h>
0024 #include <net/mac80211.h>
0025
0026 #include "hal.h"
0027 #include "smd.h"
0028 #include "txrx.h"
0029 #include "dxe.h"
0030 #include "pmc.h"
0031 #include "debug.h"
0032
0033 #define WLAN_NV_FILE               "wlan/prima/WCNSS_qcom_wlan_nv.bin"
0034 #define WCN36XX_AGGR_BUFFER_SIZE 64
0035
0036 extern unsigned int wcn36xx_dbg_mask;
0037
0038 enum wcn36xx_debug_mask {
0039     WCN36XX_DBG_DXE     = 0x00000001,
0040     WCN36XX_DBG_DXE_DUMP    = 0x00000002,
0041     WCN36XX_DBG_SMD     = 0x00000004,
0042     WCN36XX_DBG_SMD_DUMP    = 0x00000008,
0043     WCN36XX_DBG_RX      = 0x00000010,
0044     WCN36XX_DBG_RX_DUMP = 0x00000020,
0045     WCN36XX_DBG_TX      = 0x00000040,
0046     WCN36XX_DBG_TX_DUMP = 0x00000080,
0047     WCN36XX_DBG_HAL     = 0x00000100,
0048     WCN36XX_DBG_HAL_DUMP    = 0x00000200,
0049     WCN36XX_DBG_MAC     = 0x00000400,
0050     WCN36XX_DBG_BEACON  = 0x00000800,
0051     WCN36XX_DBG_BEACON_DUMP = 0x00001000,
0052     WCN36XX_DBG_PMC     = 0x00002000,
0053     WCN36XX_DBG_PMC_DUMP    = 0x00004000,
0054     WCN36XX_DBG_TESTMODE        = 0x00008000,
0055     WCN36XX_DBG_TESTMODE_DUMP   = 0x00010000,
0056     WCN36XX_DBG_ANY     = 0xffffffff,
0057 };
0058
0059 #define wcn36xx_err(fmt, arg...)                \
0060     printk(KERN_ERR pr_fmt("ERROR " fmt), ##arg)
0061
0062 #define wcn36xx_warn(fmt, arg...)               \
0063     printk(KERN_WARNING pr_fmt("WARNING " fmt), ##arg)
0064
0065 #define wcn36xx_info(fmt, arg...)       \
0066     printk(KERN_INFO pr_fmt(fmt), ##arg)
0067
0068 #define wcn36xx_dbg(mask, fmt, arg...) do {         \
0069     if (wcn36xx_dbg_mask & mask)                    \
0070         printk(KERN_DEBUG pr_fmt(fmt), ##arg);  \
0071 } while (0)
0072
0073 #define wcn36xx_dbg_dump(mask, prefix_str, buf, len) do {   \
0074     if (wcn36xx_dbg_mask & mask)                    \
0075         print_hex_dump(KERN_DEBUG, pr_fmt(prefix_str),  \
0076                    DUMP_PREFIX_OFFSET, 32, 1,   \
0077                    buf, len, false);        \
0078 } while (0)
0079
0080 enum wcn36xx_ampdu_state {
0081     WCN36XX_AMPDU_NONE,
0082     WCN36XX_AMPDU_INIT,
0083     WCN36XX_AMPDU_START,
0084     WCN36XX_AMPDU_OPERATIONAL,
0085 };
0086
0087 #define HW_VALUE_PHY_SHIFT 8
0088 #define HW_VALUE_PHY(hw_value) ((hw_value) >> HW_VALUE_PHY_SHIFT)
0089 #define HW_VALUE_CHANNEL(hw_value) ((hw_value) & 0xFF)
0090 #define WCN36XX_HW_CHANNEL(__wcn)\
0091     HW_VALUE_CHANNEL(__wcn->hw->conf.chandef.chan->hw_value)
0092 #define WCN36XX_BAND(__wcn) (__wcn->hw->conf.chandef.chan->band)
0093 #define WCN36XX_CENTER_FREQ(__wcn) (__wcn->hw->conf.chandef.chan->center_freq)
0094 #define WCN36XX_LISTEN_INTERVAL(__wcn) (__wcn->hw->conf.listen_interval)
0095 #define WCN36XX_FLAGS(__wcn) (__wcn->hw->flags)
0096 #define WCN36XX_MAX_POWER(__wcn) (__wcn->hw->conf.chandef.chan->max_power)
0097
0098 #define RF_UNKNOWN  0x0000
0099 #define RF_IRIS_WCN3620 0x3620
0100 #define RF_IRIS_WCN3660 0x3660
0101 #define RF_IRIS_WCN3680 0x3680
0102
0103 static inline void buff_to_be(u32 *buf, size_t len)
0104 {
0105     int i;
0106     for (i = 0; i < len; i++)
0107         buf[i] = cpu_to_be32(buf[i]);
0108 }
0109
0110 struct nv_data {
0111     int is_valid;
0112     u8  table;
0113 };
0114
0115 /**
0116  * struct wcn36xx_vif - holds VIF related fields
0117  *
0118  * @bss_index: bss_index is initially set to 0xFF. bss_index is received from
0119  * HW after first config_bss call and must be used in delete_bss and
0120  * enter/exit_bmps.
0121  */
0122 struct wcn36xx_vif {
0123     struct list_head list;
0124     u8 dtim_period;
0125     enum ani_ed_type encrypt_type;
0126     bool is_joining;
0127     bool sta_assoc;
0128     struct wcn36xx_hal_mac_ssid ssid;
0129     enum wcn36xx_hal_bss_type bss_type;
0130
0131     /* Power management */
0132     enum wcn36xx_power_state pw_state;
0133
0134     u8 bss_index;
0135     /* Returned from WCN36XX_HAL_ADD_STA_SELF_RSP */
0136     u8 self_sta_index;
0137     u8 self_dpu_desc_index;
0138     u8 self_ucast_dpu_sign;
0139
0140 #if IS_ENABLED(CONFIG_IPV6)
0141     /* IPv6 addresses for WoWLAN */
0142     struct in6_addr target_ipv6_addrs[WCN36XX_HAL_IPV6_OFFLOAD_ADDR_MAX];
0143     unsigned long tentative_addrs[BITS_TO_LONGS(WCN36XX_HAL_IPV6_OFFLOAD_ADDR_MAX)];
0144     int num_target_ipv6_addrs;
0145 #endif
0146     /* WoWLAN GTK rekey data */
0147     struct {
0148         u8 kck[NL80211_KCK_LEN], kek[NL80211_KEK_LEN];
0149         __le64 replay_ctr;
0150         bool valid;
0151     } rekey_data;
0152
0153     struct list_head sta_list;
0154
0155     int bmps_fail_ct;
0156 };
0157
0158 /**
0159  * struct wcn36xx_sta - holds STA related fields
0160  *
0161  * @tid: traffic ID that is used during AMPDU and in TX BD.
0162  * @sta_index: STA index is returned from HW after config_sta call and is
0163  * used in both SMD channel and TX BD.
0164  * @dpu_desc_index: DPU descriptor index is returned from HW after config_sta
0165  * call and is used in TX BD.
0166  * @bss_sta_index: STA index is returned from HW after config_bss call and is
0167  * used in both SMD channel and TX BD. See table bellow when it is used.
0168  * @bss_dpu_desc_index: DPU descriptor index is returned from HW after
0169  * config_bss call and is used in TX BD.
0170  * ______________________________________________
0171  * |          | STA |   AP  |
0172  * |______________|_____________|_______________|
0173  * |    TX BD     |bss_sta_index|   sta_index   |
0174  * |______________|_____________|_______________|
0175  * |all SMD calls |bss_sta_index|   sta_index   |
0176  * |______________|_____________|_______________|
0177  * |smd_delete_sta|  sta_index  |   sta_index   |
0178  * |______________|_____________|_______________|
0179  */
0180 struct wcn36xx_sta {
0181     struct list_head list;
0182     struct wcn36xx_vif *vif;
0183     u16 aid;
0184     u16 tid;
0185     u8 sta_index;
0186     u8 dpu_desc_index;
0187     u8 ucast_dpu_sign;
0188     u8 bss_sta_index;
0189     u8 bss_dpu_desc_index;
0190     bool is_data_encrypted;
0191     /* Rates */
0192     struct wcn36xx_hal_supported_rates_v1 supported_rates;
0193
0194     spinlock_t ampdu_lock;      /* protects next two fields */
0195     enum wcn36xx_ampdu_state ampdu_state[16];
0196     int non_agg_frame_ct;
0197 };
0198
0199 struct wcn36xx_dxe_ch;
0200
0201 struct wcn36xx_chan_survey {
0202     s8  rssi;
0203     u8  snr;
0204 };
0205
0206 struct wcn36xx {
0207     struct ieee80211_hw *hw;
0208     struct device       *dev;
0209     struct list_head    vif_list;
0210
0211     const char      *nv_file;
0212     const struct firmware   *nv;
0213
0214     u8          fw_revision;
0215     u8          fw_version;
0216     u8          fw_minor;
0217     u8          fw_major;
0218     u32         fw_feat_caps[WCN36XX_HAL_CAPS_SIZE];
0219     bool            is_pronto;
0220
0221     /* extra byte for the NULL termination */
0222     u8          crm_version[WCN36XX_HAL_VERSION_LENGTH + 1];
0223     u8          wlan_version[WCN36XX_HAL_VERSION_LENGTH + 1];
0224
0225     bool        first_boot;
0226
0227     /* IRQs */
0228     int         tx_irq;
0229     int         rx_irq;
0230     void __iomem        *ccu_base;
0231     void __iomem        *dxe_base;
0232
0233     struct rpmsg_endpoint   *smd_channel;
0234
0235     struct qcom_smem_state  *tx_enable_state;
0236     unsigned        tx_enable_state_bit;
0237     struct qcom_smem_state  *tx_rings_empty_state;
0238     unsigned        tx_rings_empty_state_bit;
0239
0240     /* prevents concurrent FW reconfiguration */
0241     struct mutex        conf_mutex;
0242
0243     /*
0244      * smd_buf must be protected with smd_mutex to garantee
0245      * that all messages are sent one after another
0246      */
0247     u8          *hal_buf;
0248     size_t          hal_rsp_len;
0249     struct mutex        hal_mutex;
0250     struct completion   hal_rsp_compl;
0251     struct workqueue_struct *hal_ind_wq;
0252     struct work_struct  hal_ind_work;
0253     spinlock_t      hal_ind_lock;
0254     struct list_head    hal_ind_queue;
0255
0256     struct cfg80211_scan_request *scan_req;
0257     bool            sw_scan;
0258     u8          sw_scan_opchannel;
0259     bool            sw_scan_init;
0260     u8          sw_scan_channel;
0261     struct ieee80211_vif    *sw_scan_vif;
0262     struct mutex        scan_lock;
0263     bool            scan_aborted;
0264
0265     /* DXE channels */
0266     struct wcn36xx_dxe_ch   dxe_tx_l_ch;    /* TX low */
0267     struct wcn36xx_dxe_ch   dxe_tx_h_ch;    /* TX high */
0268     struct wcn36xx_dxe_ch   dxe_rx_l_ch;    /* RX low */
0269     struct wcn36xx_dxe_ch   dxe_rx_h_ch;    /* RX high */
0270
0271     /* For synchronization of DXE resources from BH, IRQ and WQ contexts */
0272     spinlock_t  dxe_lock;
0273     bool                    queues_stopped;
0274
0275     /* Memory pools */
0276     struct wcn36xx_dxe_mem_pool mgmt_mem_pool;
0277     struct wcn36xx_dxe_mem_pool data_mem_pool;
0278
0279     struct sk_buff      *tx_ack_skb;
0280     struct timer_list   tx_ack_timer;
0281
0282     /* For A-MSDU re-aggregation */
0283     struct sk_buff_head amsdu;
0284
0285     /* RF module */
0286     unsigned        rf_id;
0287
0288 #ifdef CONFIG_WCN36XX_DEBUGFS
0289     /* Debug file system entry */
0290     struct wcn36xx_dfs_entry    dfs;
0291 #endif /* CONFIG_WCN36XX_DEBUGFS */
0292
0293     struct ieee80211_supported_band *band;
0294     struct ieee80211_channel *channel;
0295
0296     spinlock_t survey_lock;     /* protects chan_survey */
0297     struct wcn36xx_chan_survey  *chan_survey;
0298 };
0299
0300 static inline bool wcn36xx_is_fw_version(struct wcn36xx *wcn,
0301                      u8 major,
0302                      u8 minor,
0303                      u8 version,
0304                      u8 revision)
0305 {
0306     return (wcn->fw_major == major &&
0307         wcn->fw_minor == minor &&
0308         wcn->fw_version == version &&
0309         wcn->fw_revision == revision);
0310 }
0311 void wcn36xx_set_default_rates(struct wcn36xx_hal_supported_rates *rates);
0312 void wcn36xx_set_default_rates_v1(struct wcn36xx_hal_supported_rates_v1 *rates);
0313
0314 static inline
0315 struct ieee80211_sta *wcn36xx_priv_to_sta(struct wcn36xx_sta *sta_priv)
0316 {
0317     return container_of((void *)sta_priv, struct ieee80211_sta, drv_priv);
0318 }
0319
0320 static inline
0321 struct wcn36xx_vif *wcn36xx_vif_to_priv(struct ieee80211_vif *vif)
0322 {
0323     return (struct wcn36xx_vif *) vif->drv_priv;
0324 }
0325
0326 static inline
0327 struct ieee80211_vif *wcn36xx_priv_to_vif(struct wcn36xx_vif *vif_priv)
0328 {
0329     return container_of((void *) vif_priv, struct ieee80211_vif, drv_priv);
0330 }
0331
0332 static inline
0333 struct wcn36xx_sta *wcn36xx_sta_to_priv(struct ieee80211_sta *sta)
0334 {
0335     return (struct wcn36xx_sta *)sta->drv_priv;
0336 }
0337
0338 #endif  /* _WCN36XX_H_ */