ath/carl9170/fwcmd.h

0001 /*
0002  * Shared Atheros AR9170 Header
0003  *
0004  * Firmware command interface definitions
0005  *
0006  * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
0007  * Copyright 2009-2011 Christian Lamparter <chunkeey@googlemail.com>
0008  *
0009  * This program is free software; you can redistribute it and/or modify
0010  * it under the terms of the GNU General Public License as published by
0011  * the Free Software Foundation; either version 2 of the License.
0012  *
0013  * This program is distributed in the hope that it will be useful,
0014  * but WITHOUT ANY WARRANTY; without even the implied warranty of
0015  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0016  * GNU General Public License for more details.
0017  *
0018  * You should have received a copy of the GNU General Public License
0019  * along with this program; see the file COPYING.  If not, see
0020  * http://www.gnu.org/licenses/.
0021  *
0022  * This file incorporates work covered by the following copyright and
0023  * permission notice:
0024  *    Copyright (c) 2007-2008 Atheros Communications, Inc.
0025  *
0026  *    Permission to use, copy, modify, and/or distribute this software for any
0027  *    purpose with or without fee is hereby granted, provided that the above
0028  *    copyright notice and this permission notice appear in all copies.
0029  *
0030  *    THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
0031  *    WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
0032  *    MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
0033  *    ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
0034  *    WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
0035  *    ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
0036  *    OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
0037  */
0038
0039 #ifndef __CARL9170_SHARED_FWCMD_H
0040 #define __CARL9170_SHARED_FWCMD_H
0041
0042 #define CARL9170_MAX_CMD_LEN        64
0043 #define CARL9170_MAX_CMD_PAYLOAD_LEN    60
0044
0045 #define CARL9170FW_API_MIN_VER      1
0046 #define CARL9170FW_API_MAX_VER      1
0047
0048 enum carl9170_cmd_oids {
0049     CARL9170_CMD_RREG       = 0x00,
0050     CARL9170_CMD_WREG       = 0x01,
0051     CARL9170_CMD_ECHO       = 0x02,
0052     CARL9170_CMD_SWRST      = 0x03,
0053     CARL9170_CMD_REBOOT     = 0x04,
0054     CARL9170_CMD_BCN_CTRL       = 0x05,
0055     CARL9170_CMD_READ_TSF       = 0x06,
0056     CARL9170_CMD_RX_FILTER      = 0x07,
0057     CARL9170_CMD_WOL        = 0x08,
0058     CARL9170_CMD_TALLY      = 0x09,
0059     CARL9170_CMD_WREGB      = 0x0a,
0060
0061     /* CAM */
0062     CARL9170_CMD_EKEY       = 0x10,
0063     CARL9170_CMD_DKEY       = 0x11,
0064
0065     /* RF / PHY */
0066     CARL9170_CMD_FREQUENCY      = 0x20,
0067     CARL9170_CMD_RF_INIT        = 0x21,
0068     CARL9170_CMD_SYNTH      = 0x22,
0069     CARL9170_CMD_FREQ_START     = 0x23,
0070     CARL9170_CMD_PSM        = 0x24,
0071
0072     /* Asychronous command flag */
0073     CARL9170_CMD_ASYNC_FLAG     = 0x40,
0074     CARL9170_CMD_WREG_ASYNC     = (CARL9170_CMD_WREG |
0075                        CARL9170_CMD_ASYNC_FLAG),
0076     CARL9170_CMD_REBOOT_ASYNC   = (CARL9170_CMD_REBOOT |
0077                        CARL9170_CMD_ASYNC_FLAG),
0078     CARL9170_CMD_BCN_CTRL_ASYNC = (CARL9170_CMD_BCN_CTRL |
0079                        CARL9170_CMD_ASYNC_FLAG),
0080     CARL9170_CMD_PSM_ASYNC      = (CARL9170_CMD_PSM |
0081                        CARL9170_CMD_ASYNC_FLAG),
0082
0083     /* responses and traps */
0084     CARL9170_RSP_FLAG       = 0xc0,
0085     CARL9170_RSP_PRETBTT        = 0xc0,
0086     CARL9170_RSP_TXCOMP     = 0xc1,
0087     CARL9170_RSP_BEACON_CONFIG  = 0xc2,
0088     CARL9170_RSP_ATIM       = 0xc3,
0089     CARL9170_RSP_WATCHDOG       = 0xc6,
0090     CARL9170_RSP_TEXT       = 0xca,
0091     CARL9170_RSP_HEXDUMP        = 0xcc,
0092     CARL9170_RSP_RADAR      = 0xcd,
0093     CARL9170_RSP_GPIO       = 0xce,
0094     CARL9170_RSP_BOOT       = 0xcf,
0095 };
0096
0097 struct carl9170_set_key_cmd {
0098     __le16      user;
0099     __le16      keyId;
0100     __le16      type;
0101     u8      macAddr[6];
0102     u32     key[4];
0103 } __packed __aligned(4);
0104 #define CARL9170_SET_KEY_CMD_SIZE       28
0105
0106 struct carl9170_disable_key_cmd {
0107     __le16      user;
0108     __le16      padding;
0109 } __packed __aligned(4);
0110 #define CARL9170_DISABLE_KEY_CMD_SIZE       4
0111
0112 struct carl9170_u32_list {
0113     u32 vals[0];
0114 } __packed;
0115
0116 struct carl9170_reg_list {
0117     __le32      regs[0];
0118 } __packed;
0119
0120 struct carl9170_write_reg {
0121     struct {
0122         __le32      addr;
0123         __le32      val;
0124     } regs[0] __packed;
0125 } __packed;
0126
0127 struct carl9170_write_reg_byte {
0128     __le32  addr;
0129     __le32  count;
0130     u8  val[];
0131 } __packed;
0132
0133 #define CARL9170FW_PHY_HT_ENABLE        0x4
0134 #define CARL9170FW_PHY_HT_DYN2040       0x8
0135 #define CARL9170FW_PHY_HT_EXT_CHAN_OFF      0x3
0136 #define CARL9170FW_PHY_HT_EXT_CHAN_OFF_S    2
0137
0138 struct carl9170_rf_init {
0139     __le32      freq;
0140     u8      ht_settings;
0141     u8      padding2[3];
0142     __le32      delta_slope_coeff_exp;
0143     __le32      delta_slope_coeff_man;
0144     __le32      delta_slope_coeff_exp_shgi;
0145     __le32      delta_slope_coeff_man_shgi;
0146     __le32      finiteLoopCount;
0147 } __packed;
0148 #define CARL9170_RF_INIT_SIZE       28
0149
0150 struct carl9170_rf_init_result {
0151     __le32      ret;        /* AR9170_PHY_REG_AGC_CONTROL */
0152 } __packed;
0153 #define CARL9170_RF_INIT_RESULT_SIZE    4
0154
0155 #define CARL9170_PSM_SLEEP      0x1000
0156 #define CARL9170_PSM_SOFTWARE       0
0157 #define CARL9170_PSM_WAKE       0 /* internally used. */
0158 #define CARL9170_PSM_COUNTER        0xfff
0159 #define CARL9170_PSM_COUNTER_S      0
0160
0161 struct carl9170_psm {
0162     __le32      state;
0163 } __packed;
0164 #define CARL9170_PSM_SIZE       4
0165
0166 /*
0167  * Note: If a bit in rx_filter is set, then it
0168  * means that the particular frames which matches
0169  * the condition are FILTERED/REMOVED/DISCARDED!
0170  * (This is can be a bit confusing, especially
0171  * because someone people think it's the exact
0172  * opposite way, so watch out!)
0173  */
0174 struct carl9170_rx_filter_cmd {
0175     __le32      rx_filter;
0176 } __packed;
0177 #define CARL9170_RX_FILTER_CMD_SIZE 4
0178
0179 #define CARL9170_RX_FILTER_BAD      0x01
0180 #define CARL9170_RX_FILTER_OTHER_RA 0x02
0181 #define CARL9170_RX_FILTER_DECRY_FAIL   0x04
0182 #define CARL9170_RX_FILTER_CTL_OTHER    0x08
0183 #define CARL9170_RX_FILTER_CTL_PSPOLL   0x10
0184 #define CARL9170_RX_FILTER_CTL_BACKR    0x20
0185 #define CARL9170_RX_FILTER_MGMT     0x40
0186 #define CARL9170_RX_FILTER_DATA     0x80
0187 #define CARL9170_RX_FILTER_EVERYTHING   (~0)
0188
0189 struct carl9170_bcn_ctrl_cmd {
0190     __le32      vif_id;
0191     __le32      mode;
0192     __le32      bcn_addr;
0193     __le32      bcn_len;
0194 } __packed;
0195 #define CARL9170_BCN_CTRL_CMD_SIZE  16
0196
0197 #define CARL9170_BCN_CTRL_DRAIN 0
0198 #define CARL9170_BCN_CTRL_CAB_TRIGGER   1
0199
0200 struct carl9170_wol_cmd {
0201     __le32      flags;
0202     u8      mac[6];
0203     u8      bssid[6];
0204     __le32      null_interval;
0205     __le32      free_for_use2;
0206     __le32      mask;
0207     u8      pattern[32];
0208 } __packed;
0209
0210 #define CARL9170_WOL_CMD_SIZE       60
0211
0212 #define CARL9170_WOL_DISCONNECT     1
0213 #define CARL9170_WOL_MAGIC_PKT      2
0214
0215 struct carl9170_cmd_head {
0216     union {
0217         struct {
0218             u8  len;
0219             u8  cmd;
0220             u8  seq;
0221             u8  ext;
0222         } __packed;
0223
0224         u32 hdr_data;
0225     } __packed;
0226 } __packed;
0227
0228 struct carl9170_cmd {
0229     struct carl9170_cmd_head hdr;
0230     union {
0231         struct carl9170_set_key_cmd setkey;
0232         struct carl9170_disable_key_cmd disablekey;
0233         struct carl9170_u32_list    echo;
0234         struct carl9170_reg_list    rreg;
0235         struct carl9170_write_reg   wreg;
0236         struct carl9170_write_reg_byte  wregb;
0237         struct carl9170_rf_init     rf_init;
0238         struct carl9170_psm     psm;
0239         struct carl9170_wol_cmd     wol;
0240         struct carl9170_bcn_ctrl_cmd    bcn_ctrl;
0241         struct carl9170_rx_filter_cmd   rx_filter;
0242         u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];
0243     } __packed __aligned(4);
0244 } __packed __aligned(4);
0245
0246 #define CARL9170_TX_STATUS_QUEUE    3
0247 #define CARL9170_TX_STATUS_QUEUE_S  0
0248 #define CARL9170_TX_STATUS_RIX_S    2
0249 #define CARL9170_TX_STATUS_RIX      (3 << CARL9170_TX_STATUS_RIX_S)
0250 #define CARL9170_TX_STATUS_TRIES_S  4
0251 #define CARL9170_TX_STATUS_TRIES    (7 << CARL9170_TX_STATUS_TRIES_S)
0252 #define CARL9170_TX_STATUS_SUCCESS  0x80
0253
0254 #ifdef __CARL9170FW__
0255 /*
0256  * NOTE:
0257  * Both structs [carl9170_tx_status and _carl9170_tx_status]
0258  * need to be "bit for bit" in sync.
0259  */
0260 struct carl9170_tx_status {
0261     /*
0262      * Beware of compiler bugs in all gcc pre 4.4!
0263      */
0264
0265     u8 cookie;
0266     u8 queue:2;
0267     u8 rix:2;
0268     u8 tries:3;
0269     u8 success:1;
0270 } __packed;
0271 #endif /* __CARL9170FW__ */
0272
0273 struct _carl9170_tx_status {
0274     /*
0275      * This version should be immune to all alignment bugs.
0276      */
0277
0278     u8 cookie;
0279     u8 info;
0280 } __packed;
0281 #define CARL9170_TX_STATUS_SIZE     2
0282
0283 #define CARL9170_RSP_TX_STATUS_NUM  (CARL9170_MAX_CMD_PAYLOAD_LEN / \
0284                      sizeof(struct _carl9170_tx_status))
0285
0286 #define CARL9170_TX_MAX_RATE_TRIES  7
0287
0288 #define CARL9170_TX_MAX_RATES       4
0289 #define CARL9170_TX_MAX_RETRY_RATES (CARL9170_TX_MAX_RATES - 1)
0290 #define CARL9170_ERR_MAGIC      "ERR:"
0291 #define CARL9170_BUG_MAGIC      "BUG:"
0292
0293 struct carl9170_gpio {
0294     __le32 gpio;
0295 } __packed;
0296 #define CARL9170_GPIO_SIZE      4
0297
0298 struct carl9170_tsf_rsp {
0299     union {
0300         __le32 tsf[2];
0301         __le64 tsf_64;
0302     } __packed;
0303 } __packed;
0304 #define CARL9170_TSF_RSP_SIZE       8
0305
0306 struct carl9170_tally_rsp {
0307     __le32 active;
0308     __le32 cca;
0309     __le32 tx_time;
0310     __le32 rx_total;
0311     __le32 rx_overrun;
0312     __le32 tick;
0313 } __packed;
0314
0315 struct carl9170_rsp {
0316     struct carl9170_cmd_head hdr;
0317
0318     union {
0319         struct carl9170_rf_init_result  rf_init_res;
0320         struct carl9170_u32_list    rreg_res;
0321         struct carl9170_u32_list    echo;
0322 #ifdef __CARL9170FW__
0323         struct carl9170_tx_status   tx_status[0];
0324 #endif /* __CARL9170FW__ */
0325         struct _carl9170_tx_status  _tx_status[0];
0326         struct carl9170_gpio        gpio;
0327         struct carl9170_tsf_rsp     tsf;
0328         struct carl9170_psm     psm;
0329         struct carl9170_tally_rsp   tally;
0330         u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];
0331     } __packed;
0332 } __packed __aligned(4);
0333
0334 #endif /* __CARL9170_SHARED_FWCMD_H */