ath/carl9170/debug.h

0001 /*
0002  * Atheros CARL9170 driver
0003  *
0004  * debug header
0005  *
0006  * Copyright 2010, Christian Lamparter <chunkeey@googlemail.com>
0007  *
0008  * This program is free software; you can redistribute it and/or modify
0009  * it under the terms of the GNU General Public License as published by
0010  * the Free Software Foundation; either version 2 of the License, or
0011  * (at your option) any later version.
0012  *
0013  * This program is distributed in the hope that it will be useful,
0014  * but WITHOUT ANY WARRANTY; without even the implied warranty of
0015  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0016  * GNU General Public License for more details.
0017  *
0018  * You should have received a copy of the GNU General Public License
0019  * along with this program; see the file COPYING.  If not, see
0020  * http://www.gnu.org/licenses/.
0021  *
0022  * This file incorporates work covered by the following copyright and
0023  * permission notice:
0024  *    Copyright (c) 2007-2008 Atheros Communications, Inc.
0025  *
0026  *    Permission to use, copy, modify, and/or distribute this software for any
0027  *    purpose with or without fee is hereby granted, provided that the above
0028  *    copyright notice and this permission notice appear in all copies.
0029  *
0030  *    THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
0031  *    WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
0032  *    MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
0033  *    ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
0034  *    WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
0035  *    ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
0036  *    OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
0037  */
0038 #ifndef __DEBUG_H
0039 #define __DEBUG_H
0040
0041 #include "eeprom.h"
0042 #include "wlan.h"
0043 #include "hw.h"
0044 #include "fwdesc.h"
0045 #include "fwcmd.h"
0046 #include "../regd.h"
0047
0048 struct hw_stat_reg_entry {
0049     u32 reg;
0050     char nreg[32];
0051 };
0052
0053 #define STAT_MAC_REG(reg)   \
0054     { (AR9170_MAC_REG_##reg), #reg }
0055
0056 #define STAT_PTA_REG(reg)   \
0057     { (AR9170_PTA_REG_##reg), #reg }
0058
0059 #define STAT_USB_REG(reg)   \
0060     { (AR9170_USB_REG_##reg), #reg }
0061
0062 static const struct hw_stat_reg_entry hw_rx_tally_regs[] = {
0063     STAT_MAC_REG(RX_CRC32),     STAT_MAC_REG(RX_CRC16),
0064     STAT_MAC_REG(RX_TIMEOUT_COUNT), STAT_MAC_REG(RX_ERR_DECRYPTION_UNI),
0065     STAT_MAC_REG(RX_ERR_DECRYPTION_MUL), STAT_MAC_REG(RX_MPDU),
0066     STAT_MAC_REG(RX_DROPPED_MPDU),  STAT_MAC_REG(RX_DEL_MPDU),
0067 };
0068
0069 static const struct hw_stat_reg_entry hw_phy_errors_regs[] = {
0070     STAT_MAC_REG(RX_PHY_MISC_ERROR), STAT_MAC_REG(RX_PHY_XR_ERROR),
0071     STAT_MAC_REG(RX_PHY_OFDM_ERROR), STAT_MAC_REG(RX_PHY_CCK_ERROR),
0072     STAT_MAC_REG(RX_PHY_HT_ERROR), STAT_MAC_REG(RX_PHY_TOTAL),
0073 };
0074
0075 static const struct hw_stat_reg_entry hw_tx_tally_regs[] = {
0076     STAT_MAC_REG(TX_TOTAL),     STAT_MAC_REG(TX_UNDERRUN),
0077     STAT_MAC_REG(TX_RETRY),
0078 };
0079
0080 static const struct hw_stat_reg_entry hw_wlan_queue_regs[] = {
0081     STAT_MAC_REG(DMA_STATUS),   STAT_MAC_REG(DMA_TRIGGER),
0082     STAT_MAC_REG(DMA_TXQ0_ADDR),    STAT_MAC_REG(DMA_TXQ0_CURR_ADDR),
0083     STAT_MAC_REG(DMA_TXQ1_ADDR),    STAT_MAC_REG(DMA_TXQ1_CURR_ADDR),
0084     STAT_MAC_REG(DMA_TXQ2_ADDR),    STAT_MAC_REG(DMA_TXQ2_CURR_ADDR),
0085     STAT_MAC_REG(DMA_TXQ3_ADDR),    STAT_MAC_REG(DMA_TXQ3_CURR_ADDR),
0086     STAT_MAC_REG(DMA_RXQ_ADDR), STAT_MAC_REG(DMA_RXQ_CURR_ADDR),
0087 };
0088
0089 static const struct hw_stat_reg_entry hw_ampdu_info_regs[] = {
0090     STAT_MAC_REG(AMPDU_DENSITY),    STAT_MAC_REG(AMPDU_FACTOR),
0091 };
0092
0093 static const struct hw_stat_reg_entry hw_pta_queue_regs[] = {
0094     STAT_PTA_REG(DN_CURR_ADDRH),    STAT_PTA_REG(DN_CURR_ADDRL),
0095     STAT_PTA_REG(UP_CURR_ADDRH),    STAT_PTA_REG(UP_CURR_ADDRL),
0096     STAT_PTA_REG(DMA_STATUS),   STAT_PTA_REG(DMA_MODE_CTRL),
0097 };
0098
0099 #define DEFINE_TALLY(name)                  \
0100     u32 name##_sum[ARRAY_SIZE(name##_regs)],        \
0101         name##_counter[ARRAY_SIZE(name##_regs)]     \
0102
0103 #define DEFINE_STAT(name)                   \
0104     u32 name##_counter[ARRAY_SIZE(name##_regs)]     \
0105
0106 struct ath_stats {
0107     DEFINE_TALLY(hw_tx_tally);
0108     DEFINE_TALLY(hw_rx_tally);
0109     DEFINE_TALLY(hw_phy_errors);
0110     DEFINE_STAT(hw_wlan_queue);
0111     DEFINE_STAT(hw_pta_queue);
0112     DEFINE_STAT(hw_ampdu_info);
0113 };
0114
0115 struct carl9170_debug_mem_rbe {
0116     u32 reg;
0117     u32 value;
0118 };
0119
0120 #define CARL9170_DEBUG_RING_SIZE            64
0121
0122 struct carl9170_debug {
0123     struct ath_stats stats;
0124     struct carl9170_debug_mem_rbe ring[CARL9170_DEBUG_RING_SIZE];
0125     struct mutex ring_lock;
0126     unsigned int ring_head, ring_tail;
0127     struct delayed_work update_tally;
0128 };
0129
0130 struct ar9170;
0131
0132 void carl9170_debugfs_register(struct ar9170 *ar);
0133 void carl9170_debugfs_unregister(struct ar9170 *ar);
0134 #endif /* __DEBUG_H */