ath/ath9k/phy.h

0001 /*
0002  * Copyright (c) 2008-2011 Atheros Communications Inc.
0003  *
0004  * Permission to use, copy, modify, and/or distribute this software for any
0005  * purpose with or without fee is hereby granted, provided that the above
0006  * copyright notice and this permission notice appear in all copies.
0007  *
0008  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
0009  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
0010  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
0011  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
0012  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
0013  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
0014  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
0015  */
0016
0017 #ifndef PHY_H
0018 #define PHY_H
0019
0020 #define CHANSEL_DIV     15
0021 #define CHANSEL_2G(_freq)   (((_freq) * 0x10000) / CHANSEL_DIV)
0022 #define CHANSEL_5G(_freq)   (((_freq) * 0x8000) / CHANSEL_DIV)
0023
0024 #define AR_PHY_BASE     0x9800
0025 #define AR_PHY(_n)      (AR_PHY_BASE + ((_n)<<2))
0026
0027 #define AR_PHY_TX_PWRCTRL_TX_GAIN_TAB_MAX   0x0007E000
0028 #define AR_PHY_TX_PWRCTRL_TX_GAIN_TAB_MAX_S 13
0029 #define AR_PHY_TX_GAIN_CLC       0x0000001E
0030 #define AR_PHY_TX_GAIN_CLC_S     1
0031 #define AR_PHY_TX_GAIN           0x0007F000
0032 #define AR_PHY_TX_GAIN_S         12
0033
0034 #define AR_PHY_CLC_TBL1      0xa35c
0035 #define AR_PHY_CLC_I0        0x07ff0000
0036 #define AR_PHY_CLC_I0_S      16
0037 #define AR_PHY_CLC_Q0        0x0000ffd0
0038 #define AR_PHY_CLC_Q0_S      5
0039
0040 #define ANTSWAP_AB 0x0001
0041 #define REDUCE_CHAIN_0 0x00000050
0042 #define REDUCE_CHAIN_1 0x00000051
0043 #define AR_PHY_CHIP_ID 0x9818
0044
0045 #define AR_PHY_TIMING11_SPUR_FREQ_SD        0x3FF00000
0046 #define AR_PHY_TIMING11_SPUR_FREQ_SD_S      20
0047
0048 #define AR_PHY_PLL_CONTROL 0x16180
0049 #define AR_PHY_PLL_MODE 0x16184
0050
0051 enum ath9k_ant_div_comb_lna_conf {
0052     ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
0053     ATH_ANT_DIV_COMB_LNA2,
0054     ATH_ANT_DIV_COMB_LNA1,
0055     ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2,
0056 };
0057
0058 #endif