ath/ath9k/hw-ops.h

0001 /*
0002  * Copyright (c) 2010-2011 Atheros Communications Inc.
0003  *
0004  * Permission to use, copy, modify, and/or distribute this software for any
0005  * purpose with or without fee is hereby granted, provided that the above
0006  * copyright notice and this permission notice appear in all copies.
0007  *
0008  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
0009  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
0010  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
0011  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
0012  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
0013  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
0014  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
0015  */
0016
0017 #ifndef ATH9K_HW_OPS_H
0018 #define ATH9K_HW_OPS_H
0019
0020 #include "hw.h"
0021
0022 /* Hardware core and driver accessible callbacks */
0023
0024 static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
0025                            bool power_off)
0026 {
0027     if (!ah->aspm_enabled)
0028         return;
0029
0030     ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);
0031 }
0032
0033 static inline void ath9k_hw_rxena(struct ath_hw *ah)
0034 {
0035     ath9k_hw_ops(ah)->rx_enable(ah);
0036 }
0037
0038 static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds,
0039                       u32 link)
0040 {
0041     ath9k_hw_ops(ah)->set_desc_link(ds, link);
0042 }
0043
0044 static inline int ath9k_hw_calibrate(struct ath_hw *ah,
0045                      struct ath9k_channel *chan,
0046                      u8 rxchainmask, bool longcal)
0047 {
0048     return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
0049 }
0050
0051 static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked,
0052                    u32 *sync_cause_p)
0053 {
0054     return ath9k_hw_ops(ah)->get_isr(ah, masked, sync_cause_p);
0055 }
0056
0057 static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds,
0058                        struct ath_tx_info *i)
0059 {
0060     return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i);
0061 }
0062
0063 static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
0064                       struct ath_tx_status *ts)
0065 {
0066     return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
0067 }
0068
0069 static inline int ath9k_hw_get_duration(struct ath_hw *ah, const void *ds,
0070                     int index)
0071 {
0072     return ath9k_hw_ops(ah)->get_duration(ah, ds, index);
0073 }
0074
0075 static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
0076         struct ath_hw_antcomb_conf *antconf)
0077 {
0078     ath9k_hw_ops(ah)->antdiv_comb_conf_get(ah, antconf);
0079 }
0080
0081 static inline void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
0082         struct ath_hw_antcomb_conf *antconf)
0083 {
0084     ath9k_hw_ops(ah)->antdiv_comb_conf_set(ah, antconf);
0085 }
0086
0087 static inline void ath9k_hw_tx99_start(struct ath_hw *ah, u32 qnum)
0088 {
0089     ath9k_hw_ops(ah)->tx99_start(ah, qnum);
0090 }
0091
0092 static inline void ath9k_hw_tx99_stop(struct ath_hw *ah)
0093 {
0094     ath9k_hw_ops(ah)->tx99_stop(ah);
0095 }
0096
0097 static inline void ath9k_hw_tx99_set_txpower(struct ath_hw *ah, u8 power)
0098 {
0099     if (ath9k_hw_ops(ah)->tx99_set_txpower)
0100         ath9k_hw_ops(ah)->tx99_set_txpower(ah, power);
0101 }
0102
0103 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
0104
0105 static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
0106 {
0107     if (ath9k_hw_ops(ah)->set_bt_ant_diversity)
0108         ath9k_hw_ops(ah)->set_bt_ant_diversity(ah, enable);
0109 }
0110
0111 static inline bool ath9k_hw_is_aic_enabled(struct ath_hw *ah)
0112 {
0113     if (ath9k_hw_private_ops(ah)->is_aic_enabled)
0114         return ath9k_hw_private_ops(ah)->is_aic_enabled(ah);
0115
0116     return false;
0117 }
0118
0119 #endif
0120
0121 /* Private hardware call ops */
0122
0123 static inline void ath9k_hw_init_hang_checks(struct ath_hw *ah)
0124 {
0125     ath9k_hw_private_ops(ah)->init_hang_checks(ah);
0126 }
0127
0128 static inline bool ath9k_hw_detect_mac_hang(struct ath_hw *ah)
0129 {
0130     return ath9k_hw_private_ops(ah)->detect_mac_hang(ah);
0131 }
0132
0133 static inline bool ath9k_hw_detect_bb_hang(struct ath_hw *ah)
0134 {
0135     return ath9k_hw_private_ops(ah)->detect_bb_hang(ah);
0136 }
0137
0138 /* PHY ops */
0139
0140 static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah,
0141                        struct ath9k_channel *chan)
0142 {
0143     return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan);
0144 }
0145
0146 static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
0147                            struct ath9k_channel *chan)
0148 {
0149     ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
0150 }
0151
0152 static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
0153                     struct ath9k_channel *chan,
0154                     u16 modesIndex)
0155 {
0156     if (!ath9k_hw_private_ops(ah)->set_rf_regs)
0157         return true;
0158
0159     return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex);
0160 }
0161
0162 static inline void ath9k_hw_init_bb(struct ath_hw *ah,
0163                     struct ath9k_channel *chan)
0164 {
0165     return ath9k_hw_private_ops(ah)->init_bb(ah, chan);
0166 }
0167
0168 static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah,
0169                          struct ath9k_channel *chan)
0170 {
0171     return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan);
0172 }
0173
0174 static inline int ath9k_hw_process_ini(struct ath_hw *ah,
0175                     struct ath9k_channel *chan)
0176 {
0177     return ath9k_hw_private_ops(ah)->process_ini(ah, chan);
0178 }
0179
0180 static inline void ath9k_olc_init(struct ath_hw *ah)
0181 {
0182     if (!ath9k_hw_private_ops(ah)->olc_init)
0183         return;
0184
0185     return ath9k_hw_private_ops(ah)->olc_init(ah);
0186 }
0187
0188 static inline void ath9k_hw_set_rfmode(struct ath_hw *ah,
0189                        struct ath9k_channel *chan)
0190 {
0191     return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan);
0192 }
0193
0194 static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah)
0195 {
0196     return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah);
0197 }
0198
0199 static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah,
0200                         struct ath9k_channel *chan)
0201 {
0202     return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan);
0203 }
0204
0205 static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah)
0206 {
0207     return ath9k_hw_private_ops(ah)->rfbus_req(ah);
0208 }
0209
0210 static inline void ath9k_hw_rfbus_done(struct ath_hw *ah)
0211 {
0212     return ath9k_hw_private_ops(ah)->rfbus_done(ah);
0213 }
0214
0215 static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
0216 {
0217     if (!ath9k_hw_private_ops(ah)->restore_chainmask)
0218         return;
0219
0220     return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
0221 }
0222
0223 static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
0224                     enum ath9k_ani_cmd cmd, int param)
0225 {
0226     return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param);
0227 }
0228
0229 static inline void ath9k_hw_do_getnf(struct ath_hw *ah,
0230                      int16_t nfarray[NUM_NF_READINGS])
0231 {
0232     ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray);
0233 }
0234
0235 static inline bool ath9k_hw_init_cal(struct ath_hw *ah,
0236                      struct ath9k_channel *chan)
0237 {
0238     return ath9k_hw_private_ops(ah)->init_cal(ah, chan);
0239 }
0240
0241 static inline void ath9k_hw_setup_calibration(struct ath_hw *ah,
0242                           struct ath9k_cal_list *currCal)
0243 {
0244     ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
0245 }
0246
0247 static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah,
0248                         struct ath9k_channel *chan,
0249                         u8 *ini_reloaded)
0250 {
0251     return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan,
0252                               ini_reloaded);
0253 }
0254
0255 static inline void ath9k_hw_set_radar_params(struct ath_hw *ah)
0256 {
0257     if (!ath9k_hw_private_ops(ah)->set_radar_params)
0258         return;
0259
0260     ath9k_hw_private_ops(ah)->set_radar_params(ah, &ah->radar_conf);
0261 }
0262
0263 static inline void ath9k_hw_init_cal_settings(struct ath_hw *ah)
0264 {
0265     ath9k_hw_private_ops(ah)->init_cal_settings(ah);
0266 }
0267
0268 static inline u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
0269                            struct ath9k_channel *chan)
0270 {
0271     return ath9k_hw_private_ops(ah)->compute_pll_control(ah, chan);
0272 }
0273
0274 static inline void ath9k_hw_init_mode_gain_regs(struct ath_hw *ah)
0275 {
0276     if (!ath9k_hw_private_ops(ah)->init_mode_gain_regs)
0277         return;
0278
0279     ath9k_hw_private_ops(ah)->init_mode_gain_regs(ah);
0280 }
0281
0282 static inline void ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah)
0283 {
0284     if (!ath9k_hw_private_ops(ah)->ani_cache_ini_regs)
0285         return;
0286
0287     ath9k_hw_private_ops(ah)->ani_cache_ini_regs(ah);
0288 }
0289
0290 #endif /* ATH9K_HW_OPS_H */