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0017 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0018
0019 #include "htc.h"
0020
0021 MODULE_AUTHOR("Atheros Communications");
0022 MODULE_LICENSE("Dual BSD/GPL");
0023 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
0024
0025 static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
0026 module_param_named(debug, ath9k_debug, uint, 0);
0027 MODULE_PARM_DESC(debug, "Debugging mask");
0028
0029 int htc_modparam_nohwcrypt;
0030 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
0031 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
0032
0033 static int ath9k_htc_btcoex_enable;
0034 module_param_named(btcoex_enable, ath9k_htc_btcoex_enable, int, 0444);
0035 MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence");
0036
0037 static int ath9k_ps_enable;
0038 module_param_named(ps_enable, ath9k_ps_enable, int, 0444);
0039 MODULE_PARM_DESC(ps_enable, "Enable WLAN PowerSave");
0040
0041 int htc_use_dev_fw = 0;
0042 module_param_named(use_dev_fw, htc_use_dev_fw, int, 0444);
0043 MODULE_PARM_DESC(use_dev_fw, "Use development FW version");
0044
0045 #ifdef CONFIG_MAC80211_LEDS
0046 int ath9k_htc_led_blink = 1;
0047 module_param_named(blink, ath9k_htc_led_blink, int, 0444);
0048 MODULE_PARM_DESC(blink, "Enable LED blink on activity");
0049
0050 static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = {
0051 { .throughput = 0 * 1024, .blink_time = 334 },
0052 { .throughput = 1 * 1024, .blink_time = 260 },
0053 { .throughput = 5 * 1024, .blink_time = 220 },
0054 { .throughput = 10 * 1024, .blink_time = 190 },
0055 { .throughput = 20 * 1024, .blink_time = 170 },
0056 { .throughput = 50 * 1024, .blink_time = 150 },
0057 { .throughput = 70 * 1024, .blink_time = 130 },
0058 { .throughput = 100 * 1024, .blink_time = 110 },
0059 { .throughput = 200 * 1024, .blink_time = 80 },
0060 { .throughput = 300 * 1024, .blink_time = 50 },
0061 };
0062 #endif
0063
0064 static void ath9k_htc_op_ps_wakeup(struct ath_common *common)
0065 {
0066 ath9k_htc_ps_wakeup((struct ath9k_htc_priv *) common->priv);
0067 }
0068
0069 static void ath9k_htc_op_ps_restore(struct ath_common *common)
0070 {
0071 ath9k_htc_ps_restore((struct ath9k_htc_priv *) common->priv);
0072 }
0073
0074 static const struct ath_ps_ops ath9k_htc_ps_ops = {
0075 .wakeup = ath9k_htc_op_ps_wakeup,
0076 .restore = ath9k_htc_op_ps_restore,
0077 };
0078
0079 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
0080 {
0081 unsigned long time_left;
0082
0083 if (atomic_read(&priv->htc->tgt_ready) > 0) {
0084 atomic_dec(&priv->htc->tgt_ready);
0085 return 0;
0086 }
0087
0088
0089 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
0090 if (!time_left) {
0091 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
0092 return -ETIMEDOUT;
0093 }
0094
0095 atomic_dec(&priv->htc->tgt_ready);
0096
0097 return 0;
0098 }
0099
0100 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
0101 {
0102 ath9k_hw_deinit(priv->ah);
0103 kfree(priv->ah);
0104 priv->ah = NULL;
0105 }
0106
0107 static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
0108 {
0109 struct ieee80211_hw *hw = priv->hw;
0110
0111 wiphy_rfkill_stop_polling(hw->wiphy);
0112 ath9k_deinit_leds(priv);
0113 ath9k_htc_deinit_debug(priv);
0114 ieee80211_unregister_hw(hw);
0115 ath9k_rx_cleanup(priv);
0116 ath9k_tx_cleanup(priv);
0117 ath9k_deinit_priv(priv);
0118 }
0119
0120 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
0121 u16 service_id,
0122 void (*tx) (void *,
0123 struct sk_buff *,
0124 enum htc_endpoint_id,
0125 bool txok),
0126 enum htc_endpoint_id *ep_id)
0127 {
0128 struct htc_service_connreq req;
0129
0130 memset(&req, 0, sizeof(struct htc_service_connreq));
0131
0132 req.service_id = service_id;
0133 req.ep_callbacks.priv = priv;
0134 req.ep_callbacks.rx = ath9k_htc_rxep;
0135 req.ep_callbacks.tx = tx;
0136
0137 return htc_connect_service(priv->htc, &req, ep_id);
0138 }
0139
0140 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
0141 u32 drv_info)
0142 {
0143 int ret;
0144
0145
0146 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
0147 if (ret)
0148 goto err;
0149
0150
0151 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
0152 &priv->beacon_ep);
0153 if (ret)
0154 goto err;
0155
0156
0157 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
0158 &priv->cab_ep);
0159 if (ret)
0160 goto err;
0161
0162
0163
0164 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
0165 &priv->uapsd_ep);
0166 if (ret)
0167 goto err;
0168
0169
0170 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
0171 &priv->mgmt_ep);
0172 if (ret)
0173 goto err;
0174
0175
0176 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
0177 &priv->data_be_ep);
0178 if (ret)
0179 goto err;
0180
0181
0182 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
0183 &priv->data_bk_ep);
0184 if (ret)
0185 goto err;
0186
0187
0188 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
0189 &priv->data_vi_ep);
0190 if (ret)
0191 goto err;
0192
0193
0194 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
0195 &priv->data_vo_ep);
0196 if (ret)
0197 goto err;
0198
0199
0200
0201
0202
0203
0204
0205 if (IS_AR7010_DEVICE(drv_info))
0206 priv->htc->credits = 45;
0207 else
0208 priv->htc->credits = 33;
0209
0210 ret = htc_init(priv->htc);
0211 if (ret)
0212 goto err;
0213
0214 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
0215 priv->htc->credits);
0216
0217 return 0;
0218
0219 err:
0220 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
0221 return ret;
0222 }
0223
0224 static void ath9k_reg_notifier(struct wiphy *wiphy,
0225 struct regulatory_request *request)
0226 {
0227 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
0228 struct ath9k_htc_priv *priv = hw->priv;
0229
0230 ath_reg_notifier_apply(wiphy, request,
0231 ath9k_hw_regulatory(priv->ah));
0232 }
0233
0234 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
0235 {
0236 struct ath_hw *ah = hw_priv;
0237 struct ath_common *common = ath9k_hw_common(ah);
0238 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0239 __be32 val, reg = cpu_to_be32(reg_offset);
0240 int r;
0241
0242 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
0243 (u8 *) ®, sizeof(reg),
0244 (u8 *) &val, sizeof(val),
0245 100);
0246 if (unlikely(r)) {
0247 ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n",
0248 reg_offset, r);
0249 return -1;
0250 }
0251
0252 return be32_to_cpu(val);
0253 }
0254
0255 static void ath9k_multi_regread(void *hw_priv, u32 *addr,
0256 u32 *val, u16 count)
0257 {
0258 struct ath_hw *ah = hw_priv;
0259 struct ath_common *common = ath9k_hw_common(ah);
0260 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0261 __be32 tmpaddr[8];
0262 __be32 tmpval[8];
0263 int i, ret;
0264
0265 for (i = 0; i < count; i++) {
0266 tmpaddr[i] = cpu_to_be32(addr[i]);
0267 }
0268
0269 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
0270 (u8 *)tmpaddr , sizeof(u32) * count,
0271 (u8 *)tmpval, sizeof(u32) * count,
0272 100);
0273 if (unlikely(ret)) {
0274 ath_dbg(common, WMI,
0275 "Multiple REGISTER READ FAILED (count: %d)\n", count);
0276 }
0277
0278 for (i = 0; i < count; i++) {
0279 val[i] = be32_to_cpu(tmpval[i]);
0280 }
0281 }
0282
0283 static void ath9k_regwrite_multi(struct ath_common *common)
0284 {
0285 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0286 u32 rsp_status;
0287 int r;
0288
0289 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
0290 (u8 *) &priv->wmi->multi_write,
0291 sizeof(struct register_write) * priv->wmi->multi_write_idx,
0292 (u8 *) &rsp_status, sizeof(rsp_status),
0293 100);
0294 if (unlikely(r)) {
0295 ath_dbg(common, WMI,
0296 "REGISTER WRITE FAILED, multi len: %d\n",
0297 priv->wmi->multi_write_idx);
0298 }
0299 priv->wmi->multi_write_idx = 0;
0300 }
0301
0302 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
0303 {
0304 struct ath_hw *ah = hw_priv;
0305 struct ath_common *common = ath9k_hw_common(ah);
0306 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0307 const __be32 buf[2] = {
0308 cpu_to_be32(reg_offset),
0309 cpu_to_be32(val),
0310 };
0311 int r;
0312
0313 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
0314 (u8 *) &buf, sizeof(buf),
0315 (u8 *) &val, sizeof(val),
0316 100);
0317 if (unlikely(r)) {
0318 ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n",
0319 reg_offset, r);
0320 }
0321 }
0322
0323 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
0324 {
0325 struct ath_hw *ah = hw_priv;
0326 struct ath_common *common = ath9k_hw_common(ah);
0327 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0328
0329 mutex_lock(&priv->wmi->multi_write_mutex);
0330
0331
0332 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
0333 cpu_to_be32(reg_offset);
0334 priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
0335 cpu_to_be32(val);
0336
0337 priv->wmi->multi_write_idx++;
0338
0339
0340 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER)
0341 ath9k_regwrite_multi(common);
0342
0343 mutex_unlock(&priv->wmi->multi_write_mutex);
0344 }
0345
0346 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
0347 {
0348 struct ath_hw *ah = hw_priv;
0349 struct ath_common *common = ath9k_hw_common(ah);
0350 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0351
0352 if (atomic_read(&priv->wmi->mwrite_cnt))
0353 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
0354 else
0355 ath9k_regwrite_single(hw_priv, val, reg_offset);
0356 }
0357
0358 static void ath9k_enable_regwrite_buffer(void *hw_priv)
0359 {
0360 struct ath_hw *ah = hw_priv;
0361 struct ath_common *common = ath9k_hw_common(ah);
0362 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0363
0364 atomic_inc(&priv->wmi->mwrite_cnt);
0365 }
0366
0367 static void ath9k_regwrite_flush(void *hw_priv)
0368 {
0369 struct ath_hw *ah = hw_priv;
0370 struct ath_common *common = ath9k_hw_common(ah);
0371 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0372
0373 atomic_dec(&priv->wmi->mwrite_cnt);
0374
0375 mutex_lock(&priv->wmi->multi_write_mutex);
0376
0377 if (priv->wmi->multi_write_idx)
0378 ath9k_regwrite_multi(common);
0379
0380 mutex_unlock(&priv->wmi->multi_write_mutex);
0381 }
0382
0383 static void ath9k_reg_rmw_buffer(void *hw_priv,
0384 u32 reg_offset, u32 set, u32 clr)
0385 {
0386 struct ath_hw *ah = hw_priv;
0387 struct ath_common *common = ath9k_hw_common(ah);
0388 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0389 u32 rsp_status;
0390 int r;
0391
0392 mutex_lock(&priv->wmi->multi_rmw_mutex);
0393
0394
0395 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].reg =
0396 cpu_to_be32(reg_offset);
0397 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].set =
0398 cpu_to_be32(set);
0399 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].clr =
0400 cpu_to_be32(clr);
0401
0402 priv->wmi->multi_rmw_idx++;
0403
0404
0405 if (priv->wmi->multi_rmw_idx == MAX_RMW_CMD_NUMBER) {
0406 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
0407 (u8 *) &priv->wmi->multi_rmw,
0408 sizeof(struct register_write) * priv->wmi->multi_rmw_idx,
0409 (u8 *) &rsp_status, sizeof(rsp_status),
0410 100);
0411 if (unlikely(r)) {
0412 ath_dbg(common, WMI,
0413 "REGISTER RMW FAILED, multi len: %d\n",
0414 priv->wmi->multi_rmw_idx);
0415 }
0416 priv->wmi->multi_rmw_idx = 0;
0417 }
0418
0419 mutex_unlock(&priv->wmi->multi_rmw_mutex);
0420 }
0421
0422 static void ath9k_reg_rmw_flush(void *hw_priv)
0423 {
0424 struct ath_hw *ah = hw_priv;
0425 struct ath_common *common = ath9k_hw_common(ah);
0426 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0427 u32 rsp_status;
0428 int r;
0429
0430 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
0431 return;
0432
0433 atomic_dec(&priv->wmi->m_rmw_cnt);
0434
0435 mutex_lock(&priv->wmi->multi_rmw_mutex);
0436
0437 if (priv->wmi->multi_rmw_idx) {
0438 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
0439 (u8 *) &priv->wmi->multi_rmw,
0440 sizeof(struct register_rmw) * priv->wmi->multi_rmw_idx,
0441 (u8 *) &rsp_status, sizeof(rsp_status),
0442 100);
0443 if (unlikely(r)) {
0444 ath_dbg(common, WMI,
0445 "REGISTER RMW FAILED, multi len: %d\n",
0446 priv->wmi->multi_rmw_idx);
0447 }
0448 priv->wmi->multi_rmw_idx = 0;
0449 }
0450
0451 mutex_unlock(&priv->wmi->multi_rmw_mutex);
0452 }
0453
0454 static void ath9k_enable_rmw_buffer(void *hw_priv)
0455 {
0456 struct ath_hw *ah = hw_priv;
0457 struct ath_common *common = ath9k_hw_common(ah);
0458 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0459
0460 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
0461 return;
0462
0463 atomic_inc(&priv->wmi->m_rmw_cnt);
0464 }
0465
0466 static void ath9k_reg_rmw_single(void *hw_priv,
0467 u32 reg_offset, u32 set, u32 clr)
0468 {
0469 struct ath_hw *ah = hw_priv;
0470 struct ath_common *common = ath9k_hw_common(ah);
0471 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0472 struct register_rmw buf, buf_ret;
0473 int ret;
0474
0475 buf.reg = cpu_to_be32(reg_offset);
0476 buf.set = cpu_to_be32(set);
0477 buf.clr = cpu_to_be32(clr);
0478
0479 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
0480 (u8 *) &buf, sizeof(buf),
0481 (u8 *) &buf_ret, sizeof(buf_ret),
0482 100);
0483 if (unlikely(ret)) {
0484 ath_dbg(common, WMI, "REGISTER RMW FAILED:(0x%04x, %d)\n",
0485 reg_offset, ret);
0486 }
0487 }
0488
0489 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
0490 {
0491 struct ath_hw *ah = hw_priv;
0492 struct ath_common *common = ath9k_hw_common(ah);
0493 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
0494
0495 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags)) {
0496 u32 val;
0497
0498 val = REG_READ(ah, reg_offset);
0499 val &= ~clr;
0500 val |= set;
0501 REG_WRITE(ah, reg_offset, val);
0502
0503 return 0;
0504 }
0505
0506 if (atomic_read(&priv->wmi->m_rmw_cnt))
0507 ath9k_reg_rmw_buffer(hw_priv, reg_offset, set, clr);
0508 else
0509 ath9k_reg_rmw_single(hw_priv, reg_offset, set, clr);
0510
0511 return 0;
0512 }
0513
0514 static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
0515 {
0516 *csz = L1_CACHE_BYTES >> 2;
0517 }
0518
0519 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
0520 {
0521 struct ath_hw *ah = (struct ath_hw *) common->ah;
0522
0523 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
0524
0525 if (!ath9k_hw_wait(ah,
0526 AR_EEPROM_STATUS_DATA,
0527 AR_EEPROM_STATUS_DATA_BUSY |
0528 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
0529 AH_WAIT_TIMEOUT))
0530 return false;
0531
0532 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
0533 AR_EEPROM_STATUS_DATA_VAL);
0534
0535 return true;
0536 }
0537
0538 static const struct ath_bus_ops ath9k_usb_bus_ops = {
0539 .ath_bus_type = ATH_USB,
0540 .read_cachesize = ath_usb_read_cachesize,
0541 .eeprom_read = ath_usb_eeprom_read,
0542 };
0543
0544 static int ath9k_init_queues(struct ath9k_htc_priv *priv)
0545 {
0546 struct ath_common *common = ath9k_hw_common(priv->ah);
0547 int i;
0548
0549 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
0550 priv->hwq_map[i] = -1;
0551
0552 priv->beacon.beaconq = ath9k_hw_beaconq_setup(priv->ah);
0553 if (priv->beacon.beaconq == -1) {
0554 ath_err(common, "Unable to setup BEACON xmit queue\n");
0555 goto err;
0556 }
0557
0558 priv->cabq = ath9k_htc_cabq_setup(priv);
0559 if (priv->cabq == -1) {
0560 ath_err(common, "Unable to setup CAB xmit queue\n");
0561 goto err;
0562 }
0563
0564 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BE)) {
0565 ath_err(common, "Unable to setup xmit queue for BE traffic\n");
0566 goto err;
0567 }
0568
0569 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BK)) {
0570 ath_err(common, "Unable to setup xmit queue for BK traffic\n");
0571 goto err;
0572 }
0573 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VI)) {
0574 ath_err(common, "Unable to setup xmit queue for VI traffic\n");
0575 goto err;
0576 }
0577 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VO)) {
0578 ath_err(common, "Unable to setup xmit queue for VO traffic\n");
0579 goto err;
0580 }
0581
0582 return 0;
0583
0584 err:
0585 return -EINVAL;
0586 }
0587
0588 static void ath9k_init_misc(struct ath9k_htc_priv *priv)
0589 {
0590 struct ath_common *common = ath9k_hw_common(priv->ah);
0591
0592 eth_broadcast_addr(common->bssidmask);
0593
0594 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
0595 priv->ah->opmode = NL80211_IFTYPE_STATION;
0596
0597 priv->spec_priv.ah = priv->ah;
0598 priv->spec_priv.spec_config.enabled = 0;
0599 priv->spec_priv.spec_config.short_repeat = true;
0600 priv->spec_priv.spec_config.count = 8;
0601 priv->spec_priv.spec_config.endless = false;
0602 priv->spec_priv.spec_config.period = 0x12;
0603 priv->spec_priv.spec_config.fft_period = 0x02;
0604 }
0605
0606 static int ath9k_init_priv(struct ath9k_htc_priv *priv,
0607 u16 devid, char *product,
0608 u32 drv_info)
0609 {
0610 struct ath_hw *ah = NULL;
0611 struct ath_common *common;
0612 int i, ret = 0, csz = 0;
0613
0614 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
0615 if (!ah)
0616 return -ENOMEM;
0617
0618 ah->dev = priv->dev;
0619 ah->hw = priv->hw;
0620 ah->hw_version.devid = devid;
0621 ah->hw_version.usbdev = drv_info;
0622 ah->ah_flags |= AH_USE_EEPROM;
0623 ah->reg_ops.read = ath9k_regread;
0624 ah->reg_ops.multi_read = ath9k_multi_regread;
0625 ah->reg_ops.write = ath9k_regwrite;
0626 ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
0627 ah->reg_ops.write_flush = ath9k_regwrite_flush;
0628 ah->reg_ops.enable_rmw_buffer = ath9k_enable_rmw_buffer;
0629 ah->reg_ops.rmw_flush = ath9k_reg_rmw_flush;
0630 ah->reg_ops.rmw = ath9k_reg_rmw;
0631 priv->ah = ah;
0632
0633 common = ath9k_hw_common(ah);
0634 common->ops = &ah->reg_ops;
0635 common->ps_ops = &ath9k_htc_ps_ops;
0636 common->bus_ops = &ath9k_usb_bus_ops;
0637 common->ah = ah;
0638 common->hw = priv->hw;
0639 common->priv = priv;
0640 common->debug_mask = ath9k_debug;
0641 common->btcoex_enabled = ath9k_htc_btcoex_enable == 1;
0642 set_bit(ATH_OP_INVALID, &common->op_flags);
0643
0644 spin_lock_init(&priv->beacon_lock);
0645 spin_lock_init(&priv->tx.tx_lock);
0646 mutex_init(&priv->mutex);
0647 mutex_init(&priv->htc_pm_lock);
0648 tasklet_setup(&priv->rx_tasklet, ath9k_rx_tasklet);
0649 tasklet_setup(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet);
0650 INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work);
0651 INIT_WORK(&priv->ps_work, ath9k_ps_work);
0652 INIT_WORK(&priv->fatal_work, ath9k_fatal_work);
0653 timer_setup(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer, 0);
0654
0655
0656
0657
0658
0659 ath_read_cachesize(common, &csz);
0660 common->cachelsz = csz << 2;
0661
0662 ret = ath9k_hw_init(ah);
0663 if (ret) {
0664 ath_err(common,
0665 "Unable to initialize hardware; initialization status: %d\n",
0666 ret);
0667 goto err_hw;
0668 }
0669
0670 ret = ath9k_init_queues(priv);
0671 if (ret)
0672 goto err_queues;
0673
0674 for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++)
0675 priv->beacon.bslot[i] = NULL;
0676 priv->beacon.slottime = 9;
0677
0678 ath9k_cmn_init_channels_rates(common);
0679 ath9k_cmn_init_crypto(ah);
0680 ath9k_init_misc(priv);
0681 ath9k_htc_init_btcoex(priv, product);
0682
0683 return 0;
0684
0685 err_queues:
0686 ath9k_hw_deinit(ah);
0687 err_hw:
0688
0689 kfree(ah);
0690 priv->ah = NULL;
0691
0692 return ret;
0693 }
0694
0695 static const struct ieee80211_iface_limit if_limits[] = {
0696 { .max = 2, .types = BIT(NL80211_IFTYPE_STATION) |
0697 BIT(NL80211_IFTYPE_P2P_CLIENT) },
0698 { .max = 2, .types = BIT(NL80211_IFTYPE_AP) |
0699 #ifdef CONFIG_MAC80211_MESH
0700 BIT(NL80211_IFTYPE_MESH_POINT) |
0701 #endif
0702 BIT(NL80211_IFTYPE_P2P_GO) },
0703 };
0704
0705 static const struct ieee80211_iface_combination if_comb = {
0706 .limits = if_limits,
0707 .n_limits = ARRAY_SIZE(if_limits),
0708 .max_interfaces = 2,
0709 .num_different_channels = 1,
0710 };
0711
0712 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
0713 struct ieee80211_hw *hw)
0714 {
0715 struct ath_hw *ah = priv->ah;
0716 struct ath_common *common = ath9k_hw_common(priv->ah);
0717 struct base_eep_header *pBase;
0718
0719 ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
0720 ieee80211_hw_set(hw, MFP_CAPABLE);
0721 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
0722 ieee80211_hw_set(hw, PS_NULLFUNC_STACK);
0723 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
0724 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
0725 ieee80211_hw_set(hw, SPECTRUM_MGMT);
0726 ieee80211_hw_set(hw, SIGNAL_DBM);
0727 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
0728 ieee80211_hw_set(hw, DOESNT_SUPPORT_QOS_NDP);
0729
0730 if (ath9k_ps_enable)
0731 ieee80211_hw_set(hw, SUPPORTS_PS);
0732
0733 hw->wiphy->interface_modes =
0734 BIT(NL80211_IFTYPE_STATION) |
0735 BIT(NL80211_IFTYPE_ADHOC) |
0736 BIT(NL80211_IFTYPE_AP) |
0737 BIT(NL80211_IFTYPE_P2P_GO) |
0738 BIT(NL80211_IFTYPE_P2P_CLIENT) |
0739 BIT(NL80211_IFTYPE_MESH_POINT) |
0740 BIT(NL80211_IFTYPE_OCB);
0741
0742 hw->wiphy->iface_combinations = &if_comb;
0743 hw->wiphy->n_iface_combinations = 1;
0744
0745 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
0746
0747 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN |
0748 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
0749 WIPHY_FLAG_HAS_CHANNEL_SWITCH;
0750
0751 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS;
0752
0753 hw->queues = 4;
0754 hw->max_listen_interval = 1;
0755
0756 hw->vif_data_size = sizeof(struct ath9k_htc_vif);
0757 hw->sta_data_size = sizeof(struct ath9k_htc_sta);
0758
0759
0760 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
0761 sizeof(struct htc_frame_hdr) + 4;
0762
0763 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
0764 hw->wiphy->bands[NL80211_BAND_2GHZ] =
0765 &common->sbands[NL80211_BAND_2GHZ];
0766 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
0767 hw->wiphy->bands[NL80211_BAND_5GHZ] =
0768 &common->sbands[NL80211_BAND_5GHZ];
0769
0770 ath9k_cmn_reload_chainmask(ah);
0771
0772 pBase = ath9k_htc_get_eeprom_base(priv);
0773 if (pBase) {
0774 hw->wiphy->available_antennas_rx = pBase->rxMask;
0775 hw->wiphy->available_antennas_tx = pBase->txMask;
0776 }
0777
0778 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
0779
0780 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
0781 wiphy_ext_feature_set(hw->wiphy,
0782 NL80211_EXT_FEATURE_MULTICAST_REGISTRATIONS);
0783 }
0784
0785 static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv)
0786 {
0787 struct ieee80211_hw *hw = priv->hw;
0788 struct wmi_fw_version cmd_rsp;
0789 int ret;
0790
0791 memset(&cmd_rsp, 0, sizeof(cmd_rsp));
0792
0793 WMI_CMD(WMI_GET_FW_VERSION);
0794 if (ret)
0795 return -EINVAL;
0796
0797 priv->fw_version_major = be16_to_cpu(cmd_rsp.major);
0798 priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor);
0799
0800 snprintf(hw->wiphy->fw_version, sizeof(hw->wiphy->fw_version), "%d.%d",
0801 priv->fw_version_major,
0802 priv->fw_version_minor);
0803
0804 dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n",
0805 priv->fw_version_major,
0806 priv->fw_version_minor);
0807
0808
0809
0810
0811
0812 if (priv->fw_version_major != MAJOR_VERSION_REQ ||
0813 priv->fw_version_minor < MINOR_VERSION_REQ) {
0814 dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n",
0815 MAJOR_VERSION_REQ, MINOR_VERSION_REQ);
0816 return -EINVAL;
0817 }
0818
0819 if (priv->fw_version_major == 1 && priv->fw_version_minor < 4)
0820 set_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags);
0821
0822 dev_info(priv->dev, "FW RMW support: %s\n",
0823 test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags) ? "Off" : "On");
0824
0825 return 0;
0826 }
0827
0828 static int ath9k_init_device(struct ath9k_htc_priv *priv,
0829 u16 devid, char *product, u32 drv_info)
0830 {
0831 struct ieee80211_hw *hw = priv->hw;
0832 struct ath_common *common;
0833 struct ath_hw *ah;
0834 int error = 0;
0835 struct ath_regulatory *reg;
0836 char hw_name[64];
0837
0838
0839 error = ath9k_init_priv(priv, devid, product, drv_info);
0840 if (error != 0)
0841 goto err_init;
0842
0843 ah = priv->ah;
0844 common = ath9k_hw_common(ah);
0845 ath9k_set_hw_capab(priv, hw);
0846
0847 error = ath9k_init_firmware_version(priv);
0848 if (error != 0)
0849 goto err_fw;
0850
0851
0852 error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
0853 ath9k_reg_notifier);
0854 if (error)
0855 goto err_regd;
0856
0857 reg = &common->regulatory;
0858
0859
0860 error = ath9k_tx_init(priv);
0861 if (error != 0)
0862 goto err_tx;
0863
0864
0865 error = ath9k_rx_init(priv);
0866 if (error != 0)
0867 goto err_rx;
0868
0869 ath9k_hw_disable(priv->ah);
0870 #ifdef CONFIG_MAC80211_LEDS
0871
0872 priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw,
0873 IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink,
0874 ARRAY_SIZE(ath9k_htc_tpt_blink));
0875 #endif
0876
0877
0878 error = ieee80211_register_hw(hw);
0879 if (error)
0880 goto err_register;
0881
0882
0883 if (!ath_is_world_regd(reg)) {
0884 error = regulatory_hint(hw->wiphy, reg->alpha2);
0885 if (error)
0886 goto err_world;
0887 }
0888
0889 error = ath9k_htc_init_debug(priv->ah);
0890 if (error) {
0891 ath_err(common, "Unable to create debugfs files\n");
0892 goto err_world;
0893 }
0894
0895 ath_dbg(common, CONFIG,
0896 "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n",
0897 priv->wmi_cmd_ep,
0898 priv->beacon_ep,
0899 priv->cab_ep,
0900 priv->uapsd_ep,
0901 priv->mgmt_ep,
0902 priv->data_be_ep,
0903 priv->data_bk_ep,
0904 priv->data_vi_ep,
0905 priv->data_vo_ep);
0906
0907 ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name));
0908 wiphy_info(hw->wiphy, "%s\n", hw_name);
0909
0910 ath9k_init_leds(priv);
0911 ath9k_start_rfkill_poll(priv);
0912
0913 return 0;
0914
0915 err_world:
0916 ieee80211_unregister_hw(hw);
0917 err_register:
0918 ath9k_rx_cleanup(priv);
0919 err_rx:
0920 ath9k_tx_cleanup(priv);
0921 err_tx:
0922
0923 err_regd:
0924
0925 err_fw:
0926 ath9k_deinit_priv(priv);
0927 err_init:
0928 return error;
0929 }
0930
0931 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
0932 u16 devid, char *product, u32 drv_info)
0933 {
0934 struct hif_device_usb *hif_dev;
0935 struct ath9k_htc_priv *priv;
0936 struct ieee80211_hw *hw;
0937 int ret;
0938
0939 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
0940 if (!hw)
0941 return -ENOMEM;
0942
0943 priv = hw->priv;
0944 priv->hw = hw;
0945 priv->htc = htc_handle;
0946 priv->dev = dev;
0947 SET_IEEE80211_DEV(hw, priv->dev);
0948
0949 ret = ath9k_htc_wait_for_target(priv);
0950 if (ret)
0951 goto err_free;
0952
0953 priv->wmi = ath9k_init_wmi(priv);
0954 if (!priv->wmi) {
0955 ret = -EINVAL;
0956 goto err_free;
0957 }
0958
0959 ret = ath9k_init_htc_services(priv, devid, drv_info);
0960 if (ret)
0961 goto err_init;
0962
0963 ret = ath9k_init_device(priv, devid, product, drv_info);
0964 if (ret)
0965 goto err_init;
0966
0967 htc_handle->drv_priv = priv;
0968
0969 return 0;
0970
0971 err_init:
0972 ath9k_stop_wmi(priv);
0973 hif_dev = (struct hif_device_usb *)htc_handle->hif_dev;
0974 ath9k_hif_usb_dealloc_urbs(hif_dev);
0975 ath9k_destroy_wmi(priv);
0976 err_free:
0977 ieee80211_free_hw(hw);
0978 return ret;
0979 }
0980
0981 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
0982 {
0983 if (htc_handle->drv_priv) {
0984
0985
0986 if (hotunplug)
0987 htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED;
0988
0989 ath9k_deinit_device(htc_handle->drv_priv);
0990 ath9k_stop_wmi(htc_handle->drv_priv);
0991 ieee80211_free_hw(htc_handle->drv_priv->hw);
0992 }
0993 }
0994
0995 #ifdef CONFIG_PM
0996
0997 void ath9k_htc_suspend(struct htc_target *htc_handle)
0998 {
0999 ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
1000 }
1001
1002 int ath9k_htc_resume(struct htc_target *htc_handle)
1003 {
1004 struct ath9k_htc_priv *priv = htc_handle->drv_priv;
1005 int ret;
1006
1007 ret = ath9k_htc_wait_for_target(priv);
1008 if (ret)
1009 return ret;
1010
1011 ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
1012 priv->ah->hw_version.usbdev);
1013 ath9k_configure_leds(priv);
1014
1015 return ret;
1016 }
1017 #endif
1018
1019 static int __init ath9k_htc_init(void)
1020 {
1021 if (ath9k_hif_usb_init() < 0) {
1022 pr_err("No USB devices found, driver not installed\n");
1023 return -ENODEV;
1024 }
1025
1026 return 0;
1027 }
1028 module_init(ath9k_htc_init);
1029
1030 static void __exit ath9k_htc_exit(void)
1031 {
1032 ath9k_hif_usb_exit();
1033 pr_info("Driver unloaded\n");
1034 }
1035 module_exit(ath9k_htc_exit);