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0001 /*
0002  * Copyright (c) 2008-2011 Atheros Communications Inc.
0003  *
0004  * Permission to use, copy, modify, and/or distribute this software for any
0005  * purpose with or without fee is hereby granted, provided that the above
0006  * copyright notice and this permission notice appear in all copies.
0007  *
0008  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
0009  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
0010  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
0011  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
0012  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
0013  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
0014  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
0015  */
0016 
0017 #ifndef ATH9K_H
0018 #define ATH9K_H
0019 
0020 #include <linux/etherdevice.h>
0021 #include <linux/device.h>
0022 #include <linux/interrupt.h>
0023 #include <linux/leds.h>
0024 #include <linux/completion.h>
0025 #include <linux/time.h>
0026 #include <linux/hw_random.h>
0027 
0028 #include "common.h"
0029 #include "debug.h"
0030 #include "mci.h"
0031 #include "dfs.h"
0032 
0033 struct ath_node;
0034 struct ath_vif;
0035 
0036 extern struct ieee80211_ops ath9k_ops;
0037 extern int ath9k_modparam_nohwcrypt;
0038 extern int ath9k_led_blink;
0039 extern bool is_ath9k_unloaded;
0040 extern int ath9k_use_chanctx;
0041 
0042 /*************************/
0043 /* Descriptor Management */
0044 /*************************/
0045 
0046 #define ATH_TXSTATUS_RING_SIZE 512
0047 
0048 /* Macro to expand scalars to 64-bit objects */
0049 #define ito64(x) (sizeof(x) == 1) ?         \
0050     (((unsigned long long int)(x)) & (0xff)) :  \
0051     (sizeof(x) == 2) ?              \
0052     (((unsigned long long int)(x)) & 0xffff) :  \
0053     ((sizeof(x) == 4) ?             \
0054      (((unsigned long long int)(x)) & 0xffffffff) : \
0055      (unsigned long long int)(x))
0056 
0057 #define ATH_TXBUF_RESET(_bf) do {               \
0058         (_bf)->bf_lastbf = NULL;            \
0059         (_bf)->bf_next = NULL;              \
0060         memset(&((_bf)->bf_state), 0,           \
0061                sizeof(struct ath_buf_state));       \
0062     } while (0)
0063 
0064 #define DS2PHYS(_dd, _ds)                       \
0065     ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
0066 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
0067 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
0068 
0069 struct ath_descdma {
0070     void *dd_desc;
0071     dma_addr_t dd_desc_paddr;
0072     u32 dd_desc_len;
0073 };
0074 
0075 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
0076               struct list_head *head, const char *name,
0077               int nbuf, int ndesc, bool is_tx);
0078 
0079 /***********/
0080 /* RX / TX */
0081 /***********/
0082 
0083 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
0084 
0085 /* increment with wrap-around */
0086 #define INCR(_l, _sz)   do {            \
0087         (_l)++;             \
0088         (_l) &= ((_sz) - 1);        \
0089     } while (0)
0090 
0091 #define ATH_RXBUF               512
0092 #define ATH_TXBUF               512
0093 #define ATH_TXBUF_RESERVE       5
0094 #define ATH_TXMAXTRY            13
0095 #define ATH_MAX_SW_RETRIES      30
0096 
0097 #define TID_TO_WME_AC(_tid)             \
0098     ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE :   \
0099      (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK :   \
0100      (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI :   \
0101      IEEE80211_AC_VO)
0102 
0103 #define ATH_AGGR_DELIM_SZ          4
0104 #define ATH_AGGR_MINPLEN           256 /* in bytes, minimum packet length */
0105 /* number of delimiters for encryption padding */
0106 #define ATH_AGGR_ENCRYPTDELIM      10
0107 /* minimum h/w qdepth to be sustained to maximize aggregation */
0108 #define ATH_AGGR_MIN_QDEPTH        2
0109 /* minimum h/w qdepth for non-aggregated traffic */
0110 #define ATH_NON_AGGR_MIN_QDEPTH    8
0111 #define ATH_HW_CHECK_POLL_INT      1000
0112 #define ATH_TXFIFO_DEPTH           8
0113 #define ATH_TX_ERROR               0x01
0114 
0115 /* Stop tx traffic 1ms before the GO goes away */
0116 #define ATH_P2P_PS_STOP_TIME       1000
0117 
0118 #define IEEE80211_SEQ_SEQ_SHIFT    4
0119 #define IEEE80211_SEQ_MAX          4096
0120 #define IEEE80211_WEP_IVLEN        3
0121 #define IEEE80211_WEP_KIDLEN       1
0122 #define IEEE80211_WEP_CRCLEN       4
0123 #define IEEE80211_MAX_MPDU_LEN     (3840 + FCS_LEN +        \
0124                     (IEEE80211_WEP_IVLEN +  \
0125                      IEEE80211_WEP_KIDLEN + \
0126                      IEEE80211_WEP_CRCLEN))
0127 
0128 /* return whether a bit at index _n in bitmap _bm is set
0129  * _sz is the size of the bitmap  */
0130 #define ATH_BA_ISSET(_bm, _n)  (((_n) < (WME_BA_BMP_SIZE)) &&       \
0131                 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
0132 
0133 /* return block-ack bitmap index given sequence and starting sequence */
0134 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
0135 
0136 /* return the seqno for _start + _offset */
0137 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
0138 
0139 /* returns delimiter padding required given the packet length */
0140 #define ATH_AGGR_GET_NDELIM(_len)                   \
0141        (((_len) >= ATH_AGGR_MINPLEN) ? 0 :                             \
0142         DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
0143 
0144 #define BAW_WITHIN(_start, _bawsz, _seqno) \
0145     ((((_seqno) - (_start)) & 4095) < (_bawsz))
0146 
0147 #define ATH_AN_2_TID(_an, _tidno) ath_node_to_tid(_an, _tidno)
0148 
0149 #define IS_HT_RATE(rate)   (rate & 0x80)
0150 #define IS_CCK_RATE(rate)  ((rate >= 0x18) && (rate <= 0x1e))
0151 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf))
0152 
0153 enum {
0154        WLAN_RC_PHY_OFDM,
0155        WLAN_RC_PHY_CCK,
0156 };
0157 
0158 struct ath_txq {
0159     int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
0160     u32 axq_qnum; /* ath9k hardware queue number */
0161     void *axq_link;
0162     struct list_head axq_q;
0163     spinlock_t axq_lock;
0164     u32 axq_depth;
0165     u32 axq_ampdu_depth;
0166     bool axq_tx_inprogress;
0167     struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
0168     u8 txq_headidx;
0169     u8 txq_tailidx;
0170     int pending_frames;
0171     struct sk_buff_head complete_q;
0172 };
0173 
0174 struct ath_frame_info {
0175     struct ath_buf *bf;
0176     u16 framelen;
0177     s8 txq;
0178     u8 keyix;
0179     u8 rtscts_rate;
0180     u8 retries : 6;
0181     u8 dyn_smps : 1;
0182     u8 baw_tracked : 1;
0183     u8 tx_power;
0184     enum ath9k_key_type keytype:2;
0185 };
0186 
0187 struct ath_rxbuf {
0188     struct list_head list;
0189     struct sk_buff *bf_mpdu;
0190     void *bf_desc;
0191     dma_addr_t bf_daddr;
0192     dma_addr_t bf_buf_addr;
0193 };
0194 
0195 /**
0196  * enum buffer_type - Buffer type flags
0197  *
0198  * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
0199  * @BUF_AGGR: Indicates whether the buffer can be aggregated
0200  *  (used in aggregation scheduling)
0201  */
0202 enum buffer_type {
0203     BUF_AMPDU       = BIT(0),
0204     BUF_AGGR        = BIT(1),
0205 };
0206 
0207 #define bf_isampdu(bf)      (bf->bf_state.bf_type & BUF_AMPDU)
0208 #define bf_isaggr(bf)       (bf->bf_state.bf_type & BUF_AGGR)
0209 
0210 struct ath_buf_state {
0211     u8 bf_type;
0212     u8 bfs_paprd;
0213     u8 ndelim;
0214     bool stale;
0215     u16 seqno;
0216     unsigned long bfs_paprd_timestamp;
0217 };
0218 
0219 struct ath_buf {
0220     struct list_head list;
0221     struct ath_buf *bf_lastbf;  /* last buf of this unit (a frame or
0222                        an aggregate) */
0223     struct ath_buf *bf_next;    /* next subframe in the aggregate */
0224     struct sk_buff *bf_mpdu;    /* enclosing frame structure */
0225     void *bf_desc;          /* virtual addr of desc */
0226     dma_addr_t bf_daddr;        /* physical addr of desc */
0227     dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
0228     struct ieee80211_tx_rate rates[4];
0229     struct ath_buf_state bf_state;
0230 };
0231 
0232 struct ath_atx_tid {
0233     struct list_head list;
0234     struct sk_buff_head retry_q;
0235     struct ath_node *an;
0236     struct ath_txq *txq;
0237     unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
0238     u16 seq_start;
0239     u16 seq_next;
0240     u16 baw_size;
0241     u8 tidno;
0242     int baw_head;   /* first un-acked tx buffer */
0243     int baw_tail;   /* next unused tx buffer slot */
0244 
0245     s8 bar_index;
0246     bool active;
0247     bool clear_ps_filter;
0248 };
0249 
0250 void ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid);
0251 
0252 struct ath_node {
0253     struct ath_softc *sc;
0254     struct ieee80211_sta *sta; /* station struct we're part of */
0255     struct ieee80211_vif *vif; /* interface with which we're associated */
0256 
0257     u16 maxampdu;
0258     u8 mpdudensity;
0259     s8 ps_key;
0260 
0261     bool sleeping;
0262     bool no_ps_filter;
0263 
0264 #ifdef CONFIG_ATH9K_STATION_STATISTICS
0265     struct ath_rx_rate_stats rx_rate_stats;
0266 #endif
0267     u8 key_idx[4];
0268 
0269     int ackto;
0270     struct list_head list;
0271 };
0272 
0273 struct ath_tx_control {
0274     struct ath_txq *txq;
0275     struct ath_node *an;
0276     struct ieee80211_sta *sta;
0277     u8 paprd;
0278 };
0279 
0280 
0281 /**
0282  * @txq_map:  Index is mac80211 queue number.  This is
0283  *  not necessarily the same as the hardware queue number
0284  *  (axq_qnum).
0285  */
0286 struct ath_tx {
0287     u32 txqsetup;
0288     spinlock_t txbuflock;
0289     struct list_head txbuf;
0290     struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
0291     struct ath_descdma txdma;
0292     struct ath_txq *txq_map[IEEE80211_NUM_ACS];
0293     struct ath_txq *uapsdq;
0294     u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
0295 };
0296 
0297 struct ath_rx_edma {
0298     struct sk_buff_head rx_fifo;
0299     u32 rx_fifo_hwsize;
0300 };
0301 
0302 struct ath_rx {
0303     u8 defant;
0304     u8 rxotherant;
0305     bool discard_next;
0306     u32 *rxlink;
0307     u32 num_pkts;
0308     struct list_head rxbuf;
0309     struct ath_descdma rxdma;
0310     struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
0311 
0312     struct ath_rxbuf *buf_hold;
0313     struct sk_buff *frag;
0314 
0315     u32 ampdu_ref;
0316 };
0317 
0318 /*******************/
0319 /* Channel Context */
0320 /*******************/
0321 
0322 struct ath_acq {
0323     struct list_head acq_new;
0324     struct list_head acq_old;
0325     spinlock_t lock;
0326 };
0327 
0328 struct ath_chanctx {
0329     struct cfg80211_chan_def chandef;
0330     struct list_head vifs;
0331     struct ath_acq acq[IEEE80211_NUM_ACS];
0332     int hw_queue_base;
0333 
0334     /* do not dereference, use for comparison only */
0335     struct ieee80211_vif *primary_sta;
0336 
0337     struct ath_beacon_config beacon;
0338     struct ath9k_hw_cal_data caldata;
0339     struct timespec64 tsf_ts;
0340     u64 tsf_val;
0341     u32 last_beacon;
0342 
0343     int flush_timeout;
0344     u16 txpower;
0345     u16 cur_txpower;
0346     bool offchannel;
0347     bool stopped;
0348     bool active;
0349     bool assigned;
0350     bool switch_after_beacon;
0351 
0352     short nvifs;
0353     short nvifs_assigned;
0354     unsigned int rxfilter;
0355 };
0356 
0357 enum ath_chanctx_event {
0358     ATH_CHANCTX_EVENT_BEACON_PREPARE,
0359     ATH_CHANCTX_EVENT_BEACON_SENT,
0360     ATH_CHANCTX_EVENT_TSF_TIMER,
0361     ATH_CHANCTX_EVENT_BEACON_RECEIVED,
0362     ATH_CHANCTX_EVENT_AUTHORIZED,
0363     ATH_CHANCTX_EVENT_SWITCH,
0364     ATH_CHANCTX_EVENT_ASSIGN,
0365     ATH_CHANCTX_EVENT_UNASSIGN,
0366     ATH_CHANCTX_EVENT_CHANGE,
0367     ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL,
0368 };
0369 
0370 enum ath_chanctx_state {
0371     ATH_CHANCTX_STATE_IDLE,
0372     ATH_CHANCTX_STATE_WAIT_FOR_BEACON,
0373     ATH_CHANCTX_STATE_WAIT_FOR_TIMER,
0374     ATH_CHANCTX_STATE_SWITCH,
0375     ATH_CHANCTX_STATE_FORCE_ACTIVE,
0376 };
0377 
0378 struct ath_chanctx_sched {
0379     bool beacon_pending;
0380     bool beacon_adjust;
0381     bool offchannel_pending;
0382     bool wait_switch;
0383     bool force_noa_update;
0384     bool extend_absence;
0385     bool mgd_prepare_tx;
0386     enum ath_chanctx_state state;
0387     u8 beacon_miss;
0388 
0389     u32 next_tbtt;
0390     u32 switch_start_time;
0391     unsigned int offchannel_duration;
0392     unsigned int channel_switch_time;
0393 
0394     /* backup, in case the hardware timer fails */
0395     struct timer_list timer;
0396 };
0397 
0398 enum ath_offchannel_state {
0399     ATH_OFFCHANNEL_IDLE,
0400     ATH_OFFCHANNEL_PROBE_SEND,
0401     ATH_OFFCHANNEL_PROBE_WAIT,
0402     ATH_OFFCHANNEL_SUSPEND,
0403     ATH_OFFCHANNEL_ROC_START,
0404     ATH_OFFCHANNEL_ROC_WAIT,
0405     ATH_OFFCHANNEL_ROC_DONE,
0406 };
0407 
0408 enum ath_roc_complete_reason {
0409     ATH_ROC_COMPLETE_EXPIRE,
0410     ATH_ROC_COMPLETE_ABORT,
0411     ATH_ROC_COMPLETE_CANCEL,
0412 };
0413 
0414 struct ath_offchannel {
0415     struct ath_chanctx chan;
0416     struct timer_list timer;
0417     struct cfg80211_scan_request *scan_req;
0418     struct ieee80211_vif *scan_vif;
0419     int scan_idx;
0420     enum ath_offchannel_state state;
0421     struct ieee80211_channel *roc_chan;
0422     struct ieee80211_vif *roc_vif;
0423     int roc_duration;
0424     int duration;
0425 };
0426 
0427 static inline struct ath_atx_tid *
0428 ath_node_to_tid(struct ath_node *an, u8 tidno)
0429 {
0430     struct ieee80211_sta *sta = an->sta;
0431     struct ieee80211_vif *vif = an->vif;
0432     struct ieee80211_txq *txq;
0433 
0434     BUG_ON(!vif);
0435     if (sta)
0436         txq = sta->txq[tidno % ARRAY_SIZE(sta->txq)];
0437     else
0438         txq = vif->txq;
0439 
0440     return (struct ath_atx_tid *) txq->drv_priv;
0441 }
0442 
0443 #define case_rtn_string(val) case val: return #val
0444 
0445 #define ath_for_each_chanctx(_sc, _ctx)                             \
0446     for (ctx = &sc->chanctx[0];                                 \
0447          ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1];      \
0448          ctx++)
0449 
0450 void ath_chanctx_init(struct ath_softc *sc);
0451 void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx,
0452                  struct cfg80211_chan_def *chandef);
0453 
0454 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
0455 
0456 static inline struct ath_chanctx *
0457 ath_chanctx_get(struct ieee80211_chanctx_conf *ctx)
0458 {
0459     struct ath_chanctx **ptr = (void *) ctx->drv_priv;
0460     return *ptr;
0461 }
0462 
0463 bool ath9k_is_chanctx_enabled(void);
0464 void ath9k_fill_chanctx_ops(void);
0465 void ath9k_init_channel_context(struct ath_softc *sc);
0466 void ath9k_offchannel_init(struct ath_softc *sc);
0467 void ath9k_deinit_channel_context(struct ath_softc *sc);
0468 int ath9k_init_p2p(struct ath_softc *sc);
0469 void ath9k_deinit_p2p(struct ath_softc *sc);
0470 void ath9k_p2p_remove_vif(struct ath_softc *sc,
0471               struct ieee80211_vif *vif);
0472 void ath9k_p2p_beacon_sync(struct ath_softc *sc);
0473 void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
0474                 struct ieee80211_vif *vif);
0475 void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
0476               struct sk_buff *skb);
0477 void ath9k_p2p_ps_timer(void *priv);
0478 void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
0479 void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
0480 void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx);
0481 
0482 void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
0483                 enum ath_chanctx_event ev);
0484 void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
0485                 enum ath_chanctx_event ev);
0486 void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif,
0487                enum ath_chanctx_event ev);
0488 void ath_chanctx_set_next(struct ath_softc *sc, bool force);
0489 void ath_offchannel_next(struct ath_softc *sc);
0490 void ath_scan_complete(struct ath_softc *sc, bool abort);
0491 void ath_roc_complete(struct ath_softc *sc,
0492               enum ath_roc_complete_reason reason);
0493 struct ath_chanctx* ath_is_go_chanctx_present(struct ath_softc *sc);
0494 
0495 #else
0496 
0497 static inline bool ath9k_is_chanctx_enabled(void)
0498 {
0499     return false;
0500 }
0501 static inline void ath9k_fill_chanctx_ops(void)
0502 {
0503 }
0504 static inline void ath9k_init_channel_context(struct ath_softc *sc)
0505 {
0506 }
0507 static inline void ath9k_offchannel_init(struct ath_softc *sc)
0508 {
0509 }
0510 static inline void ath9k_deinit_channel_context(struct ath_softc *sc)
0511 {
0512 }
0513 static inline void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
0514                           enum ath_chanctx_event ev)
0515 {
0516 }
0517 static inline void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
0518                           enum ath_chanctx_event ev)
0519 {
0520 }
0521 static inline void ath_chanctx_event(struct ath_softc *sc,
0522                      struct ieee80211_vif *vif,
0523                      enum ath_chanctx_event ev)
0524 {
0525 }
0526 static inline int ath9k_init_p2p(struct ath_softc *sc)
0527 {
0528     return 0;
0529 }
0530 static inline void ath9k_deinit_p2p(struct ath_softc *sc)
0531 {
0532 }
0533 static inline void ath9k_p2p_remove_vif(struct ath_softc *sc,
0534                     struct ieee80211_vif *vif)
0535 {
0536 }
0537 static inline void ath9k_p2p_beacon_sync(struct ath_softc *sc)
0538 {
0539 }
0540 static inline void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
0541                           struct ieee80211_vif *vif)
0542 {
0543 }
0544 static inline void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
0545                     struct sk_buff *skb)
0546 {
0547 }
0548 static inline void ath9k_p2p_ps_timer(struct ath_softc *sc)
0549 {
0550 }
0551 static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc,
0552                          struct ath_chanctx *ctx)
0553 {
0554 }
0555 static inline void ath9k_chanctx_stop_queues(struct ath_softc *sc,
0556                          struct ath_chanctx *ctx)
0557 {
0558 }
0559 static inline void ath_chanctx_check_active(struct ath_softc *sc,
0560                         struct ath_chanctx *ctx)
0561 {
0562 }
0563 
0564 #endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */
0565 
0566 static inline void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq)
0567 {
0568     spin_lock_bh(&txq->axq_lock);
0569 }
0570 static inline void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq)
0571 {
0572     spin_unlock_bh(&txq->axq_lock);
0573 }
0574 
0575 void ath_startrecv(struct ath_softc *sc);
0576 bool ath_stoprecv(struct ath_softc *sc);
0577 u32 ath_calcrxfilter(struct ath_softc *sc);
0578 int ath_rx_init(struct ath_softc *sc, int nbufs);
0579 void ath_rx_cleanup(struct ath_softc *sc);
0580 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
0581 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
0582 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
0583 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
0584 bool ath_drain_all_txq(struct ath_softc *sc);
0585 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
0586 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
0587 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
0588 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
0589 void ath_txq_schedule_all(struct ath_softc *sc);
0590 int ath_tx_init(struct ath_softc *sc, int nbufs);
0591 int ath_txq_update(struct ath_softc *sc, int qnum,
0592            struct ath9k_tx_queue_info *q);
0593 u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,
0594              int width, int half_gi, bool shortPreamble);
0595 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
0596 void ath_assign_seq(struct ath_common *common, struct sk_buff *skb);
0597 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
0598          struct ath_tx_control *txctl);
0599 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
0600          struct sk_buff *skb);
0601 void ath_tx_tasklet(struct ath_softc *sc);
0602 void ath_tx_edma_tasklet(struct ath_softc *sc);
0603 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
0604               u16 tid, u16 *ssn);
0605 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
0606 
0607 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
0608 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
0609                struct ath_node *an);
0610 void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
0611                    struct ieee80211_sta *sta,
0612                    u16 tids, int nframes,
0613                    enum ieee80211_frame_release_type reason,
0614                    bool more_data);
0615 void ath9k_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *queue);
0616 
0617 /********/
0618 /* VIFs */
0619 /********/
0620 
0621 #define P2P_DEFAULT_CTWIN 10
0622 
0623 struct ath_vif {
0624     struct list_head list;
0625 
0626     u16 seq_no;
0627 
0628     /* BSS info */
0629     u8 bssid[ETH_ALEN] __aligned(2);
0630     u16 aid;
0631     bool assoc;
0632 
0633     struct ieee80211_vif *vif;
0634     struct ath_node mcast_node;
0635     int av_bslot;
0636     __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
0637     struct ath_buf *av_bcbuf;
0638     struct ath_chanctx *chanctx;
0639 
0640     /* P2P Client */
0641     struct ieee80211_noa_data noa;
0642 
0643     /* P2P GO */
0644     u8 noa_index;
0645     u32 offchannel_start;
0646     u32 offchannel_duration;
0647 
0648     /* These are used for both periodic and one-shot */
0649     u32 noa_start;
0650     u32 noa_duration;
0651     bool periodic_noa;
0652     bool oneshot_noa;
0653 };
0654 
0655 struct ath9k_vif_iter_data {
0656     u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
0657     u8 mask[ETH_ALEN]; /* bssid mask */
0658     bool has_hw_macaddr;
0659     u8 slottime;
0660     bool beacons;
0661 
0662     int naps;      /* number of AP vifs */
0663     int nmeshes;   /* number of mesh vifs */
0664     int nstations; /* number of station vifs */
0665     int nadhocs;   /* number of adhoc vifs */
0666     int nocbs;     /* number of OCB vifs */
0667     int nbcnvifs;  /* number of beaconing vifs */
0668     struct ieee80211_vif *primary_beacon_vif;
0669     struct ieee80211_vif *primary_sta;
0670 };
0671 
0672 void ath9k_calculate_iter_data(struct ath_softc *sc,
0673                    struct ath_chanctx *ctx,
0674                    struct ath9k_vif_iter_data *iter_data);
0675 void ath9k_calculate_summary_state(struct ath_softc *sc,
0676                    struct ath_chanctx *ctx);
0677 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif);
0678 
0679 /*******************/
0680 /* Beacon Handling */
0681 /*******************/
0682 
0683 /*
0684  * Regardless of the number of beacons we stagger, (i.e. regardless of the
0685  * number of BSSIDs) if a given beacon does not go out even after waiting this
0686  * number of beacon intervals, the game's up.
0687  */
0688 #define BSTUCK_THRESH               9
0689 #define ATH_BCBUF                   8
0690 #define ATH_DEFAULT_BINTVAL         100 /* TU */
0691 #define ATH_DEFAULT_BMISS_LIMIT     10
0692 
0693 #define TSF_TO_TU(_h,_l) \
0694     ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
0695 
0696 struct ath_beacon {
0697     enum {
0698         OK,     /* no change needed */
0699         UPDATE,     /* update pending */
0700         COMMIT      /* beacon sent, commit change */
0701     } updateslot;       /* slot time update fsm */
0702 
0703     u32 beaconq;
0704     u32 bmisscnt;
0705     struct ieee80211_vif *bslot[ATH_BCBUF];
0706     int slottime;
0707     int slotupdate;
0708     struct ath_descdma bdma;
0709     struct ath_txq *cabq;
0710     struct list_head bbuf;
0711 
0712     bool tx_processed;
0713     bool tx_last;
0714 };
0715 
0716 void ath9k_beacon_tasklet(struct tasklet_struct *t);
0717 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *main_vif,
0718              bool beacons);
0719 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
0720 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
0721 void ath9k_beacon_ensure_primary_slot(struct ath_softc *sc);
0722 void ath9k_set_beacon(struct ath_softc *sc);
0723 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif);
0724 void ath9k_csa_update(struct ath_softc *sc);
0725 
0726 /*******************/
0727 /* Link Monitoring */
0728 /*******************/
0729 
0730 #define ATH_STA_SHORT_CALINTERVAL 1000    /* 1 second */
0731 #define ATH_AP_SHORT_CALINTERVAL  100     /* 100 ms */
0732 #define ATH_ANI_POLLINTERVAL_OLD  100     /* 100 ms */
0733 #define ATH_ANI_POLLINTERVAL_NEW  1000    /* 1000 ms */
0734 #define ATH_LONG_CALINTERVAL_INT  1000    /* 1000 ms */
0735 #define ATH_LONG_CALINTERVAL      30000   /* 30 seconds */
0736 #define ATH_RESTART_CALINTERVAL   1200000 /* 20 minutes */
0737 #define ATH_ANI_MAX_SKIP_COUNT    10
0738 #define ATH_PAPRD_TIMEOUT         100 /* msecs */
0739 #define ATH_PLL_WORK_INTERVAL     100
0740 
0741 void ath_hw_check_work(struct work_struct *work);
0742 void ath_reset_work(struct work_struct *work);
0743 bool ath_hw_check(struct ath_softc *sc);
0744 void ath_hw_pll_work(struct work_struct *work);
0745 void ath_paprd_calibrate(struct work_struct *work);
0746 void ath_ani_calibrate(struct timer_list *t);
0747 void ath_start_ani(struct ath_softc *sc);
0748 void ath_stop_ani(struct ath_softc *sc);
0749 void ath_check_ani(struct ath_softc *sc);
0750 int ath_update_survey_stats(struct ath_softc *sc);
0751 void ath_update_survey_nf(struct ath_softc *sc, int channel);
0752 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
0753 void ath_ps_full_sleep(struct timer_list *t);
0754 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
0755            bool sw_pending, bool timeout_override);
0756 
0757 /**********/
0758 /* BTCOEX */
0759 /**********/
0760 
0761 #define ATH_DUMP_BTCOEX(_s, _val)               \
0762     do {                            \
0763         len += scnprintf(buf + len, size - len,     \
0764                  "%20s : %10d\n", _s, (_val));  \
0765     } while (0)
0766 
0767 enum bt_op_flags {
0768     BT_OP_PRIORITY_DETECTED,
0769     BT_OP_SCAN,
0770 };
0771 
0772 struct ath_btcoex {
0773     spinlock_t btcoex_lock;
0774     struct timer_list period_timer; /* Timer for BT period */
0775     struct timer_list no_stomp_timer;
0776     u32 bt_priority_cnt;
0777     unsigned long bt_priority_time;
0778     unsigned long op_flags;
0779     int bt_stomp_type; /* Types of BT stomping */
0780     u32 btcoex_no_stomp; /* in msec */
0781     u32 btcoex_period; /* in msec */
0782     u32 btscan_no_stomp; /* in msec */
0783     u32 duty_cycle;
0784     u32 bt_wait_time;
0785     int rssi_count;
0786     struct ath_mci_profile mci;
0787     u8 stomp_audio;
0788 };
0789 
0790 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
0791 int ath9k_init_btcoex(struct ath_softc *sc);
0792 void ath9k_deinit_btcoex(struct ath_softc *sc);
0793 void ath9k_start_btcoex(struct ath_softc *sc);
0794 void ath9k_stop_btcoex(struct ath_softc *sc);
0795 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
0796 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
0797 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
0798 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
0799 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
0800 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
0801 #else
0802 static inline int ath9k_init_btcoex(struct ath_softc *sc)
0803 {
0804     return 0;
0805 }
0806 static inline void ath9k_deinit_btcoex(struct ath_softc *sc)
0807 {
0808 }
0809 static inline void ath9k_start_btcoex(struct ath_softc *sc)
0810 {
0811 }
0812 static inline void ath9k_stop_btcoex(struct ath_softc *sc)
0813 {
0814 }
0815 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,
0816                          u32 status)
0817 {
0818 }
0819 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
0820                       u32 max_4ms_framelen)
0821 {
0822     return 0;
0823 }
0824 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
0825 {
0826 }
0827 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
0828 {
0829     return 0;
0830 }
0831 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
0832 
0833 /********************/
0834 /*   LED Control    */
0835 /********************/
0836 
0837 #define ATH_LED_PIN_DEF         1
0838 #define ATH_LED_PIN_9287        8
0839 #define ATH_LED_PIN_9300        10
0840 #define ATH_LED_PIN_9485        6
0841 #define ATH_LED_PIN_9462        4
0842 
0843 #ifdef CONFIG_MAC80211_LEDS
0844 void ath_init_leds(struct ath_softc *sc);
0845 void ath_deinit_leds(struct ath_softc *sc);
0846 #else
0847 static inline void ath_init_leds(struct ath_softc *sc)
0848 {
0849 }
0850 
0851 static inline void ath_deinit_leds(struct ath_softc *sc)
0852 {
0853 }
0854 #endif
0855 
0856 /************************/
0857 /* Wake on Wireless LAN */
0858 /************************/
0859 
0860 #ifdef CONFIG_ATH9K_WOW
0861 void ath9k_init_wow(struct ieee80211_hw *hw);
0862 void ath9k_deinit_wow(struct ieee80211_hw *hw);
0863 int ath9k_suspend(struct ieee80211_hw *hw,
0864           struct cfg80211_wowlan *wowlan);
0865 int ath9k_resume(struct ieee80211_hw *hw);
0866 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
0867 #else
0868 static inline void ath9k_init_wow(struct ieee80211_hw *hw)
0869 {
0870 }
0871 static inline void ath9k_deinit_wow(struct ieee80211_hw *hw)
0872 {
0873 }
0874 static inline int ath9k_suspend(struct ieee80211_hw *hw,
0875                 struct cfg80211_wowlan *wowlan)
0876 {
0877     return 0;
0878 }
0879 static inline int ath9k_resume(struct ieee80211_hw *hw)
0880 {
0881     return 0;
0882 }
0883 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
0884 {
0885 }
0886 #endif /* CONFIG_ATH9K_WOW */
0887 
0888 /*******************************/
0889 /* Antenna diversity/combining */
0890 /*******************************/
0891 
0892 #define ATH_ANT_RX_CURRENT_SHIFT 4
0893 #define ATH_ANT_RX_MAIN_SHIFT 2
0894 #define ATH_ANT_RX_MASK 0x3
0895 
0896 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
0897 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
0898 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
0899 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
0900 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
0901 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
0902 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
0903 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
0904 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
0905 
0906 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
0907 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
0908 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
0909 
0910 struct ath_ant_comb {
0911     u16 count;
0912     u16 total_pkt_count;
0913     bool scan;
0914     bool scan_not_start;
0915     int main_total_rssi;
0916     int alt_total_rssi;
0917     int alt_recv_cnt;
0918     int main_recv_cnt;
0919     int rssi_lna1;
0920     int rssi_lna2;
0921     int rssi_add;
0922     int rssi_sub;
0923     int rssi_first;
0924     int rssi_second;
0925     int rssi_third;
0926     int ant_ratio;
0927     int ant_ratio2;
0928     bool alt_good;
0929     int quick_scan_cnt;
0930     enum ath9k_ant_div_comb_lna_conf main_conf;
0931     enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
0932     enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
0933     bool first_ratio;
0934     bool second_ratio;
0935     unsigned long scan_start_time;
0936 
0937     /*
0938      * Card-specific config values.
0939      */
0940     int low_rssi_thresh;
0941     int fast_div_bias;
0942 };
0943 
0944 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
0945 
0946 /********************/
0947 /* Main driver core */
0948 /********************/
0949 
0950 #define ATH9K_PCI_CUS198          0x0001
0951 #define ATH9K_PCI_CUS230          0x0002
0952 #define ATH9K_PCI_CUS217          0x0004
0953 #define ATH9K_PCI_CUS252          0x0008
0954 #define ATH9K_PCI_WOW             0x0010
0955 #define ATH9K_PCI_BT_ANT_DIV      0x0020
0956 #define ATH9K_PCI_D3_L1_WAR       0x0040
0957 #define ATH9K_PCI_AR9565_1ANT     0x0080
0958 #define ATH9K_PCI_AR9565_2ANT     0x0100
0959 #define ATH9K_PCI_NO_PLL_PWRSAVE  0x0200
0960 #define ATH9K_PCI_KILLER          0x0400
0961 #define ATH9K_PCI_LED_ACT_HI      0x0800
0962 
0963 /*
0964  * Default cache line size, in bytes.
0965  * Used when PCI device not fully initialized by bootrom/BIOS
0966 */
0967 #define DEFAULT_CACHELINE       32
0968 #define ATH_CABQ_READY_TIME     80      /* % of beacon interval */
0969 #define ATH_TXPOWER_MAX         100     /* .5 dBm units */
0970 #define MAX_GTT_CNT             5
0971 
0972 /* Powersave flags */
0973 #define PS_WAIT_FOR_BEACON        BIT(0)
0974 #define PS_WAIT_FOR_CAB           BIT(1)
0975 #define PS_WAIT_FOR_PSPOLL_DATA   BIT(2)
0976 #define PS_WAIT_FOR_TX_ACK        BIT(3)
0977 #define PS_BEACON_SYNC            BIT(4)
0978 #define PS_WAIT_FOR_ANI           BIT(5)
0979 
0980 #define ATH9K_NUM_CHANCTX  2 /* supports 2 operating channels */
0981 
0982 struct ath_softc {
0983     struct ieee80211_hw *hw;
0984     struct device *dev;
0985 
0986     struct survey_info *cur_survey;
0987     struct survey_info survey[ATH9K_NUM_CHANNELS];
0988 
0989     spinlock_t intr_lock;
0990     struct tasklet_struct intr_tq;
0991     struct tasklet_struct bcon_tasklet;
0992     struct ath_hw *sc_ah;
0993     void __iomem *mem;
0994     int irq;
0995     spinlock_t sc_serial_rw;
0996     spinlock_t sc_pm_lock;
0997     spinlock_t sc_pcu_lock;
0998     struct mutex mutex;
0999     struct work_struct paprd_work;
1000     struct work_struct hw_reset_work;
1001     struct completion paprd_complete;
1002     wait_queue_head_t tx_wait;
1003 
1004 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1005     struct work_struct chanctx_work;
1006     struct ath_gen_timer *p2p_ps_timer;
1007     struct ath_vif *p2p_ps_vif;
1008     struct ath_chanctx_sched sched;
1009     struct ath_offchannel offchannel;
1010     struct ath_chanctx *next_chan;
1011     struct completion go_beacon;
1012     struct timespec64 last_event_time;
1013 #endif
1014 
1015     unsigned long driver_data;
1016 
1017     u8 gtt_cnt;
1018     u32 intrstatus;
1019     u16 ps_flags; /* PS_* */
1020     bool ps_enabled;
1021     bool ps_idle;
1022     short nbcnvifs;
1023     unsigned long ps_usecount;
1024 
1025     struct ath_rx rx;
1026     struct ath_tx tx;
1027     struct ath_beacon beacon;
1028 
1029     struct cfg80211_chan_def cur_chandef;
1030     struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX];
1031     struct ath_chanctx *cur_chan;
1032     spinlock_t chan_lock;
1033 
1034 #ifdef CONFIG_MAC80211_LEDS
1035     bool led_registered;
1036     char led_name[32];
1037     struct led_classdev led_cdev;
1038 #endif
1039 
1040 #ifdef CONFIG_ATH9K_DEBUGFS
1041     struct ath9k_debug debug;
1042 #endif
1043     struct delayed_work hw_check_work;
1044     struct delayed_work hw_pll_work;
1045     struct timer_list sleep_timer;
1046 
1047 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
1048     struct ath_btcoex btcoex;
1049     struct ath_mci_coex mci_coex;
1050     struct work_struct mci_work;
1051 #endif
1052 
1053     struct ath_descdma txsdma;
1054 
1055     struct ath_ant_comb ant_comb;
1056     u8 ant_tx, ant_rx;
1057     struct dfs_pattern_detector *dfs_detector;
1058     u64 dfs_prev_pulse_ts;
1059     u32 wow_enabled;
1060 
1061     struct ath_spec_scan_priv spec_priv;
1062 
1063     struct ieee80211_vif *tx99_vif;
1064     struct sk_buff *tx99_skb;
1065     bool tx99_state;
1066     s16 tx99_power;
1067 
1068 #ifdef CONFIG_ATH9K_WOW
1069     u32 wow_intr_before_sleep;
1070     bool force_wow;
1071 #endif
1072 
1073 #ifdef CONFIG_ATH9K_HWRNG
1074     struct hwrng rng_ops;
1075     u32 rng_last;
1076     char rng_name[sizeof("ath9k_65535")];
1077 #endif
1078 };
1079 
1080 /********/
1081 /* TX99 */
1082 /********/
1083 
1084 #ifdef CONFIG_ATH9K_TX99
1085 void ath9k_tx99_init_debug(struct ath_softc *sc);
1086 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
1087             struct ath_tx_control *txctl);
1088 #else
1089 static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
1090 {
1091 }
1092 static inline int ath9k_tx99_send(struct ath_softc *sc,
1093                   struct sk_buff *skb,
1094                   struct ath_tx_control *txctl)
1095 {
1096     return 0;
1097 }
1098 #endif /* CONFIG_ATH9K_TX99 */
1099 
1100 /***************************/
1101 /* Random Number Generator */
1102 /***************************/
1103 #ifdef CONFIG_ATH9K_HWRNG
1104 void ath9k_rng_start(struct ath_softc *sc);
1105 void ath9k_rng_stop(struct ath_softc *sc);
1106 #else
1107 static inline void ath9k_rng_start(struct ath_softc *sc)
1108 {
1109 }
1110 
1111 static inline void ath9k_rng_stop(struct ath_softc *sc)
1112 {
1113 }
1114 #endif
1115 
1116 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
1117 {
1118     common->bus_ops->read_cachesize(common, csz);
1119 }
1120 
1121 void ath9k_tasklet(struct tasklet_struct *t);
1122 int ath_cabq_update(struct ath_softc *);
1123 u8 ath9k_parse_mpdudensity(u8 mpdudensity);
1124 irqreturn_t ath_isr(int irq, void *dev);
1125 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan);
1126 void ath_cancel_work(struct ath_softc *sc);
1127 void ath_restart_work(struct ath_softc *sc);
1128 int ath9k_init_device(u16 devid, struct ath_softc *sc,
1129             const struct ath_bus_ops *bus_ops);
1130 void ath9k_deinit_device(struct ath_softc *sc);
1131 void ath9k_reload_chainmask_settings(struct ath_softc *sc);
1132 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
1133 void ath_start_rfkill_poll(struct ath_softc *sc);
1134 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
1135 void ath9k_ps_wakeup(struct ath_softc *sc);
1136 void ath9k_ps_restore(struct ath_softc *sc);
1137 
1138 #ifdef CONFIG_ATH9K_PCI
1139 int ath_pci_init(void);
1140 void ath_pci_exit(void);
1141 #else
1142 static inline int ath_pci_init(void) { return 0; };
1143 static inline void ath_pci_exit(void) {};
1144 #endif
1145 
1146 #ifdef CONFIG_ATH9K_AHB
1147 int ath_ahb_init(void);
1148 void ath_ahb_exit(void);
1149 #else
1150 static inline int ath_ahb_init(void) { return 0; };
1151 static inline void ath_ahb_exit(void) {};
1152 #endif
1153 
1154 #endif /* ATH9K_H */
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