0001
0002
0003
0004
0005
0006 #ifndef ATH11K_HAL_TX_H
0007 #define ATH11K_HAL_TX_H
0008
0009 #include "hal_desc.h"
0010 #include "core.h"
0011
0012 #define HAL_TX_ADDRX_EN 1
0013 #define HAL_TX_ADDRY_EN 2
0014
0015 #define HAL_TX_ADDR_SEARCH_DEFAULT 0
0016 #define HAL_TX_ADDR_SEARCH_INDEX 1
0017
0018 struct hal_tx_info {
0019 u16 meta_data_flags;
0020 u8 ring_id;
0021 u32 desc_id;
0022 enum hal_tcl_desc_type type;
0023 enum hal_tcl_encap_type encap_type;
0024 dma_addr_t paddr;
0025 u32 data_len;
0026 u32 pkt_offset;
0027 enum hal_encrypt_type encrypt_type;
0028 u32 flags0;
0029 u32 flags1;
0030 u16 addr_search_flags;
0031 u16 bss_ast_hash;
0032 u16 bss_ast_idx;
0033 u8 tid;
0034 u8 search_type;
0035 u8 lmac_id;
0036 u8 dscp_tid_tbl_idx;
0037 bool enable_mesh;
0038 };
0039
0040
0041 #define HAL_TX_STATUS_FLAGS_FIRST_MSDU BIT(0)
0042 #define HAL_TX_STATUS_FLAGS_LAST_MSDU BIT(1)
0043 #define HAL_TX_STATUS_FLAGS_MSDU_IN_AMSDU BIT(2)
0044 #define HAL_TX_STATUS_FLAGS_RATE_STATS_VALID BIT(3)
0045 #define HAL_TX_STATUS_FLAGS_RATE_LDPC BIT(4)
0046 #define HAL_TX_STATUS_FLAGS_RATE_STBC BIT(5)
0047 #define HAL_TX_STATUS_FLAGS_OFDMA BIT(6)
0048
0049 #define HAL_TX_STATUS_DESC_LEN sizeof(struct hal_wbm_release_ring)
0050
0051
0052 struct hal_tx_status {
0053 enum hal_wbm_rel_src_module buf_rel_source;
0054 enum hal_wbm_tqm_rel_reason status;
0055 u8 ack_rssi;
0056 u32 flags;
0057 u32 ppdu_id;
0058 u8 try_cnt;
0059 u8 tid;
0060 u16 peer_id;
0061 u32 rate_stats;
0062 };
0063
0064 void ath11k_hal_tx_cmd_desc_setup(struct ath11k_base *ab, void *cmd,
0065 struct hal_tx_info *ti);
0066 void ath11k_hal_tx_set_dscp_tid_map(struct ath11k_base *ab, int id);
0067 int ath11k_hal_reo_cmd_send(struct ath11k_base *ab, struct hal_srng *srng,
0068 enum hal_reo_cmd_type type,
0069 struct ath11k_hal_reo_cmd *cmd);
0070 void ath11k_hal_tx_init_data_ring(struct ath11k_base *ab,
0071 struct hal_srng *srng);
0072 #endif