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0008 #ifndef _WMI_H_
0009 #define _WMI_H_
0010
0011 #include <linux/types.h>
0012 #include <linux/ieee80211.h>
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0054 struct wmi_cmd_hdr {
0055 __le32 cmd_id;
0056 } __packed;
0057
0058 #define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF
0059 #define WMI_CMD_HDR_CMD_ID_LSB 0
0060 #define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
0061 #define WMI_CMD_HDR_PLT_PRIV_LSB 24
0062
0063 #define HTC_PROTOCOL_VERSION 0x0002
0064 #define WMI_PROTOCOL_VERSION 0x0002
0065
0066
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0072
0073 typedef __s32 __bitwise a_sle32;
0074
0075 static inline a_sle32 a_cpu_to_sle32(s32 val)
0076 {
0077 return (__force a_sle32)cpu_to_le32(val);
0078 }
0079
0080 static inline s32 a_sle32_to_cpu(a_sle32 val)
0081 {
0082 return le32_to_cpu((__force __le32)val);
0083 }
0084
0085 enum wmi_service {
0086 WMI_SERVICE_BEACON_OFFLOAD = 0,
0087 WMI_SERVICE_SCAN_OFFLOAD,
0088 WMI_SERVICE_ROAM_OFFLOAD,
0089 WMI_SERVICE_BCN_MISS_OFFLOAD,
0090 WMI_SERVICE_STA_PWRSAVE,
0091 WMI_SERVICE_STA_ADVANCED_PWRSAVE,
0092 WMI_SERVICE_AP_UAPSD,
0093 WMI_SERVICE_AP_DFS,
0094 WMI_SERVICE_11AC,
0095 WMI_SERVICE_BLOCKACK,
0096 WMI_SERVICE_PHYERR,
0097 WMI_SERVICE_BCN_FILTER,
0098 WMI_SERVICE_RTT,
0099 WMI_SERVICE_RATECTRL,
0100 WMI_SERVICE_WOW,
0101 WMI_SERVICE_RATECTRL_CACHE,
0102 WMI_SERVICE_IRAM_TIDS,
0103 WMI_SERVICE_ARPNS_OFFLOAD,
0104 WMI_SERVICE_NLO,
0105 WMI_SERVICE_GTK_OFFLOAD,
0106 WMI_SERVICE_SCAN_SCH,
0107 WMI_SERVICE_CSA_OFFLOAD,
0108 WMI_SERVICE_CHATTER,
0109 WMI_SERVICE_COEX_FREQAVOID,
0110 WMI_SERVICE_PACKET_POWER_SAVE,
0111 WMI_SERVICE_FORCE_FW_HANG,
0112 WMI_SERVICE_GPIO,
0113 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
0114 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
0115 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
0116 WMI_SERVICE_STA_KEEP_ALIVE,
0117 WMI_SERVICE_TX_ENCAP,
0118 WMI_SERVICE_BURST,
0119 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
0120 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
0121 WMI_SERVICE_ROAM_SCAN_OFFLOAD,
0122 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
0123 WMI_SERVICE_EARLY_RX,
0124 WMI_SERVICE_STA_SMPS,
0125 WMI_SERVICE_FWTEST,
0126 WMI_SERVICE_STA_WMMAC,
0127 WMI_SERVICE_TDLS,
0128 WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
0129 WMI_SERVICE_ADAPTIVE_OCS,
0130 WMI_SERVICE_BA_SSN_SUPPORT,
0131 WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
0132 WMI_SERVICE_WLAN_HB,
0133 WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
0134 WMI_SERVICE_BATCH_SCAN,
0135 WMI_SERVICE_QPOWER,
0136 WMI_SERVICE_PLMREQ,
0137 WMI_SERVICE_THERMAL_MGMT,
0138 WMI_SERVICE_RMC,
0139 WMI_SERVICE_MHF_OFFLOAD,
0140 WMI_SERVICE_COEX_SAR,
0141 WMI_SERVICE_BCN_TXRATE_OVERRIDE,
0142 WMI_SERVICE_NAN,
0143 WMI_SERVICE_L1SS_STAT,
0144 WMI_SERVICE_ESTIMATE_LINKSPEED,
0145 WMI_SERVICE_OBSS_SCAN,
0146 WMI_SERVICE_TDLS_OFFCHAN,
0147 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
0148 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
0149 WMI_SERVICE_IBSS_PWRSAVE,
0150 WMI_SERVICE_LPASS,
0151 WMI_SERVICE_EXTSCAN,
0152 WMI_SERVICE_D0WOW,
0153 WMI_SERVICE_HSOFFLOAD,
0154 WMI_SERVICE_ROAM_HO_OFFLOAD,
0155 WMI_SERVICE_RX_FULL_REORDER,
0156 WMI_SERVICE_DHCP_OFFLOAD,
0157 WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
0158 WMI_SERVICE_MDNS_OFFLOAD,
0159 WMI_SERVICE_SAP_AUTH_OFFLOAD,
0160 WMI_SERVICE_ATF,
0161 WMI_SERVICE_COEX_GPIO,
0162 WMI_SERVICE_ENHANCED_PROXY_STA,
0163 WMI_SERVICE_TT,
0164 WMI_SERVICE_PEER_CACHING,
0165 WMI_SERVICE_AUX_SPECTRAL_INTF,
0166 WMI_SERVICE_AUX_CHAN_LOAD_INTF,
0167 WMI_SERVICE_BSS_CHANNEL_INFO_64,
0168 WMI_SERVICE_EXT_RES_CFG_SUPPORT,
0169 WMI_SERVICE_MESH_11S,
0170 WMI_SERVICE_MESH_NON_11S,
0171 WMI_SERVICE_PEER_STATS,
0172 WMI_SERVICE_RESTRT_CHNL_SUPPORT,
0173 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
0174 WMI_SERVICE_TX_MODE_PUSH_ONLY,
0175 WMI_SERVICE_TX_MODE_PUSH_PULL,
0176 WMI_SERVICE_TX_MODE_DYNAMIC,
0177 WMI_SERVICE_VDEV_RX_FILTER,
0178 WMI_SERVICE_BTCOEX,
0179 WMI_SERVICE_CHECK_CAL_VERSION,
0180 WMI_SERVICE_DBGLOG_WARN2,
0181 WMI_SERVICE_BTCOEX_DUTY_CYCLE,
0182 WMI_SERVICE_4_WIRE_COEX_SUPPORT,
0183 WMI_SERVICE_EXTENDED_NSS_SUPPORT,
0184 WMI_SERVICE_PROG_GPIO_BAND_SELECT,
0185 WMI_SERVICE_SMART_LOGGING_SUPPORT,
0186 WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
0187 WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
0188 WMI_SERVICE_MGMT_TX_WMI,
0189 WMI_SERVICE_TDLS_WIDER_BANDWIDTH,
0190 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
0191 WMI_SERVICE_HOST_DFS_CHECK_SUPPORT,
0192 WMI_SERVICE_TPC_STATS_FINAL,
0193 WMI_SERVICE_RESET_CHIP,
0194 WMI_SERVICE_SPOOF_MAC_SUPPORT,
0195 WMI_SERVICE_TX_DATA_ACK_RSSI,
0196 WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
0197 WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
0198 WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT,
0199 WMI_SERVICE_THERM_THROT,
0200 WMI_SERVICE_RTT_RESPONDER_ROLE,
0201 WMI_SERVICE_PER_PACKET_SW_ENCRYPT,
0202 WMI_SERVICE_REPORT_AIRTIME,
0203 WMI_SERVICE_SYNC_DELETE_CMDS,
0204 WMI_SERVICE_TX_PWR_PER_PEER,
0205 WMI_SERVICE_SUPPORT_EXTEND_ADDRESS,
0206 WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT,
0207 WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
0208
0209
0210
0211
0212 WMI_SERVICE_MAX,
0213 };
0214
0215 enum wmi_10x_service {
0216 WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
0217 WMI_10X_SERVICE_SCAN_OFFLOAD,
0218 WMI_10X_SERVICE_ROAM_OFFLOAD,
0219 WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
0220 WMI_10X_SERVICE_STA_PWRSAVE,
0221 WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
0222 WMI_10X_SERVICE_AP_UAPSD,
0223 WMI_10X_SERVICE_AP_DFS,
0224 WMI_10X_SERVICE_11AC,
0225 WMI_10X_SERVICE_BLOCKACK,
0226 WMI_10X_SERVICE_PHYERR,
0227 WMI_10X_SERVICE_BCN_FILTER,
0228 WMI_10X_SERVICE_RTT,
0229 WMI_10X_SERVICE_RATECTRL,
0230 WMI_10X_SERVICE_WOW,
0231 WMI_10X_SERVICE_RATECTRL_CACHE,
0232 WMI_10X_SERVICE_IRAM_TIDS,
0233 WMI_10X_SERVICE_BURST,
0234
0235
0236 WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
0237 WMI_10X_SERVICE_FORCE_FW_HANG,
0238 WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
0239 WMI_10X_SERVICE_ATF,
0240 WMI_10X_SERVICE_COEX_GPIO,
0241 WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
0242 WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
0243 WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
0244 WMI_10X_SERVICE_MESH,
0245 WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
0246 WMI_10X_SERVICE_PEER_STATS,
0247 WMI_10X_SERVICE_RESET_CHIP,
0248 WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
0249 WMI_10X_SERVICE_VDEV_BCN_RATE_CONTROL,
0250 WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
0251 WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
0252 };
0253
0254 enum wmi_main_service {
0255 WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
0256 WMI_MAIN_SERVICE_SCAN_OFFLOAD,
0257 WMI_MAIN_SERVICE_ROAM_OFFLOAD,
0258 WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
0259 WMI_MAIN_SERVICE_STA_PWRSAVE,
0260 WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
0261 WMI_MAIN_SERVICE_AP_UAPSD,
0262 WMI_MAIN_SERVICE_AP_DFS,
0263 WMI_MAIN_SERVICE_11AC,
0264 WMI_MAIN_SERVICE_BLOCKACK,
0265 WMI_MAIN_SERVICE_PHYERR,
0266 WMI_MAIN_SERVICE_BCN_FILTER,
0267 WMI_MAIN_SERVICE_RTT,
0268 WMI_MAIN_SERVICE_RATECTRL,
0269 WMI_MAIN_SERVICE_WOW,
0270 WMI_MAIN_SERVICE_RATECTRL_CACHE,
0271 WMI_MAIN_SERVICE_IRAM_TIDS,
0272 WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
0273 WMI_MAIN_SERVICE_NLO,
0274 WMI_MAIN_SERVICE_GTK_OFFLOAD,
0275 WMI_MAIN_SERVICE_SCAN_SCH,
0276 WMI_MAIN_SERVICE_CSA_OFFLOAD,
0277 WMI_MAIN_SERVICE_CHATTER,
0278 WMI_MAIN_SERVICE_COEX_FREQAVOID,
0279 WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
0280 WMI_MAIN_SERVICE_FORCE_FW_HANG,
0281 WMI_MAIN_SERVICE_GPIO,
0282 WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
0283 WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
0284 WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
0285 WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
0286 WMI_MAIN_SERVICE_TX_ENCAP,
0287 };
0288
0289 enum wmi_10_4_service {
0290 WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
0291 WMI_10_4_SERVICE_SCAN_OFFLOAD,
0292 WMI_10_4_SERVICE_ROAM_OFFLOAD,
0293 WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
0294 WMI_10_4_SERVICE_STA_PWRSAVE,
0295 WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
0296 WMI_10_4_SERVICE_AP_UAPSD,
0297 WMI_10_4_SERVICE_AP_DFS,
0298 WMI_10_4_SERVICE_11AC,
0299 WMI_10_4_SERVICE_BLOCKACK,
0300 WMI_10_4_SERVICE_PHYERR,
0301 WMI_10_4_SERVICE_BCN_FILTER,
0302 WMI_10_4_SERVICE_RTT,
0303 WMI_10_4_SERVICE_RATECTRL,
0304 WMI_10_4_SERVICE_WOW,
0305 WMI_10_4_SERVICE_RATECTRL_CACHE,
0306 WMI_10_4_SERVICE_IRAM_TIDS,
0307 WMI_10_4_SERVICE_BURST,
0308 WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
0309 WMI_10_4_SERVICE_GTK_OFFLOAD,
0310 WMI_10_4_SERVICE_SCAN_SCH,
0311 WMI_10_4_SERVICE_CSA_OFFLOAD,
0312 WMI_10_4_SERVICE_CHATTER,
0313 WMI_10_4_SERVICE_COEX_FREQAVOID,
0314 WMI_10_4_SERVICE_PACKET_POWER_SAVE,
0315 WMI_10_4_SERVICE_FORCE_FW_HANG,
0316 WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
0317 WMI_10_4_SERVICE_GPIO,
0318 WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
0319 WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
0320 WMI_10_4_SERVICE_STA_KEEP_ALIVE,
0321 WMI_10_4_SERVICE_TX_ENCAP,
0322 WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
0323 WMI_10_4_SERVICE_EARLY_RX,
0324 WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
0325 WMI_10_4_SERVICE_TT,
0326 WMI_10_4_SERVICE_ATF,
0327 WMI_10_4_SERVICE_PEER_CACHING,
0328 WMI_10_4_SERVICE_COEX_GPIO,
0329 WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
0330 WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
0331 WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
0332 WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
0333 WMI_10_4_SERVICE_MESH_NON_11S,
0334 WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
0335 WMI_10_4_SERVICE_PEER_STATS,
0336 WMI_10_4_SERVICE_MESH_11S,
0337 WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
0338 WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
0339 WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
0340 WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
0341 WMI_10_4_SERVICE_VDEV_RX_FILTER,
0342 WMI_10_4_SERVICE_BTCOEX,
0343 WMI_10_4_SERVICE_CHECK_CAL_VERSION,
0344 WMI_10_4_SERVICE_DBGLOG_WARN2,
0345 WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
0346 WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
0347 WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
0348 WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
0349 WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
0350 WMI_10_4_SERVICE_TDLS,
0351 WMI_10_4_SERVICE_TDLS_OFFCHAN,
0352 WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
0353 WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
0354 WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
0355 WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
0356 WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
0357 WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
0358 WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
0359 WMI_10_4_SERVICE_TPC_STATS_FINAL,
0360 WMI_10_4_SERVICE_CFR_CAPTURE_SUPPORT,
0361 WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
0362 WMI_10_4_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_LEGACY,
0363 WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
0364 WMI_10_4_SERVICE_PEER_TID_CONFIGS_SUPPORT,
0365 WMI_10_4_SERVICE_VDEV_BCN_RATE_CONTROL,
0366 WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
0367 WMI_10_4_SERVICE_HTT_ASSERT_TRIGGER_SUPPORT,
0368 WMI_10_4_SERVICE_VDEV_FILTER_NEIGHBOR_RX_PACKETS,
0369 WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
0370 WMI_10_4_SERVICE_PEER_CHWIDTH_CHANGE,
0371 WMI_10_4_SERVICE_RX_FILTER_OUT_COUNT,
0372 WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
0373 WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
0374 WMI_10_4_SERVICE_REPORT_AIRTIME,
0375 WMI_10_4_SERVICE_TX_PWR_PER_PEER,
0376 WMI_10_4_SERVICE_FETCH_PEER_TX_PN,
0377 WMI_10_4_SERVICE_MULTIPLE_VDEV_RESTART,
0378 WMI_10_4_SERVICE_ENHANCED_RADIO_COUNTERS,
0379 WMI_10_4_SERVICE_QINQ_SUPPORT,
0380 WMI_10_4_SERVICE_RESET_CHIP,
0381 };
0382
0383 static inline char *wmi_service_name(enum wmi_service service_id)
0384 {
0385 #define SVCSTR(x) case x: return #x
0386
0387 switch (service_id) {
0388 SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
0389 SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
0390 SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
0391 SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
0392 SVCSTR(WMI_SERVICE_STA_PWRSAVE);
0393 SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
0394 SVCSTR(WMI_SERVICE_AP_UAPSD);
0395 SVCSTR(WMI_SERVICE_AP_DFS);
0396 SVCSTR(WMI_SERVICE_11AC);
0397 SVCSTR(WMI_SERVICE_BLOCKACK);
0398 SVCSTR(WMI_SERVICE_PHYERR);
0399 SVCSTR(WMI_SERVICE_BCN_FILTER);
0400 SVCSTR(WMI_SERVICE_RTT);
0401 SVCSTR(WMI_SERVICE_RATECTRL);
0402 SVCSTR(WMI_SERVICE_WOW);
0403 SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
0404 SVCSTR(WMI_SERVICE_IRAM_TIDS);
0405 SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
0406 SVCSTR(WMI_SERVICE_NLO);
0407 SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
0408 SVCSTR(WMI_SERVICE_SCAN_SCH);
0409 SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
0410 SVCSTR(WMI_SERVICE_CHATTER);
0411 SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
0412 SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
0413 SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
0414 SVCSTR(WMI_SERVICE_GPIO);
0415 SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
0416 SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
0417 SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
0418 SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
0419 SVCSTR(WMI_SERVICE_TX_ENCAP);
0420 SVCSTR(WMI_SERVICE_BURST);
0421 SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
0422 SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
0423 SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
0424 SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
0425 SVCSTR(WMI_SERVICE_EARLY_RX);
0426 SVCSTR(WMI_SERVICE_STA_SMPS);
0427 SVCSTR(WMI_SERVICE_FWTEST);
0428 SVCSTR(WMI_SERVICE_STA_WMMAC);
0429 SVCSTR(WMI_SERVICE_TDLS);
0430 SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
0431 SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
0432 SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
0433 SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
0434 SVCSTR(WMI_SERVICE_WLAN_HB);
0435 SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
0436 SVCSTR(WMI_SERVICE_BATCH_SCAN);
0437 SVCSTR(WMI_SERVICE_QPOWER);
0438 SVCSTR(WMI_SERVICE_PLMREQ);
0439 SVCSTR(WMI_SERVICE_THERMAL_MGMT);
0440 SVCSTR(WMI_SERVICE_RMC);
0441 SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
0442 SVCSTR(WMI_SERVICE_COEX_SAR);
0443 SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
0444 SVCSTR(WMI_SERVICE_NAN);
0445 SVCSTR(WMI_SERVICE_L1SS_STAT);
0446 SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
0447 SVCSTR(WMI_SERVICE_OBSS_SCAN);
0448 SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
0449 SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
0450 SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
0451 SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
0452 SVCSTR(WMI_SERVICE_LPASS);
0453 SVCSTR(WMI_SERVICE_EXTSCAN);
0454 SVCSTR(WMI_SERVICE_D0WOW);
0455 SVCSTR(WMI_SERVICE_HSOFFLOAD);
0456 SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
0457 SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
0458 SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
0459 SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
0460 SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
0461 SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
0462 SVCSTR(WMI_SERVICE_ATF);
0463 SVCSTR(WMI_SERVICE_COEX_GPIO);
0464 SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
0465 SVCSTR(WMI_SERVICE_TT);
0466 SVCSTR(WMI_SERVICE_PEER_CACHING);
0467 SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
0468 SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
0469 SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
0470 SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT);
0471 SVCSTR(WMI_SERVICE_MESH_11S);
0472 SVCSTR(WMI_SERVICE_MESH_NON_11S);
0473 SVCSTR(WMI_SERVICE_PEER_STATS);
0474 SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT);
0475 SVCSTR(WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT);
0476 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY);
0477 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL);
0478 SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC);
0479 SVCSTR(WMI_SERVICE_VDEV_RX_FILTER);
0480 SVCSTR(WMI_SERVICE_BTCOEX);
0481 SVCSTR(WMI_SERVICE_CHECK_CAL_VERSION);
0482 SVCSTR(WMI_SERVICE_DBGLOG_WARN2);
0483 SVCSTR(WMI_SERVICE_BTCOEX_DUTY_CYCLE);
0484 SVCSTR(WMI_SERVICE_4_WIRE_COEX_SUPPORT);
0485 SVCSTR(WMI_SERVICE_EXTENDED_NSS_SUPPORT);
0486 SVCSTR(WMI_SERVICE_PROG_GPIO_BAND_SELECT);
0487 SVCSTR(WMI_SERVICE_SMART_LOGGING_SUPPORT);
0488 SVCSTR(WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE);
0489 SVCSTR(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY);
0490 SVCSTR(WMI_SERVICE_MGMT_TX_WMI);
0491 SVCSTR(WMI_SERVICE_TDLS_WIDER_BANDWIDTH);
0492 SVCSTR(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS);
0493 SVCSTR(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT);
0494 SVCSTR(WMI_SERVICE_TPC_STATS_FINAL);
0495 SVCSTR(WMI_SERVICE_RESET_CHIP);
0496 SVCSTR(WMI_SERVICE_SPOOF_MAC_SUPPORT);
0497 SVCSTR(WMI_SERVICE_TX_DATA_ACK_RSSI);
0498 SVCSTR(WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT);
0499 SVCSTR(WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT);
0500 SVCSTR(WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT);
0501 SVCSTR(WMI_SERVICE_THERM_THROT);
0502 SVCSTR(WMI_SERVICE_RTT_RESPONDER_ROLE);
0503 SVCSTR(WMI_SERVICE_PER_PACKET_SW_ENCRYPT);
0504 SVCSTR(WMI_SERVICE_REPORT_AIRTIME);
0505 SVCSTR(WMI_SERVICE_SYNC_DELETE_CMDS);
0506 SVCSTR(WMI_SERVICE_TX_PWR_PER_PEER);
0507 SVCSTR(WMI_SERVICE_SUPPORT_EXTEND_ADDRESS);
0508 SVCSTR(WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT);
0509 SVCSTR(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT);
0510
0511 case WMI_SERVICE_MAX:
0512 return NULL;
0513 }
0514
0515 #undef SVCSTR
0516
0517 return NULL;
0518 }
0519
0520 #define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
0521 ((svc_id) < (len) && \
0522 __le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \
0523 BIT((svc_id) % (sizeof(u32))))
0524
0525
0526
0527
0528
0529
0530 #define WMI_EXT_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
0531 ((svc_id) >= (len) && \
0532 __le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \
0533 BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4))
0534
0535 #define SVCMAP(x, y, len) \
0536 do { \
0537 if ((WMI_SERVICE_IS_ENABLED((in), (x), (len))) || \
0538 (WMI_EXT_SERVICE_IS_ENABLED((in), (x), (len)))) \
0539 __set_bit(y, out); \
0540 } while (0)
0541
0542 static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
0543 size_t len)
0544 {
0545 SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
0546 WMI_SERVICE_BEACON_OFFLOAD, len);
0547 SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
0548 WMI_SERVICE_SCAN_OFFLOAD, len);
0549 SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
0550 WMI_SERVICE_ROAM_OFFLOAD, len);
0551 SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
0552 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
0553 SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
0554 WMI_SERVICE_STA_PWRSAVE, len);
0555 SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
0556 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
0557 SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
0558 WMI_SERVICE_AP_UAPSD, len);
0559 SVCMAP(WMI_10X_SERVICE_AP_DFS,
0560 WMI_SERVICE_AP_DFS, len);
0561 SVCMAP(WMI_10X_SERVICE_11AC,
0562 WMI_SERVICE_11AC, len);
0563 SVCMAP(WMI_10X_SERVICE_BLOCKACK,
0564 WMI_SERVICE_BLOCKACK, len);
0565 SVCMAP(WMI_10X_SERVICE_PHYERR,
0566 WMI_SERVICE_PHYERR, len);
0567 SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
0568 WMI_SERVICE_BCN_FILTER, len);
0569 SVCMAP(WMI_10X_SERVICE_RTT,
0570 WMI_SERVICE_RTT, len);
0571 SVCMAP(WMI_10X_SERVICE_RATECTRL,
0572 WMI_SERVICE_RATECTRL, len);
0573 SVCMAP(WMI_10X_SERVICE_WOW,
0574 WMI_SERVICE_WOW, len);
0575 SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
0576 WMI_SERVICE_RATECTRL_CACHE, len);
0577 SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
0578 WMI_SERVICE_IRAM_TIDS, len);
0579 SVCMAP(WMI_10X_SERVICE_BURST,
0580 WMI_SERVICE_BURST, len);
0581 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
0582 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
0583 SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
0584 WMI_SERVICE_FORCE_FW_HANG, len);
0585 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
0586 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
0587 SVCMAP(WMI_10X_SERVICE_ATF,
0588 WMI_SERVICE_ATF, len);
0589 SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
0590 WMI_SERVICE_COEX_GPIO, len);
0591 SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
0592 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
0593 SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
0594 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
0595 SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
0596 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
0597 SVCMAP(WMI_10X_SERVICE_MESH,
0598 WMI_SERVICE_MESH_11S, len);
0599 SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
0600 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
0601 SVCMAP(WMI_10X_SERVICE_PEER_STATS,
0602 WMI_SERVICE_PEER_STATS, len);
0603 SVCMAP(WMI_10X_SERVICE_RESET_CHIP,
0604 WMI_SERVICE_RESET_CHIP, len);
0605 SVCMAP(WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
0606 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
0607 SVCMAP(WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
0608 WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT, len);
0609 SVCMAP(WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
0610 WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
0611 }
0612
0613 static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
0614 size_t len)
0615 {
0616 SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
0617 WMI_SERVICE_BEACON_OFFLOAD, len);
0618 SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
0619 WMI_SERVICE_SCAN_OFFLOAD, len);
0620 SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
0621 WMI_SERVICE_ROAM_OFFLOAD, len);
0622 SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
0623 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
0624 SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
0625 WMI_SERVICE_STA_PWRSAVE, len);
0626 SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
0627 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
0628 SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
0629 WMI_SERVICE_AP_UAPSD, len);
0630 SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
0631 WMI_SERVICE_AP_DFS, len);
0632 SVCMAP(WMI_MAIN_SERVICE_11AC,
0633 WMI_SERVICE_11AC, len);
0634 SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
0635 WMI_SERVICE_BLOCKACK, len);
0636 SVCMAP(WMI_MAIN_SERVICE_PHYERR,
0637 WMI_SERVICE_PHYERR, len);
0638 SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
0639 WMI_SERVICE_BCN_FILTER, len);
0640 SVCMAP(WMI_MAIN_SERVICE_RTT,
0641 WMI_SERVICE_RTT, len);
0642 SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
0643 WMI_SERVICE_RATECTRL, len);
0644 SVCMAP(WMI_MAIN_SERVICE_WOW,
0645 WMI_SERVICE_WOW, len);
0646 SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
0647 WMI_SERVICE_RATECTRL_CACHE, len);
0648 SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
0649 WMI_SERVICE_IRAM_TIDS, len);
0650 SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
0651 WMI_SERVICE_ARPNS_OFFLOAD, len);
0652 SVCMAP(WMI_MAIN_SERVICE_NLO,
0653 WMI_SERVICE_NLO, len);
0654 SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
0655 WMI_SERVICE_GTK_OFFLOAD, len);
0656 SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
0657 WMI_SERVICE_SCAN_SCH, len);
0658 SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
0659 WMI_SERVICE_CSA_OFFLOAD, len);
0660 SVCMAP(WMI_MAIN_SERVICE_CHATTER,
0661 WMI_SERVICE_CHATTER, len);
0662 SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
0663 WMI_SERVICE_COEX_FREQAVOID, len);
0664 SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
0665 WMI_SERVICE_PACKET_POWER_SAVE, len);
0666 SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
0667 WMI_SERVICE_FORCE_FW_HANG, len);
0668 SVCMAP(WMI_MAIN_SERVICE_GPIO,
0669 WMI_SERVICE_GPIO, len);
0670 SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
0671 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
0672 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
0673 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
0674 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
0675 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
0676 SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
0677 WMI_SERVICE_STA_KEEP_ALIVE, len);
0678 SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
0679 WMI_SERVICE_TX_ENCAP, len);
0680 }
0681
0682 static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
0683 size_t len)
0684 {
0685 SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
0686 WMI_SERVICE_BEACON_OFFLOAD, len);
0687 SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
0688 WMI_SERVICE_SCAN_OFFLOAD, len);
0689 SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
0690 WMI_SERVICE_ROAM_OFFLOAD, len);
0691 SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
0692 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
0693 SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
0694 WMI_SERVICE_STA_PWRSAVE, len);
0695 SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
0696 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
0697 SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
0698 WMI_SERVICE_AP_UAPSD, len);
0699 SVCMAP(WMI_10_4_SERVICE_AP_DFS,
0700 WMI_SERVICE_AP_DFS, len);
0701 SVCMAP(WMI_10_4_SERVICE_11AC,
0702 WMI_SERVICE_11AC, len);
0703 SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
0704 WMI_SERVICE_BLOCKACK, len);
0705 SVCMAP(WMI_10_4_SERVICE_PHYERR,
0706 WMI_SERVICE_PHYERR, len);
0707 SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
0708 WMI_SERVICE_BCN_FILTER, len);
0709 SVCMAP(WMI_10_4_SERVICE_RTT,
0710 WMI_SERVICE_RTT, len);
0711 SVCMAP(WMI_10_4_SERVICE_RATECTRL,
0712 WMI_SERVICE_RATECTRL, len);
0713 SVCMAP(WMI_10_4_SERVICE_WOW,
0714 WMI_SERVICE_WOW, len);
0715 SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
0716 WMI_SERVICE_RATECTRL_CACHE, len);
0717 SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
0718 WMI_SERVICE_IRAM_TIDS, len);
0719 SVCMAP(WMI_10_4_SERVICE_BURST,
0720 WMI_SERVICE_BURST, len);
0721 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
0722 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
0723 SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
0724 WMI_SERVICE_GTK_OFFLOAD, len);
0725 SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
0726 WMI_SERVICE_SCAN_SCH, len);
0727 SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
0728 WMI_SERVICE_CSA_OFFLOAD, len);
0729 SVCMAP(WMI_10_4_SERVICE_CHATTER,
0730 WMI_SERVICE_CHATTER, len);
0731 SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
0732 WMI_SERVICE_COEX_FREQAVOID, len);
0733 SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
0734 WMI_SERVICE_PACKET_POWER_SAVE, len);
0735 SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
0736 WMI_SERVICE_FORCE_FW_HANG, len);
0737 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
0738 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
0739 SVCMAP(WMI_10_4_SERVICE_GPIO,
0740 WMI_SERVICE_GPIO, len);
0741 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
0742 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
0743 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
0744 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
0745 SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
0746 WMI_SERVICE_STA_KEEP_ALIVE, len);
0747 SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
0748 WMI_SERVICE_TX_ENCAP, len);
0749 SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
0750 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
0751 SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
0752 WMI_SERVICE_EARLY_RX, len);
0753 SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
0754 WMI_SERVICE_ENHANCED_PROXY_STA, len);
0755 SVCMAP(WMI_10_4_SERVICE_TT,
0756 WMI_SERVICE_TT, len);
0757 SVCMAP(WMI_10_4_SERVICE_ATF,
0758 WMI_SERVICE_ATF, len);
0759 SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
0760 WMI_SERVICE_PEER_CACHING, len);
0761 SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
0762 WMI_SERVICE_COEX_GPIO, len);
0763 SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
0764 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
0765 SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
0766 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
0767 SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
0768 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
0769 SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
0770 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
0771 SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S,
0772 WMI_SERVICE_MESH_NON_11S, len);
0773 SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
0774 WMI_SERVICE_RESTRT_CHNL_SUPPORT, len);
0775 SVCMAP(WMI_10_4_SERVICE_PEER_STATS,
0776 WMI_SERVICE_PEER_STATS, len);
0777 SVCMAP(WMI_10_4_SERVICE_MESH_11S,
0778 WMI_SERVICE_MESH_11S, len);
0779 SVCMAP(WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
0780 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, len);
0781 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
0782 WMI_SERVICE_TX_MODE_PUSH_ONLY, len);
0783 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
0784 WMI_SERVICE_TX_MODE_PUSH_PULL, len);
0785 SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
0786 WMI_SERVICE_TX_MODE_DYNAMIC, len);
0787 SVCMAP(WMI_10_4_SERVICE_VDEV_RX_FILTER,
0788 WMI_SERVICE_VDEV_RX_FILTER, len);
0789 SVCMAP(WMI_10_4_SERVICE_BTCOEX,
0790 WMI_SERVICE_BTCOEX, len);
0791 SVCMAP(WMI_10_4_SERVICE_CHECK_CAL_VERSION,
0792 WMI_SERVICE_CHECK_CAL_VERSION, len);
0793 SVCMAP(WMI_10_4_SERVICE_DBGLOG_WARN2,
0794 WMI_SERVICE_DBGLOG_WARN2, len);
0795 SVCMAP(WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
0796 WMI_SERVICE_BTCOEX_DUTY_CYCLE, len);
0797 SVCMAP(WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
0798 WMI_SERVICE_4_WIRE_COEX_SUPPORT, len);
0799 SVCMAP(WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
0800 WMI_SERVICE_EXTENDED_NSS_SUPPORT, len);
0801 SVCMAP(WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
0802 WMI_SERVICE_PROG_GPIO_BAND_SELECT, len);
0803 SVCMAP(WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
0804 WMI_SERVICE_SMART_LOGGING_SUPPORT, len);
0805 SVCMAP(WMI_10_4_SERVICE_TDLS,
0806 WMI_SERVICE_TDLS, len);
0807 SVCMAP(WMI_10_4_SERVICE_TDLS_OFFCHAN,
0808 WMI_SERVICE_TDLS_OFFCHAN, len);
0809 SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
0810 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, len);
0811 SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
0812 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, len);
0813 SVCMAP(WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
0814 WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, len);
0815 SVCMAP(WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
0816 WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, len);
0817 SVCMAP(WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
0818 WMI_SERVICE_TDLS_WIDER_BANDWIDTH, len);
0819 SVCMAP(WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
0820 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
0821 SVCMAP(WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
0822 WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, len);
0823 SVCMAP(WMI_10_4_SERVICE_TPC_STATS_FINAL,
0824 WMI_SERVICE_TPC_STATS_FINAL, len);
0825 SVCMAP(WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
0826 WMI_SERVICE_TX_DATA_ACK_RSSI, len);
0827 SVCMAP(WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
0828 WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT, len);
0829 SVCMAP(WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
0830 WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT, len);
0831 SVCMAP(WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
0832 WMI_SERVICE_RTT_RESPONDER_ROLE, len);
0833 SVCMAP(WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
0834 WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
0835 SVCMAP(WMI_10_4_SERVICE_REPORT_AIRTIME,
0836 WMI_SERVICE_REPORT_AIRTIME, len);
0837 SVCMAP(WMI_10_4_SERVICE_TX_PWR_PER_PEER,
0838 WMI_SERVICE_TX_PWR_PER_PEER, len);
0839 SVCMAP(WMI_10_4_SERVICE_RESET_CHIP,
0840 WMI_SERVICE_RESET_CHIP, len);
0841 SVCMAP(WMI_10_4_SERVICE_PEER_TID_CONFIGS_SUPPORT,
0842 WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT, len);
0843 SVCMAP(WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
0844 WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT, len);
0845 }
0846
0847 #undef SVCMAP
0848
0849
0850 struct wmi_mac_addr {
0851 union {
0852 u8 addr[6];
0853 struct {
0854 u32 word0;
0855 u32 word1;
0856 } __packed;
0857 } __packed;
0858 } __packed;
0859
0860 struct wmi_cmd_map {
0861 u32 init_cmdid;
0862 u32 start_scan_cmdid;
0863 u32 stop_scan_cmdid;
0864 u32 scan_chan_list_cmdid;
0865 u32 scan_sch_prio_tbl_cmdid;
0866 u32 scan_prob_req_oui_cmdid;
0867 u32 pdev_set_regdomain_cmdid;
0868 u32 pdev_set_channel_cmdid;
0869 u32 pdev_set_param_cmdid;
0870 u32 pdev_pktlog_enable_cmdid;
0871 u32 pdev_pktlog_disable_cmdid;
0872 u32 pdev_set_wmm_params_cmdid;
0873 u32 pdev_set_ht_cap_ie_cmdid;
0874 u32 pdev_set_vht_cap_ie_cmdid;
0875 u32 pdev_set_dscp_tid_map_cmdid;
0876 u32 pdev_set_quiet_mode_cmdid;
0877 u32 pdev_green_ap_ps_enable_cmdid;
0878 u32 pdev_get_tpc_config_cmdid;
0879 u32 pdev_set_base_macaddr_cmdid;
0880 u32 vdev_create_cmdid;
0881 u32 vdev_delete_cmdid;
0882 u32 vdev_start_request_cmdid;
0883 u32 vdev_restart_request_cmdid;
0884 u32 vdev_up_cmdid;
0885 u32 vdev_stop_cmdid;
0886 u32 vdev_down_cmdid;
0887 u32 vdev_set_param_cmdid;
0888 u32 vdev_install_key_cmdid;
0889 u32 peer_create_cmdid;
0890 u32 peer_delete_cmdid;
0891 u32 peer_flush_tids_cmdid;
0892 u32 peer_set_param_cmdid;
0893 u32 peer_assoc_cmdid;
0894 u32 peer_add_wds_entry_cmdid;
0895 u32 peer_remove_wds_entry_cmdid;
0896 u32 peer_mcast_group_cmdid;
0897 u32 bcn_tx_cmdid;
0898 u32 pdev_send_bcn_cmdid;
0899 u32 bcn_tmpl_cmdid;
0900 u32 bcn_filter_rx_cmdid;
0901 u32 prb_req_filter_rx_cmdid;
0902 u32 mgmt_tx_cmdid;
0903 u32 mgmt_tx_send_cmdid;
0904 u32 prb_tmpl_cmdid;
0905 u32 addba_clear_resp_cmdid;
0906 u32 addba_send_cmdid;
0907 u32 addba_status_cmdid;
0908 u32 delba_send_cmdid;
0909 u32 addba_set_resp_cmdid;
0910 u32 send_singleamsdu_cmdid;
0911 u32 sta_powersave_mode_cmdid;
0912 u32 sta_powersave_param_cmdid;
0913 u32 sta_mimo_ps_mode_cmdid;
0914 u32 pdev_dfs_enable_cmdid;
0915 u32 pdev_dfs_disable_cmdid;
0916 u32 roam_scan_mode;
0917 u32 roam_scan_rssi_threshold;
0918 u32 roam_scan_period;
0919 u32 roam_scan_rssi_change_threshold;
0920 u32 roam_ap_profile;
0921 u32 ofl_scan_add_ap_profile;
0922 u32 ofl_scan_remove_ap_profile;
0923 u32 ofl_scan_period;
0924 u32 p2p_dev_set_device_info;
0925 u32 p2p_dev_set_discoverability;
0926 u32 p2p_go_set_beacon_ie;
0927 u32 p2p_go_set_probe_resp_ie;
0928 u32 p2p_set_vendor_ie_data_cmdid;
0929 u32 ap_ps_peer_param_cmdid;
0930 u32 ap_ps_peer_uapsd_coex_cmdid;
0931 u32 peer_rate_retry_sched_cmdid;
0932 u32 wlan_profile_trigger_cmdid;
0933 u32 wlan_profile_set_hist_intvl_cmdid;
0934 u32 wlan_profile_get_profile_data_cmdid;
0935 u32 wlan_profile_enable_profile_id_cmdid;
0936 u32 wlan_profile_list_profile_id_cmdid;
0937 u32 pdev_suspend_cmdid;
0938 u32 pdev_resume_cmdid;
0939 u32 add_bcn_filter_cmdid;
0940 u32 rmv_bcn_filter_cmdid;
0941 u32 wow_add_wake_pattern_cmdid;
0942 u32 wow_del_wake_pattern_cmdid;
0943 u32 wow_enable_disable_wake_event_cmdid;
0944 u32 wow_enable_cmdid;
0945 u32 wow_hostwakeup_from_sleep_cmdid;
0946 u32 rtt_measreq_cmdid;
0947 u32 rtt_tsf_cmdid;
0948 u32 vdev_spectral_scan_configure_cmdid;
0949 u32 vdev_spectral_scan_enable_cmdid;
0950 u32 request_stats_cmdid;
0951 u32 request_peer_stats_info_cmdid;
0952 u32 set_arp_ns_offload_cmdid;
0953 u32 network_list_offload_config_cmdid;
0954 u32 gtk_offload_cmdid;
0955 u32 csa_offload_enable_cmdid;
0956 u32 csa_offload_chanswitch_cmdid;
0957 u32 chatter_set_mode_cmdid;
0958 u32 peer_tid_addba_cmdid;
0959 u32 peer_tid_delba_cmdid;
0960 u32 sta_dtim_ps_method_cmdid;
0961 u32 sta_uapsd_auto_trig_cmdid;
0962 u32 sta_keepalive_cmd;
0963 u32 echo_cmdid;
0964 u32 pdev_utf_cmdid;
0965 u32 dbglog_cfg_cmdid;
0966 u32 pdev_qvit_cmdid;
0967 u32 pdev_ftm_intg_cmdid;
0968 u32 vdev_set_keepalive_cmdid;
0969 u32 vdev_get_keepalive_cmdid;
0970 u32 force_fw_hang_cmdid;
0971 u32 gpio_config_cmdid;
0972 u32 gpio_output_cmdid;
0973 u32 pdev_get_temperature_cmdid;
0974 u32 vdev_set_wmm_params_cmdid;
0975 u32 tdls_set_state_cmdid;
0976 u32 tdls_peer_update_cmdid;
0977 u32 adaptive_qcs_cmdid;
0978 u32 scan_update_request_cmdid;
0979 u32 vdev_standby_response_cmdid;
0980 u32 vdev_resume_response_cmdid;
0981 u32 wlan_peer_caching_add_peer_cmdid;
0982 u32 wlan_peer_caching_evict_peer_cmdid;
0983 u32 wlan_peer_caching_restore_peer_cmdid;
0984 u32 wlan_peer_caching_print_all_peers_info_cmdid;
0985 u32 peer_update_wds_entry_cmdid;
0986 u32 peer_add_proxy_sta_entry_cmdid;
0987 u32 rtt_keepalive_cmdid;
0988 u32 oem_req_cmdid;
0989 u32 nan_cmdid;
0990 u32 vdev_ratemask_cmdid;
0991 u32 qboost_cfg_cmdid;
0992 u32 pdev_smart_ant_enable_cmdid;
0993 u32 pdev_smart_ant_set_rx_antenna_cmdid;
0994 u32 peer_smart_ant_set_tx_antenna_cmdid;
0995 u32 peer_smart_ant_set_train_info_cmdid;
0996 u32 peer_smart_ant_set_node_config_ops_cmdid;
0997 u32 pdev_set_antenna_switch_table_cmdid;
0998 u32 pdev_set_ctl_table_cmdid;
0999 u32 pdev_set_mimogain_table_cmdid;
1000 u32 pdev_ratepwr_table_cmdid;
1001 u32 pdev_ratepwr_chainmsk_table_cmdid;
1002 u32 pdev_fips_cmdid;
1003 u32 tt_set_conf_cmdid;
1004 u32 fwtest_cmdid;
1005 u32 vdev_atf_request_cmdid;
1006 u32 peer_atf_request_cmdid;
1007 u32 pdev_get_ani_cck_config_cmdid;
1008 u32 pdev_get_ani_ofdm_config_cmdid;
1009 u32 pdev_reserve_ast_entry_cmdid;
1010 u32 pdev_get_nfcal_power_cmdid;
1011 u32 pdev_get_tpc_cmdid;
1012 u32 pdev_get_ast_info_cmdid;
1013 u32 vdev_set_dscp_tid_map_cmdid;
1014 u32 pdev_get_info_cmdid;
1015 u32 vdev_get_info_cmdid;
1016 u32 vdev_filter_neighbor_rx_packets_cmdid;
1017 u32 mu_cal_start_cmdid;
1018 u32 set_cca_params_cmdid;
1019 u32 pdev_bss_chan_info_request_cmdid;
1020 u32 pdev_enable_adaptive_cca_cmdid;
1021 u32 ext_resource_cfg_cmdid;
1022 u32 vdev_set_ie_cmdid;
1023 u32 set_lteu_config_cmdid;
1024 u32 atf_ssid_grouping_request_cmdid;
1025 u32 peer_atf_ext_request_cmdid;
1026 u32 set_periodic_channel_stats_cfg_cmdid;
1027 u32 peer_bwf_request_cmdid;
1028 u32 btcoex_cfg_cmdid;
1029 u32 peer_tx_mu_txmit_count_cmdid;
1030 u32 peer_tx_mu_txmit_rstcnt_cmdid;
1031 u32 peer_gid_userpos_list_cmdid;
1032 u32 pdev_check_cal_version_cmdid;
1033 u32 coex_version_cfg_cmid;
1034 u32 pdev_get_rx_filter_cmdid;
1035 u32 pdev_extended_nss_cfg_cmdid;
1036 u32 vdev_set_scan_nac_rssi_cmdid;
1037 u32 prog_gpio_band_select_cmdid;
1038 u32 config_smart_logging_cmdid;
1039 u32 debug_fatal_condition_cmdid;
1040 u32 get_tsf_timer_cmdid;
1041 u32 pdev_get_tpc_table_cmdid;
1042 u32 vdev_sifs_trigger_time_cmdid;
1043 u32 pdev_wds_entry_list_cmdid;
1044 u32 tdls_set_offchan_mode_cmdid;
1045 u32 radar_found_cmdid;
1046 u32 set_bb_timing_cmdid;
1047 u32 per_peer_per_tid_config_cmdid;
1048 };
1049
1050
1051
1052
1053 enum wmi_cmd_group {
1054
1055 WMI_GRP_START = 0x3,
1056 WMI_GRP_SCAN = WMI_GRP_START,
1057 WMI_GRP_PDEV,
1058 WMI_GRP_VDEV,
1059 WMI_GRP_PEER,
1060 WMI_GRP_MGMT,
1061 WMI_GRP_BA_NEG,
1062 WMI_GRP_STA_PS,
1063 WMI_GRP_DFS,
1064 WMI_GRP_ROAM,
1065 WMI_GRP_OFL_SCAN,
1066 WMI_GRP_P2P,
1067 WMI_GRP_AP_PS,
1068 WMI_GRP_RATE_CTRL,
1069 WMI_GRP_PROFILE,
1070 WMI_GRP_SUSPEND,
1071 WMI_GRP_BCN_FILTER,
1072 WMI_GRP_WOW,
1073 WMI_GRP_RTT,
1074 WMI_GRP_SPECTRAL,
1075 WMI_GRP_STATS,
1076 WMI_GRP_ARP_NS_OFL,
1077 WMI_GRP_NLO_OFL,
1078 WMI_GRP_GTK_OFL,
1079 WMI_GRP_CSA_OFL,
1080 WMI_GRP_CHATTER,
1081 WMI_GRP_TID_ADDBA,
1082 WMI_GRP_MISC,
1083 WMI_GRP_GPIO,
1084 };
1085
1086 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
1087 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
1088
1089 #define WMI_CMD_UNSUPPORTED 0
1090
1091
1092 enum wmi_cmd_id {
1093 WMI_INIT_CMDID = 0x1,
1094
1095
1096 WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
1097 WMI_STOP_SCAN_CMDID,
1098 WMI_SCAN_CHAN_LIST_CMDID,
1099 WMI_SCAN_SCH_PRIO_TBL_CMDID,
1100
1101
1102 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
1103 WMI_PDEV_SET_CHANNEL_CMDID,
1104 WMI_PDEV_SET_PARAM_CMDID,
1105 WMI_PDEV_PKTLOG_ENABLE_CMDID,
1106 WMI_PDEV_PKTLOG_DISABLE_CMDID,
1107 WMI_PDEV_SET_WMM_PARAMS_CMDID,
1108 WMI_PDEV_SET_HT_CAP_IE_CMDID,
1109 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
1110 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
1111 WMI_PDEV_SET_QUIET_MODE_CMDID,
1112 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1113 WMI_PDEV_GET_TPC_CONFIG_CMDID,
1114 WMI_PDEV_SET_BASE_MACADDR_CMDID,
1115
1116
1117 WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
1118 WMI_VDEV_DELETE_CMDID,
1119 WMI_VDEV_START_REQUEST_CMDID,
1120 WMI_VDEV_RESTART_REQUEST_CMDID,
1121 WMI_VDEV_UP_CMDID,
1122 WMI_VDEV_STOP_CMDID,
1123 WMI_VDEV_DOWN_CMDID,
1124 WMI_VDEV_SET_PARAM_CMDID,
1125 WMI_VDEV_INSTALL_KEY_CMDID,
1126
1127
1128 WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
1129 WMI_PEER_DELETE_CMDID,
1130 WMI_PEER_FLUSH_TIDS_CMDID,
1131 WMI_PEER_SET_PARAM_CMDID,
1132 WMI_PEER_ASSOC_CMDID,
1133 WMI_PEER_ADD_WDS_ENTRY_CMDID,
1134 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
1135 WMI_PEER_MCAST_GROUP_CMDID,
1136
1137
1138 WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
1139 WMI_PDEV_SEND_BCN_CMDID,
1140 WMI_BCN_TMPL_CMDID,
1141 WMI_BCN_FILTER_RX_CMDID,
1142 WMI_PRB_REQ_FILTER_RX_CMDID,
1143 WMI_MGMT_TX_CMDID,
1144 WMI_PRB_TMPL_CMDID,
1145
1146
1147 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
1148 WMI_ADDBA_SEND_CMDID,
1149 WMI_ADDBA_STATUS_CMDID,
1150 WMI_DELBA_SEND_CMDID,
1151 WMI_ADDBA_SET_RESP_CMDID,
1152 WMI_SEND_SINGLEAMSDU_CMDID,
1153
1154
1155 WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
1156 WMI_STA_POWERSAVE_PARAM_CMDID,
1157 WMI_STA_MIMO_PS_MODE_CMDID,
1158
1159
1160 WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
1161 WMI_PDEV_DFS_DISABLE_CMDID,
1162
1163
1164 WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
1165 WMI_ROAM_SCAN_RSSI_THRESHOLD,
1166 WMI_ROAM_SCAN_PERIOD,
1167 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1168 WMI_ROAM_AP_PROFILE,
1169
1170
1171 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
1172 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
1173 WMI_OFL_SCAN_PERIOD,
1174
1175
1176 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
1177 WMI_P2P_DEV_SET_DISCOVERABILITY,
1178 WMI_P2P_GO_SET_BEACON_IE,
1179 WMI_P2P_GO_SET_PROBE_RESP_IE,
1180 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
1181
1182
1183 WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
1184 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
1185
1186
1187 WMI_PEER_RATE_RETRY_SCHED_CMDID =
1188 WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
1189
1190
1191 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
1192 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1193 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1194 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1195 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1196
1197
1198 WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
1199 WMI_PDEV_RESUME_CMDID,
1200
1201
1202 WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
1203 WMI_RMV_BCN_FILTER_CMDID,
1204
1205
1206 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
1207 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
1208 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1209 WMI_WOW_ENABLE_CMDID,
1210 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1211
1212
1213 WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
1214 WMI_RTT_TSF_CMDID,
1215
1216
1217 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
1218 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1219
1220
1221 WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
1222
1223
1224 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
1225
1226
1227 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
1228
1229
1230 WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
1231
1232
1233 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
1234 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
1235
1236
1237 WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
1238
1239
1240 WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
1241 WMI_PEER_TID_DELBA_CMDID,
1242
1243
1244 WMI_STA_DTIM_PS_METHOD_CMDID,
1245
1246 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
1247
1248
1249
1250
1251 WMI_STA_KEEPALIVE_CMD,
1252
1253
1254 WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
1255 WMI_PDEV_UTF_CMDID,
1256 WMI_DBGLOG_CFG_CMDID,
1257 WMI_PDEV_QVIT_CMDID,
1258 WMI_PDEV_FTM_INTG_CMDID,
1259 WMI_VDEV_SET_KEEPALIVE_CMDID,
1260 WMI_VDEV_GET_KEEPALIVE_CMDID,
1261 WMI_FORCE_FW_HANG_CMDID,
1262
1263
1264 WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
1265 WMI_GPIO_OUTPUT_CMDID,
1266 };
1267
1268 enum wmi_event_id {
1269 WMI_SERVICE_READY_EVENTID = 0x1,
1270 WMI_READY_EVENTID,
1271 WMI_SERVICE_AVAILABLE_EVENTID,
1272
1273
1274 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
1275
1276
1277 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
1278 WMI_CHAN_INFO_EVENTID,
1279 WMI_PHYERR_EVENTID,
1280
1281
1282 WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
1283 WMI_VDEV_STOPPED_EVENTID,
1284 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
1285
1286
1287 WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
1288
1289
1290 WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
1291 WMI_HOST_SWBA_EVENTID,
1292 WMI_TBTTOFFSET_UPDATE_EVENTID,
1293
1294
1295 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
1296 WMI_TX_ADDBA_COMPLETE_EVENTID,
1297
1298
1299 WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
1300 WMI_PROFILE_MATCH,
1301
1302
1303 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
1304
1305
1306 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
1307 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
1308 WMI_RTT_ERROR_REPORT_EVENTID,
1309
1310
1311 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
1312 WMI_GTK_REKEY_FAIL_EVENTID,
1313
1314
1315 WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
1316
1317
1318 WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
1319 WMI_PDEV_UTF_EVENTID,
1320 WMI_DEBUG_MESG_EVENTID,
1321 WMI_UPDATE_STATS_EVENTID,
1322 WMI_DEBUG_PRINT_EVENTID,
1323 WMI_DCS_INTERFERENCE_EVENTID,
1324 WMI_PDEV_QVIT_EVENTID,
1325 WMI_WLAN_PROFILE_DATA_EVENTID,
1326 WMI_PDEV_FTM_INTG_EVENTID,
1327 WMI_WLAN_FREQ_AVOID_EVENTID,
1328 WMI_VDEV_GET_KEEPALIVE_EVENTID,
1329
1330
1331 WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
1332 };
1333
1334
1335 enum wmi_10x_cmd_id {
1336 WMI_10X_START_CMDID = 0x9000,
1337 WMI_10X_END_CMDID = 0x9FFF,
1338
1339
1340 WMI_10X_INIT_CMDID,
1341
1342
1343
1344 WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
1345 WMI_10X_STOP_SCAN_CMDID,
1346 WMI_10X_SCAN_CHAN_LIST_CMDID,
1347 WMI_10X_ECHO_CMDID,
1348
1349
1350 WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
1351 WMI_10X_PDEV_SET_CHANNEL_CMDID,
1352 WMI_10X_PDEV_SET_PARAM_CMDID,
1353 WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
1354 WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
1355 WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
1356 WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
1357 WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
1358 WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
1359 WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
1360 WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
1361 WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1362 WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
1363
1364
1365 WMI_10X_VDEV_CREATE_CMDID,
1366 WMI_10X_VDEV_DELETE_CMDID,
1367 WMI_10X_VDEV_START_REQUEST_CMDID,
1368 WMI_10X_VDEV_RESTART_REQUEST_CMDID,
1369 WMI_10X_VDEV_UP_CMDID,
1370 WMI_10X_VDEV_STOP_CMDID,
1371 WMI_10X_VDEV_DOWN_CMDID,
1372 WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
1373 WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
1374 WMI_10X_VDEV_SET_PARAM_CMDID,
1375 WMI_10X_VDEV_INSTALL_KEY_CMDID,
1376
1377
1378 WMI_10X_PEER_CREATE_CMDID,
1379 WMI_10X_PEER_DELETE_CMDID,
1380 WMI_10X_PEER_FLUSH_TIDS_CMDID,
1381 WMI_10X_PEER_SET_PARAM_CMDID,
1382 WMI_10X_PEER_ASSOC_CMDID,
1383 WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
1384 WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
1385 WMI_10X_PEER_MCAST_GROUP_CMDID,
1386
1387
1388
1389 WMI_10X_BCN_TX_CMDID,
1390 WMI_10X_BCN_PRB_TMPL_CMDID,
1391 WMI_10X_BCN_FILTER_RX_CMDID,
1392 WMI_10X_PRB_REQ_FILTER_RX_CMDID,
1393 WMI_10X_MGMT_TX_CMDID,
1394
1395
1396 WMI_10X_ADDBA_CLEAR_RESP_CMDID,
1397 WMI_10X_ADDBA_SEND_CMDID,
1398 WMI_10X_ADDBA_STATUS_CMDID,
1399 WMI_10X_DELBA_SEND_CMDID,
1400 WMI_10X_ADDBA_SET_RESP_CMDID,
1401 WMI_10X_SEND_SINGLEAMSDU_CMDID,
1402
1403
1404 WMI_10X_STA_POWERSAVE_MODE_CMDID,
1405 WMI_10X_STA_POWERSAVE_PARAM_CMDID,
1406 WMI_10X_STA_MIMO_PS_MODE_CMDID,
1407
1408
1409 WMI_10X_DBGLOG_CFG_CMDID,
1410
1411
1412 WMI_10X_PDEV_DFS_ENABLE_CMDID,
1413 WMI_10X_PDEV_DFS_DISABLE_CMDID,
1414
1415
1416 WMI_10X_PDEV_QVIT_CMDID,
1417
1418
1419 WMI_10X_ROAM_SCAN_MODE,
1420 WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
1421 WMI_10X_ROAM_SCAN_PERIOD,
1422 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1423 WMI_10X_ROAM_AP_PROFILE,
1424 WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
1425 WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
1426 WMI_10X_OFL_SCAN_PERIOD,
1427
1428
1429 WMI_10X_P2P_DEV_SET_DEVICE_INFO,
1430 WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
1431 WMI_10X_P2P_GO_SET_BEACON_IE,
1432 WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
1433
1434
1435 WMI_10X_AP_PS_PEER_PARAM_CMDID,
1436 WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
1437
1438
1439 WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
1440
1441
1442 WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
1443 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1444 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1445 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1446 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1447
1448
1449 WMI_10X_PDEV_SUSPEND_CMDID,
1450 WMI_10X_PDEV_RESUME_CMDID,
1451
1452
1453 WMI_10X_ADD_BCN_FILTER_CMDID,
1454 WMI_10X_RMV_BCN_FILTER_CMDID,
1455
1456
1457 WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
1458 WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
1459 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1460 WMI_10X_WOW_ENABLE_CMDID,
1461 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1462
1463
1464 WMI_10X_RTT_MEASREQ_CMDID,
1465 WMI_10X_RTT_TSF_CMDID,
1466
1467
1468 WMI_10X_PDEV_SEND_BCN_CMDID,
1469
1470
1471 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1472 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1473 WMI_10X_REQUEST_STATS_CMDID,
1474
1475
1476 WMI_10X_GPIO_CONFIG_CMDID,
1477 WMI_10X_GPIO_OUTPUT_CMDID,
1478
1479 WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
1480 };
1481
1482 enum wmi_10x_event_id {
1483 WMI_10X_SERVICE_READY_EVENTID = 0x8000,
1484 WMI_10X_READY_EVENTID,
1485 WMI_10X_START_EVENTID = 0x9000,
1486 WMI_10X_END_EVENTID = 0x9FFF,
1487
1488
1489 WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
1490 WMI_10X_ECHO_EVENTID,
1491 WMI_10X_DEBUG_MESG_EVENTID,
1492 WMI_10X_UPDATE_STATS_EVENTID,
1493
1494
1495 WMI_10X_INST_RSSI_STATS_EVENTID,
1496
1497
1498 WMI_10X_VDEV_START_RESP_EVENTID,
1499 WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1500 WMI_10X_VDEV_RESUME_REQ_EVENTID,
1501 WMI_10X_VDEV_STOPPED_EVENTID,
1502
1503
1504 WMI_10X_PEER_STA_KICKOUT_EVENTID,
1505
1506
1507 WMI_10X_HOST_SWBA_EVENTID,
1508 WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1509 WMI_10X_MGMT_RX_EVENTID,
1510
1511
1512 WMI_10X_CHAN_INFO_EVENTID,
1513
1514
1515 WMI_10X_PHYERR_EVENTID,
1516
1517
1518 WMI_10X_ROAM_EVENTID,
1519
1520
1521 WMI_10X_PROFILE_MATCH,
1522
1523
1524 WMI_10X_DEBUG_PRINT_EVENTID,
1525
1526 WMI_10X_PDEV_QVIT_EVENTID,
1527
1528 WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1529
1530
1531 WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1532 WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1533 WMI_10X_RTT_ERROR_REPORT_EVENTID,
1534
1535 WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1536 WMI_10X_DCS_INTERFERENCE_EVENTID,
1537
1538
1539 WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1540
1541 WMI_10X_GPIO_INPUT_EVENTID,
1542 WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1,
1543 };
1544
1545 enum wmi_10_2_cmd_id {
1546 WMI_10_2_START_CMDID = 0x9000,
1547 WMI_10_2_END_CMDID = 0x9FFF,
1548 WMI_10_2_INIT_CMDID,
1549 WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
1550 WMI_10_2_STOP_SCAN_CMDID,
1551 WMI_10_2_SCAN_CHAN_LIST_CMDID,
1552 WMI_10_2_ECHO_CMDID,
1553 WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1554 WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1555 WMI_10_2_PDEV_SET_PARAM_CMDID,
1556 WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1557 WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1558 WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1559 WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1560 WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1561 WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1562 WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1563 WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1564 WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1565 WMI_10_2_VDEV_CREATE_CMDID,
1566 WMI_10_2_VDEV_DELETE_CMDID,
1567 WMI_10_2_VDEV_START_REQUEST_CMDID,
1568 WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1569 WMI_10_2_VDEV_UP_CMDID,
1570 WMI_10_2_VDEV_STOP_CMDID,
1571 WMI_10_2_VDEV_DOWN_CMDID,
1572 WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
1573 WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
1574 WMI_10_2_VDEV_SET_PARAM_CMDID,
1575 WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1576 WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
1577 WMI_10_2_PEER_CREATE_CMDID,
1578 WMI_10_2_PEER_DELETE_CMDID,
1579 WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1580 WMI_10_2_PEER_SET_PARAM_CMDID,
1581 WMI_10_2_PEER_ASSOC_CMDID,
1582 WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1583 WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
1584 WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1585 WMI_10_2_PEER_MCAST_GROUP_CMDID,
1586 WMI_10_2_BCN_TX_CMDID,
1587 WMI_10_2_BCN_PRB_TMPL_CMDID,
1588 WMI_10_2_BCN_FILTER_RX_CMDID,
1589 WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1590 WMI_10_2_MGMT_TX_CMDID,
1591 WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1592 WMI_10_2_ADDBA_SEND_CMDID,
1593 WMI_10_2_ADDBA_STATUS_CMDID,
1594 WMI_10_2_DELBA_SEND_CMDID,
1595 WMI_10_2_ADDBA_SET_RESP_CMDID,
1596 WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1597 WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1598 WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1599 WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1600 WMI_10_2_DBGLOG_CFG_CMDID,
1601 WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1602 WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1603 WMI_10_2_PDEV_QVIT_CMDID,
1604 WMI_10_2_ROAM_SCAN_MODE,
1605 WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1606 WMI_10_2_ROAM_SCAN_PERIOD,
1607 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1608 WMI_10_2_ROAM_AP_PROFILE,
1609 WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1610 WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1611 WMI_10_2_OFL_SCAN_PERIOD,
1612 WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1613 WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1614 WMI_10_2_P2P_GO_SET_BEACON_IE,
1615 WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1616 WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1617 WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
1618 WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1619 WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1620 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1621 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1622 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1623 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1624 WMI_10_2_PDEV_SUSPEND_CMDID,
1625 WMI_10_2_PDEV_RESUME_CMDID,
1626 WMI_10_2_ADD_BCN_FILTER_CMDID,
1627 WMI_10_2_RMV_BCN_FILTER_CMDID,
1628 WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1629 WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1630 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1631 WMI_10_2_WOW_ENABLE_CMDID,
1632 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1633 WMI_10_2_RTT_MEASREQ_CMDID,
1634 WMI_10_2_RTT_TSF_CMDID,
1635 WMI_10_2_RTT_KEEPALIVE_CMDID,
1636 WMI_10_2_PDEV_SEND_BCN_CMDID,
1637 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1638 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1639 WMI_10_2_REQUEST_STATS_CMDID,
1640 WMI_10_2_GPIO_CONFIG_CMDID,
1641 WMI_10_2_GPIO_OUTPUT_CMDID,
1642 WMI_10_2_VDEV_RATEMASK_CMDID,
1643 WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
1644 WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1645 WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1646 WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1647 WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1648 WMI_10_2_FORCE_FW_HANG_CMDID,
1649 WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1650 WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
1651 WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1652 WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
1653 WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1654 WMI_10_2_PDEV_GET_INFO,
1655 WMI_10_2_VDEV_GET_INFO,
1656 WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1657 WMI_10_2_PEER_ATF_REQUEST_CMDID,
1658 WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
1659 WMI_10_2_MU_CAL_START_CMDID,
1660 WMI_10_2_SET_LTEU_CONFIG_CMDID,
1661 WMI_10_2_SET_CCA_PARAMS,
1662 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1663 WMI_10_2_FWTEST_CMDID,
1664 WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
1665 WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
1666 };
1667
1668 enum wmi_10_2_event_id {
1669 WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
1670 WMI_10_2_READY_EVENTID,
1671 WMI_10_2_DEBUG_MESG_EVENTID,
1672 WMI_10_2_START_EVENTID = 0x9000,
1673 WMI_10_2_END_EVENTID = 0x9FFF,
1674 WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
1675 WMI_10_2_ECHO_EVENTID,
1676 WMI_10_2_UPDATE_STATS_EVENTID,
1677 WMI_10_2_INST_RSSI_STATS_EVENTID,
1678 WMI_10_2_VDEV_START_RESP_EVENTID,
1679 WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
1680 WMI_10_2_VDEV_RESUME_REQ_EVENTID,
1681 WMI_10_2_VDEV_STOPPED_EVENTID,
1682 WMI_10_2_PEER_STA_KICKOUT_EVENTID,
1683 WMI_10_2_HOST_SWBA_EVENTID,
1684 WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
1685 WMI_10_2_MGMT_RX_EVENTID,
1686 WMI_10_2_CHAN_INFO_EVENTID,
1687 WMI_10_2_PHYERR_EVENTID,
1688 WMI_10_2_ROAM_EVENTID,
1689 WMI_10_2_PROFILE_MATCH,
1690 WMI_10_2_DEBUG_PRINT_EVENTID,
1691 WMI_10_2_PDEV_QVIT_EVENTID,
1692 WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
1693 WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
1694 WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
1695 WMI_10_2_RTT_ERROR_REPORT_EVENTID,
1696 WMI_10_2_RTT_KEEPALIVE_EVENTID,
1697 WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
1698 WMI_10_2_DCS_INTERFERENCE_EVENTID,
1699 WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
1700 WMI_10_2_GPIO_INPUT_EVENTID,
1701 WMI_10_2_PEER_RATECODE_LIST_EVENTID,
1702 WMI_10_2_GENERIC_BUFFER_EVENTID,
1703 WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
1704 WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
1705 WMI_10_2_WDS_PEER_EVENTID,
1706 WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1707 WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1708 WMI_10_2_MU_REPORT_EVENTID,
1709 WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID,
1710 WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
1711 };
1712
1713 enum wmi_10_4_cmd_id {
1714 WMI_10_4_START_CMDID = 0x9000,
1715 WMI_10_4_END_CMDID = 0x9FFF,
1716 WMI_10_4_INIT_CMDID,
1717 WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
1718 WMI_10_4_STOP_SCAN_CMDID,
1719 WMI_10_4_SCAN_CHAN_LIST_CMDID,
1720 WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
1721 WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
1722 WMI_10_4_ECHO_CMDID,
1723 WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
1724 WMI_10_4_PDEV_SET_CHANNEL_CMDID,
1725 WMI_10_4_PDEV_SET_PARAM_CMDID,
1726 WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
1727 WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
1728 WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
1729 WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
1730 WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
1731 WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
1732 WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
1733 WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
1734 WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1735 WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
1736 WMI_10_4_VDEV_CREATE_CMDID,
1737 WMI_10_4_VDEV_DELETE_CMDID,
1738 WMI_10_4_VDEV_START_REQUEST_CMDID,
1739 WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
1740 WMI_10_4_VDEV_UP_CMDID,
1741 WMI_10_4_VDEV_STOP_CMDID,
1742 WMI_10_4_VDEV_DOWN_CMDID,
1743 WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
1744 WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
1745 WMI_10_4_VDEV_SET_PARAM_CMDID,
1746 WMI_10_4_VDEV_INSTALL_KEY_CMDID,
1747 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
1748 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
1749 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
1750 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
1751 WMI_10_4_PEER_CREATE_CMDID,
1752 WMI_10_4_PEER_DELETE_CMDID,
1753 WMI_10_4_PEER_FLUSH_TIDS_CMDID,
1754 WMI_10_4_PEER_SET_PARAM_CMDID,
1755 WMI_10_4_PEER_ASSOC_CMDID,
1756 WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
1757 WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
1758 WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
1759 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
1760 WMI_10_4_PEER_MCAST_GROUP_CMDID,
1761 WMI_10_4_BCN_TX_CMDID,
1762 WMI_10_4_PDEV_SEND_BCN_CMDID,
1763 WMI_10_4_BCN_PRB_TMPL_CMDID,
1764 WMI_10_4_BCN_FILTER_RX_CMDID,
1765 WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
1766 WMI_10_4_MGMT_TX_CMDID,
1767 WMI_10_4_PRB_TMPL_CMDID,
1768 WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
1769 WMI_10_4_ADDBA_SEND_CMDID,
1770 WMI_10_4_ADDBA_STATUS_CMDID,
1771 WMI_10_4_DELBA_SEND_CMDID,
1772 WMI_10_4_ADDBA_SET_RESP_CMDID,
1773 WMI_10_4_SEND_SINGLEAMSDU_CMDID,
1774 WMI_10_4_STA_POWERSAVE_MODE_CMDID,
1775 WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
1776 WMI_10_4_STA_MIMO_PS_MODE_CMDID,
1777 WMI_10_4_DBGLOG_CFG_CMDID,
1778 WMI_10_4_PDEV_DFS_ENABLE_CMDID,
1779 WMI_10_4_PDEV_DFS_DISABLE_CMDID,
1780 WMI_10_4_PDEV_QVIT_CMDID,
1781 WMI_10_4_ROAM_SCAN_MODE,
1782 WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
1783 WMI_10_4_ROAM_SCAN_PERIOD,
1784 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1785 WMI_10_4_ROAM_AP_PROFILE,
1786 WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
1787 WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
1788 WMI_10_4_OFL_SCAN_PERIOD,
1789 WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
1790 WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
1791 WMI_10_4_P2P_GO_SET_BEACON_IE,
1792 WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
1793 WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
1794 WMI_10_4_AP_PS_PEER_PARAM_CMDID,
1795 WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
1796 WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
1797 WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
1798 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1799 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1800 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1801 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1802 WMI_10_4_PDEV_SUSPEND_CMDID,
1803 WMI_10_4_PDEV_RESUME_CMDID,
1804 WMI_10_4_ADD_BCN_FILTER_CMDID,
1805 WMI_10_4_RMV_BCN_FILTER_CMDID,
1806 WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
1807 WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
1808 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1809 WMI_10_4_WOW_ENABLE_CMDID,
1810 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1811 WMI_10_4_RTT_MEASREQ_CMDID,
1812 WMI_10_4_RTT_TSF_CMDID,
1813 WMI_10_4_RTT_KEEPALIVE_CMDID,
1814 WMI_10_4_OEM_REQ_CMDID,
1815 WMI_10_4_NAN_CMDID,
1816 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1817 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1818 WMI_10_4_REQUEST_STATS_CMDID,
1819 WMI_10_4_GPIO_CONFIG_CMDID,
1820 WMI_10_4_GPIO_OUTPUT_CMDID,
1821 WMI_10_4_VDEV_RATEMASK_CMDID,
1822 WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
1823 WMI_10_4_GTK_OFFLOAD_CMDID,
1824 WMI_10_4_QBOOST_CFG_CMDID,
1825 WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
1826 WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
1827 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1828 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1829 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1830 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1831 WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
1832 WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
1833 WMI_10_4_FORCE_FW_HANG_CMDID,
1834 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1835 WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
1836 WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1837 WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
1838 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1839 WMI_10_4_PDEV_FIPS_CMDID,
1840 WMI_10_4_TT_SET_CONF_CMDID,
1841 WMI_10_4_FWTEST_CMDID,
1842 WMI_10_4_VDEV_ATF_REQUEST_CMDID,
1843 WMI_10_4_PEER_ATF_REQUEST_CMDID,
1844 WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
1845 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
1846 WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
1847 WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
1848 WMI_10_4_PDEV_GET_TPC_CMDID,
1849 WMI_10_4_PDEV_GET_AST_INFO_CMDID,
1850 WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
1851 WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
1852 WMI_10_4_PDEV_GET_INFO_CMDID,
1853 WMI_10_4_VDEV_GET_INFO_CMDID,
1854 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
1855 WMI_10_4_MU_CAL_START_CMDID,
1856 WMI_10_4_SET_CCA_PARAMS_CMDID,
1857 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1858 WMI_10_4_EXT_RESOURCE_CFG_CMDID,
1859 WMI_10_4_VDEV_SET_IE_CMDID,
1860 WMI_10_4_SET_LTEU_CONFIG_CMDID,
1861 WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
1862 WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
1863 WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1864 WMI_10_4_PEER_BWF_REQUEST_CMDID,
1865 WMI_10_4_BTCOEX_CFG_CMDID,
1866 WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
1867 WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
1868 WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
1869 WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
1870 WMI_10_4_COEX_VERSION_CFG_CMID,
1871 WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
1872 WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
1873 WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
1874 WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
1875 WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
1876 WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
1877 WMI_10_4_GET_TSF_TIMER_CMDID,
1878 WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
1879 WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
1880 WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
1881 WMI_10_4_TDLS_SET_STATE_CMDID,
1882 WMI_10_4_TDLS_PEER_UPDATE_CMDID,
1883 WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
1884 WMI_10_4_PDEV_SEND_FD_CMDID,
1885 WMI_10_4_ENABLE_FILS_CMDID,
1886 WMI_10_4_PDEV_SET_BRIDGE_MACADDR_CMDID,
1887 WMI_10_4_ATF_GROUP_WMM_AC_CONFIG_REQUEST_CMDID,
1888 WMI_10_4_RADAR_FOUND_CMDID,
1889 WMI_10_4_PEER_CFR_CAPTURE_CMDID,
1890 WMI_10_4_PER_PEER_PER_TID_CONFIG_CMDID,
1891 WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
1892 };
1893
1894 enum wmi_10_4_event_id {
1895 WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
1896 WMI_10_4_READY_EVENTID,
1897 WMI_10_4_DEBUG_MESG_EVENTID,
1898 WMI_10_4_START_EVENTID = 0x9000,
1899 WMI_10_4_END_EVENTID = 0x9FFF,
1900 WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
1901 WMI_10_4_ECHO_EVENTID,
1902 WMI_10_4_UPDATE_STATS_EVENTID,
1903 WMI_10_4_INST_RSSI_STATS_EVENTID,
1904 WMI_10_4_VDEV_START_RESP_EVENTID,
1905 WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
1906 WMI_10_4_VDEV_RESUME_REQ_EVENTID,
1907 WMI_10_4_VDEV_STOPPED_EVENTID,
1908 WMI_10_4_PEER_STA_KICKOUT_EVENTID,
1909 WMI_10_4_HOST_SWBA_EVENTID,
1910 WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
1911 WMI_10_4_MGMT_RX_EVENTID,
1912 WMI_10_4_CHAN_INFO_EVENTID,
1913 WMI_10_4_PHYERR_EVENTID,
1914 WMI_10_4_ROAM_EVENTID,
1915 WMI_10_4_PROFILE_MATCH,
1916 WMI_10_4_DEBUG_PRINT_EVENTID,
1917 WMI_10_4_PDEV_QVIT_EVENTID,
1918 WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
1919 WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
1920 WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
1921 WMI_10_4_RTT_ERROR_REPORT_EVENTID,
1922 WMI_10_4_RTT_KEEPALIVE_EVENTID,
1923 WMI_10_4_OEM_CAPABILITY_EVENTID,
1924 WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
1925 WMI_10_4_OEM_ERROR_REPORT_EVENTID,
1926 WMI_10_4_NAN_EVENTID,
1927 WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
1928 WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
1929 WMI_10_4_GTK_REKEY_FAIL_EVENTID,
1930 WMI_10_4_DCS_INTERFERENCE_EVENTID,
1931 WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
1932 WMI_10_4_CSA_HANDLING_EVENTID,
1933 WMI_10_4_GPIO_INPUT_EVENTID,
1934 WMI_10_4_PEER_RATECODE_LIST_EVENTID,
1935 WMI_10_4_GENERIC_BUFFER_EVENTID,
1936 WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
1937 WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
1938 WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
1939 WMI_10_4_WDS_PEER_EVENTID,
1940 WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
1941 WMI_10_4_PDEV_FIPS_EVENTID,
1942 WMI_10_4_TT_STATS_EVENTID,
1943 WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
1944 WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
1945 WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
1946 WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
1947 WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
1948 WMI_10_4_PDEV_TPC_EVENTID,
1949 WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
1950 WMI_10_4_PDEV_TEMPERATURE_EVENTID,
1951 WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
1952 WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
1953 WMI_10_4_MU_REPORT_EVENTID,
1954 WMI_10_4_TX_DATA_TRAFFIC_CTRL_EVENTID,
1955 WMI_10_4_PEER_TX_MU_TXMIT_COUNT_EVENTID,
1956 WMI_10_4_PEER_GID_USERPOS_LIST_EVENTID,
1957 WMI_10_4_PDEV_CHECK_CAL_VERSION_EVENTID,
1958 WMI_10_4_ATF_PEER_STATS_EVENTID,
1959 WMI_10_4_PDEV_GET_RX_FILTER_EVENTID,
1960 WMI_10_4_NAC_RSSI_EVENTID,
1961 WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID,
1962 WMI_10_4_GET_TSF_TIMER_RESP_EVENTID,
1963 WMI_10_4_PDEV_TPC_TABLE_EVENTID,
1964 WMI_10_4_PDEV_WDS_ENTRY_LIST_EVENTID,
1965 WMI_10_4_TDLS_PEER_EVENTID,
1966 WMI_10_4_HOST_SWFDA_EVENTID,
1967 WMI_10_4_ESP_ESTIMATE_EVENTID,
1968 WMI_10_4_DFS_STATUS_CHECK_EVENTID,
1969 WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
1970 };
1971
1972 enum wmi_phy_mode {
1973 MODE_11A = 0,
1974 MODE_11G = 1,
1975 MODE_11B = 2,
1976 MODE_11GONLY = 3,
1977 MODE_11NA_HT20 = 4,
1978 MODE_11NG_HT20 = 5,
1979 MODE_11NA_HT40 = 6,
1980 MODE_11NG_HT40 = 7,
1981 MODE_11AC_VHT20 = 8,
1982 MODE_11AC_VHT40 = 9,
1983 MODE_11AC_VHT80 = 10,
1984
1985 MODE_11AC_VHT20_2G = 11,
1986 MODE_11AC_VHT40_2G = 12,
1987 MODE_11AC_VHT80_2G = 13,
1988 MODE_11AC_VHT80_80 = 14,
1989 MODE_11AC_VHT160 = 15,
1990 MODE_UNKNOWN = 16,
1991 MODE_MAX = 16
1992 };
1993
1994 static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
1995 {
1996 switch (mode) {
1997 case MODE_11A:
1998 return "11a";
1999 case MODE_11G:
2000 return "11g";
2001 case MODE_11B:
2002 return "11b";
2003 case MODE_11GONLY:
2004 return "11gonly";
2005 case MODE_11NA_HT20:
2006 return "11na-ht20";
2007 case MODE_11NG_HT20:
2008 return "11ng-ht20";
2009 case MODE_11NA_HT40:
2010 return "11na-ht40";
2011 case MODE_11NG_HT40:
2012 return "11ng-ht40";
2013 case MODE_11AC_VHT20:
2014 return "11ac-vht20";
2015 case MODE_11AC_VHT40:
2016 return "11ac-vht40";
2017 case MODE_11AC_VHT80:
2018 return "11ac-vht80";
2019 case MODE_11AC_VHT160:
2020 return "11ac-vht160";
2021 case MODE_11AC_VHT80_80:
2022 return "11ac-vht80+80";
2023 case MODE_11AC_VHT20_2G:
2024 return "11ac-vht20-2g";
2025 case MODE_11AC_VHT40_2G:
2026 return "11ac-vht40-2g";
2027 case MODE_11AC_VHT80_2G:
2028 return "11ac-vht80-2g";
2029 case MODE_UNKNOWN:
2030
2031 break;
2032
2033
2034
2035
2036 }
2037
2038 return "<unknown>";
2039 }
2040
2041 #define WMI_CHAN_LIST_TAG 0x1
2042 #define WMI_SSID_LIST_TAG 0x2
2043 #define WMI_BSSID_LIST_TAG 0x3
2044 #define WMI_IE_TAG 0x4
2045
2046 struct wmi_channel {
2047 __le32 mhz;
2048 __le32 band_center_freq1;
2049 __le32 band_center_freq2;
2050 union {
2051 __le32 flags;
2052 struct {
2053 u8 mode;
2054 } __packed;
2055 } __packed;
2056 union {
2057 __le32 reginfo0;
2058 struct {
2059
2060 u8 min_power;
2061 u8 max_power;
2062 u8 reg_power;
2063 u8 reg_classid;
2064 } __packed;
2065 } __packed;
2066 union {
2067 __le32 reginfo1;
2068 struct {
2069
2070 u8 antenna_max;
2071
2072 u8 max_tx_power;
2073 } __packed;
2074 } __packed;
2075 } __packed;
2076
2077 struct wmi_channel_arg {
2078 u32 freq;
2079 u32 band_center_freq1;
2080 u32 band_center_freq2;
2081 bool passive;
2082 bool allow_ibss;
2083 bool allow_ht;
2084 bool allow_vht;
2085 bool ht40plus;
2086 bool chan_radar;
2087
2088 u32 min_power;
2089 u32 max_power;
2090 u32 max_reg_power;
2091
2092 u32 max_antenna_gain;
2093 u32 reg_class_id;
2094 enum wmi_phy_mode mode;
2095 };
2096
2097 enum wmi_channel_change_cause {
2098 WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
2099 WMI_CHANNEL_CHANGE_CAUSE_CSA,
2100 };
2101
2102 #define WMI_CHAN_FLAG_HT40_PLUS (1 << 6)
2103 #define WMI_CHAN_FLAG_PASSIVE (1 << 7)
2104 #define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8)
2105 #define WMI_CHAN_FLAG_AP_DISABLED (1 << 9)
2106 #define WMI_CHAN_FLAG_DFS (1 << 10)
2107 #define WMI_CHAN_FLAG_ALLOW_HT (1 << 11)
2108 #define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12)
2109
2110
2111 #define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
2112
2113 #define WMI_CHAN_FLAG_DFS_CFREQ2 (1 << 15)
2114 #define WMI_MAX_SPATIAL_STREAM 3
2115
2116
2117 #define WMI_HT_CAP_ENABLED 0x0001
2118 #define WMI_HT_CAP_HT20_SGI 0x0002
2119 #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004
2120 #define WMI_HT_CAP_TX_STBC 0x0008
2121 #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
2122 #define WMI_HT_CAP_RX_STBC 0x0030
2123 #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
2124 #define WMI_HT_CAP_LDPC 0x0040
2125 #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080
2126 #define WMI_HT_CAP_MPDU_DENSITY 0x0700
2127 #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
2128 #define WMI_HT_CAP_HT40_SGI 0x0800
2129 #define WMI_HT_CAP_RX_LDPC 0x1000
2130 #define WMI_HT_CAP_TX_LDPC 0x2000
2131
2132 #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
2133 WMI_HT_CAP_HT20_SGI | \
2134 WMI_HT_CAP_HT40_SGI | \
2135 WMI_HT_CAP_TX_STBC | \
2136 WMI_HT_CAP_RX_STBC | \
2137 WMI_HT_CAP_LDPC)
2138
2139
2140
2141
2142
2143
2144
2145
2146 #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
2147 #define WMI_VHT_CAP_RX_LDPC 0x00000010
2148 #define WMI_VHT_CAP_SGI_80MHZ 0x00000020
2149 #define WMI_VHT_CAP_SGI_160MHZ 0x00000040
2150 #define WMI_VHT_CAP_TX_STBC 0x00000080
2151 #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
2152 #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
2153 #define WMI_VHT_CAP_SU_BFER 0x00000800
2154 #define WMI_VHT_CAP_SU_BFEE 0x00001000
2155 #define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000
2156 #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13
2157 #define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000
2158 #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16
2159 #define WMI_VHT_CAP_MU_BFER 0x00080000
2160 #define WMI_VHT_CAP_MU_BFEE 0x00100000
2161 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
2162 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23
2163 #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
2164 #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
2165
2166
2167 #define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000
2168 #define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001
2169 #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
2170
2171 #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
2172 WMI_VHT_CAP_RX_LDPC | \
2173 WMI_VHT_CAP_SGI_80MHZ | \
2174 WMI_VHT_CAP_TX_STBC | \
2175 WMI_VHT_CAP_RX_STBC_MASK | \
2176 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
2177 WMI_VHT_CAP_RX_FIXED_ANT | \
2178 WMI_VHT_CAP_TX_FIXED_ANT)
2179
2180
2181
2182
2183
2184 #define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1))
2185 #define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000
2186 #define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16
2187
2188 enum {
2189 REGDMN_MODE_11A = 0x00001,
2190 REGDMN_MODE_TURBO = 0x00002,
2191 REGDMN_MODE_11B = 0x00004,
2192 REGDMN_MODE_PUREG = 0x00008,
2193 REGDMN_MODE_11G = 0x00008,
2194 REGDMN_MODE_108G = 0x00020,
2195 REGDMN_MODE_108A = 0x00040,
2196 REGDMN_MODE_XR = 0x00100,
2197 REGDMN_MODE_11A_HALF_RATE = 0x00200,
2198 REGDMN_MODE_11A_QUARTER_RATE = 0x00400,
2199 REGDMN_MODE_11NG_HT20 = 0x00800,
2200 REGDMN_MODE_11NA_HT20 = 0x01000,
2201 REGDMN_MODE_11NG_HT40PLUS = 0x02000,
2202 REGDMN_MODE_11NG_HT40MINUS = 0x04000,
2203 REGDMN_MODE_11NA_HT40PLUS = 0x08000,
2204 REGDMN_MODE_11NA_HT40MINUS = 0x10000,
2205 REGDMN_MODE_11AC_VHT20 = 0x20000,
2206 REGDMN_MODE_11AC_VHT40PLUS = 0x40000,
2207 REGDMN_MODE_11AC_VHT40MINUS = 0x80000,
2208 REGDMN_MODE_11AC_VHT80 = 0x100000,
2209 REGDMN_MODE_11AC_VHT160 = 0x200000,
2210 REGDMN_MODE_11AC_VHT80_80 = 0x400000,
2211 REGDMN_MODE_ALL = 0xffffffff
2212 };
2213
2214 #define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001
2215 #define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002
2216 #define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004
2217
2218
2219 #define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
2220 #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
2221 #define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100
2222 #define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
2223 #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
2224 #define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
2225
2226 struct hal_reg_capabilities {
2227
2228 __le32 eeprom_rd;
2229
2230 __le32 eeprom_rd_ext;
2231
2232 __le32 regcap1;
2233
2234 __le32 regcap2;
2235
2236 __le32 wireless_modes;
2237 __le32 low_2ghz_chan;
2238 __le32 high_2ghz_chan;
2239 __le32 low_5ghz_chan;
2240 __le32 high_5ghz_chan;
2241 } __packed;
2242
2243 enum wlan_mode_capability {
2244 WHAL_WLAN_11A_CAPABILITY = 0x1,
2245 WHAL_WLAN_11G_CAPABILITY = 0x2,
2246 WHAL_WLAN_11AG_CAPABILITY = 0x3,
2247 };
2248
2249
2250 struct wlan_host_mem_req {
2251
2252 __le32 req_id;
2253
2254 __le32 unit_size;
2255
2256
2257
2258
2259 __le32 num_unit_info;
2260
2261
2262
2263
2264
2265
2266
2267 __le32 num_units;
2268 } __packed;
2269
2270
2271
2272
2273
2274
2275 struct wmi_service_ready_event {
2276 __le32 sw_version;
2277 __le32 sw_version_1;
2278 __le32 abi_version;
2279
2280 __le32 phy_capability;
2281
2282 __le32 max_frag_entry;
2283 __le32 wmi_service_bitmap[16];
2284 __le32 num_rf_chains;
2285
2286
2287
2288
2289 __le32 ht_cap_info;
2290 __le32 vht_cap_info;
2291 __le32 vht_supp_mcs;
2292 __le32 hw_min_tx_power;
2293 __le32 hw_max_tx_power;
2294 struct hal_reg_capabilities hal_reg_capabilities;
2295 __le32 sys_cap_info;
2296 __le32 min_pkt_size_enable;
2297
2298
2299
2300
2301 __le32 max_bcn_ie_size;
2302
2303
2304
2305
2306
2307
2308 __le32 num_mem_reqs;
2309 struct wlan_host_mem_req mem_reqs[];
2310 } __packed;
2311
2312
2313 struct wmi_10x_service_ready_event {
2314 __le32 sw_version;
2315 __le32 abi_version;
2316
2317
2318 __le32 phy_capability;
2319
2320
2321 __le32 max_frag_entry;
2322 __le32 wmi_service_bitmap[16];
2323 __le32 num_rf_chains;
2324
2325
2326
2327
2328
2329 __le32 ht_cap_info;
2330 __le32 vht_cap_info;
2331 __le32 vht_supp_mcs;
2332 __le32 hw_min_tx_power;
2333 __le32 hw_max_tx_power;
2334
2335 struct hal_reg_capabilities hal_reg_capabilities;
2336
2337 __le32 sys_cap_info;
2338 __le32 min_pkt_size_enable;
2339
2340
2341
2342
2343
2344
2345
2346 __le32 num_mem_reqs;
2347
2348 struct wlan_host_mem_req mem_reqs[];
2349 } __packed;
2350
2351 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
2352 #define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ)
2353
2354 struct wmi_ready_event {
2355 __le32 sw_version;
2356 __le32 abi_version;
2357 struct wmi_mac_addr mac_addr;
2358 __le32 status;
2359 } __packed;
2360
2361 struct wmi_resource_config {
2362
2363 __le32 num_vdevs;
2364
2365
2366 __le32 num_peers;
2367
2368
2369
2370
2371
2372
2373
2374
2375 __le32 num_offload_peers;
2376
2377
2378 __le32 num_offload_reorder_bufs;
2379
2380
2381 __le32 num_peer_keys;
2382
2383
2384 __le32 num_tids;
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396 __le32 ast_skid_limit;
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406 __le32 tx_chain_mask;
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418 __le32 rx_chain_mask;
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430 __le32 rx_timeout_pri_vi;
2431 __le32 rx_timeout_pri_vo;
2432 __le32 rx_timeout_pri_be;
2433 __le32 rx_timeout_pri_bk;
2434
2435
2436
2437
2438
2439
2440
2441
2442 __le32 rx_decap_mode;
2443
2444
2445 __le32 scan_max_pending_reqs;
2446
2447
2448 __le32 bmiss_offload_max_vdev;
2449
2450
2451 __le32 roam_offload_max_vdev;
2452
2453
2454 __le32 roam_offload_max_ap_profiles;
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468 __le32 num_mcast_groups;
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479 __le32 num_mcast_table_elems;
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499 __le32 mcast2ucast_mode;
2500
2501
2502
2503
2504
2505
2506
2507
2508 __le32 tx_dbg_log_size;
2509
2510
2511 __le32 num_wds_entries;
2512
2513
2514
2515
2516
2517 __le32 dma_burst_size;
2518
2519
2520
2521
2522
2523 __le32 mac_aggr_delim;
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534 __le32 rx_skip_defrag_timeout_dup_detection_check;
2535
2536
2537
2538
2539
2540
2541 __le32 vow_config;
2542
2543
2544 __le32 gtk_offload_max_vdev;
2545
2546
2547 __le32 num_msdu_desc;
2548
2549
2550
2551
2552
2553
2554
2555 __le32 max_frag_entries;
2556 } __packed;
2557
2558 struct wmi_resource_config_10x {
2559
2560 __le32 num_vdevs;
2561
2562
2563 __le32 num_peers;
2564
2565
2566 __le32 num_peer_keys;
2567
2568
2569 __le32 num_tids;
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581 __le32 ast_skid_limit;
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591 __le32 tx_chain_mask;
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603 __le32 rx_chain_mask;
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615 __le32 rx_timeout_pri_vi;
2616 __le32 rx_timeout_pri_vo;
2617 __le32 rx_timeout_pri_be;
2618 __le32 rx_timeout_pri_bk;
2619
2620
2621
2622
2623
2624
2625
2626
2627 __le32 rx_decap_mode;
2628
2629
2630 __le32 scan_max_pending_reqs;
2631
2632
2633 __le32 bmiss_offload_max_vdev;
2634
2635
2636 __le32 roam_offload_max_vdev;
2637
2638
2639 __le32 roam_offload_max_ap_profiles;
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653 __le32 num_mcast_groups;
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664 __le32 num_mcast_table_elems;
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684 __le32 mcast2ucast_mode;
2685
2686
2687
2688
2689
2690
2691
2692
2693 __le32 tx_dbg_log_size;
2694
2695
2696 __le32 num_wds_entries;
2697
2698
2699
2700
2701
2702 __le32 dma_burst_size;
2703
2704
2705
2706
2707
2708 __le32 mac_aggr_delim;
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719 __le32 rx_skip_defrag_timeout_dup_detection_check;
2720
2721
2722
2723
2724
2725
2726 __le32 vow_config;
2727
2728
2729 __le32 num_msdu_desc;
2730
2731
2732
2733
2734
2735
2736
2737 __le32 max_frag_entries;
2738 } __packed;
2739
2740 enum wmi_10_2_feature_mask {
2741 WMI_10_2_RX_BATCH_MODE = BIT(0),
2742 WMI_10_2_ATF_CONFIG = BIT(1),
2743 WMI_10_2_COEX_GPIO = BIT(3),
2744 WMI_10_2_BSS_CHAN_INFO = BIT(6),
2745 WMI_10_2_PEER_STATS = BIT(7),
2746 };
2747
2748 struct wmi_resource_config_10_2 {
2749 struct wmi_resource_config_10x common;
2750 __le32 max_peer_ext_stats;
2751 __le32 smart_ant_cap;
2752 __le32 bk_min_free;
2753 __le32 be_min_free;
2754 __le32 vi_min_free;
2755 __le32 vo_min_free;
2756 __le32 feature_mask;
2757 } __packed;
2758
2759 #define NUM_UNITS_IS_NUM_VDEVS BIT(0)
2760 #define NUM_UNITS_IS_NUM_PEERS BIT(1)
2761 #define NUM_UNITS_IS_NUM_ACTIVE_PEERS BIT(2)
2762
2763 struct wmi_resource_config_10_4 {
2764
2765 __le32 num_vdevs;
2766
2767
2768 __le32 num_peers;
2769
2770
2771 __le32 num_active_peers;
2772
2773
2774
2775
2776
2777
2778
2779 __le32 num_offload_peers;
2780
2781
2782
2783
2784 __le32 num_offload_reorder_buffs;
2785
2786
2787 __le32 num_peer_keys;
2788
2789
2790 __le32 num_tids;
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800 __le32 ast_skid_limit;
2801
2802
2803
2804
2805
2806
2807
2808 __le32 tx_chain_mask;
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818 __le32 rx_chain_mask;
2819
2820
2821
2822
2823
2824
2825
2826
2827 __le32 rx_timeout_pri[4];
2828
2829
2830
2831
2832
2833
2834 __le32 rx_decap_mode;
2835
2836 __le32 scan_max_pending_req;
2837
2838 __le32 bmiss_offload_max_vdev;
2839
2840 __le32 roam_offload_max_vdev;
2841
2842 __le32 roam_offload_max_ap_profiles;
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853 __le32 num_mcast_groups;
2854
2855
2856
2857
2858
2859
2860
2861
2862 __le32 num_mcast_table_elems;
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879 __le32 mcast2ucast_mode;
2880
2881
2882
2883
2884
2885
2886 __le32 tx_dbg_log_size;
2887
2888
2889 __le32 num_wds_entries;
2890
2891
2892 __le32 dma_burst_size;
2893
2894
2895
2896
2897 __le32 mac_aggr_delim;
2898
2899
2900
2901
2902
2903
2904
2905
2906 __le32 rx_skip_defrag_timeout_dup_detection_check;
2907
2908
2909
2910
2911 __le32 vow_config;
2912
2913
2914 __le32 gtk_offload_max_vdev;
2915
2916
2917 __le32 num_msdu_desc;
2918
2919
2920
2921
2922
2923
2924 __le32 max_frag_entries;
2925
2926
2927
2928
2929
2930 __le32 max_peer_ext_stats;
2931
2932
2933
2934
2935
2936
2937 __le32 smart_ant_cap;
2938
2939
2940
2941
2942 __le32 bk_minfree;
2943 __le32 be_minfree;
2944 __le32 vi_minfree;
2945 __le32 vo_minfree;
2946
2947
2948
2949
2950
2951 __le32 rx_batchmode;
2952
2953
2954
2955
2956
2957 __le32 tt_support;
2958
2959
2960
2961
2962
2963 __le32 atf_config;
2964
2965
2966
2967
2968
2969 __le32 iphdr_pad_config;
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980 __le32 qwrap_config;
2981 } __packed;
2982
2983 enum wmi_coex_version {
2984 WMI_NO_COEX_VERSION_SUPPORT = 0,
2985
2986 WMI_COEX_VERSION_1 = 1,
2987
2988 WMI_COEX_VERSION_2 = 2,
2989
2990 WMI_COEX_VERSION_3 = 3,
2991
2992 WMI_COEX_VERSION_4 = 4,
2993 };
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013 enum wmi_10_4_feature_mask {
3014 WMI_10_4_LTEU_SUPPORT = BIT(0),
3015 WMI_10_4_COEX_GPIO_SUPPORT = BIT(1),
3016 WMI_10_4_AUX_RADIO_SPECTRAL_INTF = BIT(2),
3017 WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF = BIT(3),
3018 WMI_10_4_BSS_CHANNEL_INFO_64 = BIT(4),
3019 WMI_10_4_PEER_STATS = BIT(5),
3020 WMI_10_4_VDEV_STATS = BIT(6),
3021 WMI_10_4_TDLS = BIT(7),
3022 WMI_10_4_TDLS_OFFCHAN = BIT(8),
3023 WMI_10_4_TDLS_UAPSD_BUFFER_STA = BIT(9),
3024 WMI_10_4_TDLS_UAPSD_SLEEP_STA = BIT(10),
3025 WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE = BIT(11),
3026 WMI_10_4_TDLS_EXPLICIT_MODE_ONLY = BIT(12),
3027 WMI_10_4_TX_DATA_ACK_RSSI = BIT(16),
3028 WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT = BIT(17),
3029 WMI_10_4_REPORT_AIRTIME = BIT(18),
3030
3031 };
3032
3033 struct wmi_ext_resource_config_10_4_cmd {
3034
3035 __le32 host_platform_config;
3036
3037 __le32 fw_feature_bitmap;
3038
3039 __le32 wlan_gpio_priority;
3040
3041 __le32 coex_version;
3042
3043 __le32 coex_gpio_pin1;
3044 __le32 coex_gpio_pin2;
3045 __le32 coex_gpio_pin3;
3046
3047 __le32 num_tdls_vdevs;
3048
3049 __le32 num_tdls_conn_table_entries;
3050
3051 __le32 max_tdls_concurrent_sleep_sta;
3052
3053 __le32 max_tdls_concurrent_buffer_sta;
3054 };
3055
3056
3057 struct host_memory_chunk {
3058
3059 __le32 req_id;
3060
3061 __le32 ptr;
3062
3063 __le32 size;
3064 } __packed;
3065
3066 #define WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID 8
3067
3068 struct wmi_host_mem_chunks {
3069 __le32 count;
3070
3071 struct host_memory_chunk items[1];
3072 } __packed;
3073
3074 struct wmi_init_cmd {
3075 struct wmi_resource_config resource_config;
3076 struct wmi_host_mem_chunks mem_chunks;
3077 } __packed;
3078
3079
3080 struct wmi_init_cmd_10x {
3081 struct wmi_resource_config_10x resource_config;
3082 struct wmi_host_mem_chunks mem_chunks;
3083 } __packed;
3084
3085 struct wmi_init_cmd_10_2 {
3086 struct wmi_resource_config_10_2 resource_config;
3087 struct wmi_host_mem_chunks mem_chunks;
3088 } __packed;
3089
3090 struct wmi_init_cmd_10_4 {
3091 struct wmi_resource_config_10_4 resource_config;
3092 struct wmi_host_mem_chunks mem_chunks;
3093 } __packed;
3094
3095 struct wmi_chan_list_entry {
3096 __le16 freq;
3097 u8 phy_mode;
3098 u8 reserved;
3099 } __packed;
3100
3101
3102 struct wmi_chan_list {
3103 __le32 tag;
3104 __le32 num_chan;
3105 struct wmi_chan_list_entry channel_list[];
3106 } __packed;
3107
3108 struct wmi_bssid_list {
3109 __le32 tag;
3110 __le32 num_bssid;
3111 struct wmi_mac_addr bssid_list[];
3112 } __packed;
3113
3114 struct wmi_ie_data {
3115 __le32 tag;
3116 __le32 ie_len;
3117 u8 ie_data[];
3118 } __packed;
3119
3120 struct wmi_ssid {
3121 __le32 ssid_len;
3122 u8 ssid[32];
3123 } __packed;
3124
3125 struct wmi_ssid_list {
3126 __le32 tag;
3127 __le32 num_ssids;
3128 struct wmi_ssid ssids[];
3129 } __packed;
3130
3131
3132 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3133
3134
3135
3136 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3137
3138 #define WLAN_SCAN_PARAMS_MAX_SSID 16
3139 #define WLAN_SCAN_PARAMS_MAX_BSSID 4
3140 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
3141
3142
3143
3144
3145 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3146
3147
3148 enum wmi_scan_priority {
3149 WMI_SCAN_PRIORITY_VERY_LOW = 0,
3150 WMI_SCAN_PRIORITY_LOW,
3151 WMI_SCAN_PRIORITY_MEDIUM,
3152 WMI_SCAN_PRIORITY_HIGH,
3153 WMI_SCAN_PRIORITY_VERY_HIGH,
3154 WMI_SCAN_PRIORITY_COUNT
3155 };
3156
3157 struct wmi_start_scan_common {
3158
3159 __le32 scan_id;
3160
3161 __le32 scan_req_id;
3162
3163 __le32 vdev_id;
3164
3165 __le32 scan_priority;
3166
3167 __le32 notify_scan_events;
3168
3169 __le32 dwell_time_active;
3170
3171 __le32 dwell_time_passive;
3172
3173
3174
3175
3176 __le32 min_rest_time;
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190 __le32 max_rest_time;
3191
3192
3193
3194
3195
3196
3197
3198 __le32 repeat_probe_time;
3199
3200 __le32 probe_spacing_time;
3201
3202
3203
3204
3205 __le32 idle_time;
3206
3207 __le32 max_scan_time;
3208
3209
3210
3211
3212 __le32 probe_delay;
3213
3214 __le32 scan_ctrl_flags;
3215 } __packed;
3216
3217 struct wmi_start_scan_tlvs {
3218
3219
3220
3221 u8 tlvs[0];
3222 } __packed;
3223
3224 struct wmi_start_scan_cmd {
3225 struct wmi_start_scan_common common;
3226 __le32 burst_duration_ms;
3227 struct wmi_start_scan_tlvs tlvs;
3228 } __packed;
3229
3230
3231 struct wmi_10x_start_scan_cmd {
3232 struct wmi_start_scan_common common;
3233 struct wmi_start_scan_tlvs tlvs;
3234 } __packed;
3235
3236 struct wmi_ssid_arg {
3237 int len;
3238 const u8 *ssid;
3239 };
3240
3241 struct wmi_bssid_arg {
3242 const u8 *bssid;
3243 };
3244
3245 struct wmi_start_scan_arg {
3246 u32 scan_id;
3247 u32 scan_req_id;
3248 u32 vdev_id;
3249 u32 scan_priority;
3250 u32 notify_scan_events;
3251 u32 dwell_time_active;
3252 u32 dwell_time_passive;
3253 u32 min_rest_time;
3254 u32 max_rest_time;
3255 u32 repeat_probe_time;
3256 u32 probe_spacing_time;
3257 u32 idle_time;
3258 u32 max_scan_time;
3259 u32 probe_delay;
3260 u32 scan_ctrl_flags;
3261 u32 burst_duration_ms;
3262
3263 u32 ie_len;
3264 u32 n_channels;
3265 u32 n_ssids;
3266 u32 n_bssids;
3267
3268 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
3269 u16 channels[64];
3270 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
3271 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
3272 struct wmi_mac_addr mac_addr;
3273 struct wmi_mac_addr mac_mask;
3274 };
3275
3276
3277
3278
3279 #define WMI_SCAN_FLAG_PASSIVE 0x1
3280
3281 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3282
3283 #define WMI_SCAN_ADD_CCK_RATES 0x4
3284
3285 #define WMI_SCAN_ADD_OFDM_RATES 0x8
3286
3287 #define WMI_SCAN_CHAN_STAT_EVENT 0x10
3288
3289 #define WMI_SCAN_FILTER_PROBE_REQ 0x20
3290
3291 #define WMI_SCAN_BYPASS_DFS_CHN 0x40
3292
3293
3294
3295 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80
3296
3297
3298
3299
3300
3301 #define WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ 0x1000
3302
3303
3304 #define WMI_SCAN_CLASS_MASK 0xFF000000
3305
3306 enum wmi_stop_scan_type {
3307 WMI_SCAN_STOP_ONE = 0x00000000,
3308 WMI_SCAN_STOP_VDEV_ALL = 0x01000000,
3309 WMI_SCAN_STOP_ALL = 0x04000000,
3310 };
3311
3312 struct wmi_stop_scan_cmd {
3313 __le32 scan_req_id;
3314 __le32 scan_id;
3315 __le32 req_type;
3316 __le32 vdev_id;
3317 } __packed;
3318
3319 struct wmi_stop_scan_arg {
3320 u32 req_id;
3321 enum wmi_stop_scan_type req_type;
3322 union {
3323 u32 scan_id;
3324 u32 vdev_id;
3325 } u;
3326 };
3327
3328 struct wmi_scan_chan_list_cmd {
3329 __le32 num_scan_chans;
3330 struct wmi_channel chan_info[];
3331 } __packed;
3332
3333 struct wmi_scan_chan_list_arg {
3334 u32 n_channels;
3335 struct wmi_channel_arg *channels;
3336 };
3337
3338 enum wmi_bss_filter {
3339 WMI_BSS_FILTER_NONE = 0,
3340 WMI_BSS_FILTER_ALL,
3341 WMI_BSS_FILTER_PROFILE,
3342 WMI_BSS_FILTER_ALL_BUT_PROFILE,
3343 WMI_BSS_FILTER_CURRENT_BSS,
3344 WMI_BSS_FILTER_ALL_BUT_BSS,
3345 WMI_BSS_FILTER_PROBED_SSID,
3346 WMI_BSS_FILTER_LAST_BSS,
3347 };
3348
3349 enum wmi_scan_event_type {
3350 WMI_SCAN_EVENT_STARTED = BIT(0),
3351 WMI_SCAN_EVENT_COMPLETED = BIT(1),
3352 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
3353 WMI_SCAN_EVENT_FOREIGN_CHANNEL = BIT(3),
3354 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
3355
3356 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
3357 WMI_SCAN_EVENT_START_FAILED = BIT(6),
3358 WMI_SCAN_EVENT_RESTARTED = BIT(7),
3359 WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
3360 WMI_SCAN_EVENT_MAX = BIT(15),
3361 };
3362
3363 enum wmi_scan_completion_reason {
3364 WMI_SCAN_REASON_COMPLETED,
3365 WMI_SCAN_REASON_CANCELLED,
3366 WMI_SCAN_REASON_PREEMPTED,
3367 WMI_SCAN_REASON_TIMEDOUT,
3368 WMI_SCAN_REASON_INTERNAL_FAILURE,
3369 WMI_SCAN_REASON_MAX,
3370 };
3371
3372 struct wmi_scan_event {
3373 __le32 event_type;
3374 __le32 reason;
3375 __le32 channel_freq;
3376 __le32 scan_req_id;
3377 __le32 scan_id;
3378 __le32 vdev_id;
3379 } __packed;
3380
3381
3382
3383
3384
3385
3386
3387
3388
3389 #define WMI_MGMT_RX_HDR_HEADROOM 52
3390
3391
3392
3393
3394
3395
3396
3397
3398 struct wmi_mgmt_rx_hdr_v1 {
3399 __le32 channel;
3400 __le32 snr;
3401 __le32 rate;
3402 __le32 phy_mode;
3403 __le32 buf_len;
3404 __le32 status;
3405 } __packed;
3406
3407 struct wmi_mgmt_rx_hdr_v2 {
3408 struct wmi_mgmt_rx_hdr_v1 v1;
3409 __le32 rssi_ctl[4];
3410 } __packed;
3411
3412 struct wmi_mgmt_rx_event_v1 {
3413 struct wmi_mgmt_rx_hdr_v1 hdr;
3414 u8 buf[];
3415 } __packed;
3416
3417 struct wmi_mgmt_rx_event_v2 {
3418 struct wmi_mgmt_rx_hdr_v2 hdr;
3419 u8 buf[];
3420 } __packed;
3421
3422 struct wmi_10_4_mgmt_rx_hdr {
3423 __le32 channel;
3424 __le32 snr;
3425 u8 rssi_ctl[4];
3426 __le32 rate;
3427 __le32 phy_mode;
3428 __le32 buf_len;
3429 __le32 status;
3430 } __packed;
3431
3432 struct wmi_10_4_mgmt_rx_event {
3433 struct wmi_10_4_mgmt_rx_hdr hdr;
3434 u8 buf[];
3435 } __packed;
3436
3437 struct wmi_mgmt_rx_ext_info {
3438 __le64 rx_mac_timestamp;
3439 } __packed __aligned(4);
3440
3441 #define WMI_RX_STATUS_OK 0x00
3442 #define WMI_RX_STATUS_ERR_CRC 0x01
3443 #define WMI_RX_STATUS_ERR_DECRYPT 0x08
3444 #define WMI_RX_STATUS_ERR_MIC 0x10
3445 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
3446
3447 #define WMI_RX_STATUS_EXT_INFO 0x40
3448
3449 #define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26
3450 #define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24
3451 #define PHY_ERROR_GEN_RADAR 0x05
3452
3453 #define PHY_ERROR_10_4_RADAR_MASK 0x4
3454 #define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000
3455
3456 enum phy_err_type {
3457 PHY_ERROR_UNKNOWN,
3458 PHY_ERROR_SPECTRAL_SCAN,
3459 PHY_ERROR_FALSE_RADAR_EXT,
3460 PHY_ERROR_RADAR
3461 };
3462
3463 struct wmi_phyerr {
3464 __le32 tsf_timestamp;
3465 __le16 freq1;
3466 __le16 freq2;
3467 u8 rssi_combined;
3468 u8 chan_width_mhz;
3469 u8 phy_err_code;
3470 u8 rsvd0;
3471 __le32 rssi_chains[4];
3472 __le16 nf_chains[4];
3473 __le32 buf_len;
3474 u8 buf[];
3475 } __packed;
3476
3477 struct wmi_phyerr_event {
3478 __le32 num_phyerrs;
3479 __le32 tsf_l32;
3480 __le32 tsf_u32;
3481
3482
3483 u8 phyerrs[];
3484 } __packed;
3485
3486 struct wmi_10_4_phyerr_event {
3487 __le32 tsf_l32;
3488 __le32 tsf_u32;
3489 __le16 freq1;
3490 __le16 freq2;
3491 u8 rssi_combined;
3492 u8 chan_width_mhz;
3493 u8 phy_err_code;
3494 u8 rsvd0;
3495 __le32 rssi_chains[4];
3496 __le16 nf_chains[4];
3497 __le32 phy_err_mask[2];
3498 __le32 tsf_timestamp;
3499 __le32 buf_len;
3500 u8 buf[];
3501 } __packed;
3502
3503 struct wmi_radar_found_info {
3504 __le32 pri_min;
3505 __le32 pri_max;
3506 __le32 width_min;
3507 __le32 width_max;
3508 __le32 sidx_min;
3509 __le32 sidx_max;
3510 } __packed;
3511
3512 enum wmi_radar_confirmation_status {
3513
3514 WMI_SW_RADAR_DETECTED = 0,
3515
3516 WMI_RADAR_DETECTION_FAIL = 1,
3517
3518
3519 WMI_HW_RADAR_DETECTED = 2,
3520 };
3521
3522 #define PHYERR_TLV_SIG 0xBB
3523 #define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
3524 #define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
3525 #define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9
3526
3527 struct phyerr_radar_report {
3528 __le32 reg0;
3529 __le32 reg1;
3530 } __packed;
3531
3532 #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
3533 #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31
3534
3535 #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000
3536 #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30
3537
3538 #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000
3539 #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20
3540
3541 #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000
3542 #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16
3543
3544 #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00
3545 #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10
3546
3547 #define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF
3548 #define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0
3549
3550 #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000
3551 #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31
3552
3553 #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000
3554 #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24
3555
3556 #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000
3557 #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16
3558
3559 #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00
3560 #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8
3561
3562 #define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF
3563 #define RADAR_REPORT_REG1_PULSE_DUR_LSB 0
3564
3565 struct phyerr_fft_report {
3566 __le32 reg0;
3567 __le32 reg1;
3568 } __packed;
3569
3570 #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000
3571 #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23
3572
3573 #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000
3574 #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14
3575
3576 #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000
3577 #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12
3578
3579 #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF
3580 #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0
3581
3582 #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000
3583 #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26
3584
3585 #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000
3586 #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18
3587
3588 #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00
3589 #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8
3590
3591 #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF
3592 #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0
3593
3594 struct phyerr_tlv {
3595 __le16 len;
3596 u8 tag;
3597 u8 sig;
3598 } __packed;
3599
3600 #define DFS_RSSI_POSSIBLY_FALSE 50
3601 #define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40
3602
3603 struct wmi_mgmt_tx_hdr {
3604 __le32 vdev_id;
3605 struct wmi_mac_addr peer_macaddr;
3606 __le32 tx_rate;
3607 __le32 tx_power;
3608 __le32 buf_len;
3609 } __packed;
3610
3611 struct wmi_mgmt_tx_cmd {
3612 struct wmi_mgmt_tx_hdr hdr;
3613 u8 buf[];
3614 } __packed;
3615
3616 struct wmi_echo_event {
3617 __le32 value;
3618 } __packed;
3619
3620 struct wmi_echo_cmd {
3621 __le32 value;
3622 } __packed;
3623
3624 struct wmi_pdev_set_regdomain_cmd {
3625 __le32 reg_domain;
3626 __le32 reg_domain_2G;
3627 __le32 reg_domain_5G;
3628 __le32 conformance_test_limit_2G;
3629 __le32 conformance_test_limit_5G;
3630 } __packed;
3631
3632 enum wmi_dfs_region {
3633
3634 WMI_UNINIT_DFS_DOMAIN = 0,
3635
3636
3637 WMI_FCC_DFS_DOMAIN = 1,
3638
3639
3640 WMI_ETSI_DFS_DOMAIN = 2,
3641
3642
3643 WMI_MKK4_DFS_DOMAIN = 3,
3644 };
3645
3646 struct wmi_pdev_set_regdomain_cmd_10x {
3647 __le32 reg_domain;
3648 __le32 reg_domain_2G;
3649 __le32 reg_domain_5G;
3650 __le32 conformance_test_limit_2G;
3651 __le32 conformance_test_limit_5G;
3652
3653
3654 __le32 dfs_domain;
3655 } __packed;
3656
3657
3658 struct wmi_pdev_set_quiet_cmd {
3659
3660 __le32 period;
3661
3662
3663 __le32 duration;
3664
3665
3666 __le32 next_start;
3667
3668
3669 __le32 enabled;
3670 } __packed;
3671
3672
3673
3674
3675 enum ath10k_protmode {
3676 ATH10K_PROT_NONE = 0,
3677 ATH10K_PROT_CTSONLY = 1,
3678 ATH10K_PROT_RTSCTS = 2,
3679 };
3680
3681 enum wmi_rtscts_profile {
3682 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
3683 WMI_RTSCTS_FOR_SECOND_RATESERIES,
3684 WMI_RTSCTS_ACROSS_SW_RETRIES
3685 };
3686
3687 #define WMI_RTSCTS_ENABLED 1
3688 #define WMI_RTSCTS_SET_MASK 0x0f
3689 #define WMI_RTSCTS_SET_LSB 0
3690
3691 #define WMI_RTSCTS_PROFILE_MASK 0xf0
3692 #define WMI_RTSCTS_PROFILE_LSB 4
3693
3694 enum wmi_beacon_gen_mode {
3695 WMI_BEACON_STAGGERED_MODE = 0,
3696 WMI_BEACON_BURST_MODE = 1
3697 };
3698
3699 enum wmi_csa_event_ies_present_flag {
3700 WMI_CSA_IE_PRESENT = 0x00000001,
3701 WMI_XCSA_IE_PRESENT = 0x00000002,
3702 WMI_WBW_IE_PRESENT = 0x00000004,
3703 WMI_CSWARP_IE_PRESENT = 0x00000008,
3704 };
3705
3706
3707 struct wmi_csa_event {
3708 __le32 i_fc_dur;
3709
3710
3711 struct wmi_mac_addr i_addr1;
3712 struct wmi_mac_addr i_addr2;
3713 __le32 csa_ie[2];
3714 __le32 xcsa_ie[2];
3715 __le32 wb_ie[2];
3716 __le32 cswarp_ie;
3717 __le32 ies_present_flag;
3718 } __packed;
3719
3720
3721 #define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3722 #define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3723 #define PEER_DEFAULT_STATS_UPDATE_PERIOD 500
3724
3725 struct wmi_pdev_param_map {
3726 u32 tx_chain_mask;
3727 u32 rx_chain_mask;
3728 u32 txpower_limit2g;
3729 u32 txpower_limit5g;
3730 u32 txpower_scale;
3731 u32 beacon_gen_mode;
3732 u32 beacon_tx_mode;
3733 u32 resmgr_offchan_mode;
3734 u32 protection_mode;
3735 u32 dynamic_bw;
3736 u32 non_agg_sw_retry_th;
3737 u32 agg_sw_retry_th;
3738 u32 sta_kickout_th;
3739 u32 ac_aggrsize_scaling;
3740 u32 ltr_enable;
3741 u32 ltr_ac_latency_be;
3742 u32 ltr_ac_latency_bk;
3743 u32 ltr_ac_latency_vi;
3744 u32 ltr_ac_latency_vo;
3745 u32 ltr_ac_latency_timeout;
3746 u32 ltr_sleep_override;
3747 u32 ltr_rx_override;
3748 u32 ltr_tx_activity_timeout;
3749 u32 l1ss_enable;
3750 u32 dsleep_enable;
3751 u32 pcielp_txbuf_flush;
3752 u32 pcielp_txbuf_watermark;
3753 u32 pcielp_txbuf_tmo_en;
3754 u32 pcielp_txbuf_tmo_value;
3755 u32 pdev_stats_update_period;
3756 u32 vdev_stats_update_period;
3757 u32 peer_stats_update_period;
3758 u32 bcnflt_stats_update_period;
3759 u32 pmf_qos;
3760 u32 arp_ac_override;
3761 u32 dcs;
3762 u32 ani_enable;
3763 u32 ani_poll_period;
3764 u32 ani_listen_period;
3765 u32 ani_ofdm_level;
3766 u32 ani_cck_level;
3767 u32 dyntxchain;
3768 u32 proxy_sta;
3769 u32 idle_ps_config;
3770 u32 power_gating_sleep;
3771 u32 fast_channel_reset;
3772 u32 burst_dur;
3773 u32 burst_enable;
3774 u32 cal_period;
3775 u32 aggr_burst;
3776 u32 rx_decap_mode;
3777 u32 smart_antenna_default_antenna;
3778 u32 igmpmld_override;
3779 u32 igmpmld_tid;
3780 u32 antenna_gain;
3781 u32 rx_filter;
3782 u32 set_mcast_to_ucast_tid;
3783 u32 proxy_sta_mode;
3784 u32 set_mcast2ucast_mode;
3785 u32 set_mcast2ucast_buffer;
3786 u32 remove_mcast2ucast_buffer;
3787 u32 peer_sta_ps_statechg_enable;
3788 u32 igmpmld_ac_override;
3789 u32 block_interbss;
3790 u32 set_disable_reset_cmdid;
3791 u32 set_msdu_ttl_cmdid;
3792 u32 set_ppdu_duration_cmdid;
3793 u32 txbf_sound_period_cmdid;
3794 u32 set_promisc_mode_cmdid;
3795 u32 set_burst_mode_cmdid;
3796 u32 en_stats;
3797 u32 mu_group_policy;
3798 u32 noise_detection;
3799 u32 noise_threshold;
3800 u32 dpd_enable;
3801 u32 set_mcast_bcast_echo;
3802 u32 atf_strict_sch;
3803 u32 atf_sched_duration;
3804 u32 ant_plzn;
3805 u32 mgmt_retry_limit;
3806 u32 sensitivity_level;
3807 u32 signed_txpower_2g;
3808 u32 signed_txpower_5g;
3809 u32 enable_per_tid_amsdu;
3810 u32 enable_per_tid_ampdu;
3811 u32 cca_threshold;
3812 u32 rts_fixed_rate;
3813 u32 pdev_reset;
3814 u32 wapi_mbssid_offset;
3815 u32 arp_srcaddr;
3816 u32 arp_dstaddr;
3817 u32 enable_btcoex;
3818 u32 rfkill_config;
3819 u32 rfkill_enable;
3820 u32 peer_stats_info_enable;
3821 };
3822
3823 #define WMI_PDEV_PARAM_UNSUPPORTED 0
3824
3825 enum wmi_pdev_param {
3826
3827 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3828
3829 WMI_PDEV_PARAM_RX_CHAIN_MASK,
3830
3831 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
3832
3833 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
3834
3835 WMI_PDEV_PARAM_TXPOWER_SCALE,
3836
3837 WMI_PDEV_PARAM_BEACON_GEN_MODE,
3838
3839 WMI_PDEV_PARAM_BEACON_TX_MODE,
3840
3841
3842
3843
3844 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3845
3846
3847
3848
3849 WMI_PDEV_PARAM_PROTECTION_MODE,
3850
3851
3852
3853
3854
3855
3856 WMI_PDEV_PARAM_DYNAMIC_BW,
3857
3858 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3859
3860 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
3861
3862 WMI_PDEV_PARAM_STA_KICKOUT_TH,
3863
3864 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3865
3866 WMI_PDEV_PARAM_LTR_ENABLE,
3867
3868 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
3869
3870 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
3871
3872 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
3873
3874 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
3875
3876 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3877
3878 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3879
3880 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
3881
3882 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3883
3884 WMI_PDEV_PARAM_L1SS_ENABLE,
3885
3886 WMI_PDEV_PARAM_DSLEEP_ENABLE,
3887
3888 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3889
3890 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3891
3892 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3893
3894 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3895
3896 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3897
3898 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3899
3900 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3901
3902 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3903
3904 WMI_PDEV_PARAM_PMF_QOS,
3905
3906 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
3907
3908 WMI_PDEV_PARAM_DCS,
3909
3910 WMI_PDEV_PARAM_ANI_ENABLE,
3911
3912 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
3913
3914 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
3915
3916 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
3917
3918 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
3919
3920 WMI_PDEV_PARAM_DYNTXCHAIN,
3921
3922 WMI_PDEV_PARAM_PROXY_STA,
3923
3924 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
3925
3926 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
3927 };
3928
3929 enum wmi_10x_pdev_param {
3930
3931 WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3932
3933 WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
3934
3935 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
3936
3937 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
3938
3939 WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
3940
3941 WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
3942
3943 WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
3944
3945
3946
3947
3948 WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3949
3950
3951
3952
3953 WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3954
3955 WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3956
3957 WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3958
3959 WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3960
3961 WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
3962
3963 WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3964
3965 WMI_10X_PDEV_PARAM_LTR_ENABLE,
3966
3967 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
3968
3969 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
3970
3971 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
3972
3973 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
3974
3975 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3976
3977 WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3978
3979 WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
3980
3981 WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3982
3983 WMI_10X_PDEV_PARAM_L1SS_ENABLE,
3984
3985 WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
3986
3987 WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3988
3989 WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3990
3991 WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3992
3993 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3994
3995 WMI_10X_PDEV_PARAM_PMF_QOS,
3996
3997 WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
3998
3999 WMI_10X_PDEV_PARAM_DCS,
4000
4001 WMI_10X_PDEV_PARAM_ANI_ENABLE,
4002
4003 WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
4004
4005 WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
4006
4007 WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
4008
4009 WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
4010
4011 WMI_10X_PDEV_PARAM_DYNTXCHAIN,
4012
4013 WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
4014
4015 WMI_10X_PDEV_PARAM_BURST_DUR,
4016
4017 WMI_10X_PDEV_PARAM_BURST_ENABLE,
4018
4019
4020 WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
4021 WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
4022 WMI_10X_PDEV_PARAM_IGMPMLD_TID,
4023 WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
4024 WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
4025 WMI_10X_PDEV_PARAM_RX_FILTER,
4026 WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
4027 WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
4028 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
4029 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
4030 WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4031 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
4032 WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
4033 WMI_10X_PDEV_PARAM_CAL_PERIOD,
4034 WMI_10X_PDEV_PARAM_ATF_STRICT_SCH,
4035 WMI_10X_PDEV_PARAM_ATF_SCHED_DURATION,
4036 WMI_10X_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4037 WMI_10X_PDEV_PARAM_PDEV_RESET
4038 };
4039
4040 enum wmi_10_4_pdev_param {
4041 WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
4042 WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
4043 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
4044 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
4045 WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
4046 WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
4047 WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
4048 WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
4049 WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
4050 WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
4051 WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
4052 WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
4053 WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
4054 WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
4055 WMI_10_4_PDEV_PARAM_LTR_ENABLE,
4056 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
4057 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
4058 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
4059 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
4060 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
4061 WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
4062 WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
4063 WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
4064 WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
4065 WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
4066 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
4067 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
4068 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
4069 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
4070 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
4071 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
4072 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
4073 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
4074 WMI_10_4_PDEV_PARAM_PMF_QOS,
4075 WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
4076 WMI_10_4_PDEV_PARAM_DCS,
4077 WMI_10_4_PDEV_PARAM_ANI_ENABLE,
4078 WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
4079 WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
4080 WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
4081 WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
4082 WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
4083 WMI_10_4_PDEV_PARAM_PROXY_STA,
4084 WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
4085 WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
4086 WMI_10_4_PDEV_PARAM_AGGR_BURST,
4087 WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
4088 WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
4089 WMI_10_4_PDEV_PARAM_BURST_DUR,
4090 WMI_10_4_PDEV_PARAM_BURST_ENABLE,
4091 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
4092 WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
4093 WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
4094 WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
4095 WMI_10_4_PDEV_PARAM_RX_FILTER,
4096 WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
4097 WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
4098 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
4099 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
4100 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4101 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
4102 WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
4103 WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
4104 WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
4105 WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
4106 WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
4107 WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
4108 WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4109 WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
4110 WMI_10_4_PDEV_PARAM_EN_STATS,
4111 WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
4112 WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
4113 WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
4114 WMI_10_4_PDEV_PARAM_DPD_ENABLE,
4115 WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
4116 WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
4117 WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
4118 WMI_10_4_PDEV_PARAM_ANT_PLZN,
4119 WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
4120 WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
4121 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
4122 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
4123 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
4124 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
4125 WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
4126 WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
4127 WMI_10_4_PDEV_PARAM_CAL_PERIOD,
4128 WMI_10_4_PDEV_PARAM_PDEV_RESET,
4129 WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
4130 WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
4131 WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
4132 WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB,
4133 WMI_10_4_PDEV_PARAM_RX_BATCHMODE,
4134 WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY,
4135 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
4136 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
4137 WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE,
4138 WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
4139 WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY,
4140 WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
4141 };
4142
4143 struct wmi_pdev_set_param_cmd {
4144 __le32 param_id;
4145 __le32 param_value;
4146 } __packed;
4147
4148 struct wmi_pdev_set_base_macaddr_cmd {
4149 struct wmi_mac_addr mac_addr;
4150 } __packed;
4151
4152
4153 #define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
4154
4155 struct wmi_pdev_get_tpc_config_cmd {
4156
4157 __le32 param;
4158 } __packed;
4159
4160 #define WMI_TPC_CONFIG_PARAM 1
4161 #define WMI_TPC_FINAL_RATE_MAX 240
4162 #define WMI_TPC_TX_N_CHAIN 4
4163 #define WMI_TPC_RATE_MAX (WMI_TPC_TX_N_CHAIN * 65)
4164 #define WMI_TPC_PREAM_TABLE_MAX 10
4165 #define WMI_TPC_FLAG 3
4166 #define WMI_TPC_BUF_SIZE 10
4167 #define WMI_TPC_BEAMFORMING 2
4168
4169 enum wmi_tpc_table_type {
4170 WMI_TPC_TABLE_TYPE_CDD = 0,
4171 WMI_TPC_TABLE_TYPE_STBC = 1,
4172 WMI_TPC_TABLE_TYPE_TXBF = 2,
4173 };
4174
4175 enum wmi_tpc_config_event_flag {
4176 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1,
4177 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2,
4178 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4,
4179 };
4180
4181 struct wmi_pdev_tpc_config_event {
4182 __le32 reg_domain;
4183 __le32 chan_freq;
4184 __le32 phy_mode;
4185 __le32 twice_antenna_reduction;
4186 __le32 twice_max_rd_power;
4187 a_sle32 twice_antenna_gain;
4188 __le32 power_limit;
4189 __le32 rate_max;
4190 __le32 num_tx_chain;
4191 __le32 ctl;
4192 __le32 flags;
4193 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4194 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4195 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4196 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4197 u8 rates_array[WMI_TPC_RATE_MAX];
4198 } __packed;
4199
4200
4201 enum wmi_tp_scale {
4202 WMI_TP_SCALE_MAX = 0,
4203 WMI_TP_SCALE_50 = 1,
4204 WMI_TP_SCALE_25 = 2,
4205 WMI_TP_SCALE_12 = 3,
4206 WMI_TP_SCALE_MIN = 4,
4207 WMI_TP_SCALE_SIZE = 5,
4208 };
4209
4210 struct wmi_pdev_tpc_final_table_event {
4211 __le32 reg_domain;
4212 __le32 chan_freq;
4213 __le32 phy_mode;
4214 __le32 twice_antenna_reduction;
4215 __le32 twice_max_rd_power;
4216 a_sle32 twice_antenna_gain;
4217 __le32 power_limit;
4218 __le32 rate_max;
4219 __le32 num_tx_chain;
4220 __le32 ctl;
4221 __le32 flags;
4222 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4223 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4224 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4225 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4226 u8 rates_array[WMI_TPC_FINAL_RATE_MAX];
4227 u8 ctl_power_table[WMI_TPC_BEAMFORMING][WMI_TPC_TX_N_CHAIN]
4228 [WMI_TPC_TX_N_CHAIN];
4229 } __packed;
4230
4231 struct wmi_pdev_get_tpc_table_cmd {
4232 __le32 param;
4233 } __packed;
4234
4235 enum wmi_tpc_pream_2ghz {
4236 WMI_TPC_PREAM_2GHZ_CCK = 0,
4237 WMI_TPC_PREAM_2GHZ_OFDM,
4238 WMI_TPC_PREAM_2GHZ_HT20,
4239 WMI_TPC_PREAM_2GHZ_HT40,
4240 WMI_TPC_PREAM_2GHZ_VHT20,
4241 WMI_TPC_PREAM_2GHZ_VHT40,
4242 WMI_TPC_PREAM_2GHZ_VHT80,
4243 };
4244
4245 enum wmi_tpc_pream_5ghz {
4246 WMI_TPC_PREAM_5GHZ_OFDM = 1,
4247 WMI_TPC_PREAM_5GHZ_HT20,
4248 WMI_TPC_PREAM_5GHZ_HT40,
4249 WMI_TPC_PREAM_5GHZ_VHT20,
4250 WMI_TPC_PREAM_5GHZ_VHT40,
4251 WMI_TPC_PREAM_5GHZ_VHT80,
4252 WMI_TPC_PREAM_5GHZ_HTCUP,
4253 };
4254
4255 #define WMI_PEER_PS_STATE_DISABLED 2
4256
4257 struct wmi_peer_sta_ps_state_chg_event {
4258 struct wmi_mac_addr peer_macaddr;
4259 __le32 peer_ps_state;
4260 } __packed;
4261
4262 struct wmi_pdev_chanlist_update_event {
4263
4264 __le32 num_chan;
4265
4266 struct wmi_channel channel_list[1];
4267 } __packed;
4268
4269 #define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
4270
4271 struct wmi_debug_mesg_event {
4272
4273 char bufp[WMI_MAX_DEBUG_MESG];
4274 } __packed;
4275
4276 enum {
4277
4278 VDEV_SUBTYPE_P2PDEV = 0,
4279
4280 VDEV_SUBTYPE_P2PCLI,
4281
4282 VDEV_SUBTYPE_P2PGO,
4283
4284 VDEV_SUBTYPE_BT,
4285 };
4286
4287 struct wmi_pdev_set_channel_cmd {
4288
4289 struct wmi_channel chan;
4290 } __packed;
4291
4292 struct wmi_pdev_pktlog_enable_cmd {
4293 __le32 ev_bitmap;
4294 } __packed;
4295
4296
4297 #define WMI_DSCP_MAP_MAX (64)
4298 struct wmi_pdev_set_dscp_tid_map_cmd {
4299
4300 __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
4301 } __packed;
4302
4303 enum mcast_bcast_rate_id {
4304 WMI_SET_MCAST_RATE,
4305 WMI_SET_BCAST_RATE
4306 };
4307
4308 struct mcast_bcast_rate {
4309 enum mcast_bcast_rate_id rate_id;
4310 __le32 rate;
4311 } __packed;
4312
4313 struct wmi_wmm_params {
4314 __le32 cwmin;
4315 __le32 cwmax;
4316 __le32 aifs;
4317 __le32 txop;
4318 __le32 acm;
4319 __le32 no_ack;
4320 } __packed;
4321
4322 struct wmi_pdev_set_wmm_params {
4323 struct wmi_wmm_params ac_be;
4324 struct wmi_wmm_params ac_bk;
4325 struct wmi_wmm_params ac_vi;
4326 struct wmi_wmm_params ac_vo;
4327 } __packed;
4328
4329 struct wmi_wmm_params_arg {
4330 u32 cwmin;
4331 u32 cwmax;
4332 u32 aifs;
4333 u32 txop;
4334 u32 acm;
4335 u32 no_ack;
4336 };
4337
4338 struct wmi_wmm_params_all_arg {
4339 struct wmi_wmm_params_arg ac_be;
4340 struct wmi_wmm_params_arg ac_bk;
4341 struct wmi_wmm_params_arg ac_vi;
4342 struct wmi_wmm_params_arg ac_vo;
4343 };
4344
4345 struct wmi_pdev_stats_tx {
4346
4347 __le32 comp_queued;
4348
4349
4350 __le32 comp_delivered;
4351
4352
4353 __le32 msdu_enqued;
4354
4355
4356 __le32 mpdu_enqued;
4357
4358
4359 __le32 wmm_drop;
4360
4361
4362 __le32 local_enqued;
4363
4364
4365 __le32 local_freed;
4366
4367
4368 __le32 hw_queued;
4369
4370
4371 __le32 hw_reaped;
4372
4373
4374 __le32 underrun;
4375
4376
4377 __le32 tx_abort;
4378
4379
4380 __le32 mpdus_requeued;
4381
4382
4383 __le32 tx_ko;
4384
4385
4386 __le32 data_rc;
4387
4388
4389 __le32 self_triggers;
4390
4391
4392 __le32 sw_retry_failure;
4393
4394
4395 __le32 illgl_rate_phy_err;
4396
4397
4398 __le32 pdev_cont_xretry;
4399
4400
4401 __le32 pdev_tx_timeout;
4402
4403
4404 __le32 pdev_resets;
4405
4406
4407 __le32 stateless_tid_alloc_failure;
4408
4409 __le32 phy_underrun;
4410
4411
4412 __le32 txop_ovf;
4413 } __packed;
4414
4415 struct wmi_10_4_pdev_stats_tx {
4416
4417 __le32 comp_queued;
4418
4419
4420 __le32 comp_delivered;
4421
4422
4423 __le32 msdu_enqued;
4424
4425
4426 __le32 mpdu_enqued;
4427
4428
4429 __le32 wmm_drop;
4430
4431
4432 __le32 local_enqued;
4433
4434
4435 __le32 local_freed;
4436
4437
4438 __le32 hw_queued;
4439
4440
4441 __le32 hw_reaped;
4442
4443
4444 __le32 underrun;
4445
4446
4447 __le32 hw_paused;
4448
4449
4450 __le32 tx_abort;
4451
4452
4453 __le32 mpdus_requeued;
4454
4455
4456 __le32 tx_ko;
4457
4458
4459 __le32 data_rc;
4460
4461
4462 __le32 self_triggers;
4463
4464
4465 __le32 sw_retry_failure;
4466
4467
4468 __le32 illgl_rate_phy_err;
4469
4470
4471 __le32 pdev_cont_xretry;
4472
4473
4474 __le32 pdev_tx_timeout;
4475
4476
4477 __le32 pdev_resets;
4478
4479
4480 __le32 stateless_tid_alloc_failure;
4481
4482 __le32 phy_underrun;
4483
4484
4485 __le32 txop_ovf;
4486
4487
4488 __le32 seq_posted;
4489
4490
4491 __le32 seq_failed_queueing;
4492
4493
4494 __le32 seq_completed;
4495
4496
4497 __le32 seq_restarted;
4498
4499
4500 __le32 mu_seq_posted;
4501
4502
4503 __le32 mpdus_sw_flush;
4504
4505
4506 __le32 mpdus_hw_filter;
4507
4508
4509
4510
4511 __le32 mpdus_truncated;
4512
4513
4514 __le32 mpdus_ack_failed;
4515
4516
4517 __le32 mpdus_expired;
4518 } __packed;
4519
4520 struct wmi_pdev_stats_rx {
4521
4522 __le32 mid_ppdu_route_change;
4523
4524
4525 __le32 status_rcvd;
4526
4527
4528 __le32 r0_frags;
4529 __le32 r1_frags;
4530 __le32 r2_frags;
4531 __le32 r3_frags;
4532
4533
4534 __le32 htt_msdus;
4535 __le32 htt_mpdus;
4536
4537
4538 __le32 loc_msdus;
4539 __le32 loc_mpdus;
4540
4541
4542 __le32 oversize_amsdu;
4543
4544
4545 __le32 phy_errs;
4546
4547
4548 __le32 phy_err_drop;
4549
4550
4551 __le32 mpdu_errs;
4552 } __packed;
4553
4554 struct wmi_pdev_stats_peer {
4555
4556 __le32 dummy;
4557 } __packed;
4558
4559 enum wmi_stats_id {
4560 WMI_STAT_PEER = BIT(0),
4561 WMI_STAT_AP = BIT(1),
4562 WMI_STAT_PDEV = BIT(2),
4563 WMI_STAT_VDEV = BIT(3),
4564 WMI_STAT_BCNFLT = BIT(4),
4565 WMI_STAT_VDEV_RATE = BIT(5),
4566 };
4567
4568 enum wmi_10_4_stats_id {
4569 WMI_10_4_STAT_PEER = BIT(0),
4570 WMI_10_4_STAT_AP = BIT(1),
4571 WMI_10_4_STAT_INST = BIT(2),
4572 WMI_10_4_STAT_PEER_EXTD = BIT(3),
4573 WMI_10_4_STAT_VDEV_EXTD = BIT(4),
4574 };
4575
4576 enum wmi_tlv_stats_id {
4577 WMI_TLV_STAT_PEER = BIT(0),
4578 WMI_TLV_STAT_AP = BIT(1),
4579 WMI_TLV_STAT_PDEV = BIT(2),
4580 WMI_TLV_STAT_VDEV = BIT(3),
4581 WMI_TLV_STAT_PEER_EXTD = BIT(10),
4582 };
4583
4584 struct wlan_inst_rssi_args {
4585 __le16 cfg_retry_count;
4586 __le16 retry_count;
4587 };
4588
4589 struct wmi_request_stats_cmd {
4590 __le32 stats_id;
4591
4592 __le32 vdev_id;
4593
4594
4595 struct wmi_mac_addr peer_macaddr;
4596
4597
4598 struct wlan_inst_rssi_args inst_rssi_args;
4599 } __packed;
4600
4601 enum wmi_peer_stats_info_request_type {
4602
4603 WMI_REQUEST_ONE_PEER_STATS_INFO = 0x01,
4604
4605 WMI_REQUEST_VDEV_ALL_PEER_STATS_INFO = 0x02,
4606 };
4607
4608
4609 enum {
4610
4611 WMI_PDEV_SUSPEND,
4612
4613
4614 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
4615 };
4616
4617 struct wmi_pdev_suspend_cmd {
4618
4619 __le32 suspend_opt;
4620 } __packed;
4621
4622 struct wmi_stats_event {
4623 __le32 stats_id;
4624
4625
4626
4627
4628 __le32 num_pdev_stats;
4629
4630
4631
4632
4633 __le32 num_vdev_stats;
4634
4635
4636
4637
4638 __le32 num_peer_stats;
4639 __le32 num_bcnflt_stats;
4640
4641
4642
4643
4644
4645
4646
4647
4648
4649 u8 data[];
4650 } __packed;
4651
4652 struct wmi_10_2_stats_event {
4653 __le32 stats_id;
4654 __le32 num_pdev_stats;
4655 __le32 num_pdev_ext_stats;
4656 __le32 num_vdev_stats;
4657 __le32 num_peer_stats;
4658 __le32 num_bcnflt_stats;
4659 u8 data[];
4660 } __packed;
4661
4662
4663
4664
4665
4666 struct wmi_pdev_stats_base {
4667 __le32 chan_nf;
4668 __le32 tx_frame_count;
4669 __le32 rx_frame_count;
4670 __le32 rx_clear_count;
4671 __le32 cycle_count;
4672 __le32 phy_err_count;
4673 __le32 chan_tx_pwr;
4674 } __packed;
4675
4676 struct wmi_pdev_stats {
4677 struct wmi_pdev_stats_base base;
4678 struct wmi_pdev_stats_tx tx;
4679 struct wmi_pdev_stats_rx rx;
4680 struct wmi_pdev_stats_peer peer;
4681 } __packed;
4682
4683 struct wmi_pdev_stats_extra {
4684 __le32 ack_rx_bad;
4685 __le32 rts_bad;
4686 __le32 rts_good;
4687 __le32 fcs_bad;
4688 __le32 no_beacons;
4689 __le32 mib_int_count;
4690 } __packed;
4691
4692 struct wmi_10x_pdev_stats {
4693 struct wmi_pdev_stats_base base;
4694 struct wmi_pdev_stats_tx tx;
4695 struct wmi_pdev_stats_rx rx;
4696 struct wmi_pdev_stats_peer peer;
4697 struct wmi_pdev_stats_extra extra;
4698 } __packed;
4699
4700 struct wmi_pdev_stats_mem {
4701 __le32 dram_free;
4702 __le32 iram_free;
4703 } __packed;
4704
4705 struct wmi_10_2_pdev_stats {
4706 struct wmi_pdev_stats_base base;
4707 struct wmi_pdev_stats_tx tx;
4708 __le32 mc_drop;
4709 struct wmi_pdev_stats_rx rx;
4710 __le32 pdev_rx_timeout;
4711 struct wmi_pdev_stats_mem mem;
4712 struct wmi_pdev_stats_peer peer;
4713 struct wmi_pdev_stats_extra extra;
4714 } __packed;
4715
4716 struct wmi_10_4_pdev_stats {
4717 struct wmi_pdev_stats_base base;
4718 struct wmi_10_4_pdev_stats_tx tx;
4719 struct wmi_pdev_stats_rx rx;
4720 __le32 rx_ovfl_errs;
4721 struct wmi_pdev_stats_mem mem;
4722 __le32 sram_free_size;
4723 struct wmi_pdev_stats_extra extra;
4724 } __packed;
4725
4726
4727
4728
4729
4730 #define WMI_VDEV_STATS_FTM_COUNT_VALID BIT(31)
4731 #define WMI_VDEV_STATS_FTM_COUNT_LSB 0
4732 #define WMI_VDEV_STATS_FTM_COUNT_MASK 0x7fffffff
4733
4734 struct wmi_vdev_stats {
4735 __le32 vdev_id;
4736 } __packed;
4737
4738 struct wmi_vdev_stats_extd {
4739 __le32 vdev_id;
4740 __le32 ppdu_aggr_cnt;
4741 __le32 ppdu_noack;
4742 __le32 mpdu_queued;
4743 __le32 ppdu_nonaggr_cnt;
4744 __le32 mpdu_sw_requeued;
4745 __le32 mpdu_suc_retry;
4746 __le32 mpdu_suc_multitry;
4747 __le32 mpdu_fail_retry;
4748 __le32 tx_ftm_suc;
4749 __le32 tx_ftm_suc_retry;
4750 __le32 tx_ftm_fail;
4751 __le32 rx_ftmr_cnt;
4752 __le32 rx_ftmr_dup_cnt;
4753 __le32 rx_iftmr_cnt;
4754 __le32 rx_iftmr_dup_cnt;
4755 __le32 reserved[6];
4756 } __packed;
4757
4758
4759
4760
4761
4762 struct wmi_peer_stats {
4763 struct wmi_mac_addr peer_macaddr;
4764 __le32 peer_rssi;
4765 __le32 peer_tx_rate;
4766 } __packed;
4767
4768 struct wmi_10x_peer_stats {
4769 struct wmi_peer_stats old;
4770 __le32 peer_rx_rate;
4771 } __packed;
4772
4773 struct wmi_10_2_peer_stats {
4774 struct wmi_peer_stats old;
4775 __le32 peer_rx_rate;
4776 __le32 current_per;
4777 __le32 retries;
4778 __le32 tx_rate_count;
4779 __le32 max_4ms_frame_len;
4780 __le32 total_sub_frames;
4781 __le32 tx_bytes;
4782 __le32 num_pkt_loss_overflow[4];
4783 __le32 num_pkt_loss_excess_retry[4];
4784 } __packed;
4785
4786 struct wmi_10_2_4_peer_stats {
4787 struct wmi_10_2_peer_stats common;
4788 __le32 peer_rssi_changed;
4789 } __packed;
4790
4791 struct wmi_10_2_4_ext_peer_stats {
4792 struct wmi_10_2_peer_stats common;
4793 __le32 peer_rssi_changed;
4794 __le32 rx_duration;
4795 } __packed;
4796
4797 struct wmi_10_4_peer_stats {
4798 struct wmi_mac_addr peer_macaddr;
4799 __le32 peer_rssi;
4800 __le32 peer_rssi_seq_num;
4801 __le32 peer_tx_rate;
4802 __le32 peer_rx_rate;
4803 __le32 current_per;
4804 __le32 retries;
4805 __le32 tx_rate_count;
4806 __le32 max_4ms_frame_len;
4807 __le32 total_sub_frames;
4808 __le32 tx_bytes;
4809 __le32 num_pkt_loss_overflow[4];
4810 __le32 num_pkt_loss_excess_retry[4];
4811 __le32 peer_rssi_changed;
4812 } __packed;
4813
4814 struct wmi_10_4_peer_extd_stats {
4815 struct wmi_mac_addr peer_macaddr;
4816 __le32 inactive_time;
4817 __le32 peer_chain_rssi;
4818 __le32 rx_duration;
4819 __le32 reserved[10];
4820 } __packed;
4821
4822 struct wmi_10_4_bss_bcn_stats {
4823 __le32 vdev_id;
4824 __le32 bss_bcns_dropped;
4825 __le32 bss_bcn_delivered;
4826 } __packed;
4827
4828 struct wmi_10_4_bss_bcn_filter_stats {
4829 __le32 bcns_dropped;
4830 __le32 bcns_delivered;
4831 __le32 active_filters;
4832 struct wmi_10_4_bss_bcn_stats bss_stats;
4833 } __packed;
4834
4835 struct wmi_10_2_pdev_ext_stats {
4836 __le32 rx_rssi_comb;
4837 __le32 rx_rssi[4];
4838 __le32 rx_mcs[10];
4839 __le32 tx_mcs[10];
4840 __le32 ack_rssi;
4841 } __packed;
4842
4843 struct wmi_vdev_create_cmd {
4844 __le32 vdev_id;
4845 __le32 vdev_type;
4846 __le32 vdev_subtype;
4847 struct wmi_mac_addr vdev_macaddr;
4848 } __packed;
4849
4850 enum wmi_vdev_type {
4851 WMI_VDEV_TYPE_AP = 1,
4852 WMI_VDEV_TYPE_STA = 2,
4853 WMI_VDEV_TYPE_IBSS = 3,
4854 WMI_VDEV_TYPE_MONITOR = 4,
4855 };
4856
4857 enum wmi_vdev_subtype {
4858 WMI_VDEV_SUBTYPE_NONE,
4859 WMI_VDEV_SUBTYPE_P2P_DEVICE,
4860 WMI_VDEV_SUBTYPE_P2P_CLIENT,
4861 WMI_VDEV_SUBTYPE_P2P_GO,
4862 WMI_VDEV_SUBTYPE_PROXY_STA,
4863 WMI_VDEV_SUBTYPE_MESH_11S,
4864 WMI_VDEV_SUBTYPE_MESH_NON_11S,
4865 };
4866
4867 enum wmi_vdev_subtype_legacy {
4868 WMI_VDEV_SUBTYPE_LEGACY_NONE = 0,
4869 WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV = 1,
4870 WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI = 2,
4871 WMI_VDEV_SUBTYPE_LEGACY_P2P_GO = 3,
4872 WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4,
4873 };
4874
4875 enum wmi_vdev_subtype_10_2_4 {
4876 WMI_VDEV_SUBTYPE_10_2_4_NONE = 0,
4877 WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV = 1,
4878 WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI = 2,
4879 WMI_VDEV_SUBTYPE_10_2_4_P2P_GO = 3,
4880 WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4,
4881 WMI_VDEV_SUBTYPE_10_2_4_MESH_11S = 5,
4882 };
4883
4884 enum wmi_vdev_subtype_10_4 {
4885 WMI_VDEV_SUBTYPE_10_4_NONE = 0,
4886 WMI_VDEV_SUBTYPE_10_4_P2P_DEV = 1,
4887 WMI_VDEV_SUBTYPE_10_4_P2P_CLI = 2,
4888 WMI_VDEV_SUBTYPE_10_4_P2P_GO = 3,
4889 WMI_VDEV_SUBTYPE_10_4_PROXY_STA = 4,
4890 WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5,
4891 WMI_VDEV_SUBTYPE_10_4_MESH_11S = 6,
4892 };
4893
4894
4895
4896
4897
4898
4899
4900
4901 #define WMI_VDEV_START_HIDDEN_SSID (1 << 0)
4902
4903
4904
4905
4906
4907
4908
4909 #define WMI_VDEV_START_PMF_ENABLED (1 << 1)
4910
4911 struct wmi_p2p_noa_descriptor {
4912 __le32 type_count;
4913 __le32 duration;
4914 __le32 interval;
4915 __le32 start_time;
4916 } __packed;
4917
4918 struct wmi_vdev_start_request_cmd {
4919
4920 struct wmi_channel chan;
4921
4922 __le32 vdev_id;
4923
4924 __le32 requestor_id;
4925
4926 __le32 beacon_interval;
4927
4928 __le32 dtim_period;
4929
4930 __le32 flags;
4931
4932 struct wmi_ssid ssid;
4933
4934 __le32 bcn_tx_rate;
4935
4936 __le32 bcn_tx_power;
4937
4938 __le32 num_noa_descriptors;
4939
4940
4941
4942
4943 __le32 disable_hw_ack;
4944
4945 struct wmi_p2p_noa_descriptor noa_descriptors[2];
4946 } __packed;
4947
4948 struct wmi_vdev_restart_request_cmd {
4949 struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
4950 } __packed;
4951
4952 struct wmi_vdev_start_request_arg {
4953 u32 vdev_id;
4954 struct wmi_channel_arg channel;
4955 u32 bcn_intval;
4956 u32 dtim_period;
4957 u8 *ssid;
4958 u32 ssid_len;
4959 u32 bcn_tx_rate;
4960 u32 bcn_tx_power;
4961 bool disable_hw_ack;
4962 bool hidden_ssid;
4963 bool pmf_enabled;
4964 };
4965
4966 struct wmi_vdev_delete_cmd {
4967
4968 __le32 vdev_id;
4969 } __packed;
4970
4971 struct wmi_vdev_up_cmd {
4972 __le32 vdev_id;
4973 __le32 vdev_assoc_id;
4974 struct wmi_mac_addr vdev_bssid;
4975 } __packed;
4976
4977 struct wmi_vdev_stop_cmd {
4978 __le32 vdev_id;
4979 } __packed;
4980
4981 struct wmi_vdev_down_cmd {
4982 __le32 vdev_id;
4983 } __packed;
4984
4985 struct wmi_vdev_standby_response_cmd {
4986
4987 __le32 vdev_id;
4988 } __packed;
4989
4990 struct wmi_vdev_resume_response_cmd {
4991
4992 __le32 vdev_id;
4993 } __packed;
4994
4995 struct wmi_vdev_set_param_cmd {
4996 __le32 vdev_id;
4997 __le32 param_id;
4998 __le32 param_value;
4999 } __packed;
5000
5001 #define WMI_MAX_KEY_INDEX 3
5002 #define WMI_MAX_KEY_LEN 32
5003
5004 #define WMI_KEY_PAIRWISE 0x00
5005 #define WMI_KEY_GROUP 0x01
5006 #define WMI_KEY_TX_USAGE 0x02
5007
5008 struct wmi_key_seq_counter {
5009 __le32 key_seq_counter_l;
5010 __le32 key_seq_counter_h;
5011 } __packed;
5012
5013 enum wmi_cipher_suites {
5014 WMI_CIPHER_NONE,
5015 WMI_CIPHER_WEP,
5016 WMI_CIPHER_TKIP,
5017 WMI_CIPHER_AES_OCB,
5018 WMI_CIPHER_AES_CCM,
5019 WMI_CIPHER_WAPI,
5020 WMI_CIPHER_CKIP,
5021 WMI_CIPHER_AES_CMAC,
5022 WMI_CIPHER_AES_GCM,
5023 };
5024
5025 enum wmi_tlv_cipher_suites {
5026 WMI_TLV_CIPHER_NONE,
5027 WMI_TLV_CIPHER_WEP,
5028 WMI_TLV_CIPHER_TKIP,
5029 WMI_TLV_CIPHER_AES_OCB,
5030 WMI_TLV_CIPHER_AES_CCM,
5031 WMI_TLV_CIPHER_WAPI,
5032 WMI_TLV_CIPHER_CKIP,
5033 WMI_TLV_CIPHER_AES_CMAC,
5034 WMI_TLV_CIPHER_ANY,
5035 WMI_TLV_CIPHER_AES_GCM,
5036 };
5037
5038 struct wmi_vdev_install_key_cmd {
5039 __le32 vdev_id;
5040 struct wmi_mac_addr peer_macaddr;
5041 __le32 key_idx;
5042 __le32 key_flags;
5043 __le32 key_cipher;
5044 struct wmi_key_seq_counter key_rsc_counter;
5045 struct wmi_key_seq_counter key_global_rsc_counter;
5046 struct wmi_key_seq_counter key_tsc_counter;
5047 u8 wpi_key_rsc_counter[16];
5048 u8 wpi_key_tsc_counter[16];
5049 __le32 key_len;
5050 __le32 key_txmic_len;
5051 __le32 key_rxmic_len;
5052
5053
5054 u8 key_data[];
5055 } __packed;
5056
5057 struct wmi_vdev_install_key_arg {
5058 u32 vdev_id;
5059 const u8 *macaddr;
5060 u32 key_idx;
5061 u32 key_flags;
5062 u32 key_cipher;
5063 u32 key_len;
5064 u32 key_txmic_len;
5065 u32 key_rxmic_len;
5066 const void *key_data;
5067 };
5068
5069
5070
5071
5072
5073
5074
5075
5076
5077
5078
5079
5080
5081
5082 enum wmi_rate_preamble {
5083 WMI_RATE_PREAMBLE_OFDM,
5084 WMI_RATE_PREAMBLE_CCK,
5085 WMI_RATE_PREAMBLE_HT,
5086 WMI_RATE_PREAMBLE_VHT,
5087 };
5088
5089 #define ATH10K_HW_NSS(rate) (1 + (((rate) >> 4) & 0x3))
5090 #define ATH10K_HW_PREAMBLE(rate) (((rate) >> 6) & 0x3)
5091 #define ATH10K_HW_MCS_RATE(rate) ((rate) & 0xf)
5092 #define ATH10K_HW_LEGACY_RATE(rate) ((rate) & 0x3f)
5093 #define ATH10K_HW_BW(flags) (((flags) >> 3) & 0x3)
5094 #define ATH10K_HW_GI(flags) (((flags) >> 5) & 0x1)
5095 #define ATH10K_HW_RATECODE(rate, nss, preamble) \
5096 (((preamble) << 6) | ((nss) << 4) | (rate))
5097 #define ATH10K_HW_AMPDU(flags) ((flags) & 0x1)
5098 #define ATH10K_HW_BA_FAIL(flags) (((flags) >> 1) & 0x3)
5099 #define ATH10K_FW_SKIPPED_RATE_CTRL(flags) (((flags) >> 6) & 0x1)
5100
5101 #define ATH10K_VHT_MCS_NUM 10
5102 #define ATH10K_BW_NUM 6
5103 #define ATH10K_NSS_NUM 4
5104 #define ATH10K_LEGACY_NUM 12
5105 #define ATH10K_GI_NUM 2
5106 #define ATH10K_HT_MCS_NUM 32
5107 #define ATH10K_RATE_TABLE_NUM 320
5108 #define ATH10K_RATE_INFO_FLAGS_SGI_BIT 2
5109
5110
5111 #define WMI_FIXED_RATE_NONE (0xff)
5112
5113 struct wmi_peer_param_map {
5114 u32 smps_state;
5115 u32 ampdu;
5116 u32 authorize;
5117 u32 chan_width;
5118 u32 nss;
5119 u32 use_4addr;
5120 u32 membership;
5121 u32 use_fixed_power;
5122 u32 user_pos;
5123 u32 crit_proto_hint_enabled;
5124 u32 tx_fail_cnt_thr;
5125 u32 set_hw_retry_cts2s;
5126 u32 ibss_atim_win_len;
5127 u32 debug;
5128 u32 phymode;
5129 u32 dummy_var;
5130 };
5131
5132 struct wmi_vdev_param_map {
5133 u32 rts_threshold;
5134 u32 fragmentation_threshold;
5135 u32 beacon_interval;
5136 u32 listen_interval;
5137 u32 multicast_rate;
5138 u32 mgmt_tx_rate;
5139 u32 slot_time;
5140 u32 preamble;
5141 u32 swba_time;
5142 u32 wmi_vdev_stats_update_period;
5143 u32 wmi_vdev_pwrsave_ageout_time;
5144 u32 wmi_vdev_host_swba_interval;
5145 u32 dtim_period;
5146 u32 wmi_vdev_oc_scheduler_air_time_limit;
5147 u32 wds;
5148 u32 atim_window;
5149 u32 bmiss_count_max;
5150 u32 bmiss_first_bcnt;
5151 u32 bmiss_final_bcnt;
5152 u32 feature_wmm;
5153 u32 chwidth;
5154 u32 chextoffset;
5155 u32 disable_htprotection;
5156 u32 sta_quickkickout;
5157 u32 mgmt_rate;
5158 u32 protection_mode;
5159 u32 fixed_rate;
5160 u32 sgi;
5161 u32 ldpc;
5162 u32 tx_stbc;
5163 u32 rx_stbc;
5164 u32 intra_bss_fwd;
5165 u32 def_keyid;
5166 u32 nss;
5167 u32 bcast_data_rate;
5168 u32 mcast_data_rate;
5169 u32 mcast_indicate;
5170 u32 dhcp_indicate;
5171 u32 unknown_dest_indicate;
5172 u32 ap_keepalive_min_idle_inactive_time_secs;
5173 u32 ap_keepalive_max_idle_inactive_time_secs;
5174 u32 ap_keepalive_max_unresponsive_time_secs;
5175 u32 ap_enable_nawds;
5176 u32 mcast2ucast_set;
5177 u32 enable_rtscts;
5178 u32 txbf;
5179 u32 packet_powersave;
5180 u32 drop_unencry;
5181 u32 tx_encap_type;
5182 u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
5183 u32 rc_num_retries;
5184 u32 cabq_maxdur;
5185 u32 mfptest_set;
5186 u32 rts_fixed_rate;
5187 u32 vht_sgimask;
5188 u32 vht80_ratemask;
5189 u32 early_rx_adjust_enable;
5190 u32 early_rx_tgt_bmiss_num;
5191 u32 early_rx_bmiss_sample_cycle;
5192 u32 early_rx_slop_step;
5193 u32 early_rx_init_slop;
5194 u32 early_rx_adjust_pause;
5195 u32 proxy_sta;
5196 u32 meru_vc;
5197 u32 rx_decap_type;
5198 u32 bw_nss_ratemask;
5199 u32 inc_tsf;
5200 u32 dec_tsf;
5201 u32 disable_4addr_src_lrn;
5202 u32 rtt_responder_role;
5203 };
5204
5205 #define WMI_VDEV_PARAM_UNSUPPORTED 0
5206
5207
5208 enum wmi_vdev_param {
5209
5210 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5211
5212 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5213
5214 WMI_VDEV_PARAM_BEACON_INTERVAL,
5215
5216 WMI_VDEV_PARAM_LISTEN_INTERVAL,
5217
5218 WMI_VDEV_PARAM_MULTICAST_RATE,
5219
5220 WMI_VDEV_PARAM_MGMT_TX_RATE,
5221
5222 WMI_VDEV_PARAM_SLOT_TIME,
5223
5224 WMI_VDEV_PARAM_PREAMBLE,
5225
5226 WMI_VDEV_PARAM_SWBA_TIME,
5227
5228 WMI_VDEV_STATS_UPDATE_PERIOD,
5229
5230 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
5231
5232
5233
5234
5235 WMI_VDEV_HOST_SWBA_INTERVAL,
5236
5237 WMI_VDEV_PARAM_DTIM_PERIOD,
5238
5239
5240
5241
5242 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5243
5244 WMI_VDEV_PARAM_WDS,
5245
5246 WMI_VDEV_PARAM_ATIM_WINDOW,
5247
5248 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
5249
5250 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
5251
5252 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
5253
5254 WMI_VDEV_PARAM_FEATURE_WMM,
5255
5256 WMI_VDEV_PARAM_CHWIDTH,
5257
5258 WMI_VDEV_PARAM_CHEXTOFFSET,
5259
5260 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
5261
5262 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
5263
5264 WMI_VDEV_PARAM_MGMT_RATE,
5265
5266 WMI_VDEV_PARAM_PROTECTION_MODE,
5267
5268 WMI_VDEV_PARAM_FIXED_RATE,
5269
5270 WMI_VDEV_PARAM_SGI,
5271
5272 WMI_VDEV_PARAM_LDPC,
5273
5274 WMI_VDEV_PARAM_TX_STBC,
5275
5276 WMI_VDEV_PARAM_RX_STBC,
5277
5278 WMI_VDEV_PARAM_INTRA_BSS_FWD,
5279
5280 WMI_VDEV_PARAM_DEF_KEYID,
5281
5282 WMI_VDEV_PARAM_NSS,
5283
5284 WMI_VDEV_PARAM_BCAST_DATA_RATE,
5285
5286 WMI_VDEV_PARAM_MCAST_DATA_RATE,
5287
5288 WMI_VDEV_PARAM_MCAST_INDICATE,
5289
5290 WMI_VDEV_PARAM_DHCP_INDICATE,
5291
5292 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5293
5294
5295 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5296
5297
5298
5299
5300
5301
5302
5303
5304
5305
5306
5307 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5308
5309
5310
5311
5312
5313
5314
5315 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5316
5317
5318 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
5319
5320 WMI_VDEV_PARAM_ENABLE_RTSCTS,
5321
5322 WMI_VDEV_PARAM_TXBF,
5323
5324
5325 WMI_VDEV_PARAM_PACKET_POWERSAVE,
5326
5327
5328
5329
5330
5331 WMI_VDEV_PARAM_DROP_UNENCRY,
5332
5333
5334
5335
5336 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
5337 };
5338
5339
5340 enum wmi_10x_vdev_param {
5341
5342 WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5343
5344 WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5345
5346 WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
5347
5348 WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
5349
5350 WMI_10X_VDEV_PARAM_MULTICAST_RATE,
5351
5352 WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
5353
5354 WMI_10X_VDEV_PARAM_SLOT_TIME,
5355
5356 WMI_10X_VDEV_PARAM_PREAMBLE,
5357
5358 WMI_10X_VDEV_PARAM_SWBA_TIME,
5359
5360 WMI_10X_VDEV_STATS_UPDATE_PERIOD,
5361
5362 WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
5363
5364
5365
5366
5367 WMI_10X_VDEV_HOST_SWBA_INTERVAL,
5368
5369 WMI_10X_VDEV_PARAM_DTIM_PERIOD,
5370
5371
5372
5373
5374 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5375
5376 WMI_10X_VDEV_PARAM_WDS,
5377
5378 WMI_10X_VDEV_PARAM_ATIM_WINDOW,
5379
5380 WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
5381
5382 WMI_10X_VDEV_PARAM_FEATURE_WMM,
5383
5384 WMI_10X_VDEV_PARAM_CHWIDTH,
5385
5386 WMI_10X_VDEV_PARAM_CHEXTOFFSET,
5387
5388 WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
5389
5390 WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
5391
5392 WMI_10X_VDEV_PARAM_MGMT_RATE,
5393
5394 WMI_10X_VDEV_PARAM_PROTECTION_MODE,
5395
5396 WMI_10X_VDEV_PARAM_FIXED_RATE,
5397
5398 WMI_10X_VDEV_PARAM_SGI,
5399
5400 WMI_10X_VDEV_PARAM_LDPC,
5401
5402 WMI_10X_VDEV_PARAM_TX_STBC,
5403
5404 WMI_10X_VDEV_PARAM_RX_STBC,
5405
5406 WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
5407
5408 WMI_10X_VDEV_PARAM_DEF_KEYID,
5409
5410 WMI_10X_VDEV_PARAM_NSS,
5411
5412 WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
5413
5414 WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
5415
5416 WMI_10X_VDEV_PARAM_MCAST_INDICATE,
5417
5418 WMI_10X_VDEV_PARAM_DHCP_INDICATE,
5419
5420 WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5421
5422
5423 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5424
5425
5426
5427
5428
5429
5430
5431
5432
5433
5434
5435 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5436
5437
5438
5439
5440
5441
5442
5443 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5444
5445
5446 WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
5447
5448 WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
5449
5450 WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
5451
5452 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
5453
5454
5455 WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
5456 WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
5457 WMI_10X_VDEV_PARAM_MFPTEST_SET,
5458 WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
5459 WMI_10X_VDEV_PARAM_VHT_SGIMASK,
5460 WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
5461 WMI_10X_VDEV_PARAM_TSF_INCREMENT,
5462 };
5463
5464 enum wmi_10_4_vdev_param {
5465 WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5466 WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5467 WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
5468 WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
5469 WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
5470 WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
5471 WMI_10_4_VDEV_PARAM_SLOT_TIME,
5472 WMI_10_4_VDEV_PARAM_PREAMBLE,
5473 WMI_10_4_VDEV_PARAM_SWBA_TIME,
5474 WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
5475 WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
5476 WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
5477 WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
5478 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5479 WMI_10_4_VDEV_PARAM_WDS,
5480 WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
5481 WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
5482 WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
5483 WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
5484 WMI_10_4_VDEV_PARAM_FEATURE_WMM,
5485 WMI_10_4_VDEV_PARAM_CHWIDTH,
5486 WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
5487 WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
5488 WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
5489 WMI_10_4_VDEV_PARAM_MGMT_RATE,
5490 WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
5491 WMI_10_4_VDEV_PARAM_FIXED_RATE,
5492 WMI_10_4_VDEV_PARAM_SGI,
5493 WMI_10_4_VDEV_PARAM_LDPC,
5494 WMI_10_4_VDEV_PARAM_TX_STBC,
5495 WMI_10_4_VDEV_PARAM_RX_STBC,
5496 WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
5497 WMI_10_4_VDEV_PARAM_DEF_KEYID,
5498 WMI_10_4_VDEV_PARAM_NSS,
5499 WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
5500 WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
5501 WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
5502 WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
5503 WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5504 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5505 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5506 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5507 WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
5508 WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
5509 WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
5510 WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
5511 WMI_10_4_VDEV_PARAM_TXBF,
5512 WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
5513 WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
5514 WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
5515 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
5516 WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
5517 WMI_10_4_VDEV_PARAM_MFPTEST_SET,
5518 WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
5519 WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
5520 WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
5521 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
5522 WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
5523 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
5524 WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
5525 WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
5526 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
5527 WMI_10_4_VDEV_PARAM_PROXY_STA,
5528 WMI_10_4_VDEV_PARAM_MERU_VC,
5529 WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
5530 WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
5531 WMI_10_4_VDEV_PARAM_SENSOR_AP,
5532 WMI_10_4_VDEV_PARAM_BEACON_RATE,
5533 WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS,
5534 WMI_10_4_VDEV_PARAM_STA_KICKOUT,
5535 WMI_10_4_VDEV_PARAM_CAPABILITIES,
5536 WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
5537 WMI_10_4_VDEV_PARAM_RX_FILTER,
5538 WMI_10_4_VDEV_PARAM_MGMT_TX_POWER,
5539 WMI_10_4_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
5540 WMI_10_4_VDEV_PARAM_DISABLE_DYN_BW_RTS,
5541 WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
5542 WMI_10_4_VDEV_PARAM_SELFGEN_FIXED_RATE,
5543 WMI_10_4_VDEV_PARAM_AMPDU_SUBFRAME_SIZE_PER_AC,
5544 WMI_10_4_VDEV_PARAM_NSS_VHT160,
5545 WMI_10_4_VDEV_PARAM_NSS_VHT80_80,
5546 WMI_10_4_VDEV_PARAM_AMSDU_SUBFRAME_SIZE_PER_AC,
5547 WMI_10_4_VDEV_PARAM_DISABLE_CABQ,
5548 WMI_10_4_VDEV_PARAM_SIFS_TRIGGER_RATE,
5549 WMI_10_4_VDEV_PARAM_TX_POWER,
5550 WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
5551 WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
5552 };
5553
5554 #define WMI_VDEV_DISABLE_4_ADDR_SRC_LRN 1
5555
5556 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
5557 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
5558 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
5559 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
5560
5561 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4
5562 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
5563 #define WMI_TXBF_CONF_IMPLICIT_BF BIT(7)
5564 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8
5565 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0xf00
5566
5567
5568 #define WMI_VDEV_SLOT_TIME_LONG 0x1
5569
5570 #define WMI_VDEV_SLOT_TIME_SHORT 0x2
5571
5572 #define WMI_VDEV_PREAMBLE_LONG 0x1
5573
5574 #define WMI_VDEV_PREAMBLE_SHORT 0x2
5575
5576 enum wmi_start_event_param {
5577 WMI_VDEV_RESP_START_EVENT = 0,
5578 WMI_VDEV_RESP_RESTART_EVENT,
5579 };
5580
5581 struct wmi_vdev_start_response_event {
5582 __le32 vdev_id;
5583 __le32 req_id;
5584 __le32 resp_type;
5585 __le32 status;
5586 } __packed;
5587
5588 struct wmi_vdev_standby_req_event {
5589
5590 __le32 vdev_id;
5591 } __packed;
5592
5593 struct wmi_vdev_resume_req_event {
5594
5595 __le32 vdev_id;
5596 } __packed;
5597
5598 struct wmi_vdev_stopped_event {
5599
5600 __le32 vdev_id;
5601 } __packed;
5602
5603
5604
5605
5606
5607 struct wmi_vdev_simple_event {
5608
5609 __le32 vdev_id;
5610 } __packed;
5611
5612
5613
5614 #define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0
5615
5616
5617 #define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1
5618
5619
5620 #define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2
5621
5622
5623 struct wmi_vdev_spectral_conf_cmd {
5624 __le32 vdev_id;
5625
5626
5627 __le32 scan_count;
5628 __le32 scan_period;
5629 __le32 scan_priority;
5630
5631
5632 __le32 scan_fft_size;
5633 __le32 scan_gc_ena;
5634 __le32 scan_restart_ena;
5635 __le32 scan_noise_floor_ref;
5636 __le32 scan_init_delay;
5637 __le32 scan_nb_tone_thr;
5638 __le32 scan_str_bin_thr;
5639 __le32 scan_wb_rpt_mode;
5640 __le32 scan_rssi_rpt_mode;
5641 __le32 scan_rssi_thr;
5642 __le32 scan_pwr_format;
5643
5644
5645
5646
5647
5648
5649
5650
5651
5652
5653
5654
5655 __le32 scan_rpt_mode;
5656 __le32 scan_bin_scale;
5657 __le32 scan_dbm_adj;
5658 __le32 scan_chn_mask;
5659 } __packed;
5660
5661 struct wmi_vdev_spectral_conf_arg {
5662 u32 vdev_id;
5663 u32 scan_count;
5664 u32 scan_period;
5665 u32 scan_priority;
5666 u32 scan_fft_size;
5667 u32 scan_gc_ena;
5668 u32 scan_restart_ena;
5669 u32 scan_noise_floor_ref;
5670 u32 scan_init_delay;
5671 u32 scan_nb_tone_thr;
5672 u32 scan_str_bin_thr;
5673 u32 scan_wb_rpt_mode;
5674 u32 scan_rssi_rpt_mode;
5675 u32 scan_rssi_thr;
5676 u32 scan_pwr_format;
5677 u32 scan_rpt_mode;
5678 u32 scan_bin_scale;
5679 u32 scan_dbm_adj;
5680 u32 scan_chn_mask;
5681 };
5682
5683 #define WMI_SPECTRAL_ENABLE_DEFAULT 0
5684 #define WMI_SPECTRAL_COUNT_DEFAULT 0
5685 #define WMI_SPECTRAL_PERIOD_DEFAULT 35
5686 #define WMI_SPECTRAL_PRIORITY_DEFAULT 1
5687 #define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
5688 #define WMI_SPECTRAL_GC_ENA_DEFAULT 1
5689 #define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
5690 #define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
5691 #define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
5692 #define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
5693 #define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
5694 #define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
5695 #define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
5696 #define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
5697 #define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
5698 #define WMI_SPECTRAL_RPT_MODE_DEFAULT 2
5699 #define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
5700 #define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
5701 #define WMI_SPECTRAL_CHN_MASK_DEFAULT 1
5702
5703 struct wmi_vdev_spectral_enable_cmd {
5704 __le32 vdev_id;
5705 __le32 trigger_cmd;
5706 __le32 enable_cmd;
5707 } __packed;
5708
5709 #define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
5710 #define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
5711 #define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
5712 #define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
5713
5714
5715 struct wmi_bcn_tx_hdr {
5716 __le32 vdev_id;
5717 __le32 tx_rate;
5718 __le32 tx_power;
5719 __le32 bcn_len;
5720 } __packed;
5721
5722 struct wmi_bcn_tx_cmd {
5723 struct wmi_bcn_tx_hdr hdr;
5724 u8 *bcn[];
5725 } __packed;
5726
5727 struct wmi_bcn_tx_arg {
5728 u32 vdev_id;
5729 u32 tx_rate;
5730 u32 tx_power;
5731 u32 bcn_len;
5732 const void *bcn;
5733 };
5734
5735 enum wmi_bcn_tx_ref_flags {
5736 WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
5737 WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
5738 };
5739
5740
5741
5742
5743 #define WMI_BCN_TX_REF_DEF_ANTENNA 0
5744
5745 struct wmi_bcn_tx_ref_cmd {
5746 __le32 vdev_id;
5747 __le32 data_len;
5748
5749 __le32 data_ptr;
5750
5751 __le32 msdu_id;
5752
5753 __le32 frame_control;
5754
5755 __le32 flags;
5756
5757 __le32 antenna_mask;
5758 } __packed;
5759
5760
5761 #define WMI_BCN_FILTER_ALL 0
5762 #define WMI_BCN_FILTER_NONE 1
5763 #define WMI_BCN_FILTER_RSSI 2
5764 #define WMI_BCN_FILTER_BSSID 3
5765 #define WMI_BCN_FILTER_SSID 4
5766
5767 struct wmi_bcn_filter_rx_cmd {
5768
5769 __le32 bcn_filter_id;
5770
5771 __le32 bcn_filter;
5772
5773 __le32 bcn_filter_len;
5774
5775 u8 *bcn_filter_buf;
5776 } __packed;
5777
5778
5779 struct wmi_bcn_prb_info {
5780
5781 __le32 caps;
5782
5783 __le32 erp;
5784
5785
5786
5787
5788
5789
5790
5791
5792
5793 } __packed;
5794
5795 struct wmi_bcn_tmpl_cmd {
5796
5797 __le32 vdev_id;
5798
5799 __le32 tim_ie_offset;
5800
5801 struct wmi_bcn_prb_info bcn_prb_info;
5802
5803 __le32 buf_len;
5804
5805 u8 data[1];
5806 } __packed;
5807
5808 struct wmi_prb_tmpl_cmd {
5809
5810 __le32 vdev_id;
5811
5812 struct wmi_bcn_prb_info bcn_prb_info;
5813
5814 __le32 buf_len;
5815
5816 u8 data[1];
5817 } __packed;
5818
5819 enum wmi_sta_ps_mode {
5820
5821 WMI_STA_PS_MODE_DISABLED = 0,
5822
5823 WMI_STA_PS_MODE_ENABLED = 1,
5824 };
5825
5826 struct wmi_sta_powersave_mode_cmd {
5827
5828 __le32 vdev_id;
5829
5830
5831
5832
5833
5834 __le32 sta_ps_mode;
5835 } __packed;
5836
5837 enum wmi_csa_offload_en {
5838 WMI_CSA_OFFLOAD_DISABLE = 0,
5839 WMI_CSA_OFFLOAD_ENABLE = 1,
5840 };
5841
5842 struct wmi_csa_offload_enable_cmd {
5843 __le32 vdev_id;
5844 __le32 csa_offload_enable;
5845 } __packed;
5846
5847 struct wmi_csa_offload_chanswitch_cmd {
5848 __le32 vdev_id;
5849 struct wmi_channel chan;
5850 } __packed;
5851
5852
5853
5854
5855
5856
5857
5858 enum wmi_sta_ps_param_rx_wake_policy {
5859
5860
5861
5862
5863
5864
5865 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
5866
5867
5868
5869
5870
5871
5872
5873
5874 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
5875 };
5876
5877
5878
5879
5880
5881
5882
5883
5884
5885 enum wmi_sta_ps_param_tx_wake_threshold {
5886 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
5887 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
5888
5889
5890
5891
5892
5893 };
5894
5895
5896
5897
5898
5899
5900
5901
5902
5903
5904 enum wmi_sta_ps_param_pspoll_count {
5905 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
5906
5907
5908
5909
5910
5911
5912
5913
5914
5915
5916 WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
5917 };
5918
5919
5920
5921
5922
5923
5924
5925 #define WMI_UAPSD_AC_TYPE_DELI 0
5926 #define WMI_UAPSD_AC_TYPE_TRIG 1
5927
5928 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5929 (type == WMI_UAPSD_AC_TYPE_DELI ? 1 << (ac << 1) : 1 << ((ac << 1) + 1))
5930
5931 enum wmi_sta_ps_param_uapsd {
5932 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5933 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5934 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5935 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5936 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5937 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5938 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5939 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5940 };
5941
5942 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
5943
5944 struct wmi_sta_uapsd_auto_trig_param {
5945 __le32 wmm_ac;
5946 __le32 user_priority;
5947 __le32 service_interval;
5948 __le32 suspend_interval;
5949 __le32 delay_interval;
5950 };
5951
5952 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
5953 __le32 vdev_id;
5954 struct wmi_mac_addr peer_macaddr;
5955 __le32 num_ac;
5956 };
5957
5958 struct wmi_sta_uapsd_auto_trig_arg {
5959 u32 wmm_ac;
5960 u32 user_priority;
5961 u32 service_interval;
5962 u32 suspend_interval;
5963 u32 delay_interval;
5964 };
5965
5966 enum wmi_sta_powersave_param {
5967
5968
5969
5970
5971
5972 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
5973
5974
5975
5976
5977
5978
5979 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
5980
5981
5982
5983
5984
5985
5986
5987 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
5988
5989
5990
5991
5992
5993
5994
5995
5996 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
5997
5998
5999
6000
6001
6002
6003 WMI_STA_PS_PARAM_UAPSD = 4,
6004 };
6005
6006 struct wmi_sta_powersave_param_cmd {
6007 __le32 vdev_id;
6008 __le32 param_id;
6009 __le32 param_value;
6010 } __packed;
6011
6012
6013 #define WMI_STA_MIMO_PS_MODE_DISABLE
6014
6015 #define WMI_STA_MIMO_PS_MODE_STATIC
6016
6017 #define WMI_STA_MIMO_PS_MODE_DYNAMIC
6018
6019 struct wmi_sta_mimo_ps_mode_cmd {
6020
6021 __le32 vdev_id;
6022
6023 __le32 mimo_pwrsave_mode;
6024 } __packed;
6025
6026
6027 enum wmi_ap_ps_param_uapsd {
6028 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
6029 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
6030 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
6031 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
6032 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
6033 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
6034 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
6035 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
6036 };
6037
6038
6039 enum wmi_ap_ps_peer_param_max_sp {
6040 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
6041 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
6042 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
6043 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
6044 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
6045 };
6046
6047
6048
6049
6050
6051 enum wmi_ap_ps_peer_param {
6052
6053
6054
6055
6056
6057
6058
6059
6060
6061
6062
6063 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
6064
6065
6066
6067
6068
6069
6070
6071
6072 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
6073
6074
6075 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
6076 };
6077
6078 struct wmi_ap_ps_peer_cmd {
6079
6080 __le32 vdev_id;
6081
6082
6083 struct wmi_mac_addr peer_macaddr;
6084
6085
6086 __le32 param_id;
6087
6088
6089 __le32 param_value;
6090 } __packed;
6091
6092
6093 #define WMI_TIM_BITMAP_ARRAY_SIZE 4
6094
6095 struct wmi_tim_info {
6096 __le32 tim_len;
6097 __le32 tim_mcast;
6098 __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
6099 __le32 tim_changed;
6100 __le32 tim_num_ps_pending;
6101 } __packed;
6102
6103 struct wmi_tim_info_arg {
6104 __le32 tim_len;
6105 __le32 tim_mcast;
6106 const __le32 *tim_bitmap;
6107 __le32 tim_changed;
6108 __le32 tim_num_ps_pending;
6109 } __packed;
6110
6111
6112 #define WMI_P2P_MAX_NOA_DESCRIPTORS 4
6113 #define WMI_P2P_OPPPS_ENABLE_BIT BIT(0)
6114 #define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1
6115 #define WMI_P2P_NOA_CHANGED_BIT BIT(0)
6116
6117 struct wmi_p2p_noa_info {
6118
6119
6120
6121 u8 changed;
6122
6123 u8 index;
6124
6125
6126
6127 u8 ctwindow_oppps;
6128
6129 u8 num_descriptors;
6130
6131 struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
6132 } __packed;
6133
6134 struct wmi_bcn_info {
6135 struct wmi_tim_info tim_info;
6136 struct wmi_p2p_noa_info p2p_noa_info;
6137 } __packed;
6138
6139 struct wmi_host_swba_event {
6140 __le32 vdev_map;
6141 struct wmi_bcn_info bcn_info[];
6142 } __packed;
6143
6144 struct wmi_10_2_4_bcn_info {
6145 struct wmi_tim_info tim_info;
6146
6147 } __packed;
6148
6149 struct wmi_10_2_4_host_swba_event {
6150 __le32 vdev_map;
6151 struct wmi_10_2_4_bcn_info bcn_info[];
6152 } __packed;
6153
6154
6155 #define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
6156
6157 struct wmi_10_4_tim_info {
6158 __le32 tim_len;
6159 __le32 tim_mcast;
6160 __le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
6161 __le32 tim_changed;
6162 __le32 tim_num_ps_pending;
6163 } __packed;
6164
6165 #define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
6166
6167 struct wmi_10_4_p2p_noa_info {
6168
6169
6170
6171 u8 changed;
6172
6173 u8 index;
6174
6175
6176
6177 u8 ctwindow_oppps;
6178
6179 u8 num_descriptors;
6180
6181 struct wmi_p2p_noa_descriptor
6182 noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
6183 } __packed;
6184
6185 struct wmi_10_4_bcn_info {
6186 struct wmi_10_4_tim_info tim_info;
6187 struct wmi_10_4_p2p_noa_info p2p_noa_info;
6188 } __packed;
6189
6190 struct wmi_10_4_host_swba_event {
6191 __le32 vdev_map;
6192 struct wmi_10_4_bcn_info bcn_info[];
6193 } __packed;
6194
6195 #define WMI_MAX_AP_VDEV 16
6196
6197 struct wmi_tbtt_offset_event {
6198 __le32 vdev_map;
6199 __le32 tbttoffset_list[WMI_MAX_AP_VDEV];
6200 } __packed;
6201
6202 struct wmi_peer_create_cmd {
6203 __le32 vdev_id;
6204 struct wmi_mac_addr peer_macaddr;
6205 __le32 peer_type;
6206 } __packed;
6207
6208 enum wmi_peer_type {
6209 WMI_PEER_TYPE_DEFAULT = 0,
6210 WMI_PEER_TYPE_BSS = 1,
6211 WMI_PEER_TYPE_TDLS = 2,
6212 };
6213
6214 struct wmi_peer_delete_cmd {
6215 __le32 vdev_id;
6216 struct wmi_mac_addr peer_macaddr;
6217 } __packed;
6218
6219 struct wmi_peer_flush_tids_cmd {
6220 __le32 vdev_id;
6221 struct wmi_mac_addr peer_macaddr;
6222 __le32 peer_tid_bitmap;
6223 } __packed;
6224
6225 struct wmi_fixed_rate {
6226
6227
6228
6229
6230
6231
6232 __le32 rate_mode;
6233
6234
6235
6236
6237 __le32 rate_series;
6238
6239
6240
6241
6242
6243 __le32 rate_retries;
6244 } __packed;
6245
6246 struct wmi_peer_fixed_rate_cmd {
6247
6248 __le32 vdev_id;
6249
6250 struct wmi_mac_addr peer_macaddr;
6251
6252 struct wmi_fixed_rate peer_fixed_rate;
6253 } __packed;
6254
6255 #define WMI_MGMT_TID 17
6256
6257 struct wmi_addba_clear_resp_cmd {
6258
6259 __le32 vdev_id;
6260
6261 struct wmi_mac_addr peer_macaddr;
6262 } __packed;
6263
6264 struct wmi_addba_send_cmd {
6265
6266 __le32 vdev_id;
6267
6268 struct wmi_mac_addr peer_macaddr;
6269
6270 __le32 tid;
6271
6272 __le32 buffersize;
6273 } __packed;
6274
6275 struct wmi_delba_send_cmd {
6276
6277 __le32 vdev_id;
6278
6279 struct wmi_mac_addr peer_macaddr;
6280
6281 __le32 tid;
6282
6283 __le32 initiator;
6284
6285 __le32 reasoncode;
6286 } __packed;
6287
6288 struct wmi_addba_setresponse_cmd {
6289
6290 __le32 vdev_id;
6291
6292 struct wmi_mac_addr peer_macaddr;
6293
6294 __le32 tid;
6295
6296 __le32 statuscode;
6297 } __packed;
6298
6299 struct wmi_send_singleamsdu_cmd {
6300
6301 __le32 vdev_id;
6302
6303 struct wmi_mac_addr peer_macaddr;
6304
6305 __le32 tid;
6306 } __packed;
6307
6308 enum wmi_peer_smps_state {
6309 WMI_PEER_SMPS_PS_NONE = 0x0,
6310 WMI_PEER_SMPS_STATIC = 0x1,
6311 WMI_PEER_SMPS_DYNAMIC = 0x2
6312 };
6313
6314 enum wmi_peer_chwidth {
6315 WMI_PEER_CHWIDTH_20MHZ = 0,
6316 WMI_PEER_CHWIDTH_40MHZ = 1,
6317 WMI_PEER_CHWIDTH_80MHZ = 2,
6318 WMI_PEER_CHWIDTH_160MHZ = 3,
6319 };
6320
6321 enum wmi_peer_param {
6322 WMI_PEER_SMPS_STATE = 0x1,
6323 WMI_PEER_AMPDU = 0x2,
6324 WMI_PEER_AUTHORIZE = 0x3,
6325 WMI_PEER_CHAN_WIDTH = 0x4,
6326 WMI_PEER_NSS = 0x5,
6327 WMI_PEER_USE_4ADDR = 0x6,
6328 WMI_PEER_USE_FIXED_PWR = 0x8,
6329 WMI_PEER_PARAM_FIXED_RATE = 0x9,
6330 WMI_PEER_DEBUG = 0xa,
6331 WMI_PEER_PHYMODE = 0xd,
6332 WMI_PEER_DUMMY_VAR = 0xff,
6333 };
6334
6335 struct wmi_peer_set_param_cmd {
6336 __le32 vdev_id;
6337 struct wmi_mac_addr peer_macaddr;
6338 __le32 param_id;
6339 __le32 param_value;
6340 } __packed;
6341
6342 #define MAX_SUPPORTED_RATES 128
6343
6344 struct wmi_rate_set {
6345
6346 __le32 num_rates;
6347
6348
6349
6350
6351
6352 __le32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
6353 } __packed;
6354
6355 struct wmi_rate_set_arg {
6356 unsigned int num_rates;
6357 u8 rates[MAX_SUPPORTED_RATES];
6358 };
6359
6360
6361
6362
6363
6364
6365 struct wmi_vht_rate_set {
6366 __le32 rx_max_rate;
6367 __le32 rx_mcs_set;
6368 __le32 tx_max_rate;
6369 __le32 tx_mcs_set;
6370 } __packed;
6371
6372 struct wmi_vht_rate_set_arg {
6373 u32 rx_max_rate;
6374 u32 rx_mcs_set;
6375 u32 tx_max_rate;
6376 u32 tx_mcs_set;
6377 };
6378
6379 struct wmi_peer_set_rates_cmd {
6380
6381 struct wmi_mac_addr peer_macaddr;
6382
6383 struct wmi_rate_set peer_legacy_rates;
6384
6385 struct wmi_rate_set peer_ht_rates;
6386 } __packed;
6387
6388 struct wmi_peer_set_q_empty_callback_cmd {
6389
6390 __le32 vdev_id;
6391
6392 struct wmi_mac_addr peer_macaddr;
6393 __le32 callback_enable;
6394 } __packed;
6395
6396 struct wmi_peer_flags_map {
6397 u32 auth;
6398 u32 qos;
6399 u32 need_ptk_4_way;
6400 u32 need_gtk_2_way;
6401 u32 apsd;
6402 u32 ht;
6403 u32 bw40;
6404 u32 stbc;
6405 u32 ldbc;
6406 u32 dyn_mimops;
6407 u32 static_mimops;
6408 u32 spatial_mux;
6409 u32 vht;
6410 u32 bw80;
6411 u32 vht_2g;
6412 u32 pmf;
6413 u32 bw160;
6414 };
6415
6416 enum wmi_peer_flags {
6417 WMI_PEER_AUTH = 0x00000001,
6418 WMI_PEER_QOS = 0x00000002,
6419 WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
6420 WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
6421 WMI_PEER_APSD = 0x00000800,
6422 WMI_PEER_HT = 0x00001000,
6423 WMI_PEER_40MHZ = 0x00002000,
6424 WMI_PEER_STBC = 0x00008000,
6425 WMI_PEER_LDPC = 0x00010000,
6426 WMI_PEER_DYN_MIMOPS = 0x00020000,
6427 WMI_PEER_STATIC_MIMOPS = 0x00040000,
6428 WMI_PEER_SPATIAL_MUX = 0x00200000,
6429 WMI_PEER_VHT = 0x02000000,
6430 WMI_PEER_80MHZ = 0x04000000,
6431 WMI_PEER_VHT_2G = 0x08000000,
6432 WMI_PEER_PMF = 0x10000000,
6433 WMI_PEER_160MHZ = 0x20000000
6434 };
6435
6436 enum wmi_10x_peer_flags {
6437 WMI_10X_PEER_AUTH = 0x00000001,
6438 WMI_10X_PEER_QOS = 0x00000002,
6439 WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004,
6440 WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010,
6441 WMI_10X_PEER_APSD = 0x00000800,
6442 WMI_10X_PEER_HT = 0x00001000,
6443 WMI_10X_PEER_40MHZ = 0x00002000,
6444 WMI_10X_PEER_STBC = 0x00008000,
6445 WMI_10X_PEER_LDPC = 0x00010000,
6446 WMI_10X_PEER_DYN_MIMOPS = 0x00020000,
6447 WMI_10X_PEER_STATIC_MIMOPS = 0x00040000,
6448 WMI_10X_PEER_SPATIAL_MUX = 0x00200000,
6449 WMI_10X_PEER_VHT = 0x02000000,
6450 WMI_10X_PEER_80MHZ = 0x04000000,
6451 WMI_10X_PEER_160MHZ = 0x20000000
6452 };
6453
6454 enum wmi_10_2_peer_flags {
6455 WMI_10_2_PEER_AUTH = 0x00000001,
6456 WMI_10_2_PEER_QOS = 0x00000002,
6457 WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004,
6458 WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010,
6459 WMI_10_2_PEER_APSD = 0x00000800,
6460 WMI_10_2_PEER_HT = 0x00001000,
6461 WMI_10_2_PEER_40MHZ = 0x00002000,
6462 WMI_10_2_PEER_STBC = 0x00008000,
6463 WMI_10_2_PEER_LDPC = 0x00010000,
6464 WMI_10_2_PEER_DYN_MIMOPS = 0x00020000,
6465 WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000,
6466 WMI_10_2_PEER_SPATIAL_MUX = 0x00200000,
6467 WMI_10_2_PEER_VHT = 0x02000000,
6468 WMI_10_2_PEER_80MHZ = 0x04000000,
6469 WMI_10_2_PEER_VHT_2G = 0x08000000,
6470 WMI_10_2_PEER_PMF = 0x10000000,
6471 WMI_10_2_PEER_160MHZ = 0x20000000
6472 };
6473
6474
6475
6476
6477
6478
6479
6480
6481 #define WMI_RC_DS_FLAG 0x01
6482 #define WMI_RC_CW40_FLAG 0x02
6483 #define WMI_RC_SGI_FLAG 0x04
6484 #define WMI_RC_HT_FLAG 0x08
6485 #define WMI_RC_RTSCTS_FLAG 0x10
6486 #define WMI_RC_TX_STBC_FLAG 0x20
6487 #define WMI_RC_RX_STBC_FLAG 0xC0
6488 #define WMI_RC_RX_STBC_FLAG_S 6
6489 #define WMI_RC_WEP_TKIP_FLAG 0x100
6490 #define WMI_RC_TS_FLAG 0x200
6491 #define WMI_RC_UAPSD_FLAG 0x400
6492
6493
6494 #define ATH10K_MAX_HW_LISTEN_INTERVAL 5
6495
6496 struct wmi_common_peer_assoc_complete_cmd {
6497 struct wmi_mac_addr peer_macaddr;
6498 __le32 vdev_id;
6499 __le32 peer_new_assoc;
6500 __le32 peer_associd;
6501 __le32 peer_flags;
6502 __le32 peer_caps;
6503 __le32 peer_listen_intval;
6504 __le32 peer_ht_caps;
6505 __le32 peer_max_mpdu;
6506 __le32 peer_mpdu_density;
6507 __le32 peer_rate_caps;
6508 struct wmi_rate_set peer_legacy_rates;
6509 struct wmi_rate_set peer_ht_rates;
6510 __le32 peer_nss;
6511 __le32 peer_vht_caps;
6512 __le32 peer_phymode;
6513 struct wmi_vht_rate_set peer_vht_rates;
6514 };
6515
6516 struct wmi_main_peer_assoc_complete_cmd {
6517 struct wmi_common_peer_assoc_complete_cmd cmd;
6518
6519
6520
6521
6522 __le32 peer_ht_info[2];
6523 } __packed;
6524
6525 struct wmi_10_1_peer_assoc_complete_cmd {
6526 struct wmi_common_peer_assoc_complete_cmd cmd;
6527 } __packed;
6528
6529 #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
6530 #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
6531 #define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
6532 #define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
6533
6534 struct wmi_10_2_peer_assoc_complete_cmd {
6535 struct wmi_common_peer_assoc_complete_cmd cmd;
6536 __le32 info0;
6537 } __packed;
6538
6539
6540 #define WMI_PEER_NSS_MAP_ENABLE BIT(31)
6541 #define WMI_PEER_NSS_160MHZ_MASK GENMASK(2, 0)
6542 #define WMI_PEER_NSS_80_80MHZ_MASK GENMASK(5, 3)
6543
6544 struct wmi_10_4_peer_assoc_complete_cmd {
6545 struct wmi_10_2_peer_assoc_complete_cmd cmd;
6546 __le32 peer_bw_rxnss_override;
6547 } __packed;
6548
6549 struct wmi_peer_assoc_complete_arg {
6550 u8 addr[ETH_ALEN];
6551 u32 vdev_id;
6552 bool peer_reassoc;
6553 u16 peer_aid;
6554 u32 peer_flags;
6555 u16 peer_caps;
6556 u32 peer_listen_intval;
6557 u32 peer_ht_caps;
6558 u32 peer_max_mpdu;
6559 u32 peer_mpdu_density;
6560 u32 peer_rate_caps;
6561 struct wmi_rate_set_arg peer_legacy_rates;
6562 struct wmi_rate_set_arg peer_ht_rates;
6563 u32 peer_num_spatial_streams;
6564 u32 peer_vht_caps;
6565 enum wmi_phy_mode peer_phymode;
6566 struct wmi_vht_rate_set_arg peer_vht_rates;
6567 u32 peer_bw_rxnss_override;
6568 };
6569
6570 struct wmi_peer_add_wds_entry_cmd {
6571
6572 struct wmi_mac_addr peer_macaddr;
6573
6574 struct wmi_mac_addr wds_macaddr;
6575 } __packed;
6576
6577 struct wmi_peer_remove_wds_entry_cmd {
6578
6579 struct wmi_mac_addr wds_macaddr;
6580 } __packed;
6581
6582 struct wmi_peer_q_empty_callback_event {
6583
6584 struct wmi_mac_addr peer_macaddr;
6585 } __packed;
6586
6587
6588
6589
6590 struct wmi_chan_info_event {
6591 __le32 err_code;
6592 __le32 freq;
6593 __le32 cmd_flags;
6594 __le32 noise_floor;
6595 __le32 rx_clear_count;
6596 __le32 cycle_count;
6597 } __packed;
6598
6599 struct wmi_10_4_chan_info_event {
6600 __le32 err_code;
6601 __le32 freq;
6602 __le32 cmd_flags;
6603 __le32 noise_floor;
6604 __le32 rx_clear_count;
6605 __le32 cycle_count;
6606 __le32 chan_tx_pwr_range;
6607 __le32 chan_tx_pwr_tp;
6608 __le32 rx_frame_count;
6609 } __packed;
6610
6611 struct wmi_peer_sta_kickout_event {
6612 struct wmi_mac_addr peer_macaddr;
6613 } __packed;
6614
6615 #define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
6616 #define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
6617
6618
6619 #define BCN_FLT_MAX_SUPPORTED_IES 256
6620 #define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32)
6621
6622 struct bss_bcn_stats {
6623 __le32 vdev_id;
6624 __le32 bss_bcnsdropped;
6625 __le32 bss_bcnsdelivered;
6626 } __packed;
6627
6628 struct bcn_filter_stats {
6629 __le32 bcns_dropped;
6630 __le32 bcns_delivered;
6631 __le32 activefilters;
6632 struct bss_bcn_stats bss_stats;
6633 } __packed;
6634
6635 struct wmi_add_bcn_filter_cmd {
6636 u32 vdev_id;
6637 u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
6638 } __packed;
6639
6640 enum wmi_sta_keepalive_method {
6641 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
6642 WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
6643 };
6644
6645 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
6646
6647
6648 #define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
6649
6650
6651 struct wmi_sta_keepalive_arp_resp {
6652 __be32 src_ip4_addr;
6653 __be32 dest_ip4_addr;
6654 struct wmi_mac_addr dest_mac_addr;
6655 } __packed;
6656
6657 struct wmi_sta_keepalive_cmd {
6658 __le32 vdev_id;
6659 __le32 enabled;
6660 __le32 method;
6661 __le32 interval;
6662 struct wmi_sta_keepalive_arp_resp arp_resp;
6663 } __packed;
6664
6665 struct wmi_sta_keepalive_arg {
6666 u32 vdev_id;
6667 u32 enabled;
6668 u32 method;
6669 u32 interval;
6670 __be32 src_ip4_addr;
6671 __be32 dest_ip4_addr;
6672 const u8 dest_mac_addr[ETH_ALEN];
6673 };
6674
6675 enum wmi_force_fw_hang_type {
6676 WMI_FORCE_FW_HANG_ASSERT = 1,
6677 WMI_FORCE_FW_HANG_NO_DETECT,
6678 WMI_FORCE_FW_HANG_CTRL_EP_FULL,
6679 WMI_FORCE_FW_HANG_EMPTY_POINT,
6680 WMI_FORCE_FW_HANG_STACK_OVERFLOW,
6681 WMI_FORCE_FW_HANG_INFINITE_LOOP,
6682 };
6683
6684 #define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
6685
6686 struct wmi_force_fw_hang_cmd {
6687 __le32 type;
6688 __le32 delay_ms;
6689 } __packed;
6690
6691 enum wmi_pdev_reset_mode_type {
6692 WMI_RST_MODE_TX_FLUSH = 1,
6693 WMI_RST_MODE_WARM_RESET,
6694 WMI_RST_MODE_COLD_RESET,
6695 WMI_RST_MODE_WARM_RESET_RESTORE_CAL,
6696 WMI_RST_MODE_COLD_RESET_RESTORE_CAL,
6697 WMI_RST_MODE_MAX,
6698 };
6699
6700 enum ath10k_dbglog_level {
6701 ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
6702 ATH10K_DBGLOG_LEVEL_INFO = 1,
6703 ATH10K_DBGLOG_LEVEL_WARN = 2,
6704 ATH10K_DBGLOG_LEVEL_ERR = 3,
6705 };
6706
6707
6708 #define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0
6709 #define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff
6710
6711
6712 #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16
6713 #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000
6714
6715
6716 #define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17
6717 #define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000
6718
6719
6720 #define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20
6721 #define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000
6722
6723
6724
6725
6726
6727 #define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28
6728 #define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000
6729
6730
6731
6732
6733
6734 struct wmi_dbglog_cfg_cmd {
6735
6736 __le32 module_enable;
6737
6738
6739 __le32 config_enable;
6740
6741
6742 __le32 module_valid;
6743
6744
6745 __le32 config_valid;
6746 } __packed;
6747
6748 struct wmi_10_4_dbglog_cfg_cmd {
6749
6750 __le64 module_enable;
6751
6752
6753 __le32 config_enable;
6754
6755
6756 __le64 module_valid;
6757
6758
6759 __le32 config_valid;
6760 } __packed;
6761
6762 enum wmi_roam_reason {
6763 WMI_ROAM_REASON_BETTER_AP = 1,
6764 WMI_ROAM_REASON_BEACON_MISS = 2,
6765 WMI_ROAM_REASON_LOW_RSSI = 3,
6766 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
6767 WMI_ROAM_REASON_HO_FAILED = 5,
6768
6769
6770 WMI_ROAM_REASON_MAX,
6771 };
6772
6773 struct wmi_roam_ev {
6774 __le32 vdev_id;
6775 __le32 reason;
6776 } __packed;
6777
6778 #define ATH10K_FRAGMT_THRESHOLD_MIN 540
6779 #define ATH10K_FRAGMT_THRESHOLD_MAX 2346
6780
6781 #define WMI_MAX_EVENT 0x1000
6782
6783 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
6784
6785
6786 #define ATH10K_DEFAULT_ATIM 0
6787
6788 #define WMI_MAX_MEM_REQS 16
6789
6790 struct wmi_scan_ev_arg {
6791 __le32 event_type;
6792 __le32 reason;
6793 __le32 channel_freq;
6794 __le32 scan_req_id;
6795 __le32 scan_id;
6796 __le32 vdev_id;
6797 };
6798
6799 struct mgmt_tx_compl_params {
6800 u32 desc_id;
6801 u32 status;
6802 u32 ppdu_id;
6803 int ack_rssi;
6804 };
6805
6806 struct wmi_tlv_mgmt_tx_compl_ev_arg {
6807 __le32 desc_id;
6808 __le32 status;
6809 __le32 pdev_id;
6810 __le32 ppdu_id;
6811 __le32 ack_rssi;
6812 };
6813
6814 struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg {
6815 __le32 num_reports;
6816 const __le32 *desc_ids;
6817 const __le32 *status;
6818 const __le32 *ppdu_ids;
6819 const __le32 *ack_rssi;
6820 };
6821
6822 struct wmi_peer_delete_resp_ev_arg {
6823 __le32 vdev_id;
6824 struct wmi_mac_addr peer_addr;
6825 };
6826
6827 #define WMI_MGMT_RX_NUM_RSSI 4
6828 struct wmi_mgmt_rx_ev_arg {
6829 __le32 channel;
6830 __le32 snr;
6831 __le32 rate;
6832 __le32 phy_mode;
6833 __le32 buf_len;
6834 __le32 status;
6835 struct wmi_mgmt_rx_ext_info ext_info;
6836 __le32 rssi[WMI_MGMT_RX_NUM_RSSI];
6837 };
6838
6839 struct wmi_ch_info_ev_arg {
6840 __le32 err_code;
6841 __le32 freq;
6842 __le32 cmd_flags;
6843 __le32 noise_floor;
6844 __le32 rx_clear_count;
6845 __le32 cycle_count;
6846 __le32 chan_tx_pwr_range;
6847 __le32 chan_tx_pwr_tp;
6848 __le32 rx_frame_count;
6849 __le32 my_bss_rx_cycle_count;
6850 __le32 rx_11b_mode_data_duration;
6851 __le32 tx_frame_cnt;
6852 __le32 mac_clk_mhz;
6853 };
6854
6855
6856 enum wmi_vdev_start_status {
6857 WMI_VDEV_START_OK = 0,
6858 WMI_VDEV_START_CHAN_INVALID,
6859 };
6860
6861 struct wmi_vdev_start_ev_arg {
6862 __le32 vdev_id;
6863 __le32 req_id;
6864 __le32 resp_type;
6865 __le32 status;
6866 };
6867
6868 struct wmi_peer_kick_ev_arg {
6869 const u8 *mac_addr;
6870 };
6871
6872 struct wmi_swba_ev_arg {
6873 __le32 vdev_map;
6874 struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
6875 const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
6876 };
6877
6878 struct wmi_phyerr_ev_arg {
6879 u32 tsf_timestamp;
6880 u16 freq1;
6881 u16 freq2;
6882 u8 rssi_combined;
6883 u8 chan_width_mhz;
6884 u8 phy_err_code;
6885 u16 nf_chains[4];
6886 u32 buf_len;
6887 const u8 *buf;
6888 u8 hdr_len;
6889 };
6890
6891 struct wmi_phyerr_hdr_arg {
6892 u32 num_phyerrs;
6893 u32 tsf_l32;
6894 u32 tsf_u32;
6895 u32 buf_len;
6896 const void *phyerrs;
6897 };
6898
6899 struct wmi_dfs_status_ev_arg {
6900 u32 status;
6901 };
6902
6903 struct wmi_svc_rdy_ev_arg {
6904 __le32 min_tx_power;
6905 __le32 max_tx_power;
6906 __le32 ht_cap;
6907 __le32 vht_cap;
6908 __le32 vht_supp_mcs;
6909 __le32 sw_ver0;
6910 __le32 sw_ver1;
6911 __le32 fw_build;
6912 __le32 phy_capab;
6913 __le32 num_rf_chains;
6914 __le32 eeprom_rd;
6915 __le32 num_mem_reqs;
6916 __le32 low_2ghz_chan;
6917 __le32 high_2ghz_chan;
6918 __le32 low_5ghz_chan;
6919 __le32 high_5ghz_chan;
6920 __le32 sys_cap_info;
6921 const __le32 *service_map;
6922 size_t service_map_len;
6923 const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
6924 };
6925
6926 struct wmi_svc_avail_ev_arg {
6927 bool service_map_ext_valid;
6928 __le32 service_map_ext_len;
6929 const __le32 *service_map_ext;
6930 };
6931
6932 struct wmi_rdy_ev_arg {
6933 __le32 sw_version;
6934 __le32 abi_version;
6935 __le32 status;
6936 const u8 *mac_addr;
6937 };
6938
6939 struct wmi_roam_ev_arg {
6940 __le32 vdev_id;
6941 __le32 reason;
6942 __le32 rssi;
6943 };
6944
6945 struct wmi_echo_ev_arg {
6946 __le32 value;
6947 };
6948
6949 struct wmi_pdev_temperature_event {
6950
6951 __le32 temperature;
6952 } __packed;
6953
6954 struct wmi_pdev_bss_chan_info_event {
6955 __le32 freq;
6956 __le32 noise_floor;
6957 __le64 cycle_busy;
6958 __le64 cycle_total;
6959 __le64 cycle_tx;
6960 __le64 cycle_rx;
6961 __le64 cycle_rx_bss;
6962 __le32 reserved;
6963 } __packed;
6964
6965
6966 enum wmi_wow_wakeup_event {
6967 WOW_BMISS_EVENT = 0,
6968 WOW_BETTER_AP_EVENT,
6969 WOW_DEAUTH_RECVD_EVENT,
6970 WOW_MAGIC_PKT_RECVD_EVENT,
6971 WOW_GTK_ERR_EVENT,
6972 WOW_FOURWAY_HSHAKE_EVENT,
6973 WOW_EAPOL_RECVD_EVENT,
6974 WOW_NLO_DETECTED_EVENT,
6975 WOW_DISASSOC_RECVD_EVENT,
6976 WOW_PATTERN_MATCH_EVENT,
6977 WOW_CSA_IE_EVENT,
6978 WOW_PROBE_REQ_WPS_IE_EVENT,
6979 WOW_AUTH_REQ_EVENT,
6980 WOW_ASSOC_REQ_EVENT,
6981 WOW_HTT_EVENT,
6982 WOW_RA_MATCH_EVENT,
6983 WOW_HOST_AUTO_SHUTDOWN_EVENT,
6984 WOW_IOAC_MAGIC_EVENT,
6985 WOW_IOAC_SHORT_EVENT,
6986 WOW_IOAC_EXTEND_EVENT,
6987 WOW_IOAC_TIMER_EVENT,
6988 WOW_DFS_PHYERR_RADAR_EVENT,
6989 WOW_BEACON_EVENT,
6990 WOW_CLIENT_KICKOUT_EVENT,
6991 WOW_EVENT_MAX,
6992 };
6993
6994 #define C2S(x) case x: return #x
6995
6996 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
6997 {
6998 switch (ev) {
6999 C2S(WOW_BMISS_EVENT);
7000 C2S(WOW_BETTER_AP_EVENT);
7001 C2S(WOW_DEAUTH_RECVD_EVENT);
7002 C2S(WOW_MAGIC_PKT_RECVD_EVENT);
7003 C2S(WOW_GTK_ERR_EVENT);
7004 C2S(WOW_FOURWAY_HSHAKE_EVENT);
7005 C2S(WOW_EAPOL_RECVD_EVENT);
7006 C2S(WOW_NLO_DETECTED_EVENT);
7007 C2S(WOW_DISASSOC_RECVD_EVENT);
7008 C2S(WOW_PATTERN_MATCH_EVENT);
7009 C2S(WOW_CSA_IE_EVENT);
7010 C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
7011 C2S(WOW_AUTH_REQ_EVENT);
7012 C2S(WOW_ASSOC_REQ_EVENT);
7013 C2S(WOW_HTT_EVENT);
7014 C2S(WOW_RA_MATCH_EVENT);
7015 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
7016 C2S(WOW_IOAC_MAGIC_EVENT);
7017 C2S(WOW_IOAC_SHORT_EVENT);
7018 C2S(WOW_IOAC_EXTEND_EVENT);
7019 C2S(WOW_IOAC_TIMER_EVENT);
7020 C2S(WOW_DFS_PHYERR_RADAR_EVENT);
7021 C2S(WOW_BEACON_EVENT);
7022 C2S(WOW_CLIENT_KICKOUT_EVENT);
7023 C2S(WOW_EVENT_MAX);
7024 default:
7025 return NULL;
7026 }
7027 }
7028
7029 enum wmi_wow_wake_reason {
7030 WOW_REASON_UNSPECIFIED = -1,
7031 WOW_REASON_NLOD = 0,
7032 WOW_REASON_AP_ASSOC_LOST,
7033 WOW_REASON_LOW_RSSI,
7034 WOW_REASON_DEAUTH_RECVD,
7035 WOW_REASON_DISASSOC_RECVD,
7036 WOW_REASON_GTK_HS_ERR,
7037 WOW_REASON_EAP_REQ,
7038 WOW_REASON_FOURWAY_HS_RECV,
7039 WOW_REASON_TIMER_INTR_RECV,
7040 WOW_REASON_PATTERN_MATCH_FOUND,
7041 WOW_REASON_RECV_MAGIC_PATTERN,
7042 WOW_REASON_P2P_DISC,
7043 WOW_REASON_WLAN_HB,
7044 WOW_REASON_CSA_EVENT,
7045 WOW_REASON_PROBE_REQ_WPS_IE_RECV,
7046 WOW_REASON_AUTH_REQ_RECV,
7047 WOW_REASON_ASSOC_REQ_RECV,
7048 WOW_REASON_HTT_EVENT,
7049 WOW_REASON_RA_MATCH,
7050 WOW_REASON_HOST_AUTO_SHUTDOWN,
7051 WOW_REASON_IOAC_MAGIC_EVENT,
7052 WOW_REASON_IOAC_SHORT_EVENT,
7053 WOW_REASON_IOAC_EXTEND_EVENT,
7054 WOW_REASON_IOAC_TIMER_EVENT,
7055 WOW_REASON_ROAM_HO,
7056 WOW_REASON_DFS_PHYERR_RADADR_EVENT,
7057 WOW_REASON_BEACON_RECV,
7058 WOW_REASON_CLIENT_KICKOUT_EVENT,
7059 WOW_REASON_DEBUG_TEST = 0xFF,
7060 };
7061
7062 static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
7063 {
7064 switch (reason) {
7065 C2S(WOW_REASON_UNSPECIFIED);
7066 C2S(WOW_REASON_NLOD);
7067 C2S(WOW_REASON_AP_ASSOC_LOST);
7068 C2S(WOW_REASON_LOW_RSSI);
7069 C2S(WOW_REASON_DEAUTH_RECVD);
7070 C2S(WOW_REASON_DISASSOC_RECVD);
7071 C2S(WOW_REASON_GTK_HS_ERR);
7072 C2S(WOW_REASON_EAP_REQ);
7073 C2S(WOW_REASON_FOURWAY_HS_RECV);
7074 C2S(WOW_REASON_TIMER_INTR_RECV);
7075 C2S(WOW_REASON_PATTERN_MATCH_FOUND);
7076 C2S(WOW_REASON_RECV_MAGIC_PATTERN);
7077 C2S(WOW_REASON_P2P_DISC);
7078 C2S(WOW_REASON_WLAN_HB);
7079 C2S(WOW_REASON_CSA_EVENT);
7080 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
7081 C2S(WOW_REASON_AUTH_REQ_RECV);
7082 C2S(WOW_REASON_ASSOC_REQ_RECV);
7083 C2S(WOW_REASON_HTT_EVENT);
7084 C2S(WOW_REASON_RA_MATCH);
7085 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
7086 C2S(WOW_REASON_IOAC_MAGIC_EVENT);
7087 C2S(WOW_REASON_IOAC_SHORT_EVENT);
7088 C2S(WOW_REASON_IOAC_EXTEND_EVENT);
7089 C2S(WOW_REASON_IOAC_TIMER_EVENT);
7090 C2S(WOW_REASON_ROAM_HO);
7091 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
7092 C2S(WOW_REASON_BEACON_RECV);
7093 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
7094 C2S(WOW_REASON_DEBUG_TEST);
7095 default:
7096 return NULL;
7097 }
7098 }
7099
7100 #undef C2S
7101
7102 struct wmi_wow_ev_arg {
7103 u32 vdev_id;
7104 u32 flag;
7105 enum wmi_wow_wake_reason wake_reason;
7106 u32 data_len;
7107 };
7108
7109 #define WOW_MIN_PATTERN_SIZE 1
7110 #define WOW_MAX_PATTERN_SIZE 148
7111 #define WOW_MAX_PKT_OFFSET 128
7112 #define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \
7113 sizeof(struct rfc1042_hdr))
7114 #define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \
7115 offsetof(struct ieee80211_hdr_3addr, addr1))
7116
7117 enum wmi_tdls_state {
7118 WMI_TDLS_DISABLE,
7119 WMI_TDLS_ENABLE_PASSIVE,
7120 WMI_TDLS_ENABLE_ACTIVE,
7121 WMI_TDLS_ENABLE_ACTIVE_EXTERNAL_CONTROL,
7122 };
7123
7124 enum wmi_tdls_peer_state {
7125 WMI_TDLS_PEER_STATE_PEERING,
7126 WMI_TDLS_PEER_STATE_CONNECTED,
7127 WMI_TDLS_PEER_STATE_TEARDOWN,
7128 };
7129
7130 struct wmi_tdls_peer_update_cmd_arg {
7131 u32 vdev_id;
7132 enum wmi_tdls_peer_state peer_state;
7133 u8 addr[ETH_ALEN];
7134 };
7135
7136 #define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
7137
7138 #define WMI_TDLS_PEER_SP_MASK 0x60
7139 #define WMI_TDLS_PEER_SP_LSB 5
7140
7141 enum wmi_tdls_options {
7142 WMI_TDLS_OFFCHAN_EN = BIT(0),
7143 WMI_TDLS_BUFFER_STA_EN = BIT(1),
7144 WMI_TDLS_SLEEP_STA_EN = BIT(2),
7145 };
7146
7147 enum {
7148 WMI_TDLS_PEER_QOS_AC_VO = BIT(0),
7149 WMI_TDLS_PEER_QOS_AC_VI = BIT(1),
7150 WMI_TDLS_PEER_QOS_AC_BK = BIT(2),
7151 WMI_TDLS_PEER_QOS_AC_BE = BIT(3),
7152 };
7153
7154 struct wmi_tdls_peer_capab_arg {
7155 u8 peer_uapsd_queues;
7156 u8 peer_max_sp;
7157 u32 buff_sta_support;
7158 u32 off_chan_support;
7159 u32 peer_curr_operclass;
7160 u32 self_curr_operclass;
7161 u32 peer_chan_len;
7162 u32 peer_operclass_len;
7163 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7164 u32 is_peer_responder;
7165 u32 pref_offchan_num;
7166 u32 pref_offchan_bw;
7167 };
7168
7169 struct wmi_10_4_tdls_set_state_cmd {
7170 __le32 vdev_id;
7171 __le32 state;
7172 __le32 notification_interval_ms;
7173 __le32 tx_discovery_threshold;
7174 __le32 tx_teardown_threshold;
7175 __le32 rssi_teardown_threshold;
7176 __le32 rssi_delta;
7177 __le32 tdls_options;
7178 __le32 tdls_peer_traffic_ind_window;
7179 __le32 tdls_peer_traffic_response_timeout_ms;
7180 __le32 tdls_puapsd_mask;
7181 __le32 tdls_puapsd_inactivity_time_ms;
7182 __le32 tdls_puapsd_rx_frame_threshold;
7183 __le32 teardown_notification_ms;
7184 __le32 tdls_peer_kickout_threshold;
7185 } __packed;
7186
7187 struct wmi_tdls_peer_capabilities {
7188 __le32 peer_qos;
7189 __le32 buff_sta_support;
7190 __le32 off_chan_support;
7191 __le32 peer_curr_operclass;
7192 __le32 self_curr_operclass;
7193 __le32 peer_chan_len;
7194 __le32 peer_operclass_len;
7195 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7196 __le32 is_peer_responder;
7197 __le32 pref_offchan_num;
7198 __le32 pref_offchan_bw;
7199 struct wmi_channel peer_chan_list[1];
7200 } __packed;
7201
7202 struct wmi_10_4_tdls_peer_update_cmd {
7203 __le32 vdev_id;
7204 struct wmi_mac_addr peer_macaddr;
7205 __le32 peer_state;
7206 __le32 reserved[4];
7207 struct wmi_tdls_peer_capabilities peer_capab;
7208 } __packed;
7209
7210 enum wmi_tdls_peer_reason {
7211 WMI_TDLS_TEARDOWN_REASON_TX,
7212 WMI_TDLS_TEARDOWN_REASON_RSSI,
7213 WMI_TDLS_TEARDOWN_REASON_SCAN,
7214 WMI_TDLS_DISCONNECTED_REASON_PEER_DELETE,
7215 WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT,
7216 WMI_TDLS_TEARDOWN_REASON_BAD_PTR,
7217 WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE,
7218 WMI_TDLS_ENTER_BUF_STA,
7219 WMI_TDLS_EXIT_BUF_STA,
7220 WMI_TDLS_ENTER_BT_BUSY_MODE,
7221 WMI_TDLS_EXIT_BT_BUSY_MODE,
7222 WMI_TDLS_SCAN_STARTED_EVENT,
7223 WMI_TDLS_SCAN_COMPLETED_EVENT,
7224 };
7225
7226 enum wmi_tdls_peer_notification {
7227 WMI_TDLS_SHOULD_DISCOVER,
7228 WMI_TDLS_SHOULD_TEARDOWN,
7229 WMI_TDLS_PEER_DISCONNECTED,
7230 WMI_TDLS_CONNECTION_TRACKER_NOTIFICATION,
7231 };
7232
7233 struct wmi_tdls_peer_event {
7234 struct wmi_mac_addr peer_macaddr;
7235
7236 __le32 peer_status;
7237
7238 __le32 peer_reason;
7239 __le32 vdev_id;
7240 } __packed;
7241
7242 enum wmi_tid_aggr_control_conf {
7243 WMI_TID_CONFIG_AGGR_CONTROL_IGNORE,
7244 WMI_TID_CONFIG_AGGR_CONTROL_ENABLE,
7245 WMI_TID_CONFIG_AGGR_CONTROL_DISABLE,
7246 };
7247
7248 enum wmi_noack_tid_conf {
7249 WMI_NOACK_TID_CONFIG_IGNORE_ACK_POLICY,
7250 WMI_PEER_TID_CONFIG_ACK,
7251 WMI_PEER_TID_CONFIG_NOACK,
7252 };
7253
7254 enum wmi_tid_rate_ctrl_conf {
7255 WMI_TID_CONFIG_RATE_CONTROL_IGNORE,
7256 WMI_TID_CONFIG_RATE_CONTROL_AUTO,
7257 WMI_TID_CONFIG_RATE_CONTROL_FIXED_RATE,
7258 WMI_TID_CONFIG_RATE_CONTROL_DEFAULT_LOWEST_RATE,
7259 WMI_PEER_TID_CONFIG_RATE_UPPER_CAP,
7260 };
7261
7262 enum wmi_tid_rtscts_control_conf {
7263 WMI_TID_CONFIG_RTSCTS_CONTROL_ENABLE,
7264 WMI_TID_CONFIG_RTSCTS_CONTROL_DISABLE,
7265 };
7266
7267 enum wmi_ext_tid_config_map {
7268 WMI_EXT_TID_RTS_CTS_CONFIG = BIT(0),
7269 };
7270
7271 struct wmi_per_peer_per_tid_cfg_arg {
7272 u32 vdev_id;
7273 struct wmi_mac_addr peer_macaddr;
7274 u32 tid;
7275 enum wmi_noack_tid_conf ack_policy;
7276 enum wmi_tid_aggr_control_conf aggr_control;
7277 u8 rate_ctrl;
7278 u32 retry_count;
7279 u32 rcode_flags;
7280 u32 ext_tid_cfg_bitmap;
7281 u32 rtscts_ctrl;
7282 };
7283
7284 struct wmi_peer_per_tid_cfg_cmd {
7285 __le32 vdev_id;
7286 struct wmi_mac_addr peer_macaddr;
7287 __le32 tid;
7288
7289
7290 __le32 ack_policy;
7291
7292
7293 __le32 aggr_control;
7294
7295
7296 __le32 rate_control;
7297 __le32 rcode_flags;
7298 __le32 retry_count;
7299
7300
7301 __le32 ext_tid_cfg_bitmap;
7302
7303
7304 __le32 rtscts_ctrl;
7305 } __packed;
7306
7307 enum wmi_txbf_conf {
7308 WMI_TXBF_CONF_UNSUPPORTED,
7309 WMI_TXBF_CONF_BEFORE_ASSOC,
7310 WMI_TXBF_CONF_AFTER_ASSOC,
7311 };
7312
7313 #define WMI_CCA_DETECT_LEVEL_AUTO 0
7314 #define WMI_CCA_DETECT_MARGIN_AUTO 0
7315
7316 struct wmi_pdev_set_adaptive_cca_params {
7317 __le32 enable;
7318 __le32 cca_detect_level;
7319 __le32 cca_detect_margin;
7320 } __packed;
7321
7322 #define WMI_PNO_MAX_SCHED_SCAN_PLANS 2
7323 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200
7324 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100
7325 #define WMI_PNO_MAX_NETW_CHANNELS 26
7326 #define WMI_PNO_MAX_NETW_CHANNELS_EX 60
7327 #define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID
7328 #define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN
7329
7330
7331 #define WMI_PNO_MAX_PB_REQ_SIZE 450
7332
7333 #define WMI_PNO_24G_DEFAULT_CH 1
7334 #define WMI_PNO_5G_DEFAULT_CH 36
7335
7336 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40
7337 #define WMI_PASSIVE_MAX_CHANNEL_TIME 110
7338
7339
7340 enum wmi_SSID_bcast_type {
7341 BCAST_UNKNOWN = 0,
7342 BCAST_NORMAL = 1,
7343 BCAST_HIDDEN = 2,
7344 };
7345
7346 struct wmi_network_type {
7347 struct wmi_ssid ssid;
7348 u32 authentication;
7349 u32 encryption;
7350 u32 bcast_nw_type;
7351 u8 channel_count;
7352 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX];
7353 s32 rssi_threshold;
7354 } __packed;
7355
7356 struct wmi_pno_scan_req {
7357 u8 enable;
7358 u8 vdev_id;
7359 u8 uc_networks_count;
7360 struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS];
7361 u32 fast_scan_period;
7362 u32 slow_scan_period;
7363 u8 fast_scan_max_cycles;
7364
7365 bool do_passive_scan;
7366
7367 u32 delay_start_time;
7368 u32 active_min_time;
7369 u32 active_max_time;
7370 u32 passive_min_time;
7371 u32 passive_max_time;
7372
7373
7374 u32 enable_pno_scan_randomization;
7375 u8 mac_addr[ETH_ALEN];
7376 u8 mac_addr_mask[ETH_ALEN];
7377 } __packed;
7378
7379 enum wmi_host_platform_type {
7380 WMI_HOST_PLATFORM_HIGH_PERF,
7381 WMI_HOST_PLATFORM_LOW_PERF,
7382 };
7383
7384 enum wmi_bss_survey_req_type {
7385 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
7386 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
7387 };
7388
7389 struct wmi_pdev_chan_info_req_cmd {
7390 __le32 type;
7391 __le32 reserved;
7392 } __packed;
7393
7394
7395 struct wmi_bb_timing_cfg_arg {
7396
7397 u32 bb_tx_timing;
7398
7399
7400 u32 bb_xpa_timing;
7401 };
7402
7403 struct wmi_pdev_bb_timing_cfg_cmd {
7404
7405 __le32 bb_tx_timing;
7406
7407
7408 __le32 bb_xpa_timing;
7409 } __packed;
7410
7411 struct ath10k;
7412 struct ath10k_vif;
7413 struct ath10k_fw_stats_pdev;
7414 struct ath10k_fw_stats_peer;
7415 struct ath10k_fw_stats;
7416
7417 int ath10k_wmi_attach(struct ath10k *ar);
7418 void ath10k_wmi_detach(struct ath10k *ar);
7419 void ath10k_wmi_free_host_mem(struct ath10k *ar);
7420 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
7421 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
7422
7423 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
7424 int ath10k_wmi_connect(struct ath10k *ar);
7425
7426 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
7427 int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
7428 u32 cmd_id);
7429 void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *arg);
7430
7431 void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
7432 struct ath10k_fw_stats_pdev *dst);
7433 void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
7434 struct ath10k_fw_stats_pdev *dst);
7435 void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
7436 struct ath10k_fw_stats_pdev *dst);
7437 void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
7438 struct ath10k_fw_stats_pdev *dst);
7439 void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
7440 struct ath10k_fw_stats_peer *dst);
7441 void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
7442 struct wmi_host_mem_chunks *chunks);
7443 void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
7444 const struct wmi_start_scan_arg *arg);
7445 void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
7446 const struct wmi_wmm_params_arg *arg);
7447 void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch,
7448 const struct wmi_channel_arg *arg);
7449 int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
7450
7451 int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
7452 int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
7453 int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb);
7454 int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb);
7455 void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
7456 void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
7457 int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
7458 void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
7459 void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
7460 void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
7461 void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
7462 void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
7463 void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
7464 void ath10k_wmi_event_dfs(struct ath10k *ar,
7465 struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
7466 void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
7467 struct wmi_phyerr_ev_arg *phyerr,
7468 u64 tsf);
7469 void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
7470 void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
7471 void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
7472 void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
7473 void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
7474 void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
7475 void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
7476 struct sk_buff *skb);
7477 void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
7478 struct sk_buff *skb);
7479 void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
7480 void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
7481 void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
7482 void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
7483 void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
7484 void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
7485 struct sk_buff *skb);
7486 void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
7487 void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
7488 void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
7489 void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
7490 struct sk_buff *skb);
7491 void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
7492 void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
7493 void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
7494 void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
7495 int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
7496 void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb);
7497 int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
7498 int left_len, struct wmi_phyerr_ev_arg *arg);
7499 void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7500 struct ath10k_fw_stats *fw_stats,
7501 char *buf);
7502 void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7503 struct ath10k_fw_stats *fw_stats,
7504 char *buf);
7505 size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head);
7506 size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head);
7507 void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
7508 struct ath10k_fw_stats *fw_stats,
7509 char *buf);
7510 int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
7511 enum wmi_vdev_subtype subtype);
7512 int ath10k_wmi_barrier(struct ath10k *ar);
7513 void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
7514 u32 num_tx_chain);
7515 void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb);
7516
7517 #endif