ath/ath10k/usb.h

0001 /* SPDX-License-Identifier: ISC */
0002 /*
0003  * Copyright (c) 2004-2011 Atheros Communications Inc.
0004  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
0005  * Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com>
0006  */
0007
0008 #ifndef _USB_H_
0009 #define _USB_H_
0010
0011 /* constants */
0012 #define TX_URB_COUNT               32
0013 #define RX_URB_COUNT               32
0014 #define ATH10K_USB_RX_BUFFER_SIZE  4096
0015
0016 #define ATH10K_USB_PIPE_INVALID ATH10K_USB_PIPE_MAX
0017
0018 /* USB endpoint definitions */
0019 #define ATH10K_USB_EP_ADDR_APP_CTRL_IN          0x81
0020 #define ATH10K_USB_EP_ADDR_APP_DATA_IN          0x82
0021 #define ATH10K_USB_EP_ADDR_APP_DATA2_IN         0x83
0022 #define ATH10K_USB_EP_ADDR_APP_INT_IN           0x84
0023
0024 #define ATH10K_USB_EP_ADDR_APP_CTRL_OUT         0x01
0025 #define ATH10K_USB_EP_ADDR_APP_DATA_LP_OUT      0x02
0026 #define ATH10K_USB_EP_ADDR_APP_DATA_MP_OUT      0x03
0027 #define ATH10K_USB_EP_ADDR_APP_DATA_HP_OUT      0x04
0028
0029 /* diagnostic command defnitions */
0030 #define ATH10K_USB_CONTROL_REQ_SEND_BMI_CMD        1
0031 #define ATH10K_USB_CONTROL_REQ_RECV_BMI_RESP       2
0032 #define ATH10K_USB_CONTROL_REQ_DIAG_CMD            3
0033 #define ATH10K_USB_CONTROL_REQ_DIAG_RESP           4
0034
0035 #define ATH10K_USB_CTRL_DIAG_CC_READ               0
0036 #define ATH10K_USB_CTRL_DIAG_CC_WRITE              1
0037
0038 #define ATH10K_USB_IS_BULK_EP(attr) (((attr) & 3) == 0x02)
0039 #define ATH10K_USB_IS_INT_EP(attr)  (((attr) & 3) == 0x03)
0040 #define ATH10K_USB_IS_ISOC_EP(attr) (((attr) & 3) == 0x01)
0041 #define ATH10K_USB_IS_DIR_IN(addr)  ((addr) & 0x80)
0042
0043 struct ath10k_usb_ctrl_diag_cmd_write {
0044     __le32 cmd;
0045     __le32 address;
0046     __le32 value;
0047     __le32 padding;
0048 } __packed;
0049
0050 struct ath10k_usb_ctrl_diag_cmd_read {
0051     __le32 cmd;
0052     __le32 address;
0053 } __packed;
0054
0055 struct ath10k_usb_ctrl_diag_resp_read {
0056     u8 value[4];
0057 } __packed;
0058
0059 /* tx/rx pipes for usb */
0060 enum ath10k_usb_pipe_id {
0061     ATH10K_USB_PIPE_TX_CTRL = 0,
0062     ATH10K_USB_PIPE_TX_DATA_LP,
0063     ATH10K_USB_PIPE_TX_DATA_MP,
0064     ATH10K_USB_PIPE_TX_DATA_HP,
0065     ATH10K_USB_PIPE_RX_CTRL,
0066     ATH10K_USB_PIPE_RX_DATA,
0067     ATH10K_USB_PIPE_RX_DATA2,
0068     ATH10K_USB_PIPE_RX_INT,
0069     ATH10K_USB_PIPE_MAX
0070 };
0071
0072 struct ath10k_usb_pipe {
0073     struct list_head urb_list_head;
0074     struct usb_anchor urb_submitted;
0075     u32 urb_alloc;
0076     u32 urb_cnt;
0077     u32 urb_cnt_thresh;
0078     unsigned int usb_pipe_handle;
0079     u32 flags;
0080     u8 ep_address;
0081     u8 logical_pipe_num;
0082     struct ath10k_usb *ar_usb;
0083     u16 max_packet_size;
0084     struct work_struct io_complete_work;
0085     struct sk_buff_head io_comp_queue;
0086     struct usb_endpoint_descriptor *ep_desc;
0087 };
0088
0089 #define ATH10K_USB_PIPE_FLAG_TX BIT(0)
0090
0091 /* usb device object */
0092 struct ath10k_usb {
0093     /* protects pipe->urb_list_head and  pipe->urb_cnt */
0094     spinlock_t cs_lock;
0095
0096     struct usb_device *udev;
0097     struct usb_interface *interface;
0098     struct ath10k_usb_pipe pipes[ATH10K_USB_PIPE_MAX];
0099     u8 *diag_cmd_buffer;
0100     u8 *diag_resp_buffer;
0101     struct ath10k *ar;
0102 };
0103
0104 /* usb urb object */
0105 struct ath10k_urb_context {
0106     struct list_head link;
0107     struct ath10k_usb_pipe *pipe;
0108     struct sk_buff *skb;
0109     struct ath10k *ar;
0110 };
0111
0112 static inline struct ath10k_usb *ath10k_usb_priv(struct ath10k *ar)
0113 {
0114     return (struct ath10k_usb *)ar->drv_priv;
0115 }
0116
0117 #endif