ath/ath10k/qmi.h

0001 /* SPDX-License-Identifier: ISC */
0002 /*
0003  * Copyright (c) 2018 The Linux Foundation. All rights reserved.
0004  */
0005 #ifndef _ATH10K_QMI_H_
0006 #define _ATH10K_QMI_H_
0007
0008 #include <linux/soc/qcom/qmi.h>
0009 #include <linux/qrtr.h>
0010 #include "qmi_wlfw_v01.h"
0011
0012 #define MAX_NUM_MEMORY_REGIONS          2
0013 #define MAX_TIMESTAMP_LEN           32
0014 #define MAX_BUILD_ID_LEN            128
0015 #define MAX_NUM_CAL_V01         5
0016
0017 enum ath10k_qmi_driver_event_type {
0018     ATH10K_QMI_EVENT_SERVER_ARRIVE,
0019     ATH10K_QMI_EVENT_SERVER_EXIT,
0020     ATH10K_QMI_EVENT_FW_READY_IND,
0021     ATH10K_QMI_EVENT_FW_DOWN_IND,
0022     ATH10K_QMI_EVENT_MSA_READY_IND,
0023     ATH10K_QMI_EVENT_MAX,
0024 };
0025
0026 struct ath10k_msa_mem_info {
0027     phys_addr_t addr;
0028     u32 size;
0029     bool secure;
0030 };
0031
0032 struct ath10k_qmi_chip_info {
0033     u32 chip_id;
0034     u32 chip_family;
0035 };
0036
0037 struct ath10k_qmi_board_info {
0038     u32 board_id;
0039 };
0040
0041 struct ath10k_qmi_soc_info {
0042     u32 soc_id;
0043 };
0044
0045 struct ath10k_qmi_cal_data {
0046     u32 cal_id;
0047     u32 total_size;
0048     u8 *data;
0049 };
0050
0051 struct ath10k_tgt_pipe_cfg {
0052     __le32 pipe_num;
0053     __le32 pipe_dir;
0054     __le32 nentries;
0055     __le32 nbytes_max;
0056     __le32 flags;
0057     __le32 reserved;
0058 };
0059
0060 struct ath10k_svc_pipe_cfg {
0061     __le32 service_id;
0062     __le32 pipe_dir;
0063     __le32 pipe_num;
0064 };
0065
0066 struct ath10k_shadow_reg_cfg {
0067     __le16 ce_id;
0068     __le16 reg_offset;
0069 };
0070
0071 struct ath10k_qmi_wlan_enable_cfg {
0072     u32 num_ce_tgt_cfg;
0073     struct ath10k_tgt_pipe_cfg *ce_tgt_cfg;
0074     u32 num_ce_svc_pipe_cfg;
0075     struct ath10k_svc_pipe_cfg *ce_svc_cfg;
0076     u32 num_shadow_reg_cfg;
0077     struct ath10k_shadow_reg_cfg *shadow_reg_cfg;
0078 };
0079
0080 struct ath10k_qmi_driver_event {
0081     struct list_head list;
0082     enum ath10k_qmi_driver_event_type type;
0083     void *data;
0084 };
0085
0086 enum ath10k_qmi_state {
0087     ATH10K_QMI_STATE_INIT_DONE,
0088     ATH10K_QMI_STATE_DEINIT,
0089 };
0090
0091 struct ath10k_qmi {
0092     struct ath10k *ar;
0093     struct qmi_handle qmi_hdl;
0094     struct sockaddr_qrtr sq;
0095     struct work_struct event_work;
0096     struct workqueue_struct *event_wq;
0097     struct list_head event_list;
0098     spinlock_t event_lock; /* spinlock for qmi event list */
0099     u32 nr_mem_region;
0100     struct ath10k_msa_mem_info mem_region[MAX_NUM_MEMORY_REGIONS];
0101     struct ath10k_qmi_chip_info chip_info;
0102     struct ath10k_qmi_board_info board_info;
0103     struct ath10k_qmi_soc_info soc_info;
0104     char fw_build_id[MAX_BUILD_ID_LEN + 1];
0105     u32 fw_version;
0106     bool fw_ready;
0107     char fw_build_timestamp[MAX_TIMESTAMP_LEN + 1];
0108     struct ath10k_qmi_cal_data cal_data[MAX_NUM_CAL_V01];
0109     bool msa_fixed_perm;
0110     enum ath10k_qmi_state state;
0111 };
0112
0113 int ath10k_qmi_wlan_enable(struct ath10k *ar,
0114                struct ath10k_qmi_wlan_enable_cfg *config,
0115                enum wlfw_driver_mode_enum_v01 mode,
0116                const char *version);
0117 int ath10k_qmi_wlan_disable(struct ath10k *ar);
0118 int ath10k_qmi_init(struct ath10k *ar, u32 msa_size);
0119 int ath10k_qmi_deinit(struct ath10k *ar);
0120 int ath10k_qmi_set_fw_log_mode(struct ath10k *ar, u8 fw_log_mode);
0121
0122 #endif /* ATH10K_QMI_H */