ath/ath10k/hif.h

0001 /* SPDX-License-Identifier: ISC */
0002 /*
0003  * Copyright (c) 2005-2011 Atheros Communications Inc.
0004  * Copyright (c) 2011-2015,2017 Qualcomm Atheros, Inc.
0005  */
0006
0007 #ifndef _HIF_H_
0008 #define _HIF_H_
0009
0010 #include <linux/kernel.h>
0011 #include "core.h"
0012 #include "bmi.h"
0013 #include "debug.h"
0014
0015 /* Types of fw logging mode */
0016 enum ath_dbg_mode {
0017     ATH10K_ENABLE_FW_LOG_DIAG,
0018     ATH10K_ENABLE_FW_LOG_CE,
0019 };
0020
0021 struct ath10k_hif_sg_item {
0022     u16 transfer_id;
0023     void *transfer_context; /* NULL = tx completion callback not called */
0024     void *vaddr; /* for debugging mostly */
0025     dma_addr_t paddr;
0026     u16 len;
0027 };
0028
0029 struct ath10k_hif_ops {
0030     /* send a scatter-gather list to the target */
0031     int (*tx_sg)(struct ath10k *ar, u8 pipe_id,
0032              struct ath10k_hif_sg_item *items, int n_items);
0033
0034     /* read firmware memory through the diagnose interface */
0035     int (*diag_read)(struct ath10k *ar, u32 address, void *buf,
0036              size_t buf_len);
0037
0038     int (*diag_write)(struct ath10k *ar, u32 address, const void *data,
0039               int nbytes);
0040     /*
0041      * API to handle HIF-specific BMI message exchanges, this API is
0042      * synchronous and only allowed to be called from a context that
0043      * can block (sleep)
0044      */
0045     int (*exchange_bmi_msg)(struct ath10k *ar,
0046                 void *request, u32 request_len,
0047                 void *response, u32 *response_len);
0048
0049     /* Post BMI phase, after FW is loaded. Starts regular operation */
0050     int (*start)(struct ath10k *ar);
0051
0052     /* Clean up what start() did. This does not revert to BMI phase. If
0053      * desired so, call power_down() and power_up()
0054      */
0055     void (*stop)(struct ath10k *ar);
0056
0057     int (*start_post)(struct ath10k *ar);
0058
0059     int (*get_htt_tx_complete)(struct ath10k *ar);
0060
0061     int (*map_service_to_pipe)(struct ath10k *ar, u16 service_id,
0062                    u8 *ul_pipe, u8 *dl_pipe);
0063
0064     void (*get_default_pipe)(struct ath10k *ar, u8 *ul_pipe, u8 *dl_pipe);
0065
0066     /*
0067      * Check if prior sends have completed.
0068      *
0069      * Check whether the pipe in question has any completed
0070      * sends that have not yet been processed.
0071      * This function is only relevant for HIF pipes that are configured
0072      * to be polled rather than interrupt-driven.
0073      */
0074     void (*send_complete_check)(struct ath10k *ar, u8 pipe_id, int force);
0075
0076     u16 (*get_free_queue_number)(struct ath10k *ar, u8 pipe_id);
0077
0078     u32 (*read32)(struct ath10k *ar, u32 address);
0079
0080     void (*write32)(struct ath10k *ar, u32 address, u32 value);
0081
0082     /* Power up the device and enter BMI transfer mode for FW download */
0083     int (*power_up)(struct ath10k *ar, enum ath10k_firmware_mode fw_mode);
0084
0085     /* Power down the device and free up resources. stop() must be called
0086      * before this if start() was called earlier
0087      */
0088     void (*power_down)(struct ath10k *ar);
0089
0090     int (*suspend)(struct ath10k *ar);
0091     int (*resume)(struct ath10k *ar);
0092
0093     /* fetch calibration data from target eeprom */
0094     int (*fetch_cal_eeprom)(struct ath10k *ar, void **data,
0095                 size_t *data_len);
0096
0097     int (*get_target_info)(struct ath10k *ar,
0098                    struct bmi_target_info *target_info);
0099     int (*set_target_log_mode)(struct ath10k *ar, u8 fw_log_mode);
0100 };
0101
0102 static inline int ath10k_hif_tx_sg(struct ath10k *ar, u8 pipe_id,
0103                    struct ath10k_hif_sg_item *items,
0104                    int n_items)
0105 {
0106     return ar->hif.ops->tx_sg(ar, pipe_id, items, n_items);
0107 }
0108
0109 static inline int ath10k_hif_diag_read(struct ath10k *ar, u32 address, void *buf,
0110                        size_t buf_len)
0111 {
0112     return ar->hif.ops->diag_read(ar, address, buf, buf_len);
0113 }
0114
0115 static inline int ath10k_hif_diag_write(struct ath10k *ar, u32 address,
0116                     const void *data, int nbytes)
0117 {
0118     if (!ar->hif.ops->diag_write)
0119         return -EOPNOTSUPP;
0120
0121     return ar->hif.ops->diag_write(ar, address, data, nbytes);
0122 }
0123
0124 static inline int ath10k_hif_exchange_bmi_msg(struct ath10k *ar,
0125                           void *request, u32 request_len,
0126                           void *response, u32 *response_len)
0127 {
0128     return ar->hif.ops->exchange_bmi_msg(ar, request, request_len,
0129                          response, response_len);
0130 }
0131
0132 static inline int ath10k_hif_start(struct ath10k *ar)
0133 {
0134     return ar->hif.ops->start(ar);
0135 }
0136
0137 static inline void ath10k_hif_stop(struct ath10k *ar)
0138 {
0139     return ar->hif.ops->stop(ar);
0140 }
0141
0142 static inline int ath10k_hif_start_post(struct ath10k *ar)
0143 {
0144     if (ar->hif.ops->start_post)
0145         return ar->hif.ops->start_post(ar);
0146     return 0;
0147 }
0148
0149 static inline int ath10k_hif_get_htt_tx_complete(struct ath10k *ar)
0150 {
0151     if (ar->hif.ops->get_htt_tx_complete)
0152         return ar->hif.ops->get_htt_tx_complete(ar);
0153     return 0;
0154 }
0155
0156 static inline int ath10k_hif_map_service_to_pipe(struct ath10k *ar,
0157                          u16 service_id,
0158                          u8 *ul_pipe, u8 *dl_pipe)
0159 {
0160     return ar->hif.ops->map_service_to_pipe(ar, service_id,
0161                         ul_pipe, dl_pipe);
0162 }
0163
0164 static inline void ath10k_hif_get_default_pipe(struct ath10k *ar,
0165                            u8 *ul_pipe, u8 *dl_pipe)
0166 {
0167     ar->hif.ops->get_default_pipe(ar, ul_pipe, dl_pipe);
0168 }
0169
0170 static inline void ath10k_hif_send_complete_check(struct ath10k *ar,
0171                           u8 pipe_id, int force)
0172 {
0173     if (ar->hif.ops->send_complete_check)
0174         ar->hif.ops->send_complete_check(ar, pipe_id, force);
0175 }
0176
0177 static inline u16 ath10k_hif_get_free_queue_number(struct ath10k *ar,
0178                            u8 pipe_id)
0179 {
0180     return ar->hif.ops->get_free_queue_number(ar, pipe_id);
0181 }
0182
0183 static inline int ath10k_hif_power_up(struct ath10k *ar,
0184                       enum ath10k_firmware_mode fw_mode)
0185 {
0186     return ar->hif.ops->power_up(ar, fw_mode);
0187 }
0188
0189 static inline void ath10k_hif_power_down(struct ath10k *ar)
0190 {
0191     ar->hif.ops->power_down(ar);
0192 }
0193
0194 static inline int ath10k_hif_suspend(struct ath10k *ar)
0195 {
0196     if (!ar->hif.ops->suspend)
0197         return -EOPNOTSUPP;
0198
0199     return ar->hif.ops->suspend(ar);
0200 }
0201
0202 static inline int ath10k_hif_resume(struct ath10k *ar)
0203 {
0204     if (!ar->hif.ops->resume)
0205         return -EOPNOTSUPP;
0206
0207     return ar->hif.ops->resume(ar);
0208 }
0209
0210 static inline u32 ath10k_hif_read32(struct ath10k *ar, u32 address)
0211 {
0212     if (!ar->hif.ops->read32) {
0213         ath10k_warn(ar, "hif read32 not supported\n");
0214         return 0xdeaddead;
0215     }
0216
0217     return ar->hif.ops->read32(ar, address);
0218 }
0219
0220 static inline void ath10k_hif_write32(struct ath10k *ar,
0221                       u32 address, u32 data)
0222 {
0223     if (!ar->hif.ops->write32) {
0224         ath10k_warn(ar, "hif write32 not supported\n");
0225         return;
0226     }
0227
0228     ar->hif.ops->write32(ar, address, data);
0229 }
0230
0231 static inline int ath10k_hif_fetch_cal_eeprom(struct ath10k *ar,
0232                           void **data,
0233                           size_t *data_len)
0234 {
0235     if (!ar->hif.ops->fetch_cal_eeprom)
0236         return -EOPNOTSUPP;
0237
0238     return ar->hif.ops->fetch_cal_eeprom(ar, data, data_len);
0239 }
0240
0241 static inline int ath10k_hif_get_target_info(struct ath10k *ar,
0242                          struct bmi_target_info *tgt_info)
0243 {
0244     if (!ar->hif.ops->get_target_info)
0245         return -EOPNOTSUPP;
0246
0247     return ar->hif.ops->get_target_info(ar, tgt_info);
0248 }
0249
0250 static inline int ath10k_hif_set_target_log_mode(struct ath10k *ar,
0251                          u8 fw_log_mode)
0252 {
0253     if (!ar->hif.ops->set_target_log_mode)
0254         return -EOPNOTSUPP;
0255
0256     return ar->hif.ops->set_target_log_mode(ar, fw_log_mode);
0257 }
0258 #endif /* _HIF_H_ */