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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: ISC
0002 /*
0003  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
0004  * Copyright (c) 2018, The Linux Foundation. All rights reserved.
0005  */
0006 
0007 #include "coredump.h"
0008 
0009 #include <linux/devcoredump.h>
0010 #include <linux/kernel.h>
0011 #include <linux/types.h>
0012 #include <linux/utsname.h>
0013 
0014 #include "debug.h"
0015 #include "hw.h"
0016 
0017 static const struct ath10k_mem_section qca6174_hw21_register_sections[] = {
0018     {0x800, 0x810},
0019     {0x820, 0x82C},
0020     {0x830, 0x8F4},
0021     {0x90C, 0x91C},
0022     {0xA14, 0xA18},
0023     {0xA84, 0xA94},
0024     {0xAA8, 0xAD4},
0025     {0xADC, 0xB40},
0026     {0x1000, 0x10A4},
0027     {0x10BC, 0x111C},
0028     {0x1134, 0x1138},
0029     {0x1144, 0x114C},
0030     {0x1150, 0x115C},
0031     {0x1160, 0x1178},
0032     {0x1240, 0x1260},
0033     {0x2000, 0x207C},
0034     {0x3000, 0x3014},
0035     {0x4000, 0x4014},
0036     {0x5000, 0x5124},
0037     {0x6000, 0x6040},
0038     {0x6080, 0x60CC},
0039     {0x6100, 0x611C},
0040     {0x6140, 0x61D8},
0041     {0x6200, 0x6238},
0042     {0x6240, 0x628C},
0043     {0x62C0, 0x62EC},
0044     {0x6380, 0x63E8},
0045     {0x6400, 0x6440},
0046     {0x6480, 0x64CC},
0047     {0x6500, 0x651C},
0048     {0x6540, 0x6580},
0049     {0x6600, 0x6638},
0050     {0x6640, 0x668C},
0051     {0x66C0, 0x66EC},
0052     {0x6780, 0x67E8},
0053     {0x7080, 0x708C},
0054     {0x70C0, 0x70C8},
0055     {0x7400, 0x741C},
0056     {0x7440, 0x7454},
0057     {0x7800, 0x7818},
0058     {0x8000, 0x8004},
0059     {0x8010, 0x8064},
0060     {0x8080, 0x8084},
0061     {0x80A0, 0x80A4},
0062     {0x80C0, 0x80C4},
0063     {0x80E0, 0x80F4},
0064     {0x8100, 0x8104},
0065     {0x8110, 0x812C},
0066     {0x9000, 0x9004},
0067     {0x9800, 0x982C},
0068     {0x9830, 0x9838},
0069     {0x9840, 0x986C},
0070     {0x9870, 0x9898},
0071     {0x9A00, 0x9C00},
0072     {0xD580, 0xD59C},
0073     {0xF000, 0xF0E0},
0074     {0xF140, 0xF190},
0075     {0xF250, 0xF25C},
0076     {0xF260, 0xF268},
0077     {0xF26C, 0xF2A8},
0078     {0x10008, 0x1000C},
0079     {0x10014, 0x10018},
0080     {0x1001C, 0x10020},
0081     {0x10024, 0x10028},
0082     {0x10030, 0x10034},
0083     {0x10040, 0x10054},
0084     {0x10058, 0x1007C},
0085     {0x10080, 0x100C4},
0086     {0x100C8, 0x10114},
0087     {0x1012C, 0x10130},
0088     {0x10138, 0x10144},
0089     {0x10200, 0x10220},
0090     {0x10230, 0x10250},
0091     {0x10260, 0x10280},
0092     {0x10290, 0x102B0},
0093     {0x102C0, 0x102DC},
0094     {0x102E0, 0x102F4},
0095     {0x102FC, 0x1037C},
0096     {0x10380, 0x10390},
0097     {0x10800, 0x10828},
0098     {0x10840, 0x10844},
0099     {0x10880, 0x10884},
0100     {0x108C0, 0x108E8},
0101     {0x10900, 0x10928},
0102     {0x10940, 0x10944},
0103     {0x10980, 0x10984},
0104     {0x109C0, 0x109E8},
0105     {0x10A00, 0x10A28},
0106     {0x10A40, 0x10A50},
0107     {0x11000, 0x11028},
0108     {0x11030, 0x11034},
0109     {0x11038, 0x11068},
0110     {0x11070, 0x11074},
0111     {0x11078, 0x110A8},
0112     {0x110B0, 0x110B4},
0113     {0x110B8, 0x110E8},
0114     {0x110F0, 0x110F4},
0115     {0x110F8, 0x11128},
0116     {0x11138, 0x11144},
0117     {0x11178, 0x11180},
0118     {0x111B8, 0x111C0},
0119     {0x111F8, 0x11200},
0120     {0x11238, 0x1123C},
0121     {0x11270, 0x11274},
0122     {0x11278, 0x1127C},
0123     {0x112B0, 0x112B4},
0124     {0x112B8, 0x112BC},
0125     {0x112F0, 0x112F4},
0126     {0x112F8, 0x112FC},
0127     {0x11338, 0x1133C},
0128     {0x11378, 0x1137C},
0129     {0x113B8, 0x113BC},
0130     {0x113F8, 0x113FC},
0131     {0x11438, 0x11440},
0132     {0x11478, 0x11480},
0133     {0x114B8, 0x114BC},
0134     {0x114F8, 0x114FC},
0135     {0x11538, 0x1153C},
0136     {0x11578, 0x1157C},
0137     {0x115B8, 0x115BC},
0138     {0x115F8, 0x115FC},
0139     {0x11638, 0x1163C},
0140     {0x11678, 0x1167C},
0141     {0x116B8, 0x116BC},
0142     {0x116F8, 0x116FC},
0143     {0x11738, 0x1173C},
0144     {0x11778, 0x1177C},
0145     {0x117B8, 0x117BC},
0146     {0x117F8, 0x117FC},
0147     {0x17000, 0x1701C},
0148     {0x17020, 0x170AC},
0149     {0x18000, 0x18050},
0150     {0x18054, 0x18074},
0151     {0x18080, 0x180D4},
0152     {0x180DC, 0x18104},
0153     {0x18108, 0x1813C},
0154     {0x18144, 0x18148},
0155     {0x18168, 0x18174},
0156     {0x18178, 0x18180},
0157     {0x181C8, 0x181E0},
0158     {0x181E4, 0x181E8},
0159     {0x181EC, 0x1820C},
0160     {0x1825C, 0x18280},
0161     {0x18284, 0x18290},
0162     {0x18294, 0x182A0},
0163     {0x18300, 0x18304},
0164     {0x18314, 0x18320},
0165     {0x18328, 0x18350},
0166     {0x1835C, 0x1836C},
0167     {0x18370, 0x18390},
0168     {0x18398, 0x183AC},
0169     {0x183BC, 0x183D8},
0170     {0x183DC, 0x183F4},
0171     {0x18400, 0x186F4},
0172     {0x186F8, 0x1871C},
0173     {0x18720, 0x18790},
0174     {0x19800, 0x19830},
0175     {0x19834, 0x19840},
0176     {0x19880, 0x1989C},
0177     {0x198A4, 0x198B0},
0178     {0x198BC, 0x19900},
0179     {0x19C00, 0x19C88},
0180     {0x19D00, 0x19D20},
0181     {0x19E00, 0x19E7C},
0182     {0x19E80, 0x19E94},
0183     {0x19E98, 0x19EAC},
0184     {0x19EB0, 0x19EBC},
0185     {0x19F70, 0x19F74},
0186     {0x19F80, 0x19F8C},
0187     {0x19FA0, 0x19FB4},
0188     {0x19FC0, 0x19FD8},
0189     {0x1A000, 0x1A200},
0190     {0x1A204, 0x1A210},
0191     {0x1A228, 0x1A22C},
0192     {0x1A230, 0x1A248},
0193     {0x1A250, 0x1A270},
0194     {0x1A280, 0x1A290},
0195     {0x1A2A0, 0x1A2A4},
0196     {0x1A2C0, 0x1A2EC},
0197     {0x1A300, 0x1A3BC},
0198     {0x1A3F0, 0x1A3F4},
0199     {0x1A3F8, 0x1A434},
0200     {0x1A438, 0x1A444},
0201     {0x1A448, 0x1A468},
0202     {0x1A580, 0x1A58C},
0203     {0x1A644, 0x1A654},
0204     {0x1A670, 0x1A698},
0205     {0x1A6AC, 0x1A6B0},
0206     {0x1A6D0, 0x1A6D4},
0207     {0x1A6EC, 0x1A70C},
0208     {0x1A710, 0x1A738},
0209     {0x1A7C0, 0x1A7D0},
0210     {0x1A7D4, 0x1A7D8},
0211     {0x1A7DC, 0x1A7E4},
0212     {0x1A7F0, 0x1A7F8},
0213     {0x1A888, 0x1A89C},
0214     {0x1A8A8, 0x1A8AC},
0215     {0x1A8C0, 0x1A8DC},
0216     {0x1A8F0, 0x1A8FC},
0217     {0x1AE04, 0x1AE08},
0218     {0x1AE18, 0x1AE24},
0219     {0x1AF80, 0x1AF8C},
0220     {0x1AFA0, 0x1AFB4},
0221     {0x1B000, 0x1B200},
0222     {0x1B284, 0x1B288},
0223     {0x1B2D0, 0x1B2D8},
0224     {0x1B2DC, 0x1B2EC},
0225     {0x1B300, 0x1B340},
0226     {0x1B374, 0x1B378},
0227     {0x1B380, 0x1B384},
0228     {0x1B388, 0x1B38C},
0229     {0x1B404, 0x1B408},
0230     {0x1B420, 0x1B428},
0231     {0x1B440, 0x1B444},
0232     {0x1B448, 0x1B44C},
0233     {0x1B450, 0x1B458},
0234     {0x1B45C, 0x1B468},
0235     {0x1B584, 0x1B58C},
0236     {0x1B68C, 0x1B690},
0237     {0x1B6AC, 0x1B6B0},
0238     {0x1B7F0, 0x1B7F8},
0239     {0x1C800, 0x1CC00},
0240     {0x1CE00, 0x1CE04},
0241     {0x1CF80, 0x1CF84},
0242     {0x1D200, 0x1D800},
0243     {0x1E000, 0x20014},
0244     {0x20100, 0x20124},
0245     {0x21400, 0x217A8},
0246     {0x21800, 0x21BA8},
0247     {0x21C00, 0x21FA8},
0248     {0x22000, 0x223A8},
0249     {0x22400, 0x227A8},
0250     {0x22800, 0x22BA8},
0251     {0x22C00, 0x22FA8},
0252     {0x23000, 0x233A8},
0253     {0x24000, 0x24034},
0254     {0x26000, 0x26064},
0255     {0x27000, 0x27024},
0256     {0x34000, 0x3400C},
0257     {0x34400, 0x3445C},
0258     {0x34800, 0x3485C},
0259     {0x34C00, 0x34C5C},
0260     {0x35000, 0x3505C},
0261     {0x35400, 0x3545C},
0262     {0x35800, 0x3585C},
0263     {0x35C00, 0x35C5C},
0264     {0x36000, 0x3605C},
0265     {0x38000, 0x38064},
0266     {0x38070, 0x380E0},
0267     {0x3A000, 0x3A064},
0268     {0x40000, 0x400A4},
0269     {0x80000, 0x8000C},
0270     {0x80010, 0x80020},
0271 };
0272 
0273 static const struct ath10k_mem_section qca6174_hw30_sdio_register_sections[] = {
0274     {0x800, 0x810},
0275     {0x820, 0x82C},
0276     {0x830, 0x8F4},
0277     {0x90C, 0x91C},
0278     {0xA14, 0xA18},
0279     {0xA84, 0xA94},
0280     {0xAA8, 0xAD4},
0281     {0xADC, 0xB40},
0282     {0x1000, 0x10A4},
0283     {0x10BC, 0x111C},
0284     {0x1134, 0x1138},
0285     {0x1144, 0x114C},
0286     {0x1150, 0x115C},
0287     {0x1160, 0x1178},
0288     {0x1240, 0x1260},
0289     {0x2000, 0x207C},
0290     {0x3000, 0x3014},
0291     {0x4000, 0x4014},
0292     {0x5000, 0x5124},
0293     {0x6000, 0x6040},
0294     {0x6080, 0x60CC},
0295     {0x6100, 0x611C},
0296     {0x6140, 0x61D8},
0297     {0x6200, 0x6238},
0298     {0x6240, 0x628C},
0299     {0x62C0, 0x62EC},
0300     {0x6380, 0x63E8},
0301     {0x6400, 0x6440},
0302     {0x6480, 0x64CC},
0303     {0x6500, 0x651C},
0304     {0x6540, 0x6580},
0305     {0x6600, 0x6638},
0306     {0x6640, 0x668C},
0307     {0x66C0, 0x66EC},
0308     {0x6780, 0x67E8},
0309     {0x7080, 0x708C},
0310     {0x70C0, 0x70C8},
0311     {0x7400, 0x741C},
0312     {0x7440, 0x7454},
0313     {0x7800, 0x7818},
0314     {0x8010, 0x8060},
0315     {0x8080, 0x8084},
0316     {0x80A0, 0x80A4},
0317     {0x80C0, 0x80C4},
0318     {0x80E0, 0x80ec},
0319     {0x8110, 0x8128},
0320     {0x9000, 0x9004},
0321     {0xF000, 0xF0E0},
0322     {0xF140, 0xF190},
0323     {0xF250, 0xF25C},
0324     {0xF260, 0xF268},
0325     {0xF26C, 0xF2A8},
0326     {0x10008, 0x1000C},
0327     {0x10014, 0x10018},
0328     {0x1001C, 0x10020},
0329     {0x10024, 0x10028},
0330     {0x10030, 0x10034},
0331     {0x10040, 0x10054},
0332     {0x10058, 0x1007C},
0333     {0x10080, 0x100C4},
0334     {0x100C8, 0x10114},
0335     {0x1012C, 0x10130},
0336     {0x10138, 0x10144},
0337     {0x10200, 0x10220},
0338     {0x10230, 0x10250},
0339     {0x10260, 0x10280},
0340     {0x10290, 0x102B0},
0341     {0x102C0, 0x102DC},
0342     {0x102E0, 0x102F4},
0343     {0x102FC, 0x1037C},
0344     {0x10380, 0x10390},
0345     {0x10800, 0x10828},
0346     {0x10840, 0x10844},
0347     {0x10880, 0x10884},
0348     {0x108C0, 0x108E8},
0349     {0x10900, 0x10928},
0350     {0x10940, 0x10944},
0351     {0x10980, 0x10984},
0352     {0x109C0, 0x109E8},
0353     {0x10A00, 0x10A28},
0354     {0x10A40, 0x10A50},
0355     {0x11000, 0x11028},
0356     {0x11030, 0x11034},
0357     {0x11038, 0x11068},
0358     {0x11070, 0x11074},
0359     {0x11078, 0x110A8},
0360     {0x110B0, 0x110B4},
0361     {0x110B8, 0x110E8},
0362     {0x110F0, 0x110F4},
0363     {0x110F8, 0x11128},
0364     {0x11138, 0x11144},
0365     {0x11178, 0x11180},
0366     {0x111B8, 0x111C0},
0367     {0x111F8, 0x11200},
0368     {0x11238, 0x1123C},
0369     {0x11270, 0x11274},
0370     {0x11278, 0x1127C},
0371     {0x112B0, 0x112B4},
0372     {0x112B8, 0x112BC},
0373     {0x112F0, 0x112F4},
0374     {0x112F8, 0x112FC},
0375     {0x11338, 0x1133C},
0376     {0x11378, 0x1137C},
0377     {0x113B8, 0x113BC},
0378     {0x113F8, 0x113FC},
0379     {0x11438, 0x11440},
0380     {0x11478, 0x11480},
0381     {0x114B8, 0x114BC},
0382     {0x114F8, 0x114FC},
0383     {0x11538, 0x1153C},
0384     {0x11578, 0x1157C},
0385     {0x115B8, 0x115BC},
0386     {0x115F8, 0x115FC},
0387     {0x11638, 0x1163C},
0388     {0x11678, 0x1167C},
0389     {0x116B8, 0x116BC},
0390     {0x116F8, 0x116FC},
0391     {0x11738, 0x1173C},
0392     {0x11778, 0x1177C},
0393     {0x117B8, 0x117BC},
0394     {0x117F8, 0x117FC},
0395     {0x17000, 0x1701C},
0396     {0x17020, 0x170AC},
0397     {0x18000, 0x18050},
0398     {0x18054, 0x18074},
0399     {0x18080, 0x180D4},
0400     {0x180DC, 0x18104},
0401     {0x18108, 0x1813C},
0402     {0x18144, 0x18148},
0403     {0x18168, 0x18174},
0404     {0x18178, 0x18180},
0405     {0x181C8, 0x181E0},
0406     {0x181E4, 0x181E8},
0407     {0x181EC, 0x1820C},
0408     {0x1825C, 0x18280},
0409     {0x18284, 0x18290},
0410     {0x18294, 0x182A0},
0411     {0x18300, 0x18304},
0412     {0x18314, 0x18320},
0413     {0x18328, 0x18350},
0414     {0x1835C, 0x1836C},
0415     {0x18370, 0x18390},
0416     {0x18398, 0x183AC},
0417     {0x183BC, 0x183D8},
0418     {0x183DC, 0x183F4},
0419     {0x18400, 0x186F4},
0420     {0x186F8, 0x1871C},
0421     {0x18720, 0x18790},
0422     {0x19800, 0x19830},
0423     {0x19834, 0x19840},
0424     {0x19880, 0x1989C},
0425     {0x198A4, 0x198B0},
0426     {0x198BC, 0x19900},
0427     {0x19C00, 0x19C88},
0428     {0x19D00, 0x19D20},
0429     {0x19E00, 0x19E7C},
0430     {0x19E80, 0x19E94},
0431     {0x19E98, 0x19EAC},
0432     {0x19EB0, 0x19EBC},
0433     {0x19F70, 0x19F74},
0434     {0x19F80, 0x19F8C},
0435     {0x19FA0, 0x19FB4},
0436     {0x19FC0, 0x19FD8},
0437     {0x1A000, 0x1A200},
0438     {0x1A204, 0x1A210},
0439     {0x1A228, 0x1A22C},
0440     {0x1A230, 0x1A248},
0441     {0x1A250, 0x1A270},
0442     {0x1A280, 0x1A290},
0443     {0x1A2A0, 0x1A2A4},
0444     {0x1A2C0, 0x1A2EC},
0445     {0x1A300, 0x1A3BC},
0446     {0x1A3F0, 0x1A3F4},
0447     {0x1A3F8, 0x1A434},
0448     {0x1A438, 0x1A444},
0449     {0x1A448, 0x1A468},
0450     {0x1A580, 0x1A58C},
0451     {0x1A644, 0x1A654},
0452     {0x1A670, 0x1A698},
0453     {0x1A6AC, 0x1A6B0},
0454     {0x1A6D0, 0x1A6D4},
0455     {0x1A6EC, 0x1A70C},
0456     {0x1A710, 0x1A738},
0457     {0x1A7C0, 0x1A7D0},
0458     {0x1A7D4, 0x1A7D8},
0459     {0x1A7DC, 0x1A7E4},
0460     {0x1A7F0, 0x1A7F8},
0461     {0x1A888, 0x1A89C},
0462     {0x1A8A8, 0x1A8AC},
0463     {0x1A8C0, 0x1A8DC},
0464     {0x1A8F0, 0x1A8FC},
0465     {0x1AE04, 0x1AE08},
0466     {0x1AE18, 0x1AE24},
0467     {0x1AF80, 0x1AF8C},
0468     {0x1AFA0, 0x1AFB4},
0469     {0x1B000, 0x1B200},
0470     {0x1B284, 0x1B288},
0471     {0x1B2D0, 0x1B2D8},
0472     {0x1B2DC, 0x1B2EC},
0473     {0x1B300, 0x1B340},
0474     {0x1B374, 0x1B378},
0475     {0x1B380, 0x1B384},
0476     {0x1B388, 0x1B38C},
0477     {0x1B404, 0x1B408},
0478     {0x1B420, 0x1B428},
0479     {0x1B440, 0x1B444},
0480     {0x1B448, 0x1B44C},
0481     {0x1B450, 0x1B458},
0482     {0x1B45C, 0x1B468},
0483     {0x1B584, 0x1B58C},
0484     {0x1B68C, 0x1B690},
0485     {0x1B6AC, 0x1B6B0},
0486     {0x1B7F0, 0x1B7F8},
0487     {0x1C800, 0x1CC00},
0488     {0x1CE00, 0x1CE04},
0489     {0x1CF80, 0x1CF84},
0490     {0x1D200, 0x1D800},
0491     {0x1E000, 0x20014},
0492     {0x20100, 0x20124},
0493     {0x21400, 0x217A8},
0494     {0x21800, 0x21BA8},
0495     {0x21C00, 0x21FA8},
0496     {0x22000, 0x223A8},
0497     {0x22400, 0x227A8},
0498     {0x22800, 0x22BA8},
0499     {0x22C00, 0x22FA8},
0500     {0x23000, 0x233A8},
0501     {0x24000, 0x24034},
0502 
0503     /* EFUSE0,1,2 is disabled here
0504      * because its state may be reset
0505      *
0506      * {0x24800, 0x24804},
0507      * {0x25000, 0x25004},
0508      * {0x25800, 0x25804},
0509      */
0510 
0511     {0x26000, 0x26064},
0512     {0x27000, 0x27024},
0513     {0x34000, 0x3400C},
0514     {0x34400, 0x3445C},
0515     {0x34800, 0x3485C},
0516     {0x34C00, 0x34C5C},
0517     {0x35000, 0x3505C},
0518     {0x35400, 0x3545C},
0519     {0x35800, 0x3585C},
0520     {0x35C00, 0x35C5C},
0521     {0x36000, 0x3605C},
0522     {0x38000, 0x38064},
0523     {0x38070, 0x380E0},
0524     {0x3A000, 0x3A074},
0525 
0526     /* DBI windows is skipped here, it can be only accessed when pcie
0527      * is active (not in reset) and CORE_CTRL_PCIE_LTSSM_EN = 0 &&
0528      * PCIE_CTRL_APP_LTSSM_ENALBE=0.
0529      * {0x3C000 , 0x3C004},
0530      */
0531 
0532     {0x40000, 0x400A4},
0533 
0534     /* SI register is skiped here.
0535      * Because it will cause bus hang
0536      *
0537      * {0x50000, 0x50018},
0538      */
0539 
0540     {0x80000, 0x8000C},
0541     {0x80010, 0x80020},
0542 };
0543 
0544 static const struct ath10k_mem_section qca6174_hw30_register_sections[] = {
0545     {0x800, 0x810},
0546     {0x820, 0x82C},
0547     {0x830, 0x8F4},
0548     {0x90C, 0x91C},
0549     {0xA14, 0xA18},
0550     {0xA84, 0xA94},
0551     {0xAA8, 0xAD4},
0552     {0xADC, 0xB40},
0553     {0x1000, 0x10A4},
0554     {0x10BC, 0x111C},
0555     {0x1134, 0x1138},
0556     {0x1144, 0x114C},
0557     {0x1150, 0x115C},
0558     {0x1160, 0x1178},
0559     {0x1240, 0x1260},
0560     {0x2000, 0x207C},
0561     {0x3000, 0x3014},
0562     {0x4000, 0x4014},
0563     {0x5000, 0x5124},
0564     {0x6000, 0x6040},
0565     {0x6080, 0x60CC},
0566     {0x6100, 0x611C},
0567     {0x6140, 0x61D8},
0568     {0x6200, 0x6238},
0569     {0x6240, 0x628C},
0570     {0x62C0, 0x62EC},
0571     {0x6380, 0x63E8},
0572     {0x6400, 0x6440},
0573     {0x6480, 0x64CC},
0574     {0x6500, 0x651C},
0575     {0x6540, 0x6580},
0576     {0x6600, 0x6638},
0577     {0x6640, 0x668C},
0578     {0x66C0, 0x66EC},
0579     {0x6780, 0x67E8},
0580     {0x7080, 0x708C},
0581     {0x70C0, 0x70C8},
0582     {0x7400, 0x741C},
0583     {0x7440, 0x7454},
0584     {0x7800, 0x7818},
0585     {0x8000, 0x8004},
0586     {0x8010, 0x8064},
0587     {0x8080, 0x8084},
0588     {0x80A0, 0x80A4},
0589     {0x80C0, 0x80C4},
0590     {0x80E0, 0x80F4},
0591     {0x8100, 0x8104},
0592     {0x8110, 0x812C},
0593     {0x9000, 0x9004},
0594     {0x9800, 0x982C},
0595     {0x9830, 0x9838},
0596     {0x9840, 0x986C},
0597     {0x9870, 0x9898},
0598     {0x9A00, 0x9C00},
0599     {0xD580, 0xD59C},
0600     {0xF000, 0xF0E0},
0601     {0xF140, 0xF190},
0602     {0xF250, 0xF25C},
0603     {0xF260, 0xF268},
0604     {0xF26C, 0xF2A8},
0605     {0x10008, 0x1000C},
0606     {0x10014, 0x10018},
0607     {0x1001C, 0x10020},
0608     {0x10024, 0x10028},
0609     {0x10030, 0x10034},
0610     {0x10040, 0x10054},
0611     {0x10058, 0x1007C},
0612     {0x10080, 0x100C4},
0613     {0x100C8, 0x10114},
0614     {0x1012C, 0x10130},
0615     {0x10138, 0x10144},
0616     {0x10200, 0x10220},
0617     {0x10230, 0x10250},
0618     {0x10260, 0x10280},
0619     {0x10290, 0x102B0},
0620     {0x102C0, 0x102DC},
0621     {0x102E0, 0x102F4},
0622     {0x102FC, 0x1037C},
0623     {0x10380, 0x10390},
0624     {0x10800, 0x10828},
0625     {0x10840, 0x10844},
0626     {0x10880, 0x10884},
0627     {0x108C0, 0x108E8},
0628     {0x10900, 0x10928},
0629     {0x10940, 0x10944},
0630     {0x10980, 0x10984},
0631     {0x109C0, 0x109E8},
0632     {0x10A00, 0x10A28},
0633     {0x10A40, 0x10A50},
0634     {0x11000, 0x11028},
0635     {0x11030, 0x11034},
0636     {0x11038, 0x11068},
0637     {0x11070, 0x11074},
0638     {0x11078, 0x110A8},
0639     {0x110B0, 0x110B4},
0640     {0x110B8, 0x110E8},
0641     {0x110F0, 0x110F4},
0642     {0x110F8, 0x11128},
0643     {0x11138, 0x11144},
0644     {0x11178, 0x11180},
0645     {0x111B8, 0x111C0},
0646     {0x111F8, 0x11200},
0647     {0x11238, 0x1123C},
0648     {0x11270, 0x11274},
0649     {0x11278, 0x1127C},
0650     {0x112B0, 0x112B4},
0651     {0x112B8, 0x112BC},
0652     {0x112F0, 0x112F4},
0653     {0x112F8, 0x112FC},
0654     {0x11338, 0x1133C},
0655     {0x11378, 0x1137C},
0656     {0x113B8, 0x113BC},
0657     {0x113F8, 0x113FC},
0658     {0x11438, 0x11440},
0659     {0x11478, 0x11480},
0660     {0x114B8, 0x114BC},
0661     {0x114F8, 0x114FC},
0662     {0x11538, 0x1153C},
0663     {0x11578, 0x1157C},
0664     {0x115B8, 0x115BC},
0665     {0x115F8, 0x115FC},
0666     {0x11638, 0x1163C},
0667     {0x11678, 0x1167C},
0668     {0x116B8, 0x116BC},
0669     {0x116F8, 0x116FC},
0670     {0x11738, 0x1173C},
0671     {0x11778, 0x1177C},
0672     {0x117B8, 0x117BC},
0673     {0x117F8, 0x117FC},
0674     {0x17000, 0x1701C},
0675     {0x17020, 0x170AC},
0676     {0x18000, 0x18050},
0677     {0x18054, 0x18074},
0678     {0x18080, 0x180D4},
0679     {0x180DC, 0x18104},
0680     {0x18108, 0x1813C},
0681     {0x18144, 0x18148},
0682     {0x18168, 0x18174},
0683     {0x18178, 0x18180},
0684     {0x181C8, 0x181E0},
0685     {0x181E4, 0x181E8},
0686     {0x181EC, 0x1820C},
0687     {0x1825C, 0x18280},
0688     {0x18284, 0x18290},
0689     {0x18294, 0x182A0},
0690     {0x18300, 0x18304},
0691     {0x18314, 0x18320},
0692     {0x18328, 0x18350},
0693     {0x1835C, 0x1836C},
0694     {0x18370, 0x18390},
0695     {0x18398, 0x183AC},
0696     {0x183BC, 0x183D8},
0697     {0x183DC, 0x183F4},
0698     {0x18400, 0x186F4},
0699     {0x186F8, 0x1871C},
0700     {0x18720, 0x18790},
0701     {0x19800, 0x19830},
0702     {0x19834, 0x19840},
0703     {0x19880, 0x1989C},
0704     {0x198A4, 0x198B0},
0705     {0x198BC, 0x19900},
0706     {0x19C00, 0x19C88},
0707     {0x19D00, 0x19D20},
0708     {0x19E00, 0x19E7C},
0709     {0x19E80, 0x19E94},
0710     {0x19E98, 0x19EAC},
0711     {0x19EB0, 0x19EBC},
0712     {0x19F70, 0x19F74},
0713     {0x19F80, 0x19F8C},
0714     {0x19FA0, 0x19FB4},
0715     {0x19FC0, 0x19FD8},
0716     {0x1A000, 0x1A200},
0717     {0x1A204, 0x1A210},
0718     {0x1A228, 0x1A22C},
0719     {0x1A230, 0x1A248},
0720     {0x1A250, 0x1A270},
0721     {0x1A280, 0x1A290},
0722     {0x1A2A0, 0x1A2A4},
0723     {0x1A2C0, 0x1A2EC},
0724     {0x1A300, 0x1A3BC},
0725     {0x1A3F0, 0x1A3F4},
0726     {0x1A3F8, 0x1A434},
0727     {0x1A438, 0x1A444},
0728     {0x1A448, 0x1A468},
0729     {0x1A580, 0x1A58C},
0730     {0x1A644, 0x1A654},
0731     {0x1A670, 0x1A698},
0732     {0x1A6AC, 0x1A6B0},
0733     {0x1A6D0, 0x1A6D4},
0734     {0x1A6EC, 0x1A70C},
0735     {0x1A710, 0x1A738},
0736     {0x1A7C0, 0x1A7D0},
0737     {0x1A7D4, 0x1A7D8},
0738     {0x1A7DC, 0x1A7E4},
0739     {0x1A7F0, 0x1A7F8},
0740     {0x1A888, 0x1A89C},
0741     {0x1A8A8, 0x1A8AC},
0742     {0x1A8C0, 0x1A8DC},
0743     {0x1A8F0, 0x1A8FC},
0744     {0x1AE04, 0x1AE08},
0745     {0x1AE18, 0x1AE24},
0746     {0x1AF80, 0x1AF8C},
0747     {0x1AFA0, 0x1AFB4},
0748     {0x1B000, 0x1B200},
0749     {0x1B284, 0x1B288},
0750     {0x1B2D0, 0x1B2D8},
0751     {0x1B2DC, 0x1B2EC},
0752     {0x1B300, 0x1B340},
0753     {0x1B374, 0x1B378},
0754     {0x1B380, 0x1B384},
0755     {0x1B388, 0x1B38C},
0756     {0x1B404, 0x1B408},
0757     {0x1B420, 0x1B428},
0758     {0x1B440, 0x1B444},
0759     {0x1B448, 0x1B44C},
0760     {0x1B450, 0x1B458},
0761     {0x1B45C, 0x1B468},
0762     {0x1B584, 0x1B58C},
0763     {0x1B68C, 0x1B690},
0764     {0x1B6AC, 0x1B6B0},
0765     {0x1B7F0, 0x1B7F8},
0766     {0x1C800, 0x1CC00},
0767     {0x1CE00, 0x1CE04},
0768     {0x1CF80, 0x1CF84},
0769     {0x1D200, 0x1D800},
0770     {0x1E000, 0x20014},
0771     {0x20100, 0x20124},
0772     {0x21400, 0x217A8},
0773     {0x21800, 0x21BA8},
0774     {0x21C00, 0x21FA8},
0775     {0x22000, 0x223A8},
0776     {0x22400, 0x227A8},
0777     {0x22800, 0x22BA8},
0778     {0x22C00, 0x22FA8},
0779     {0x23000, 0x233A8},
0780     {0x24000, 0x24034},
0781     {0x26000, 0x26064},
0782     {0x27000, 0x27024},
0783     {0x34000, 0x3400C},
0784     {0x34400, 0x3445C},
0785     {0x34800, 0x3485C},
0786     {0x34C00, 0x34C5C},
0787     {0x35000, 0x3505C},
0788     {0x35400, 0x3545C},
0789     {0x35800, 0x3585C},
0790     {0x35C00, 0x35C5C},
0791     {0x36000, 0x3605C},
0792     {0x38000, 0x38064},
0793     {0x38070, 0x380E0},
0794     {0x3A000, 0x3A074},
0795     {0x40000, 0x400A4},
0796     {0x80000, 0x8000C},
0797     {0x80010, 0x80020},
0798 };
0799 
0800 static const struct ath10k_mem_region qca6174_hw10_mem_regions[] = {
0801     {
0802         .type = ATH10K_MEM_REGION_TYPE_DRAM,
0803         .start = 0x400000,
0804         .len = 0x70000,
0805         .name = "DRAM",
0806         .section_table = {
0807             .sections = NULL,
0808             .size = 0,
0809         },
0810     },
0811     {
0812         .type = ATH10K_MEM_REGION_TYPE_REG,
0813 
0814         /* RTC_SOC_BASE_ADDRESS */
0815         .start = 0x0,
0816 
0817         /* WLAN_MBOX_BASE_ADDRESS - RTC_SOC_BASE_ADDRESS */
0818         .len = 0x800 - 0x0,
0819 
0820         .name = "REG_PART1",
0821         .section_table = {
0822             .sections = NULL,
0823             .size = 0,
0824         },
0825     },
0826     {
0827         .type = ATH10K_MEM_REGION_TYPE_REG,
0828 
0829         /* STEREO_BASE_ADDRESS */
0830         .start = 0x27000,
0831 
0832         /* USB_BASE_ADDRESS - STEREO_BASE_ADDRESS */
0833         .len = 0x60000 - 0x27000,
0834 
0835         .name = "REG_PART2",
0836         .section_table = {
0837             .sections = NULL,
0838             .size = 0,
0839         },
0840     },
0841 };
0842 
0843 static const struct ath10k_mem_region qca6174_hw21_mem_regions[] = {
0844     {
0845         .type = ATH10K_MEM_REGION_TYPE_DRAM,
0846         .start = 0x400000,
0847         .len = 0x70000,
0848         .name = "DRAM",
0849         .section_table = {
0850             .sections = NULL,
0851             .size = 0,
0852         },
0853     },
0854     {
0855         .type = ATH10K_MEM_REGION_TYPE_AXI,
0856         .start = 0xa0000,
0857         .len = 0x18000,
0858         .name = "AXI",
0859         .section_table = {
0860             .sections = NULL,
0861             .size = 0,
0862         },
0863     },
0864     {
0865         .type = ATH10K_MEM_REGION_TYPE_REG,
0866         .start = 0x800,
0867         .len = 0x80020 - 0x800,
0868         .name = "REG_TOTAL",
0869         .section_table = {
0870             .sections = qca6174_hw21_register_sections,
0871             .size = ARRAY_SIZE(qca6174_hw21_register_sections),
0872         },
0873     },
0874 };
0875 
0876 static const struct ath10k_mem_region qca6174_hw30_sdio_mem_regions[] = {
0877     {
0878         .type = ATH10K_MEM_REGION_TYPE_DRAM,
0879         .start = 0x400000,
0880         .len = 0xa8000,
0881         .name = "DRAM",
0882         .section_table = {
0883             .sections = NULL,
0884             .size = 0,
0885         },
0886     },
0887     {
0888         .type = ATH10K_MEM_REGION_TYPE_AXI,
0889         .start = 0xa0000,
0890         .len = 0x18000,
0891         .name = "AXI",
0892         .section_table = {
0893             .sections = NULL,
0894             .size = 0,
0895         },
0896     },
0897     {
0898         .type = ATH10K_MEM_REGION_TYPE_IRAM1,
0899         .start = 0x00980000,
0900         .len = 0x00080000,
0901         .name = "IRAM1",
0902         .section_table = {
0903             .sections = NULL,
0904             .size = 0,
0905         },
0906     },
0907     {
0908         .type = ATH10K_MEM_REGION_TYPE_IRAM2,
0909         .start = 0x00a00000,
0910         .len = 0x00040000,
0911         .name = "IRAM2",
0912         .section_table = {
0913             .sections = NULL,
0914             .size = 0,
0915         },
0916     },
0917     {
0918         .type = ATH10K_MEM_REGION_TYPE_REG,
0919         .start = 0x800,
0920         .len = 0x80020 - 0x800,
0921         .name = "REG_TOTAL",
0922         .section_table = {
0923             .sections = qca6174_hw30_sdio_register_sections,
0924             .size = ARRAY_SIZE(qca6174_hw30_sdio_register_sections),
0925         },
0926     },
0927 };
0928 
0929 static const struct ath10k_mem_region qca6174_hw30_mem_regions[] = {
0930     {
0931         .type = ATH10K_MEM_REGION_TYPE_DRAM,
0932         .start = 0x400000,
0933         .len = 0xa8000,
0934         .name = "DRAM",
0935         .section_table = {
0936             .sections = NULL,
0937             .size = 0,
0938         },
0939     },
0940     {
0941         .type = ATH10K_MEM_REGION_TYPE_AXI,
0942         .start = 0xa0000,
0943         .len = 0x18000,
0944         .name = "AXI",
0945         .section_table = {
0946             .sections = NULL,
0947             .size = 0,
0948         },
0949     },
0950     {
0951         .type = ATH10K_MEM_REGION_TYPE_REG,
0952         .start = 0x800,
0953         .len = 0x80020 - 0x800,
0954         .name = "REG_TOTAL",
0955         .section_table = {
0956             .sections = qca6174_hw30_register_sections,
0957             .size = ARRAY_SIZE(qca6174_hw30_register_sections),
0958         },
0959     },
0960 
0961     /* IRAM dump must be put last */
0962     {
0963         .type = ATH10K_MEM_REGION_TYPE_IRAM1,
0964         .start = 0x00980000,
0965         .len = 0x00080000,
0966         .name = "IRAM1",
0967         .section_table = {
0968             .sections = NULL,
0969             .size = 0,
0970         },
0971     },
0972     {
0973         .type = ATH10K_MEM_REGION_TYPE_IRAM2,
0974         .start = 0x00a00000,
0975         .len = 0x00040000,
0976         .name = "IRAM2",
0977         .section_table = {
0978             .sections = NULL,
0979             .size = 0,
0980         },
0981     },
0982 };
0983 
0984 static const struct ath10k_mem_region qca988x_hw20_mem_regions[] = {
0985     {
0986         .type = ATH10K_MEM_REGION_TYPE_DRAM,
0987         .start = 0x400000,
0988         .len = 0x50000,
0989         .name = "DRAM",
0990         .section_table = {
0991             .sections = NULL,
0992             .size = 0,
0993         },
0994     },
0995     {
0996         .type = ATH10K_MEM_REGION_TYPE_REG,
0997         .start = 0x4000,
0998         .len = 0x2000,
0999         .name = "REG_PART1",
1000         .section_table = {
1001             .sections = NULL,
1002             .size = 0,
1003         },
1004     },
1005     {
1006         .type = ATH10K_MEM_REGION_TYPE_REG,
1007         .start = 0x8000,
1008         .len = 0x58000,
1009         .name = "REG_PART2",
1010         .section_table = {
1011             .sections = NULL,
1012             .size = 0,
1013         },
1014     },
1015 };
1016 
1017 static const struct ath10k_mem_region qca99x0_hw20_mem_regions[] = {
1018     {
1019         .type = ATH10K_MEM_REGION_TYPE_DRAM,
1020         .start = 0x400000,
1021         .len = 0x60000,
1022         .name = "DRAM",
1023         .section_table = {
1024             .sections = NULL,
1025             .size = 0,
1026         },
1027     },
1028     {
1029         .type = ATH10K_MEM_REGION_TYPE_REG,
1030         .start = 0x980000,
1031         .len = 0x50000,
1032         .name = "IRAM",
1033         .section_table = {
1034             .sections = NULL,
1035             .size = 0,
1036         },
1037     },
1038     {
1039         .type = ATH10K_MEM_REGION_TYPE_IOSRAM,
1040         .start = 0xC0000,
1041         .len = 0x40000,
1042         .name = "SRAM",
1043         .section_table = {
1044             .sections = NULL,
1045             .size = 0,
1046         },
1047     },
1048     {
1049         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1050         .start = 0x30000,
1051         .len = 0x7000,
1052         .name = "APB REG 1",
1053         .section_table = {
1054             .sections = NULL,
1055             .size = 0,
1056         },
1057     },
1058     {
1059         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1060         .start = 0x3f000,
1061         .len = 0x3000,
1062         .name = "APB REG 2",
1063         .section_table = {
1064             .sections = NULL,
1065             .size = 0,
1066         },
1067     },
1068     {
1069         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1070         .start = 0x43000,
1071         .len = 0x3000,
1072         .name = "WIFI REG",
1073         .section_table = {
1074             .sections = NULL,
1075             .size = 0,
1076         },
1077     },
1078     {
1079         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1080         .start = 0x4A000,
1081         .len = 0x5000,
1082         .name = "CE REG",
1083         .section_table = {
1084             .sections = NULL,
1085             .size = 0,
1086         },
1087     },
1088     {
1089         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1090         .start = 0x80000,
1091         .len = 0x6000,
1092         .name = "SOC REG",
1093         .section_table = {
1094             .sections = NULL,
1095             .size = 0,
1096         },
1097     },
1098 };
1099 
1100 static const struct ath10k_mem_region qca9984_hw10_mem_regions[] = {
1101     {
1102         .type = ATH10K_MEM_REGION_TYPE_DRAM,
1103         .start = 0x400000,
1104         .len = 0x80000,
1105         .name = "DRAM",
1106         .section_table = {
1107             .sections = NULL,
1108             .size = 0,
1109         },
1110     },
1111     {
1112         .type = ATH10K_MEM_REGION_TYPE_REG,
1113         .start = 0x980000,
1114         .len = 0x50000,
1115         .name = "IRAM",
1116         .section_table = {
1117             .sections = NULL,
1118             .size = 0,
1119         },
1120     },
1121     {
1122         .type = ATH10K_MEM_REGION_TYPE_IOSRAM,
1123         .start = 0xC0000,
1124         .len = 0x40000,
1125         .name = "SRAM",
1126         .section_table = {
1127             .sections = NULL,
1128             .size = 0,
1129         },
1130     },
1131     {
1132         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1133         .start = 0x30000,
1134         .len = 0x7000,
1135         .name = "APB REG 1",
1136         .section_table = {
1137             .sections = NULL,
1138             .size = 0,
1139         },
1140     },
1141     {
1142         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1143         .start = 0x3f000,
1144         .len = 0x3000,
1145         .name = "APB REG 2",
1146         .section_table = {
1147             .sections = NULL,
1148             .size = 0,
1149         },
1150     },
1151     {
1152         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1153         .start = 0x43000,
1154         .len = 0x3000,
1155         .name = "WIFI REG",
1156         .section_table = {
1157             .sections = NULL,
1158             .size = 0,
1159         },
1160     },
1161     {
1162         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1163         .start = 0x4A000,
1164         .len = 0x5000,
1165         .name = "CE REG",
1166         .section_table = {
1167             .sections = NULL,
1168             .size = 0,
1169         },
1170     },
1171     {
1172         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1173         .start = 0x80000,
1174         .len = 0x6000,
1175         .name = "SOC REG",
1176         .section_table = {
1177             .sections = NULL,
1178             .size = 0,
1179         },
1180     },
1181 };
1182 
1183 static const struct ath10k_mem_section ipq4019_soc_reg_range[] = {
1184     {0x080000, 0x080004},
1185     {0x080020, 0x080024},
1186     {0x080028, 0x080050},
1187     {0x0800d4, 0x0800ec},
1188     {0x08010c, 0x080118},
1189     {0x080284, 0x080290},
1190     {0x0802a8, 0x0802b8},
1191     {0x0802dc, 0x08030c},
1192     {0x082000, 0x083fff}
1193 };
1194 
1195 static const struct ath10k_mem_region qca4019_hw10_mem_regions[] = {
1196     {
1197         .type = ATH10K_MEM_REGION_TYPE_DRAM,
1198         .start = 0x400000,
1199         .len = 0x68000,
1200         .name = "DRAM",
1201         .section_table = {
1202             .sections = NULL,
1203             .size = 0,
1204         },
1205     },
1206     {
1207         .type = ATH10K_MEM_REGION_TYPE_REG,
1208         .start = 0xC0000,
1209         .len = 0x40000,
1210         .name = "SRAM",
1211         .section_table = {
1212             .sections = NULL,
1213             .size = 0,
1214         },
1215     },
1216     {
1217         .type = ATH10K_MEM_REGION_TYPE_REG,
1218         .start = 0x980000,
1219         .len = 0x50000,
1220         .name = "IRAM",
1221         .section_table = {
1222             .sections = NULL,
1223             .size = 0,
1224         },
1225     },
1226     {
1227         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1228         .start = 0x30000,
1229         .len = 0x7000,
1230         .name = "APB REG 1",
1231         .section_table = {
1232             .sections = NULL,
1233             .size = 0,
1234         },
1235     },
1236     {
1237         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1238         .start = 0x3f000,
1239         .len = 0x3000,
1240         .name = "APB REG 2",
1241         .section_table = {
1242             .sections = NULL,
1243             .size = 0,
1244         },
1245     },
1246     {
1247         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1248         .start = 0x43000,
1249         .len = 0x3000,
1250         .name = "WIFI REG",
1251         .section_table = {
1252             .sections = NULL,
1253             .size = 0,
1254         },
1255     },
1256     {
1257         .type = ATH10K_MEM_REGION_TYPE_IOREG,
1258         .start = 0x4A000,
1259         .len = 0x5000,
1260         .name = "CE REG",
1261         .section_table = {
1262             .sections = NULL,
1263             .size = 0,
1264         },
1265     },
1266     {
1267         .type = ATH10K_MEM_REGION_TYPE_REG,
1268         .start = 0x080000,
1269         .len = 0x083fff - 0x080000,
1270         .name = "REG_TOTAL",
1271         .section_table = {
1272             .sections = ipq4019_soc_reg_range,
1273             .size = ARRAY_SIZE(ipq4019_soc_reg_range),
1274         },
1275     },
1276 };
1277 
1278 static const struct ath10k_mem_region wcn399x_hw10_mem_regions[] = {
1279     {
1280         /* MSA region start is not fixed, hence it is assigned at runtime */
1281         .type = ATH10K_MEM_REGION_TYPE_MSA,
1282         .len = 0x100000,
1283         .name = "DRAM",
1284         .section_table = {
1285             .sections = NULL,
1286             .size = 0,
1287         },
1288     },
1289 };
1290 
1291 static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
1292     {
1293         .hw_id = QCA6174_HW_1_0_VERSION,
1294         .hw_rev = ATH10K_HW_QCA6174,
1295         .bus = ATH10K_BUS_PCI,
1296         .region_table = {
1297             .regions = qca6174_hw10_mem_regions,
1298             .size = ARRAY_SIZE(qca6174_hw10_mem_regions),
1299         },
1300     },
1301     {
1302         .hw_id = QCA6174_HW_1_1_VERSION,
1303         .hw_rev = ATH10K_HW_QCA6174,
1304         .bus = ATH10K_BUS_PCI,
1305         .region_table = {
1306             .regions = qca6174_hw10_mem_regions,
1307             .size = ARRAY_SIZE(qca6174_hw10_mem_regions),
1308         },
1309     },
1310     {
1311         .hw_id = QCA6174_HW_1_3_VERSION,
1312         .hw_rev = ATH10K_HW_QCA6174,
1313         .bus = ATH10K_BUS_PCI,
1314         .region_table = {
1315             .regions = qca6174_hw10_mem_regions,
1316             .size = ARRAY_SIZE(qca6174_hw10_mem_regions),
1317         },
1318     },
1319     {
1320         .hw_id = QCA6174_HW_2_1_VERSION,
1321         .hw_rev = ATH10K_HW_QCA6174,
1322         .bus = ATH10K_BUS_PCI,
1323         .region_table = {
1324             .regions = qca6174_hw21_mem_regions,
1325             .size = ARRAY_SIZE(qca6174_hw21_mem_regions),
1326         },
1327     },
1328     {
1329         .hw_id = QCA6174_HW_3_0_VERSION,
1330         .hw_rev = ATH10K_HW_QCA6174,
1331         .bus = ATH10K_BUS_PCI,
1332         .region_table = {
1333             .regions = qca6174_hw30_mem_regions,
1334             .size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1335         },
1336     },
1337     {
1338         .hw_id = QCA6174_HW_3_2_VERSION,
1339         .hw_rev = ATH10K_HW_QCA6174,
1340         .bus = ATH10K_BUS_PCI,
1341         .region_table = {
1342             .regions = qca6174_hw30_mem_regions,
1343             .size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1344         },
1345     },
1346     {
1347         .hw_id = QCA6174_HW_3_2_VERSION,
1348         .hw_rev = ATH10K_HW_QCA6174,
1349         .bus = ATH10K_BUS_SDIO,
1350         .region_table = {
1351             .regions = qca6174_hw30_sdio_mem_regions,
1352             .size = ARRAY_SIZE(qca6174_hw30_sdio_mem_regions),
1353         },
1354     },
1355     {
1356         .hw_id = QCA9377_HW_1_1_DEV_VERSION,
1357         .hw_rev = ATH10K_HW_QCA9377,
1358         .bus = ATH10K_BUS_PCI,
1359         .region_table = {
1360             .regions = qca6174_hw30_mem_regions,
1361             .size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1362         },
1363     },
1364     {
1365         .hw_id = QCA988X_HW_2_0_VERSION,
1366         .hw_rev = ATH10K_HW_QCA988X,
1367         .bus = ATH10K_BUS_PCI,
1368         .region_table = {
1369             .regions = qca988x_hw20_mem_regions,
1370             .size = ARRAY_SIZE(qca988x_hw20_mem_regions),
1371         },
1372     },
1373     {
1374         .hw_id = QCA9984_HW_1_0_DEV_VERSION,
1375         .hw_rev = ATH10K_HW_QCA9984,
1376         .bus = ATH10K_BUS_PCI,
1377         .region_table = {
1378             .regions = qca9984_hw10_mem_regions,
1379             .size = ARRAY_SIZE(qca9984_hw10_mem_regions),
1380         },
1381     },
1382     {
1383         .hw_id = QCA9888_HW_2_0_DEV_VERSION,
1384         .hw_rev = ATH10K_HW_QCA9888,
1385         .bus = ATH10K_BUS_PCI,
1386         .region_table = {
1387             .regions = qca9984_hw10_mem_regions,
1388             .size = ARRAY_SIZE(qca9984_hw10_mem_regions),
1389         },
1390     },
1391     {
1392         .hw_id = QCA99X0_HW_2_0_DEV_VERSION,
1393         .hw_rev = ATH10K_HW_QCA99X0,
1394         .bus = ATH10K_BUS_PCI,
1395         .region_table = {
1396             .regions = qca99x0_hw20_mem_regions,
1397             .size = ARRAY_SIZE(qca99x0_hw20_mem_regions),
1398         },
1399     },
1400     {
1401         .hw_id = QCA4019_HW_1_0_DEV_VERSION,
1402         .hw_rev = ATH10K_HW_QCA4019,
1403         .bus = ATH10K_BUS_AHB,
1404         .region_table = {
1405             .regions = qca4019_hw10_mem_regions,
1406             .size = ARRAY_SIZE(qca4019_hw10_mem_regions),
1407         },
1408     },
1409     {
1410         .hw_id = WCN3990_HW_1_0_DEV_VERSION,
1411         .hw_rev = ATH10K_HW_WCN3990,
1412         .bus = ATH10K_BUS_SNOC,
1413         .region_table = {
1414             .regions = wcn399x_hw10_mem_regions,
1415             .size = ARRAY_SIZE(wcn399x_hw10_mem_regions),
1416         },
1417     },
1418 };
1419 
1420 static u32 ath10k_coredump_get_ramdump_size(struct ath10k *ar)
1421 {
1422     const struct ath10k_hw_mem_layout *hw;
1423     const struct ath10k_mem_region *mem_region;
1424     size_t size = 0;
1425     int i;
1426 
1427     hw = ath10k_coredump_get_mem_layout(ar);
1428 
1429     if (!hw)
1430         return 0;
1431 
1432     mem_region = &hw->region_table.regions[0];
1433 
1434     for (i = 0; i < hw->region_table.size; i++) {
1435         size += mem_region->len;
1436         mem_region++;
1437     }
1438 
1439     /* reserve space for the headers */
1440     size += hw->region_table.size * sizeof(struct ath10k_dump_ram_data_hdr);
1441 
1442     /* make sure it is aligned 16 bytes for debug message print out */
1443     size = ALIGN(size, 16);
1444 
1445     return size;
1446 }
1447 
1448 const struct ath10k_hw_mem_layout *ath10k_coredump_get_mem_layout(struct ath10k *ar)
1449 {
1450     if (!test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask))
1451         return NULL;
1452 
1453     return _ath10k_coredump_get_mem_layout(ar);
1454 }
1455 EXPORT_SYMBOL(ath10k_coredump_get_mem_layout);
1456 
1457 const struct ath10k_hw_mem_layout *_ath10k_coredump_get_mem_layout(struct ath10k *ar)
1458 {
1459     int i;
1460 
1461     if (WARN_ON(ar->target_version == 0))
1462         return NULL;
1463 
1464     for (i = 0; i < ARRAY_SIZE(hw_mem_layouts); i++) {
1465         if (ar->target_version == hw_mem_layouts[i].hw_id &&
1466             ar->hw_rev == hw_mem_layouts[i].hw_rev &&
1467             hw_mem_layouts[i].bus == ar->hif.bus)
1468             return &hw_mem_layouts[i];
1469     }
1470 
1471     return NULL;
1472 }
1473 
1474 struct ath10k_fw_crash_data *ath10k_coredump_new(struct ath10k *ar)
1475 {
1476     struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1477 
1478     lockdep_assert_held(&ar->dump_mutex);
1479 
1480     if (ath10k_coredump_mask == 0)
1481         /* coredump disabled */
1482         return NULL;
1483 
1484     guid_gen(&crash_data->guid);
1485     ktime_get_real_ts64(&crash_data->timestamp);
1486 
1487     return crash_data;
1488 }
1489 EXPORT_SYMBOL(ath10k_coredump_new);
1490 
1491 static struct ath10k_dump_file_data *ath10k_coredump_build(struct ath10k *ar)
1492 {
1493     struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1494     struct ath10k_ce_crash_hdr *ce_hdr;
1495     struct ath10k_dump_file_data *dump_data;
1496     struct ath10k_tlv_dump_data *dump_tlv;
1497     size_t hdr_len = sizeof(*dump_data);
1498     size_t len, sofar = 0;
1499     unsigned char *buf;
1500 
1501     len = hdr_len;
1502 
1503     if (test_bit(ATH10K_FW_CRASH_DUMP_REGISTERS, &ath10k_coredump_mask))
1504         len += sizeof(*dump_tlv) + sizeof(crash_data->registers);
1505 
1506     if (test_bit(ATH10K_FW_CRASH_DUMP_CE_DATA, &ath10k_coredump_mask))
1507         len += sizeof(*dump_tlv) + sizeof(*ce_hdr) +
1508             CE_COUNT * sizeof(ce_hdr->entries[0]);
1509 
1510     if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask))
1511         len += sizeof(*dump_tlv) + crash_data->ramdump_buf_len;
1512 
1513     sofar += hdr_len;
1514 
1515     /* This is going to get big when we start dumping FW RAM and such,
1516      * so go ahead and use vmalloc.
1517      */
1518     buf = vzalloc(len);
1519     if (!buf)
1520         return NULL;
1521 
1522     mutex_lock(&ar->dump_mutex);
1523 
1524     dump_data = (struct ath10k_dump_file_data *)(buf);
1525     strscpy(dump_data->df_magic, "ATH10K-FW-DUMP",
1526         sizeof(dump_data->df_magic));
1527     dump_data->len = cpu_to_le32(len);
1528 
1529     dump_data->version = cpu_to_le32(ATH10K_FW_CRASH_DUMP_VERSION);
1530 
1531     guid_copy(&dump_data->guid, &crash_data->guid);
1532     dump_data->chip_id = cpu_to_le32(ar->bus_param.chip_id);
1533     dump_data->bus_type = cpu_to_le32(0);
1534     dump_data->target_version = cpu_to_le32(ar->target_version);
1535     dump_data->fw_version_major = cpu_to_le32(ar->fw_version_major);
1536     dump_data->fw_version_minor = cpu_to_le32(ar->fw_version_minor);
1537     dump_data->fw_version_release = cpu_to_le32(ar->fw_version_release);
1538     dump_data->fw_version_build = cpu_to_le32(ar->fw_version_build);
1539     dump_data->phy_capability = cpu_to_le32(ar->phy_capability);
1540     dump_data->hw_min_tx_power = cpu_to_le32(ar->hw_min_tx_power);
1541     dump_data->hw_max_tx_power = cpu_to_le32(ar->hw_max_tx_power);
1542     dump_data->ht_cap_info = cpu_to_le32(ar->ht_cap_info);
1543     dump_data->vht_cap_info = cpu_to_le32(ar->vht_cap_info);
1544     dump_data->num_rf_chains = cpu_to_le32(ar->num_rf_chains);
1545 
1546     strscpy(dump_data->fw_ver, ar->hw->wiphy->fw_version,
1547         sizeof(dump_data->fw_ver));
1548 
1549     dump_data->kernel_ver_code = 0;
1550     strscpy(dump_data->kernel_ver, init_utsname()->release,
1551         sizeof(dump_data->kernel_ver));
1552 
1553     dump_data->tv_sec = cpu_to_le64(crash_data->timestamp.tv_sec);
1554     dump_data->tv_nsec = cpu_to_le64(crash_data->timestamp.tv_nsec);
1555 
1556     if (test_bit(ATH10K_FW_CRASH_DUMP_REGISTERS, &ath10k_coredump_mask)) {
1557         dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1558         dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_REGISTERS);
1559         dump_tlv->tlv_len = cpu_to_le32(sizeof(crash_data->registers));
1560         memcpy(dump_tlv->tlv_data, &crash_data->registers,
1561                sizeof(crash_data->registers));
1562         sofar += sizeof(*dump_tlv) + sizeof(crash_data->registers);
1563     }
1564 
1565     if (test_bit(ATH10K_FW_CRASH_DUMP_CE_DATA, &ath10k_coredump_mask)) {
1566         dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1567         dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_CE_DATA);
1568         dump_tlv->tlv_len = cpu_to_le32(struct_size(ce_hdr, entries,
1569                                 CE_COUNT));
1570         ce_hdr = (struct ath10k_ce_crash_hdr *)(dump_tlv->tlv_data);
1571         ce_hdr->ce_count = cpu_to_le32(CE_COUNT);
1572         memset(ce_hdr->reserved, 0, sizeof(ce_hdr->reserved));
1573         memcpy(ce_hdr->entries, crash_data->ce_crash_data,
1574                CE_COUNT * sizeof(ce_hdr->entries[0]));
1575         sofar += sizeof(*dump_tlv) + sizeof(*ce_hdr) +
1576             CE_COUNT * sizeof(ce_hdr->entries[0]);
1577     }
1578 
1579     /* Gather ram dump */
1580     if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask)) {
1581         dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1582         dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_RAM_DATA);
1583         dump_tlv->tlv_len = cpu_to_le32(crash_data->ramdump_buf_len);
1584         if (crash_data->ramdump_buf_len) {
1585             memcpy(dump_tlv->tlv_data, crash_data->ramdump_buf,
1586                    crash_data->ramdump_buf_len);
1587             sofar += sizeof(*dump_tlv) + crash_data->ramdump_buf_len;
1588         }
1589     }
1590 
1591     mutex_unlock(&ar->dump_mutex);
1592 
1593     return dump_data;
1594 }
1595 
1596 int ath10k_coredump_submit(struct ath10k *ar)
1597 {
1598     struct ath10k_dump_file_data *dump;
1599 
1600     if (ath10k_coredump_mask == 0)
1601         /* coredump disabled */
1602         return 0;
1603 
1604     dump = ath10k_coredump_build(ar);
1605     if (!dump) {
1606         ath10k_warn(ar, "no crash dump data found for devcoredump");
1607         return -ENODATA;
1608     }
1609 
1610     dev_coredumpv(ar->dev, dump, le32_to_cpu(dump->len), GFP_KERNEL);
1611 
1612     return 0;
1613 }
1614 
1615 int ath10k_coredump_create(struct ath10k *ar)
1616 {
1617     if (ath10k_coredump_mask == 0)
1618         /* coredump disabled */
1619         return 0;
1620 
1621     ar->coredump.fw_crash_data = vzalloc(sizeof(*ar->coredump.fw_crash_data));
1622     if (!ar->coredump.fw_crash_data)
1623         return -ENOMEM;
1624 
1625     return 0;
1626 }
1627 
1628 int ath10k_coredump_register(struct ath10k *ar)
1629 {
1630     struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1631 
1632     if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask)) {
1633         crash_data->ramdump_buf_len = ath10k_coredump_get_ramdump_size(ar);
1634 
1635         if (!crash_data->ramdump_buf_len)
1636             return 0;
1637 
1638         crash_data->ramdump_buf = vzalloc(crash_data->ramdump_buf_len);
1639         if (!crash_data->ramdump_buf)
1640             return -ENOMEM;
1641     }
1642 
1643     return 0;
1644 }
1645 
1646 void ath10k_coredump_unregister(struct ath10k *ar)
1647 {
1648     struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1649 
1650     vfree(crash_data->ramdump_buf);
1651 }
1652 
1653 void ath10k_coredump_destroy(struct ath10k *ar)
1654 {
1655     if (ar->coredump.fw_crash_data->ramdump_buf) {
1656         vfree(ar->coredump.fw_crash_data->ramdump_buf);
1657         ar->coredump.fw_crash_data->ramdump_buf = NULL;
1658         ar->coredump.fw_crash_data->ramdump_buf_len = 0;
1659     }
1660 
1661     vfree(ar->coredump.fw_crash_data);
1662     ar->coredump.fw_crash_data = NULL;
1663 }
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