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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Hitachi (now Renesas) SCA-II HD64572 driver for Linux
0004  *
0005  * Copyright (C) 1998-2008 Krzysztof Halasa <khc@pm.waw.pl>
0006  *
0007  * Source of information: HD64572 SCA-II User's Manual
0008  *
0009  * We use the following SCA memory map:
0010  *
0011  * Packet buffer descriptor rings - starting from card->rambase:
0012  * rx_ring_buffers * sizeof(pkt_desc) = logical channel #0 RX ring
0013  * tx_ring_buffers * sizeof(pkt_desc) = logical channel #0 TX ring
0014  * rx_ring_buffers * sizeof(pkt_desc) = logical channel #1 RX ring (if used)
0015  * tx_ring_buffers * sizeof(pkt_desc) = logical channel #1 TX ring (if used)
0016  *
0017  * Packet data buffers - starting from card->rambase + buff_offset:
0018  * rx_ring_buffers * HDLC_MAX_MRU     = logical channel #0 RX buffers
0019  * tx_ring_buffers * HDLC_MAX_MRU     = logical channel #0 TX buffers
0020  * rx_ring_buffers * HDLC_MAX_MRU     = logical channel #0 RX buffers (if used)
0021  * tx_ring_buffers * HDLC_MAX_MRU     = logical channel #0 TX buffers (if used)
0022  */
0023 
0024 #include <linux/bitops.h>
0025 #include <linux/errno.h>
0026 #include <linux/fcntl.h>
0027 #include <linux/hdlc.h>
0028 #include <linux/in.h>
0029 #include <linux/interrupt.h>
0030 #include <linux/ioport.h>
0031 #include <linux/jiffies.h>
0032 #include <linux/kernel.h>
0033 #include <linux/module.h>
0034 #include <linux/netdevice.h>
0035 #include <linux/skbuff.h>
0036 #include <linux/string.h>
0037 #include <linux/types.h>
0038 #include <asm/io.h>
0039 #include <linux/uaccess.h>
0040 #include "hd64572.h"
0041 
0042 #define NAPI_WEIGHT     16
0043 
0044 #define get_msci(port)    ((port)->chan ?   MSCI1_OFFSET :   MSCI0_OFFSET)
0045 #define get_dmac_rx(port) ((port)->chan ? DMAC1RX_OFFSET : DMAC0RX_OFFSET)
0046 #define get_dmac_tx(port) ((port)->chan ? DMAC1TX_OFFSET : DMAC0TX_OFFSET)
0047 
0048 #define sca_in(reg, card)        readb((card)->scabase + (reg))
0049 #define sca_out(value, reg, card)    writeb(value, (card)->scabase + (reg))
0050 #define sca_inw(reg, card)       readw((card)->scabase + (reg))
0051 #define sca_outw(value, reg, card)   writew(value, (card)->scabase + (reg))
0052 #define sca_inl(reg, card)       readl((card)->scabase + (reg))
0053 #define sca_outl(value, reg, card)   writel(value, (card)->scabase + (reg))
0054 
0055 static int sca_poll(struct napi_struct *napi, int budget);
0056 
0057 static inline port_t *dev_to_port(struct net_device *dev)
0058 {
0059     return dev_to_hdlc(dev)->priv;
0060 }
0061 
0062 static inline void enable_intr(port_t *port)
0063 {
0064     /* enable DMIB and MSCI RXINTA interrupts */
0065     sca_outl(sca_inl(IER0, port->card) |
0066          (port->chan ? 0x08002200 : 0x00080022), IER0, port->card);
0067 }
0068 
0069 static inline void disable_intr(port_t *port)
0070 {
0071     sca_outl(sca_inl(IER0, port->card) &
0072          (port->chan ? 0x00FF00FF : 0xFF00FF00), IER0, port->card);
0073 }
0074 
0075 static inline u16 desc_abs_number(port_t *port, u16 desc, int transmit)
0076 {
0077     u16 rx_buffs = port->card->rx_ring_buffers;
0078     u16 tx_buffs = port->card->tx_ring_buffers;
0079 
0080     desc %= (transmit ? tx_buffs : rx_buffs); // called with "X + 1" etc.
0081     return port->chan * (rx_buffs + tx_buffs) + transmit * rx_buffs + desc;
0082 }
0083 
0084 static inline u16 desc_offset(port_t *port, u16 desc, int transmit)
0085 {
0086     /* Descriptor offset always fits in 16 bits */
0087     return desc_abs_number(port, desc, transmit) * sizeof(pkt_desc);
0088 }
0089 
0090 static inline pkt_desc __iomem *desc_address(port_t *port, u16 desc,
0091                          int transmit)
0092 {
0093     return (pkt_desc __iomem *)(port->card->rambase +
0094                     desc_offset(port, desc, transmit));
0095 }
0096 
0097 static inline u32 buffer_offset(port_t *port, u16 desc, int transmit)
0098 {
0099     return port->card->buff_offset +
0100         desc_abs_number(port, desc, transmit) * (u32)HDLC_MAX_MRU;
0101 }
0102 
0103 static inline void sca_set_carrier(port_t *port)
0104 {
0105     if (!(sca_in(get_msci(port) + ST3, port->card) & ST3_DCD)) {
0106 #ifdef DEBUG_LINK
0107         printk(KERN_DEBUG "%s: sca_set_carrier on\n",
0108                port->netdev.name);
0109 #endif
0110         netif_carrier_on(port->netdev);
0111     } else {
0112 #ifdef DEBUG_LINK
0113         printk(KERN_DEBUG "%s: sca_set_carrier off\n",
0114                port->netdev.name);
0115 #endif
0116         netif_carrier_off(port->netdev);
0117     }
0118 }
0119 
0120 static void sca_init_port(port_t *port)
0121 {
0122     card_t *card = port->card;
0123     u16 dmac_rx = get_dmac_rx(port), dmac_tx = get_dmac_tx(port);
0124     int transmit, i;
0125 
0126     port->rxin = 0;
0127     port->txin = 0;
0128     port->txlast = 0;
0129 
0130     for (transmit = 0; transmit < 2; transmit++) {
0131         u16 buffs = transmit ? card->tx_ring_buffers
0132             : card->rx_ring_buffers;
0133 
0134         for (i = 0; i < buffs; i++) {
0135             pkt_desc __iomem *desc = desc_address(port, i, transmit);
0136             u16 chain_off = desc_offset(port, i + 1, transmit);
0137             u32 buff_off = buffer_offset(port, i, transmit);
0138 
0139             writel(chain_off, &desc->cp);
0140             writel(buff_off, &desc->bp);
0141             writew(0, &desc->len);
0142             writeb(0, &desc->stat);
0143         }
0144     }
0145 
0146     /* DMA disable - to halt state */
0147     sca_out(0, DSR_RX(port->chan), card);
0148     sca_out(0, DSR_TX(port->chan), card);
0149 
0150     /* software ABORT - to initial state */
0151     sca_out(DCR_ABORT, DCR_RX(port->chan), card);
0152     sca_out(DCR_ABORT, DCR_TX(port->chan), card);
0153 
0154     /* current desc addr */
0155     sca_outl(desc_offset(port, 0, 0), dmac_rx + CDAL, card);
0156     sca_outl(desc_offset(port, card->tx_ring_buffers - 1, 0),
0157          dmac_rx + EDAL, card);
0158     sca_outl(desc_offset(port, 0, 1), dmac_tx + CDAL, card);
0159     sca_outl(desc_offset(port, 0, 1), dmac_tx + EDAL, card);
0160 
0161     /* clear frame end interrupt counter */
0162     sca_out(DCR_CLEAR_EOF, DCR_RX(port->chan), card);
0163     sca_out(DCR_CLEAR_EOF, DCR_TX(port->chan), card);
0164 
0165     /* Receive */
0166     sca_outw(HDLC_MAX_MRU, dmac_rx + BFLL, card); /* set buffer length */
0167     sca_out(0x14, DMR_RX(port->chan), card); /* Chain mode, Multi-frame */
0168     sca_out(DIR_EOME, DIR_RX(port->chan), card); /* enable interrupts */
0169     sca_out(DSR_DE, DSR_RX(port->chan), card); /* DMA enable */
0170 
0171     /* Transmit */
0172     sca_out(0x14, DMR_TX(port->chan), card); /* Chain mode, Multi-frame */
0173     sca_out(DIR_EOME, DIR_TX(port->chan), card); /* enable interrupts */
0174 
0175     sca_set_carrier(port);
0176     netif_napi_add_weight(port->netdev, &port->napi, sca_poll,
0177                   NAPI_WEIGHT);
0178 }
0179 
0180 /* MSCI interrupt service */
0181 static inline void sca_msci_intr(port_t *port)
0182 {
0183     u16 msci = get_msci(port);
0184     card_t *card = port->card;
0185 
0186     if (sca_in(msci + ST1, card) & ST1_CDCD) {
0187         /* Reset MSCI CDCD status bit */
0188         sca_out(ST1_CDCD, msci + ST1, card);
0189         sca_set_carrier(port);
0190     }
0191 }
0192 
0193 static inline void sca_rx(card_t *card, port_t *port, pkt_desc __iomem *desc,
0194               u16 rxin)
0195 {
0196     struct net_device *dev = port->netdev;
0197     struct sk_buff *skb;
0198     u16 len;
0199     u32 buff;
0200 
0201     len = readw(&desc->len);
0202     skb = dev_alloc_skb(len);
0203     if (!skb) {
0204         dev->stats.rx_dropped++;
0205         return;
0206     }
0207 
0208     buff = buffer_offset(port, rxin, 0);
0209     memcpy_fromio(skb->data, card->rambase + buff, len);
0210 
0211     skb_put(skb, len);
0212 #ifdef DEBUG_PKT
0213     printk(KERN_DEBUG "%s RX(%i):", dev->name, skb->len);
0214     debug_frame(skb);
0215 #endif
0216     dev->stats.rx_packets++;
0217     dev->stats.rx_bytes += skb->len;
0218     skb->protocol = hdlc_type_trans(skb, dev);
0219     netif_receive_skb(skb);
0220 }
0221 
0222 /* Receive DMA service */
0223 static inline int sca_rx_done(port_t *port, int budget)
0224 {
0225     struct net_device *dev = port->netdev;
0226     u16 dmac = get_dmac_rx(port);
0227     card_t *card = port->card;
0228     u8 stat = sca_in(DSR_RX(port->chan), card); /* read DMA Status */
0229     int received = 0;
0230 
0231     /* Reset DSR status bits */
0232     sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,
0233         DSR_RX(port->chan), card);
0234 
0235     if (stat & DSR_BOF)
0236         /* Dropped one or more frames */
0237         dev->stats.rx_over_errors++;
0238 
0239     while (received < budget) {
0240         u32 desc_off = desc_offset(port, port->rxin, 0);
0241         pkt_desc __iomem *desc;
0242         u32 cda = sca_inl(dmac + CDAL, card);
0243 
0244         if ((cda >= desc_off) && (cda < desc_off + sizeof(pkt_desc)))
0245             break;  /* No frame received */
0246 
0247         desc = desc_address(port, port->rxin, 0);
0248         stat = readb(&desc->stat);
0249         if (!(stat & ST_RX_EOM))
0250             port->rxpart = 1; /* partial frame received */
0251         else if ((stat & ST_ERROR_MASK) || port->rxpart) {
0252             dev->stats.rx_errors++;
0253             if (stat & ST_RX_OVERRUN)
0254                 dev->stats.rx_fifo_errors++;
0255             else if ((stat & (ST_RX_SHORT | ST_RX_ABORT |
0256                       ST_RX_RESBIT)) || port->rxpart)
0257                 dev->stats.rx_frame_errors++;
0258             else if (stat & ST_RX_CRC)
0259                 dev->stats.rx_crc_errors++;
0260             if (stat & ST_RX_EOM)
0261                 port->rxpart = 0; /* received last fragment */
0262         } else {
0263             sca_rx(card, port, desc, port->rxin);
0264             received++;
0265         }
0266 
0267         /* Set new error descriptor address */
0268         sca_outl(desc_off, dmac + EDAL, card);
0269         port->rxin = (port->rxin + 1) % card->rx_ring_buffers;
0270     }
0271 
0272     /* make sure RX DMA is enabled */
0273     sca_out(DSR_DE, DSR_RX(port->chan), card);
0274     return received;
0275 }
0276 
0277 /* Transmit DMA service */
0278 static inline void sca_tx_done(port_t *port)
0279 {
0280     struct net_device *dev = port->netdev;
0281     card_t *card = port->card;
0282     u8 stat;
0283     unsigned count = 0;
0284 
0285     spin_lock(&port->lock);
0286 
0287     stat = sca_in(DSR_TX(port->chan), card); /* read DMA Status */
0288 
0289     /* Reset DSR status bits */
0290     sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,
0291         DSR_TX(port->chan), card);
0292 
0293     while (1) {
0294         pkt_desc __iomem *desc = desc_address(port, port->txlast, 1);
0295         u8 stat = readb(&desc->stat);
0296 
0297         if (!(stat & ST_TX_OWNRSHP))
0298             break; /* not yet transmitted */
0299         if (stat & ST_TX_UNDRRUN) {
0300             dev->stats.tx_errors++;
0301             dev->stats.tx_fifo_errors++;
0302         } else {
0303             dev->stats.tx_packets++;
0304             dev->stats.tx_bytes += readw(&desc->len);
0305         }
0306         writeb(0, &desc->stat); /* Free descriptor */
0307         count++;
0308         port->txlast = (port->txlast + 1) % card->tx_ring_buffers;
0309     }
0310 
0311     if (count)
0312         netif_wake_queue(dev);
0313     spin_unlock(&port->lock);
0314 }
0315 
0316 static int sca_poll(struct napi_struct *napi, int budget)
0317 {
0318     port_t *port = container_of(napi, port_t, napi);
0319     u32 isr0 = sca_inl(ISR0, port->card);
0320     int received = 0;
0321 
0322     if (isr0 & (port->chan ? 0x08000000 : 0x00080000))
0323         sca_msci_intr(port);
0324 
0325     if (isr0 & (port->chan ? 0x00002000 : 0x00000020))
0326         sca_tx_done(port);
0327 
0328     if (isr0 & (port->chan ? 0x00000200 : 0x00000002))
0329         received = sca_rx_done(port, budget);
0330 
0331     if (received < budget) {
0332         napi_complete_done(napi, received);
0333         enable_intr(port);
0334     }
0335 
0336     return received;
0337 }
0338 
0339 static irqreturn_t sca_intr(int irq, void *dev_id)
0340 {
0341     card_t *card = dev_id;
0342     u32 isr0 = sca_inl(ISR0, card);
0343     int i, handled = 0;
0344 
0345     for (i = 0; i < 2; i++) {
0346         port_t *port = get_port(card, i);
0347         if (port && (isr0 & (i ? 0x08002200 : 0x00080022))) {
0348             handled = 1;
0349             disable_intr(port);
0350             napi_schedule(&port->napi);
0351         }
0352     }
0353 
0354     return IRQ_RETVAL(handled);
0355 }
0356 
0357 static void sca_set_port(port_t *port)
0358 {
0359     card_t *card = port->card;
0360     u16 msci = get_msci(port);
0361     u8 md2 = sca_in(msci + MD2, card);
0362     unsigned int tmc, br = 10, brv = 1024;
0363 
0364     if (port->settings.clock_rate > 0) {
0365         /* Try lower br for better accuracy*/
0366         do {
0367             br--;
0368             brv >>= 1; /* brv = 2^9 = 512 max in specs */
0369 
0370             /* Baud Rate = CLOCK_BASE / TMC / 2^BR */
0371             tmc = CLOCK_BASE / brv / port->settings.clock_rate;
0372         } while (br > 1 && tmc <= 128);
0373 
0374         if (tmc < 1) {
0375             tmc = 1;
0376             br = 0; /* For baud=CLOCK_BASE we use tmc=1 br=0 */
0377             brv = 1;
0378         } else if (tmc > 255) {
0379             tmc = 256; /* tmc=0 means 256 - low baud rates */
0380         }
0381 
0382         port->settings.clock_rate = CLOCK_BASE / brv / tmc;
0383     } else {
0384         br = 9; /* Minimum clock rate */
0385         tmc = 256;  /* 8bit = 0 */
0386         port->settings.clock_rate = CLOCK_BASE / (256 * 512);
0387     }
0388 
0389     port->rxs = (port->rxs & ~CLK_BRG_MASK) | br;
0390     port->txs = (port->txs & ~CLK_BRG_MASK) | br;
0391     port->tmc = tmc;
0392 
0393     /* baud divisor - time constant*/
0394     sca_out(port->tmc, msci + TMCR, card);
0395     sca_out(port->tmc, msci + TMCT, card);
0396 
0397     /* Set BRG bits */
0398     sca_out(port->rxs, msci + RXS, card);
0399     sca_out(port->txs, msci + TXS, card);
0400 
0401     if (port->settings.loopback)
0402         md2 |= MD2_LOOPBACK;
0403     else
0404         md2 &= ~MD2_LOOPBACK;
0405 
0406     sca_out(md2, msci + MD2, card);
0407 }
0408 
0409 static void sca_open(struct net_device *dev)
0410 {
0411     port_t *port = dev_to_port(dev);
0412     card_t *card = port->card;
0413     u16 msci = get_msci(port);
0414     u8 md0, md2;
0415 
0416     switch (port->encoding) {
0417     case ENCODING_NRZ:
0418         md2 = MD2_NRZ;
0419         break;
0420     case ENCODING_NRZI:
0421         md2 = MD2_NRZI;
0422         break;
0423     case ENCODING_FM_MARK:
0424         md2 = MD2_FM_MARK;
0425         break;
0426     case ENCODING_FM_SPACE:
0427         md2 = MD2_FM_SPACE;
0428         break;
0429     default:
0430         md2 = MD2_MANCHESTER;
0431     }
0432 
0433     if (port->settings.loopback)
0434         md2 |= MD2_LOOPBACK;
0435 
0436     switch (port->parity) {
0437     case PARITY_CRC16_PR0:
0438         md0 = MD0_HDLC | MD0_CRC_16_0;
0439         break;
0440     case PARITY_CRC16_PR1:
0441         md0 = MD0_HDLC | MD0_CRC_16;
0442         break;
0443     case PARITY_CRC32_PR1_CCITT:
0444         md0 = MD0_HDLC | MD0_CRC_ITU32;
0445         break;
0446     case PARITY_CRC16_PR1_CCITT:
0447         md0 = MD0_HDLC | MD0_CRC_ITU;
0448         break;
0449     default:
0450         md0 = MD0_HDLC | MD0_CRC_NONE;
0451     }
0452 
0453     sca_out(CMD_RESET, msci + CMD, card);
0454     sca_out(md0, msci + MD0, card);
0455     sca_out(0x00, msci + MD1, card); /* no address field check */
0456     sca_out(md2, msci + MD2, card);
0457     sca_out(0x7E, msci + IDL, card); /* flag character 0x7E */
0458     /* Skip the rest of underrun frame */
0459     sca_out(CTL_IDLE | CTL_URCT | CTL_URSKP, msci + CTL, card);
0460     sca_out(0x0F, msci + RNR, card); /* +1=RX DMA activation condition */
0461     sca_out(0x3C, msci + TFS, card); /* +1 = TX start */
0462     sca_out(0x38, msci + TCR, card); /* =Critical TX DMA activ condition */
0463     sca_out(0x38, msci + TNR0, card); /* =TX DMA activation condition */
0464     sca_out(0x3F, msci + TNR1, card); /* +1=TX DMA deactivation condition*/
0465 
0466 /* We're using the following interrupts:
0467    - RXINTA (DCD changes only)
0468    - DMIB (EOM - single frame transfer complete)
0469 */
0470     sca_outl(IE0_RXINTA | IE0_CDCD, msci + IE0, card);
0471 
0472     sca_out(port->tmc, msci + TMCR, card);
0473     sca_out(port->tmc, msci + TMCT, card);
0474     sca_out(port->rxs, msci + RXS, card);
0475     sca_out(port->txs, msci + TXS, card);
0476     sca_out(CMD_TX_ENABLE, msci + CMD, card);
0477     sca_out(CMD_RX_ENABLE, msci + CMD, card);
0478 
0479     sca_set_carrier(port);
0480     enable_intr(port);
0481     napi_enable(&port->napi);
0482     netif_start_queue(dev);
0483 }
0484 
0485 static void sca_close(struct net_device *dev)
0486 {
0487     port_t *port = dev_to_port(dev);
0488 
0489     /* reset channel */
0490     sca_out(CMD_RESET, get_msci(port) + CMD, port->card);
0491     disable_intr(port);
0492     napi_disable(&port->napi);
0493     netif_stop_queue(dev);
0494 }
0495 
0496 static int sca_attach(struct net_device *dev, unsigned short encoding,
0497               unsigned short parity)
0498 {
0499     if (encoding != ENCODING_NRZ &&
0500         encoding != ENCODING_NRZI &&
0501         encoding != ENCODING_FM_MARK &&
0502         encoding != ENCODING_FM_SPACE &&
0503         encoding != ENCODING_MANCHESTER)
0504         return -EINVAL;
0505 
0506     if (parity != PARITY_NONE &&
0507         parity != PARITY_CRC16_PR0 &&
0508         parity != PARITY_CRC16_PR1 &&
0509         parity != PARITY_CRC32_PR1_CCITT &&
0510         parity != PARITY_CRC16_PR1_CCITT)
0511         return -EINVAL;
0512 
0513     dev_to_port(dev)->encoding = encoding;
0514     dev_to_port(dev)->parity = parity;
0515     return 0;
0516 }
0517 
0518 #ifdef DEBUG_RINGS
0519 static void sca_dump_rings(struct net_device *dev)
0520 {
0521     port_t *port = dev_to_port(dev);
0522     card_t *card = port->card;
0523     u16 cnt;
0524 
0525     printk(KERN_DEBUG "RX ring: CDA=%u EDA=%u DSR=%02X in=%u %sactive",
0526            sca_inl(get_dmac_rx(port) + CDAL, card),
0527            sca_inl(get_dmac_rx(port) + EDAL, card),
0528            sca_in(DSR_RX(port->chan), card), port->rxin,
0529            sca_in(DSR_RX(port->chan), card) & DSR_DE ? "" : "in");
0530     for (cnt = 0; cnt < port->card->rx_ring_buffers; cnt++)
0531         pr_cont(" %02X", readb(&(desc_address(port, cnt, 0)->stat)));
0532     pr_cont("\n");
0533 
0534     printk(KERN_DEBUG "TX ring: CDA=%u EDA=%u DSR=%02X in=%u "
0535            "last=%u %sactive",
0536            sca_inl(get_dmac_tx(port) + CDAL, card),
0537            sca_inl(get_dmac_tx(port) + EDAL, card),
0538            sca_in(DSR_TX(port->chan), card), port->txin, port->txlast,
0539            sca_in(DSR_TX(port->chan), card) & DSR_DE ? "" : "in");
0540 
0541     for (cnt = 0; cnt < port->card->tx_ring_buffers; cnt++)
0542         pr_cont(" %02X", readb(&(desc_address(port, cnt, 1)->stat)));
0543     pr_cont("\n");
0544 
0545     printk(KERN_DEBUG "MSCI: MD: %02x %02x %02x,"
0546            " ST: %02x %02x %02x %02x %02x, FST: %02x CST: %02x %02x\n",
0547            sca_in(get_msci(port) + MD0, card),
0548            sca_in(get_msci(port) + MD1, card),
0549            sca_in(get_msci(port) + MD2, card),
0550            sca_in(get_msci(port) + ST0, card),
0551            sca_in(get_msci(port) + ST1, card),
0552            sca_in(get_msci(port) + ST2, card),
0553            sca_in(get_msci(port) + ST3, card),
0554            sca_in(get_msci(port) + ST4, card),
0555            sca_in(get_msci(port) + FST, card),
0556            sca_in(get_msci(port) + CST0, card),
0557            sca_in(get_msci(port) + CST1, card));
0558 
0559     printk(KERN_DEBUG "ILAR: %02x ISR: %08x %08x\n", sca_in(ILAR, card),
0560            sca_inl(ISR0, card), sca_inl(ISR1, card));
0561 }
0562 #endif /* DEBUG_RINGS */
0563 
0564 static netdev_tx_t sca_xmit(struct sk_buff *skb, struct net_device *dev)
0565 {
0566     port_t *port = dev_to_port(dev);
0567     card_t *card = port->card;
0568     pkt_desc __iomem *desc;
0569     u32 buff, len;
0570 
0571     spin_lock_irq(&port->lock);
0572 
0573     desc = desc_address(port, port->txin + 1, 1);
0574     BUG_ON(readb(&desc->stat)); /* previous xmit should stop queue */
0575 
0576 #ifdef DEBUG_PKT
0577     printk(KERN_DEBUG "%s TX(%i):", dev->name, skb->len);
0578     debug_frame(skb);
0579 #endif
0580 
0581     desc = desc_address(port, port->txin, 1);
0582     buff = buffer_offset(port, port->txin, 1);
0583     len = skb->len;
0584     memcpy_toio(card->rambase + buff, skb->data, len);
0585 
0586     writew(len, &desc->len);
0587     writeb(ST_TX_EOM, &desc->stat);
0588 
0589     port->txin = (port->txin + 1) % card->tx_ring_buffers;
0590     sca_outl(desc_offset(port, port->txin, 1),
0591          get_dmac_tx(port) + EDAL, card);
0592 
0593     sca_out(DSR_DE, DSR_TX(port->chan), card); /* Enable TX DMA */
0594 
0595     desc = desc_address(port, port->txin + 1, 1);
0596     if (readb(&desc->stat)) /* allow 1 packet gap */
0597         netif_stop_queue(dev);
0598 
0599     spin_unlock_irq(&port->lock);
0600 
0601     dev_kfree_skb(skb);
0602     return NETDEV_TX_OK;
0603 }
0604 
0605 static u32 sca_detect_ram(card_t *card, u8 __iomem *rambase, u32 ramsize)
0606 {
0607     /* Round RAM size to 32 bits, fill from end to start */
0608     u32 i = ramsize &= ~3;
0609 
0610     do {
0611         i -= 4;
0612         writel(i ^ 0x12345678, rambase + i);
0613     } while (i > 0);
0614 
0615     for (i = 0; i < ramsize ; i += 4) {
0616         if (readl(rambase + i) != (i ^ 0x12345678))
0617             break;
0618     }
0619 
0620     return i;
0621 }
0622 
0623 static void sca_init(card_t *card, int wait_states)
0624 {
0625     sca_out(wait_states, WCRL, card); /* Wait Control */
0626     sca_out(wait_states, WCRM, card);
0627     sca_out(wait_states, WCRH, card);
0628 
0629     sca_out(0, DMER, card); /* DMA Master disable */
0630     sca_out(0x03, PCR, card); /* DMA priority */
0631     sca_out(0, DSR_RX(0), card); /* DMA disable - to halt state */
0632     sca_out(0, DSR_TX(0), card);
0633     sca_out(0, DSR_RX(1), card);
0634     sca_out(0, DSR_TX(1), card);
0635     sca_out(DMER_DME, DMER, card); /* DMA Master enable */
0636 }
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