net/wan/farsync.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  *      FarSync X21 driver for Linux
0004  *
0005  *      Actually sync driver for X.21, V.35 and V.24 on FarSync T-series cards
0006  *
0007  *      Copyright (C) 2001 FarSite Communications Ltd.
0008  *      www.farsite.co.uk
0009  *
0010  *      Author: R.J.Dunlop      <bob.dunlop@farsite.co.uk>
0011  *
0012  *      For the most part this file only contains structures and information
0013  *      that is visible to applications outside the driver. Shared memory
0014  *      layout etc is internal to the driver and described within farsync.c.
0015  *      Overlap exists in that the values used for some fields within the
0016  *      ioctl interface extend into the cards firmware interface so values in
0017  *      this file may not be changed arbitrarily.
0018  */
0019
0020 /*      What's in a name
0021  *
0022  *      The project name for this driver is Oscar. The driver is intended to be
0023  *      used with the FarSite T-Series cards (T2P & T4P) running in the high
0024  *      speed frame shifter mode. This is sometimes referred to as X.21 mode
0025  *      which is a complete misnomer as the card continues to support V.24 and
0026  *      V.35 as well as X.21.
0027  *
0028  *      A short common prefix is useful for routines within the driver to avoid
0029  *      conflict with other similar drivers and I chosen to use "fst_" for this
0030  *      purpose (FarSite T-series).
0031  *
0032  *      Finally the device driver needs a short network interface name. Since
0033  *      "hdlc" is already in use I've chosen the even less informative "sync"
0034  *      for the present.
0035  */
0036 #define FST_NAME                "fst"           /* In debug/info etc */
0037 #define FST_NDEV_NAME           "sync"          /* For net interface */
0038 #define FST_DEV_NAME            "farsync"       /* For misc interfaces */
0039
0040
0041 /*      User version number
0042  *
0043  *      This version number is incremented with each official release of the
0044  *      package and is a simplified number for normal user reference.
0045  *      Individual files are tracked by the version control system and may
0046  *      have individual versions (or IDs) that move much faster than
0047  *      the release version as individual updates are tracked.
0048  */
0049 #define FST_USER_VERSION        "1.04"
0050
0051
0052 /*      Ioctl call command values
0053  */
0054 #define FSTWRITE        (SIOCDEVPRIVATE+10)
0055 #define FSTCPURESET     (SIOCDEVPRIVATE+11)
0056 #define FSTCPURELEASE   (SIOCDEVPRIVATE+12)
0057 #define FSTGETCONF      (SIOCDEVPRIVATE+13)
0058 #define FSTSETCONF      (SIOCDEVPRIVATE+14)
0059
0060
0061 /*      FSTWRITE
0062  *
0063  *      Used to write a block of data (firmware etc) before the card is running
0064  */
0065 struct fstioc_write {
0066         unsigned int  size;
0067         unsigned int  offset;
0068     unsigned char data[];
0069 };
0070
0071
0072 /*      FSTCPURESET and FSTCPURELEASE
0073  *
0074  *      These take no additional data.
0075  *      FSTCPURESET forces the cards CPU into a reset state and holds it there.
0076  *      FSTCPURELEASE releases the CPU from this reset state allowing it to run,
0077  *      the reset vector should be setup before this ioctl is run.
0078  */
0079
0080 /*      FSTGETCONF and FSTSETCONF
0081  *
0082  *      Get and set a card/ports configuration.
0083  *      In order to allow selective setting of items and for the kernel to
0084  *      indicate a partial status response the first field "valid" is a bitmask
0085  *      indicating which other fields in the structure are valid.
0086  *      Many of the field names in this structure match those used in the
0087  *      firmware shared memory configuration interface and come originally from
0088  *      the NT header file Smc.h
0089  *
0090  *      When used with FSTGETCONF this structure should be zeroed before use.
0091  *      This is to allow for possible future expansion when some of the fields
0092  *      might be used to indicate a different (expanded) structure.
0093  */
0094 struct fstioc_info {
0095         unsigned int   valid;           /* Bits of structure that are valid */
0096         unsigned int   nports;          /* Number of serial ports */
0097         unsigned int   type;            /* Type index of card */
0098         unsigned int   state;           /* State of card */
0099         unsigned int   index;           /* Index of port ioctl was issued on */
0100         unsigned int   smcFirmwareVersion;
0101         unsigned long  kernelVersion;   /* What Kernel version we are working with */
0102         unsigned short lineInterface;   /* Physical interface type */
0103         unsigned char  proto;           /* Line protocol */
0104         unsigned char  internalClock;   /* 1 => internal clock, 0 => external */
0105         unsigned int   lineSpeed;       /* Speed in bps */
0106         unsigned int   v24IpSts;        /* V.24 control input status */
0107         unsigned int   v24OpSts;        /* V.24 control output status */
0108         unsigned short clockStatus;     /* lsb: 0=> present, 1=> absent */
0109         unsigned short cableStatus;     /* lsb: 0=> present, 1=> absent */
0110         unsigned short cardMode;        /* lsb: LED id mode */
0111         unsigned short debug;           /* Debug flags */
0112         unsigned char  transparentMode; /* Not used always 0 */
0113         unsigned char  invertClock;     /* Invert clock feature for syncing */
0114         unsigned char  startingSlot;    /* Time slot to use for start of tx */
0115         unsigned char  clockSource;     /* External or internal */
0116         unsigned char  framing;         /* E1, T1 or J1 */
0117         unsigned char  structure;       /* unframed, double, crc4, f4, f12, */
0118                                         /* f24 f72 */
0119         unsigned char  interface;       /* rj48c or bnc */
0120         unsigned char  coding;          /* hdb3 b8zs */
0121         unsigned char  lineBuildOut;    /* 0, -7.5, -15, -22 */
0122         unsigned char  equalizer;       /* short or lon haul settings */
0123         unsigned char  loopMode;        /* various loopbacks */
0124         unsigned char  range;           /* cable lengths */
0125         unsigned char  txBufferMode;    /* tx elastic buffer depth */
0126         unsigned char  rxBufferMode;    /* rx elastic buffer depth */
0127         unsigned char  losThreshold;    /* Attenuation on LOS signal */
0128         unsigned char  idleCode;        /* Value to send as idle timeslot */
0129         unsigned int   receiveBufferDelay; /* delay thro rx buffer timeslots */
0130         unsigned int   framingErrorCount; /* framing errors */
0131         unsigned int   codeViolationCount; /* code violations */
0132         unsigned int   crcErrorCount;   /* CRC errors */
0133         int            lineAttenuation; /* in dB*/
0134         unsigned short lossOfSignal;
0135         unsigned short receiveRemoteAlarm;
0136         unsigned short alarmIndicationSignal;
0137 };
0138
0139 /* "valid" bitmask */
0140 #define FSTVAL_NONE     0x00000000      /* Nothing valid (firmware not running).
0141                                          * Slight misnomer. In fact nports,
0142                                          * type, state and index will be set
0143                                          * based on hardware detected.
0144                                          */
0145 #define FSTVAL_OMODEM   0x0000001F      /* First 5 bits correspond to the
0146                                          * output status bits defined for
0147                                          * v24OpSts
0148                                          */
0149 #define FSTVAL_SPEED    0x00000020      /* internalClock, lineSpeed, clockStatus
0150                                          */
0151 #define FSTVAL_CABLE    0x00000040      /* lineInterface, cableStatus */
0152 #define FSTVAL_IMODEM   0x00000080      /* v24IpSts */
0153 #define FSTVAL_CARD     0x00000100      /* nports, type, state, index,
0154                                          * smcFirmwareVersion
0155                                          */
0156 #define FSTVAL_PROTO    0x00000200      /* proto */
0157 #define FSTVAL_MODE     0x00000400      /* cardMode */
0158 #define FSTVAL_PHASE    0x00000800      /* Clock phase */
0159 #define FSTVAL_TE1      0x00001000      /* T1E1 Configuration */
0160 #define FSTVAL_DEBUG    0x80000000      /* debug */
0161 #define FSTVAL_ALL      0x00001FFF      /* Note: does not include DEBUG flag */
0162
0163 /* "type" */
0164 #define FST_TYPE_NONE   0               /* Probably should never happen */
0165 #define FST_TYPE_T2P    1               /* T2P X21 2 port card */
0166 #define FST_TYPE_T4P    2               /* T4P X21 4 port card */
0167 #define FST_TYPE_T1U    3               /* T1U X21 1 port card */
0168 #define FST_TYPE_T2U    4               /* T2U X21 2 port card */
0169 #define FST_TYPE_T4U    5               /* T4U X21 4 port card */
0170 #define FST_TYPE_TE1    6               /* T1E1 X21 1 port card */
0171
0172 /* "family" */
0173 #define FST_FAMILY_TXP  0               /* T2P or T4P */
0174 #define FST_FAMILY_TXU  1               /* T1U or T2U or T4U */
0175
0176 /* "state" */
0177 #define FST_UNINIT      0               /* Raw uninitialised state following
0178                                          * system startup */
0179 #define FST_RESET       1               /* Processor held in reset state */
0180 #define FST_DOWNLOAD    2               /* Card being downloaded */
0181 #define FST_STARTING    3               /* Released following download */
0182 #define FST_RUNNING     4               /* Processor running */
0183 #define FST_BADVERSION  5               /* Bad shared memory version detected */
0184 #define FST_HALTED      6               /* Processor flagged a halt */
0185 #define FST_IFAILED     7               /* Firmware issued initialisation failed
0186                                          * interrupt
0187                                          */
0188 /* "lineInterface" */
0189 #define V24             1
0190 #define X21             2
0191 #define V35             3
0192 #define X21D            4
0193 #define T1              5
0194 #define E1              6
0195 #define J1              7
0196
0197 /* "proto" */
0198 #define FST_RAW         4               /* Two way raw packets */
0199 #define FST_GEN_HDLC    5               /* Using "Generic HDLC" module */
0200
0201 /* "internalClock" */
0202 #define INTCLK          1
0203 #define EXTCLK          0
0204
0205 /* "v24IpSts" bitmask */
0206 #define IPSTS_CTS       0x00000001      /* Clear To Send (Indicate for X.21) */
0207 #define IPSTS_INDICATE  IPSTS_CTS
0208 #define IPSTS_DSR       0x00000002      /* Data Set Ready (T2P Port A) */
0209 #define IPSTS_DCD       0x00000004      /* Data Carrier Detect */
0210 #define IPSTS_RI        0x00000008      /* Ring Indicator (T2P Port A) */
0211 #define IPSTS_TMI       0x00000010      /* Test Mode Indicator (Not Supported)*/
0212
0213 /* "v24OpSts" bitmask */
0214 #define OPSTS_RTS       0x00000001      /* Request To Send (Control for X.21) */
0215 #define OPSTS_CONTROL   OPSTS_RTS
0216 #define OPSTS_DTR       0x00000002      /* Data Terminal Ready */
0217 #define OPSTS_DSRS      0x00000004      /* Data Signalling Rate Select (Not
0218                                          * Supported) */
0219 #define OPSTS_SS        0x00000008      /* Select Standby (Not Supported) */
0220 #define OPSTS_LL        0x00000010      /* Maintenance Test (Not Supported) */
0221
0222 /* "cardMode" bitmask */
0223 #define CARD_MODE_IDENTIFY      0x0001
0224
0225 /*
0226  * Constants for T1/E1 configuration
0227  */
0228
0229 /*
0230  * Clock source
0231  */
0232 #define CLOCKING_SLAVE       0
0233 #define CLOCKING_MASTER      1
0234
0235 /*
0236  * Framing
0237  */
0238 #define FRAMING_E1           0
0239 #define FRAMING_J1           1
0240 #define FRAMING_T1           2
0241
0242 /*
0243  * Structure
0244  */
0245 #define STRUCTURE_UNFRAMED   0
0246 #define STRUCTURE_E1_DOUBLE  1
0247 #define STRUCTURE_E1_CRC4    2
0248 #define STRUCTURE_E1_CRC4M   3
0249 #define STRUCTURE_T1_4       4
0250 #define STRUCTURE_T1_12      5
0251 #define STRUCTURE_T1_24      6
0252 #define STRUCTURE_T1_72      7
0253
0254 /*
0255  * Interface
0256  */
0257 #define INTERFACE_RJ48C      0
0258 #define INTERFACE_BNC        1
0259
0260 /*
0261  * Coding
0262  */
0263
0264 #define CODING_HDB3          0
0265 #define CODING_NRZ           1
0266 #define CODING_CMI           2
0267 #define CODING_CMI_HDB3      3
0268 #define CODING_CMI_B8ZS      4
0269 #define CODING_AMI           5
0270 #define CODING_AMI_ZCS       6
0271 #define CODING_B8ZS          7
0272
0273 /*
0274  * Line Build Out
0275  */
0276 #define LBO_0dB              0
0277 #define LBO_7dB5             1
0278 #define LBO_15dB             2
0279 #define LBO_22dB5            3
0280
0281 /*
0282  * Range for long haul t1 > 655ft
0283  */
0284 #define RANGE_0_133_FT       0
0285 #define RANGE_0_40_M         RANGE_0_133_FT
0286 #define RANGE_133_266_FT     1
0287 #define RANGE_40_81_M        RANGE_133_266_FT
0288 #define RANGE_266_399_FT     2
0289 #define RANGE_81_122_M       RANGE_266_399_FT
0290 #define RANGE_399_533_FT     3
0291 #define RANGE_122_162_M       RANGE_399_533_FT
0292 #define RANGE_533_655_FT     4
0293 #define RANGE_162_200_M      RANGE_533_655_FT
0294 /*
0295  * Receive Equaliser
0296  */
0297 #define EQUALIZER_SHORT      0
0298 #define EQUALIZER_LONG       1
0299
0300 /*
0301  * Loop modes
0302  */
0303 #define LOOP_NONE            0
0304 #define LOOP_LOCAL           1
0305 #define LOOP_PAYLOAD_EXC_TS0 2
0306 #define LOOP_PAYLOAD_INC_TS0 3
0307 #define LOOP_REMOTE          4
0308
0309 /*
0310  * Buffer modes
0311  */
0312 #define BUFFER_2_FRAME       0
0313 #define BUFFER_1_FRAME       1
0314 #define BUFFER_96_BIT        2
0315 #define BUFFER_NONE          3
0316
0317 /*      Debug support
0318  *
0319  *      These should only be enabled for development kernels, production code
0320  *      should define FST_DEBUG=0 in order to exclude the code.
0321  *      Setting FST_DEBUG=1 will include all the debug code but in a disabled
0322  *      state, use the FSTSETCONF ioctl to enable specific debug actions, or
0323  *      FST_DEBUG can be set to prime the debug selection.
0324  */
0325 #define FST_DEBUG       0x0000
0326 #if FST_DEBUG
0327
0328 extern int fst_debug_mask;              /* Bit mask of actions to debug, bits
0329                                          * listed below. Note: Bit 0 is used
0330                                          * to trigger the inclusion of this
0331                                          * code, without enabling any actions.
0332                                          */
0333 #define DBG_INIT        0x0002          /* Card detection and initialisation */
0334 #define DBG_OPEN        0x0004          /* Open and close sequences */
0335 #define DBG_PCI         0x0008          /* PCI config operations */
0336 #define DBG_IOCTL       0x0010          /* Ioctls and other config */
0337 #define DBG_INTR        0x0020          /* Interrupt routines (be careful) */
0338 #define DBG_TX          0x0040          /* Packet transmission */
0339 #define DBG_RX          0x0080          /* Packet reception */
0340 #define DBG_CMD         0x0100          /* Port command issuing */
0341
0342 #define DBG_ASS         0xFFFF          /* Assert like statements. Code that
0343                                          * should never be reached, if you see
0344                                          * one of these then I've been an ass
0345                                          */
0346 #endif  /* FST_DEBUG */
0347