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0028 #include "vmxnet3_int.h"
0029 #include <net/vxlan.h>
0030 #include <net/geneve.h>
0031
0032 #define VXLAN_UDP_PORT 8472
0033
0034 struct vmxnet3_stat_desc {
0035 char desc[ETH_GSTRING_LEN];
0036 int offset;
0037 };
0038
0039
0040
0041 static const struct vmxnet3_stat_desc
0042 vmxnet3_tq_dev_stats[] = {
0043
0044 { "Tx Queue#", 0 },
0045 { " TSO pkts tx", offsetof(struct UPT1_TxStats, TSOPktsTxOK) },
0046 { " TSO bytes tx", offsetof(struct UPT1_TxStats, TSOBytesTxOK) },
0047 { " ucast pkts tx", offsetof(struct UPT1_TxStats, ucastPktsTxOK) },
0048 { " ucast bytes tx", offsetof(struct UPT1_TxStats, ucastBytesTxOK) },
0049 { " mcast pkts tx", offsetof(struct UPT1_TxStats, mcastPktsTxOK) },
0050 { " mcast bytes tx", offsetof(struct UPT1_TxStats, mcastBytesTxOK) },
0051 { " bcast pkts tx", offsetof(struct UPT1_TxStats, bcastPktsTxOK) },
0052 { " bcast bytes tx", offsetof(struct UPT1_TxStats, bcastBytesTxOK) },
0053 { " pkts tx err", offsetof(struct UPT1_TxStats, pktsTxError) },
0054 { " pkts tx discard", offsetof(struct UPT1_TxStats, pktsTxDiscard) },
0055 };
0056
0057
0058 static const struct vmxnet3_stat_desc
0059 vmxnet3_tq_driver_stats[] = {
0060
0061 {" drv dropped tx total", offsetof(struct vmxnet3_tq_driver_stats,
0062 drop_total) },
0063 { " too many frags", offsetof(struct vmxnet3_tq_driver_stats,
0064 drop_too_many_frags) },
0065 { " giant hdr", offsetof(struct vmxnet3_tq_driver_stats,
0066 drop_oversized_hdr) },
0067 { " hdr err", offsetof(struct vmxnet3_tq_driver_stats,
0068 drop_hdr_inspect_err) },
0069 { " tso", offsetof(struct vmxnet3_tq_driver_stats,
0070 drop_tso) },
0071 { " ring full", offsetof(struct vmxnet3_tq_driver_stats,
0072 tx_ring_full) },
0073 { " pkts linearized", offsetof(struct vmxnet3_tq_driver_stats,
0074 linearized) },
0075 { " hdr cloned", offsetof(struct vmxnet3_tq_driver_stats,
0076 copy_skb_header) },
0077 { " giant hdr", offsetof(struct vmxnet3_tq_driver_stats,
0078 oversized_hdr) },
0079 };
0080
0081
0082 static const struct vmxnet3_stat_desc
0083 vmxnet3_rq_dev_stats[] = {
0084 { "Rx Queue#", 0 },
0085 { " LRO pkts rx", offsetof(struct UPT1_RxStats, LROPktsRxOK) },
0086 { " LRO byte rx", offsetof(struct UPT1_RxStats, LROBytesRxOK) },
0087 { " ucast pkts rx", offsetof(struct UPT1_RxStats, ucastPktsRxOK) },
0088 { " ucast bytes rx", offsetof(struct UPT1_RxStats, ucastBytesRxOK) },
0089 { " mcast pkts rx", offsetof(struct UPT1_RxStats, mcastPktsRxOK) },
0090 { " mcast bytes rx", offsetof(struct UPT1_RxStats, mcastBytesRxOK) },
0091 { " bcast pkts rx", offsetof(struct UPT1_RxStats, bcastPktsRxOK) },
0092 { " bcast bytes rx", offsetof(struct UPT1_RxStats, bcastBytesRxOK) },
0093 { " pkts rx OOB", offsetof(struct UPT1_RxStats, pktsRxOutOfBuf) },
0094 { " pkts rx err", offsetof(struct UPT1_RxStats, pktsRxError) },
0095 };
0096
0097
0098 static const struct vmxnet3_stat_desc
0099 vmxnet3_rq_driver_stats[] = {
0100
0101 { " drv dropped rx total", offsetof(struct vmxnet3_rq_driver_stats,
0102 drop_total) },
0103 { " err", offsetof(struct vmxnet3_rq_driver_stats,
0104 drop_err) },
0105 { " fcs", offsetof(struct vmxnet3_rq_driver_stats,
0106 drop_fcs) },
0107 { " rx buf alloc fail", offsetof(struct vmxnet3_rq_driver_stats,
0108 rx_buf_alloc_failure) },
0109 };
0110
0111
0112 static const struct vmxnet3_stat_desc
0113 vmxnet3_global_stats[] = {
0114
0115 { "tx timeout count", offsetof(struct vmxnet3_adapter,
0116 tx_timeout_count) }
0117 };
0118
0119
0120 void
0121 vmxnet3_get_stats64(struct net_device *netdev,
0122 struct rtnl_link_stats64 *stats)
0123 {
0124 struct vmxnet3_adapter *adapter;
0125 struct vmxnet3_tq_driver_stats *drvTxStats;
0126 struct vmxnet3_rq_driver_stats *drvRxStats;
0127 struct UPT1_TxStats *devTxStats;
0128 struct UPT1_RxStats *devRxStats;
0129 unsigned long flags;
0130 int i;
0131
0132 adapter = netdev_priv(netdev);
0133
0134
0135 spin_lock_irqsave(&adapter->cmd_lock, flags);
0136 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
0137 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
0138
0139 for (i = 0; i < adapter->num_tx_queues; i++) {
0140 devTxStats = &adapter->tqd_start[i].stats;
0141 drvTxStats = &adapter->tx_queue[i].stats;
0142 stats->tx_packets += devTxStats->ucastPktsTxOK +
0143 devTxStats->mcastPktsTxOK +
0144 devTxStats->bcastPktsTxOK;
0145 stats->tx_bytes += devTxStats->ucastBytesTxOK +
0146 devTxStats->mcastBytesTxOK +
0147 devTxStats->bcastBytesTxOK;
0148 stats->tx_errors += devTxStats->pktsTxError;
0149 stats->tx_dropped += drvTxStats->drop_total;
0150 }
0151
0152 for (i = 0; i < adapter->num_rx_queues; i++) {
0153 devRxStats = &adapter->rqd_start[i].stats;
0154 drvRxStats = &adapter->rx_queue[i].stats;
0155 stats->rx_packets += devRxStats->ucastPktsRxOK +
0156 devRxStats->mcastPktsRxOK +
0157 devRxStats->bcastPktsRxOK;
0158
0159 stats->rx_bytes += devRxStats->ucastBytesRxOK +
0160 devRxStats->mcastBytesRxOK +
0161 devRxStats->bcastBytesRxOK;
0162
0163 stats->rx_errors += devRxStats->pktsRxError;
0164 stats->rx_dropped += drvRxStats->drop_total;
0165 stats->multicast += devRxStats->mcastPktsRxOK;
0166 }
0167 }
0168
0169 static int
0170 vmxnet3_get_sset_count(struct net_device *netdev, int sset)
0171 {
0172 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0173 switch (sset) {
0174 case ETH_SS_STATS:
0175 return (ARRAY_SIZE(vmxnet3_tq_dev_stats) +
0176 ARRAY_SIZE(vmxnet3_tq_driver_stats)) *
0177 adapter->num_tx_queues +
0178 (ARRAY_SIZE(vmxnet3_rq_dev_stats) +
0179 ARRAY_SIZE(vmxnet3_rq_driver_stats)) *
0180 adapter->num_rx_queues +
0181 ARRAY_SIZE(vmxnet3_global_stats);
0182 default:
0183 return -EOPNOTSUPP;
0184 }
0185 }
0186
0187
0188
0189
0190
0191
0192
0193
0194 static int
0195 vmxnet3_get_regs_len(struct net_device *netdev)
0196 {
0197 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0198
0199 return ((9 +
0200 (1 + adapter->intr.num_intrs) +
0201 (1 + adapter->num_tx_queues * 17 ) +
0202 (1 + adapter->num_rx_queues * 23 )) *
0203 sizeof(u32));
0204 }
0205
0206
0207 static void
0208 vmxnet3_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
0209 {
0210 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0211
0212 strlcpy(drvinfo->driver, vmxnet3_driver_name, sizeof(drvinfo->driver));
0213
0214 strlcpy(drvinfo->version, VMXNET3_DRIVER_VERSION_REPORT,
0215 sizeof(drvinfo->version));
0216
0217 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
0218 sizeof(drvinfo->bus_info));
0219 }
0220
0221
0222 static void
0223 vmxnet3_get_strings(struct net_device *netdev, u32 stringset, u8 *buf)
0224 {
0225 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0226 int i, j;
0227
0228 if (stringset != ETH_SS_STATS)
0229 return;
0230
0231 for (j = 0; j < adapter->num_tx_queues; j++) {
0232 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++)
0233 ethtool_sprintf(&buf, vmxnet3_tq_dev_stats[i].desc);
0234 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++)
0235 ethtool_sprintf(&buf, vmxnet3_tq_driver_stats[i].desc);
0236 }
0237
0238 for (j = 0; j < adapter->num_rx_queues; j++) {
0239 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++)
0240 ethtool_sprintf(&buf, vmxnet3_rq_dev_stats[i].desc);
0241 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++)
0242 ethtool_sprintf(&buf, vmxnet3_rq_driver_stats[i].desc);
0243 }
0244
0245 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++)
0246 ethtool_sprintf(&buf, vmxnet3_global_stats[i].desc);
0247 }
0248
0249 netdev_features_t vmxnet3_fix_features(struct net_device *netdev,
0250 netdev_features_t features)
0251 {
0252
0253 if (!(features & NETIF_F_RXCSUM))
0254 features &= ~NETIF_F_LRO;
0255
0256 return features;
0257 }
0258
0259 netdev_features_t vmxnet3_features_check(struct sk_buff *skb,
0260 struct net_device *netdev,
0261 netdev_features_t features)
0262 {
0263 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0264
0265
0266 if (VMXNET3_VERSION_GE_4(adapter) &&
0267 skb->encapsulation && skb->ip_summed == CHECKSUM_PARTIAL) {
0268 u8 l4_proto = 0;
0269 u16 port;
0270 struct udphdr *udph;
0271
0272 switch (vlan_get_protocol(skb)) {
0273 case htons(ETH_P_IP):
0274 l4_proto = ip_hdr(skb)->protocol;
0275 break;
0276 case htons(ETH_P_IPV6):
0277 l4_proto = ipv6_hdr(skb)->nexthdr;
0278 break;
0279 default:
0280 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
0281 }
0282
0283 switch (l4_proto) {
0284 case IPPROTO_UDP:
0285 udph = udp_hdr(skb);
0286 port = be16_to_cpu(udph->dest);
0287
0288 if (port != GENEVE_UDP_PORT &&
0289 port != IANA_VXLAN_UDP_PORT &&
0290 port != VXLAN_UDP_PORT) {
0291 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
0292 }
0293 break;
0294 default:
0295 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
0296 }
0297 }
0298 return features;
0299 }
0300
0301 static void vmxnet3_enable_encap_offloads(struct net_device *netdev, netdev_features_t features)
0302 {
0303 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0304
0305 if (VMXNET3_VERSION_GE_4(adapter)) {
0306 netdev->hw_enc_features |= NETIF_F_SG | NETIF_F_RXCSUM |
0307 NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_CTAG_TX |
0308 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_TSO | NETIF_F_TSO6 |
0309 NETIF_F_LRO;
0310 if (features & NETIF_F_GSO_UDP_TUNNEL)
0311 netdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL;
0312 if (features & NETIF_F_GSO_UDP_TUNNEL_CSUM)
0313 netdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
0314 }
0315 if (VMXNET3_VERSION_GE_7(adapter)) {
0316 unsigned long flags;
0317
0318 if (vmxnet3_check_ptcapability(adapter->ptcap_supported[0],
0319 VMXNET3_CAP_GENEVE_CHECKSUM_OFFLOAD)) {
0320 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_GENEVE_CHECKSUM_OFFLOAD;
0321 }
0322 if (vmxnet3_check_ptcapability(adapter->ptcap_supported[0],
0323 VMXNET3_CAP_VXLAN_CHECKSUM_OFFLOAD)) {
0324 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_VXLAN_CHECKSUM_OFFLOAD;
0325 }
0326 if (vmxnet3_check_ptcapability(adapter->ptcap_supported[0],
0327 VMXNET3_CAP_GENEVE_TSO)) {
0328 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_GENEVE_TSO;
0329 }
0330 if (vmxnet3_check_ptcapability(adapter->ptcap_supported[0],
0331 VMXNET3_CAP_VXLAN_TSO)) {
0332 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_VXLAN_TSO;
0333 }
0334 if (vmxnet3_check_ptcapability(adapter->ptcap_supported[0],
0335 VMXNET3_CAP_GENEVE_OUTER_CHECKSUM_OFFLOAD)) {
0336 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_GENEVE_OUTER_CHECKSUM_OFFLOAD;
0337 }
0338 if (vmxnet3_check_ptcapability(adapter->ptcap_supported[0],
0339 VMXNET3_CAP_VXLAN_OUTER_CHECKSUM_OFFLOAD)) {
0340 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_VXLAN_OUTER_CHECKSUM_OFFLOAD;
0341 }
0342
0343 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DCR, adapter->dev_caps[0]);
0344 spin_lock_irqsave(&adapter->cmd_lock, flags);
0345 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_DCR0_REG);
0346 adapter->dev_caps[0] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
0347 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
0348
0349 if (!(adapter->dev_caps[0] & (1UL << VMXNET3_CAP_GENEVE_CHECKSUM_OFFLOAD)) &&
0350 !(adapter->dev_caps[0] & (1UL << VMXNET3_CAP_VXLAN_CHECKSUM_OFFLOAD)) &&
0351 !(adapter->dev_caps[0] & (1UL << VMXNET3_CAP_GENEVE_TSO)) &&
0352 !(adapter->dev_caps[0] & (1UL << VMXNET3_CAP_VXLAN_TSO))) {
0353 netdev->hw_enc_features &= ~NETIF_F_GSO_UDP_TUNNEL;
0354 }
0355 if (!(adapter->dev_caps[0] & (1UL << VMXNET3_CAP_GENEVE_OUTER_CHECKSUM_OFFLOAD)) &&
0356 !(adapter->dev_caps[0] & (1UL << VMXNET3_CAP_VXLAN_OUTER_CHECKSUM_OFFLOAD))) {
0357 netdev->hw_enc_features &= ~NETIF_F_GSO_UDP_TUNNEL_CSUM;
0358 }
0359 }
0360 }
0361
0362 static void vmxnet3_disable_encap_offloads(struct net_device *netdev)
0363 {
0364 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0365
0366 if (VMXNET3_VERSION_GE_4(adapter)) {
0367 netdev->hw_enc_features &= ~(NETIF_F_SG | NETIF_F_RXCSUM |
0368 NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_CTAG_TX |
0369 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_TSO | NETIF_F_TSO6 |
0370 NETIF_F_LRO | NETIF_F_GSO_UDP_TUNNEL |
0371 NETIF_F_GSO_UDP_TUNNEL_CSUM);
0372 }
0373 if (VMXNET3_VERSION_GE_7(adapter)) {
0374 unsigned long flags;
0375
0376 adapter->dev_caps[0] &= ~(1UL << VMXNET3_CAP_GENEVE_CHECKSUM_OFFLOAD |
0377 1UL << VMXNET3_CAP_VXLAN_CHECKSUM_OFFLOAD |
0378 1UL << VMXNET3_CAP_GENEVE_TSO |
0379 1UL << VMXNET3_CAP_VXLAN_TSO |
0380 1UL << VMXNET3_CAP_GENEVE_OUTER_CHECKSUM_OFFLOAD |
0381 1UL << VMXNET3_CAP_VXLAN_OUTER_CHECKSUM_OFFLOAD);
0382
0383 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DCR, adapter->dev_caps[0]);
0384 spin_lock_irqsave(&adapter->cmd_lock, flags);
0385 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_DCR0_REG);
0386 adapter->dev_caps[0] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
0387 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
0388 }
0389 }
0390
0391 int vmxnet3_set_features(struct net_device *netdev, netdev_features_t features)
0392 {
0393 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0394 unsigned long flags;
0395 netdev_features_t changed = features ^ netdev->features;
0396 netdev_features_t tun_offload_mask = NETIF_F_GSO_UDP_TUNNEL |
0397 NETIF_F_GSO_UDP_TUNNEL_CSUM;
0398 u8 udp_tun_enabled = (netdev->features & tun_offload_mask) != 0;
0399
0400 if (changed & (NETIF_F_RXCSUM | NETIF_F_LRO |
0401 NETIF_F_HW_VLAN_CTAG_RX | tun_offload_mask)) {
0402 if (features & NETIF_F_RXCSUM)
0403 adapter->shared->devRead.misc.uptFeatures |=
0404 UPT1_F_RXCSUM;
0405 else
0406 adapter->shared->devRead.misc.uptFeatures &=
0407 ~UPT1_F_RXCSUM;
0408
0409
0410 if (features & NETIF_F_LRO)
0411 adapter->shared->devRead.misc.uptFeatures |=
0412 UPT1_F_LRO;
0413 else
0414 adapter->shared->devRead.misc.uptFeatures &=
0415 ~UPT1_F_LRO;
0416
0417 if (features & NETIF_F_HW_VLAN_CTAG_RX)
0418 adapter->shared->devRead.misc.uptFeatures |=
0419 UPT1_F_RXVLAN;
0420 else
0421 adapter->shared->devRead.misc.uptFeatures &=
0422 ~UPT1_F_RXVLAN;
0423
0424 if ((features & tun_offload_mask) != 0) {
0425 vmxnet3_enable_encap_offloads(netdev, features);
0426 adapter->shared->devRead.misc.uptFeatures |=
0427 UPT1_F_RXINNEROFLD;
0428 } else if ((features & tun_offload_mask) == 0 &&
0429 udp_tun_enabled) {
0430 vmxnet3_disable_encap_offloads(netdev);
0431 adapter->shared->devRead.misc.uptFeatures &=
0432 ~UPT1_F_RXINNEROFLD;
0433 }
0434
0435 spin_lock_irqsave(&adapter->cmd_lock, flags);
0436 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
0437 VMXNET3_CMD_UPDATE_FEATURE);
0438 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
0439 }
0440 return 0;
0441 }
0442
0443 static void
0444 vmxnet3_get_ethtool_stats(struct net_device *netdev,
0445 struct ethtool_stats *stats, u64 *buf)
0446 {
0447 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0448 unsigned long flags;
0449 u8 *base;
0450 int i;
0451 int j = 0;
0452
0453 spin_lock_irqsave(&adapter->cmd_lock, flags);
0454 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
0455 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
0456
0457
0458 for (j = 0; j < adapter->num_tx_queues; j++) {
0459 base = (u8 *)&adapter->tqd_start[j].stats;
0460 *buf++ = (u64)j;
0461 for (i = 1; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++)
0462 *buf++ = *(u64 *)(base +
0463 vmxnet3_tq_dev_stats[i].offset);
0464
0465 base = (u8 *)&adapter->tx_queue[j].stats;
0466 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++)
0467 *buf++ = *(u64 *)(base +
0468 vmxnet3_tq_driver_stats[i].offset);
0469 }
0470
0471 for (j = 0; j < adapter->num_rx_queues; j++) {
0472 base = (u8 *)&adapter->rqd_start[j].stats;
0473 *buf++ = (u64) j;
0474 for (i = 1; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++)
0475 *buf++ = *(u64 *)(base +
0476 vmxnet3_rq_dev_stats[i].offset);
0477
0478 base = (u8 *)&adapter->rx_queue[j].stats;
0479 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++)
0480 *buf++ = *(u64 *)(base +
0481 vmxnet3_rq_driver_stats[i].offset);
0482 }
0483
0484 base = (u8 *)adapter;
0485 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++)
0486 *buf++ = *(u64 *)(base + vmxnet3_global_stats[i].offset);
0487 }
0488
0489
0490
0491
0492
0493
0494
0495
0496 static void
0497 vmxnet3_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
0498 {
0499 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0500 u32 *buf = p;
0501 int i = 0, j = 0;
0502
0503 memset(p, 0, vmxnet3_get_regs_len(netdev));
0504
0505 regs->version = 2;
0506
0507
0508
0509 buf[j++] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
0510 buf[j++] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
0511 buf[j++] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_DSAL);
0512 buf[j++] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_DSAH);
0513 buf[j++] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
0514 buf[j++] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
0515 buf[j++] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
0516 buf[j++] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
0517 buf[j++] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ECR);
0518
0519 buf[j++] = adapter->intr.num_intrs;
0520 for (i = 0; i < adapter->intr.num_intrs; i++) {
0521 buf[j++] = VMXNET3_READ_BAR0_REG(adapter, VMXNET3_REG_IMR
0522 + i * VMXNET3_REG_ALIGN);
0523 }
0524
0525 buf[j++] = adapter->num_tx_queues;
0526 for (i = 0; i < adapter->num_tx_queues; i++) {
0527 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
0528
0529 buf[j++] = VMXNET3_READ_BAR0_REG(adapter, adapter->tx_prod_offset +
0530 i * VMXNET3_REG_ALIGN);
0531
0532 buf[j++] = VMXNET3_GET_ADDR_LO(tq->tx_ring.basePA);
0533 buf[j++] = VMXNET3_GET_ADDR_HI(tq->tx_ring.basePA);
0534 buf[j++] = tq->tx_ring.size;
0535 buf[j++] = tq->tx_ring.next2fill;
0536 buf[j++] = tq->tx_ring.next2comp;
0537 buf[j++] = tq->tx_ring.gen;
0538
0539 buf[j++] = VMXNET3_GET_ADDR_LO(tq->data_ring.basePA);
0540 buf[j++] = VMXNET3_GET_ADDR_HI(tq->data_ring.basePA);
0541 buf[j++] = tq->data_ring.size;
0542 buf[j++] = tq->txdata_desc_size;
0543
0544 buf[j++] = VMXNET3_GET_ADDR_LO(tq->comp_ring.basePA);
0545 buf[j++] = VMXNET3_GET_ADDR_HI(tq->comp_ring.basePA);
0546 buf[j++] = tq->comp_ring.size;
0547 buf[j++] = tq->comp_ring.next2proc;
0548 buf[j++] = tq->comp_ring.gen;
0549
0550 buf[j++] = tq->stopped;
0551 }
0552
0553 buf[j++] = adapter->num_rx_queues;
0554 for (i = 0; i < adapter->num_rx_queues; i++) {
0555 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
0556
0557 buf[j++] = VMXNET3_READ_BAR0_REG(adapter, adapter->rx_prod_offset +
0558 i * VMXNET3_REG_ALIGN);
0559 buf[j++] = VMXNET3_READ_BAR0_REG(adapter, adapter->rx_prod2_offset +
0560 i * VMXNET3_REG_ALIGN);
0561
0562 buf[j++] = VMXNET3_GET_ADDR_LO(rq->rx_ring[0].basePA);
0563 buf[j++] = VMXNET3_GET_ADDR_HI(rq->rx_ring[0].basePA);
0564 buf[j++] = rq->rx_ring[0].size;
0565 buf[j++] = rq->rx_ring[0].next2fill;
0566 buf[j++] = rq->rx_ring[0].next2comp;
0567 buf[j++] = rq->rx_ring[0].gen;
0568
0569 buf[j++] = VMXNET3_GET_ADDR_LO(rq->rx_ring[1].basePA);
0570 buf[j++] = VMXNET3_GET_ADDR_HI(rq->rx_ring[1].basePA);
0571 buf[j++] = rq->rx_ring[1].size;
0572 buf[j++] = rq->rx_ring[1].next2fill;
0573 buf[j++] = rq->rx_ring[1].next2comp;
0574 buf[j++] = rq->rx_ring[1].gen;
0575
0576 buf[j++] = VMXNET3_GET_ADDR_LO(rq->data_ring.basePA);
0577 buf[j++] = VMXNET3_GET_ADDR_HI(rq->data_ring.basePA);
0578 buf[j++] = rq->rx_ring[0].size;
0579 buf[j++] = rq->data_ring.desc_size;
0580
0581 buf[j++] = VMXNET3_GET_ADDR_LO(rq->comp_ring.basePA);
0582 buf[j++] = VMXNET3_GET_ADDR_HI(rq->comp_ring.basePA);
0583 buf[j++] = rq->comp_ring.size;
0584 buf[j++] = rq->comp_ring.next2proc;
0585 buf[j++] = rq->comp_ring.gen;
0586 }
0587 }
0588
0589
0590 static void
0591 vmxnet3_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
0592 {
0593 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0594
0595 wol->supported = WAKE_UCAST | WAKE_ARP | WAKE_MAGIC;
0596 wol->wolopts = adapter->wol;
0597 }
0598
0599
0600 static int
0601 vmxnet3_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
0602 {
0603 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0604
0605 if (wol->wolopts & (WAKE_PHY | WAKE_MCAST | WAKE_BCAST |
0606 WAKE_MAGICSECURE)) {
0607 return -EOPNOTSUPP;
0608 }
0609
0610 adapter->wol = wol->wolopts;
0611
0612 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
0613
0614 return 0;
0615 }
0616
0617
0618 static int
0619 vmxnet3_get_link_ksettings(struct net_device *netdev,
0620 struct ethtool_link_ksettings *ecmd)
0621 {
0622 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0623
0624 ethtool_link_ksettings_zero_link_mode(ecmd, supported);
0625 ethtool_link_ksettings_add_link_mode(ecmd, supported, 10000baseT_Full);
0626 ethtool_link_ksettings_add_link_mode(ecmd, supported, 1000baseT_Full);
0627 ethtool_link_ksettings_add_link_mode(ecmd, supported, TP);
0628 ethtool_link_ksettings_zero_link_mode(ecmd, advertising);
0629 ethtool_link_ksettings_add_link_mode(ecmd, advertising, TP);
0630 ecmd->base.port = PORT_TP;
0631
0632 if (adapter->link_speed) {
0633 ecmd->base.speed = adapter->link_speed;
0634 ecmd->base.duplex = DUPLEX_FULL;
0635 } else {
0636 ecmd->base.speed = SPEED_UNKNOWN;
0637 ecmd->base.duplex = DUPLEX_UNKNOWN;
0638 }
0639 return 0;
0640 }
0641
0642 static void
0643 vmxnet3_get_ringparam(struct net_device *netdev,
0644 struct ethtool_ringparam *param,
0645 struct kernel_ethtool_ringparam *kernel_param,
0646 struct netlink_ext_ack *extack)
0647 {
0648 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0649
0650 param->rx_max_pending = VMXNET3_RX_RING_MAX_SIZE;
0651 param->tx_max_pending = VMXNET3_TX_RING_MAX_SIZE;
0652 param->rx_mini_max_pending = VMXNET3_VERSION_GE_3(adapter) ?
0653 VMXNET3_RXDATA_DESC_MAX_SIZE : 0;
0654 param->rx_jumbo_max_pending = VMXNET3_RX_RING2_MAX_SIZE;
0655
0656 param->rx_pending = adapter->rx_ring_size;
0657 param->tx_pending = adapter->tx_ring_size;
0658 param->rx_mini_pending = VMXNET3_VERSION_GE_3(adapter) ?
0659 adapter->rxdata_desc_size : 0;
0660 param->rx_jumbo_pending = adapter->rx_ring2_size;
0661 }
0662
0663 static int
0664 vmxnet3_set_ringparam(struct net_device *netdev,
0665 struct ethtool_ringparam *param,
0666 struct kernel_ethtool_ringparam *kernel_param,
0667 struct netlink_ext_ack *extack)
0668 {
0669 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
0670 u32 new_tx_ring_size, new_rx_ring_size, new_rx_ring2_size;
0671 u16 new_rxdata_desc_size;
0672 u32 sz;
0673 int err = 0;
0674
0675 if (param->tx_pending == 0 || param->tx_pending >
0676 VMXNET3_TX_RING_MAX_SIZE)
0677 return -EINVAL;
0678
0679 if (param->rx_pending == 0 || param->rx_pending >
0680 VMXNET3_RX_RING_MAX_SIZE)
0681 return -EINVAL;
0682
0683 if (param->rx_jumbo_pending == 0 ||
0684 param->rx_jumbo_pending > VMXNET3_RX_RING2_MAX_SIZE)
0685 return -EINVAL;
0686
0687
0688 if (adapter->rx_buf_per_pkt == 0) {
0689 netdev_err(netdev, "adapter not completely initialized, "
0690 "ring size cannot be changed yet\n");
0691 return -EOPNOTSUPP;
0692 }
0693
0694 if (VMXNET3_VERSION_GE_3(adapter)) {
0695 if (param->rx_mini_pending > VMXNET3_RXDATA_DESC_MAX_SIZE)
0696 return -EINVAL;
0697 } else if (param->rx_mini_pending != 0) {
0698 return -EINVAL;
0699 }
0700
0701
0702 new_tx_ring_size = (param->tx_pending + VMXNET3_RING_SIZE_MASK) &
0703 ~VMXNET3_RING_SIZE_MASK;
0704 new_tx_ring_size = min_t(u32, new_tx_ring_size,
0705 VMXNET3_TX_RING_MAX_SIZE);
0706 if (new_tx_ring_size > VMXNET3_TX_RING_MAX_SIZE || (new_tx_ring_size %
0707 VMXNET3_RING_SIZE_ALIGN) != 0)
0708 return -EINVAL;
0709
0710
0711
0712
0713 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
0714 new_rx_ring_size = (param->rx_pending + sz - 1) / sz * sz;
0715 new_rx_ring_size = min_t(u32, new_rx_ring_size,
0716 VMXNET3_RX_RING_MAX_SIZE / sz * sz);
0717 if (new_rx_ring_size > VMXNET3_RX_RING_MAX_SIZE || (new_rx_ring_size %
0718 sz) != 0)
0719 return -EINVAL;
0720
0721
0722 new_rx_ring2_size = (param->rx_jumbo_pending + VMXNET3_RING_SIZE_MASK) &
0723 ~VMXNET3_RING_SIZE_MASK;
0724 new_rx_ring2_size = min_t(u32, new_rx_ring2_size,
0725 VMXNET3_RX_RING2_MAX_SIZE);
0726
0727
0728 if (VMXNET3_VERSION_GE_7(adapter)) {
0729 new_tx_ring_size = rounddown_pow_of_two(new_tx_ring_size);
0730 new_rx_ring_size = rounddown_pow_of_two(new_rx_ring_size);
0731 new_rx_ring2_size = rounddown_pow_of_two(new_rx_ring2_size);
0732 }
0733
0734
0735
0736
0737 new_rxdata_desc_size =
0738 (param->rx_mini_pending + VMXNET3_RXDATA_DESC_SIZE_MASK) &
0739 ~VMXNET3_RXDATA_DESC_SIZE_MASK;
0740 new_rxdata_desc_size = min_t(u16, new_rxdata_desc_size,
0741 VMXNET3_RXDATA_DESC_MAX_SIZE);
0742
0743 if (new_tx_ring_size == adapter->tx_ring_size &&
0744 new_rx_ring_size == adapter->rx_ring_size &&
0745 new_rx_ring2_size == adapter->rx_ring2_size &&
0746 new_rxdata_desc_size == adapter->rxdata_desc_size) {
0747 return 0;
0748 }
0749
0750
0751
0752
0753
0754 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
0755 usleep_range(1000, 2000);
0756
0757 if (netif_running(netdev)) {
0758 vmxnet3_quiesce_dev(adapter);
0759 vmxnet3_reset_dev(adapter);
0760
0761
0762
0763 vmxnet3_tq_destroy_all(adapter);
0764 vmxnet3_rq_destroy_all(adapter);
0765
0766 err = vmxnet3_create_queues(adapter, new_tx_ring_size,
0767 new_rx_ring_size, new_rx_ring2_size,
0768 adapter->txdata_desc_size,
0769 new_rxdata_desc_size);
0770 if (err) {
0771
0772
0773 netdev_err(netdev, "failed to apply new sizes, "
0774 "try the default ones\n");
0775 new_rx_ring_size = VMXNET3_DEF_RX_RING_SIZE;
0776 new_rx_ring2_size = VMXNET3_DEF_RX_RING2_SIZE;
0777 new_tx_ring_size = VMXNET3_DEF_TX_RING_SIZE;
0778 new_rxdata_desc_size = VMXNET3_VERSION_GE_3(adapter) ?
0779 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
0780
0781 err = vmxnet3_create_queues(adapter,
0782 new_tx_ring_size,
0783 new_rx_ring_size,
0784 new_rx_ring2_size,
0785 adapter->txdata_desc_size,
0786 new_rxdata_desc_size);
0787 if (err) {
0788 netdev_err(netdev, "failed to create queues "
0789 "with default sizes. Closing it\n");
0790 goto out;
0791 }
0792 }
0793
0794 err = vmxnet3_activate_dev(adapter);
0795 if (err)
0796 netdev_err(netdev, "failed to re-activate, error %d."
0797 " Closing it\n", err);
0798 }
0799 adapter->tx_ring_size = new_tx_ring_size;
0800 adapter->rx_ring_size = new_rx_ring_size;
0801 adapter->rx_ring2_size = new_rx_ring2_size;
0802 adapter->rxdata_desc_size = new_rxdata_desc_size;
0803
0804 out:
0805 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
0806 if (err)
0807 vmxnet3_force_close(adapter);
0808
0809 return err;
0810 }
0811
0812 static int
0813 vmxnet3_get_rss_hash_opts(struct vmxnet3_adapter *adapter,
0814 struct ethtool_rxnfc *info)
0815 {
0816 enum Vmxnet3_RSSField rss_fields;
0817
0818 if (netif_running(adapter->netdev)) {
0819 unsigned long flags;
0820
0821 spin_lock_irqsave(&adapter->cmd_lock, flags);
0822
0823 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
0824 VMXNET3_CMD_GET_RSS_FIELDS);
0825 rss_fields = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
0826 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
0827 } else {
0828 rss_fields = adapter->rss_fields;
0829 }
0830
0831 info->data = 0;
0832
0833
0834 switch (info->flow_type) {
0835 case TCP_V4_FLOW:
0836 case TCP_V6_FLOW:
0837 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3 |
0838 RXH_IP_SRC | RXH_IP_DST;
0839 break;
0840 case UDP_V4_FLOW:
0841 if (rss_fields & VMXNET3_RSS_FIELDS_UDPIP4)
0842 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
0843 info->data |= RXH_IP_SRC | RXH_IP_DST;
0844 break;
0845 case AH_ESP_V4_FLOW:
0846 case AH_V4_FLOW:
0847 case ESP_V4_FLOW:
0848 if (rss_fields & VMXNET3_RSS_FIELDS_ESPIP4)
0849 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
0850 fallthrough;
0851 case SCTP_V4_FLOW:
0852 case IPV4_FLOW:
0853 info->data |= RXH_IP_SRC | RXH_IP_DST;
0854 break;
0855 case UDP_V6_FLOW:
0856 if (rss_fields & VMXNET3_RSS_FIELDS_UDPIP6)
0857 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
0858 info->data |= RXH_IP_SRC | RXH_IP_DST;
0859 break;
0860 case AH_ESP_V6_FLOW:
0861 case AH_V6_FLOW:
0862 case ESP_V6_FLOW:
0863 if (VMXNET3_VERSION_GE_6(adapter) &&
0864 (rss_fields & VMXNET3_RSS_FIELDS_ESPIP6))
0865 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
0866 fallthrough;
0867 case SCTP_V6_FLOW:
0868 case IPV6_FLOW:
0869 info->data |= RXH_IP_SRC | RXH_IP_DST;
0870 break;
0871 default:
0872 return -EINVAL;
0873 }
0874
0875 return 0;
0876 }
0877
0878 static int
0879 vmxnet3_set_rss_hash_opt(struct net_device *netdev,
0880 struct vmxnet3_adapter *adapter,
0881 struct ethtool_rxnfc *nfc)
0882 {
0883 enum Vmxnet3_RSSField rss_fields = adapter->rss_fields;
0884
0885
0886
0887
0888 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
0889 RXH_L4_B_0_1 | RXH_L4_B_2_3))
0890 return -EINVAL;
0891
0892 switch (nfc->flow_type) {
0893 case TCP_V4_FLOW:
0894 case TCP_V6_FLOW:
0895 if (!(nfc->data & RXH_IP_SRC) ||
0896 !(nfc->data & RXH_IP_DST) ||
0897 !(nfc->data & RXH_L4_B_0_1) ||
0898 !(nfc->data & RXH_L4_B_2_3))
0899 return -EINVAL;
0900 break;
0901 case UDP_V4_FLOW:
0902 if (!(nfc->data & RXH_IP_SRC) ||
0903 !(nfc->data & RXH_IP_DST))
0904 return -EINVAL;
0905 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
0906 case 0:
0907 rss_fields &= ~VMXNET3_RSS_FIELDS_UDPIP4;
0908 break;
0909 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
0910 rss_fields |= VMXNET3_RSS_FIELDS_UDPIP4;
0911 break;
0912 default:
0913 return -EINVAL;
0914 }
0915 break;
0916 case UDP_V6_FLOW:
0917 if (!(nfc->data & RXH_IP_SRC) ||
0918 !(nfc->data & RXH_IP_DST))
0919 return -EINVAL;
0920 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
0921 case 0:
0922 rss_fields &= ~VMXNET3_RSS_FIELDS_UDPIP6;
0923 break;
0924 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
0925 rss_fields |= VMXNET3_RSS_FIELDS_UDPIP6;
0926 break;
0927 default:
0928 return -EINVAL;
0929 }
0930 break;
0931 case ESP_V4_FLOW:
0932 case AH_V4_FLOW:
0933 case AH_ESP_V4_FLOW:
0934 if (!(nfc->data & RXH_IP_SRC) ||
0935 !(nfc->data & RXH_IP_DST))
0936 return -EINVAL;
0937 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
0938 case 0:
0939 rss_fields &= ~VMXNET3_RSS_FIELDS_ESPIP4;
0940 break;
0941 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
0942 rss_fields |= VMXNET3_RSS_FIELDS_ESPIP4;
0943 break;
0944 default:
0945 return -EINVAL;
0946 }
0947 break;
0948 case ESP_V6_FLOW:
0949 case AH_V6_FLOW:
0950 case AH_ESP_V6_FLOW:
0951 if (!VMXNET3_VERSION_GE_6(adapter))
0952 return -EOPNOTSUPP;
0953 if (!(nfc->data & RXH_IP_SRC) ||
0954 !(nfc->data & RXH_IP_DST))
0955 return -EINVAL;
0956 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
0957 case 0:
0958 rss_fields &= ~VMXNET3_RSS_FIELDS_ESPIP6;
0959 break;
0960 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
0961 rss_fields |= VMXNET3_RSS_FIELDS_ESPIP6;
0962 break;
0963 default:
0964 return -EINVAL;
0965 }
0966 break;
0967 case SCTP_V4_FLOW:
0968 case SCTP_V6_FLOW:
0969 if (!(nfc->data & RXH_IP_SRC) ||
0970 !(nfc->data & RXH_IP_DST) ||
0971 (nfc->data & RXH_L4_B_0_1) ||
0972 (nfc->data & RXH_L4_B_2_3))
0973 return -EINVAL;
0974 break;
0975 default:
0976 return -EINVAL;
0977 }
0978
0979
0980 if (rss_fields != adapter->rss_fields) {
0981 adapter->default_rss_fields = false;
0982 if (netif_running(netdev)) {
0983 struct Vmxnet3_DriverShared *shared = adapter->shared;
0984 union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo;
0985 unsigned long flags;
0986
0987 if (VMXNET3_VERSION_GE_7(adapter)) {
0988 if ((rss_fields & VMXNET3_RSS_FIELDS_UDPIP4 ||
0989 rss_fields & VMXNET3_RSS_FIELDS_UDPIP6) &&
0990 vmxnet3_check_ptcapability(adapter->ptcap_supported[0],
0991 VMXNET3_CAP_UDP_RSS)) {
0992 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_UDP_RSS;
0993 } else {
0994 adapter->dev_caps[0] &= ~(1UL << VMXNET3_CAP_UDP_RSS);
0995 }
0996 if ((rss_fields & VMXNET3_RSS_FIELDS_ESPIP4) &&
0997 vmxnet3_check_ptcapability(adapter->ptcap_supported[0],
0998 VMXNET3_CAP_ESP_RSS_IPV4)) {
0999 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_ESP_RSS_IPV4;
1000 } else {
1001 adapter->dev_caps[0] &= ~(1UL << VMXNET3_CAP_ESP_RSS_IPV4);
1002 }
1003 if ((rss_fields & VMXNET3_RSS_FIELDS_ESPIP6) &&
1004 vmxnet3_check_ptcapability(adapter->ptcap_supported[0],
1005 VMXNET3_CAP_ESP_RSS_IPV6)) {
1006 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_ESP_RSS_IPV6;
1007 } else {
1008 adapter->dev_caps[0] &= ~(1UL << VMXNET3_CAP_ESP_RSS_IPV6);
1009 }
1010
1011 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DCR,
1012 adapter->dev_caps[0]);
1013 spin_lock_irqsave(&adapter->cmd_lock, flags);
1014 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1015 VMXNET3_CMD_GET_DCR0_REG);
1016 adapter->dev_caps[0] = VMXNET3_READ_BAR1_REG(adapter,
1017 VMXNET3_REG_CMD);
1018 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1019 }
1020 spin_lock_irqsave(&adapter->cmd_lock, flags);
1021 cmdInfo->setRssFields = rss_fields;
1022 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1023 VMXNET3_CMD_SET_RSS_FIELDS);
1024
1025
1026
1027
1028 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1029 VMXNET3_CMD_GET_RSS_FIELDS);
1030 adapter->rss_fields =
1031 VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
1032 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1033 } else {
1034
1035
1036
1037 adapter->rss_fields = rss_fields;
1038 }
1039 }
1040 return 0;
1041 }
1042
1043 static int
1044 vmxnet3_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *info,
1045 u32 *rules)
1046 {
1047 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1048 int err = 0;
1049
1050 switch (info->cmd) {
1051 case ETHTOOL_GRXRINGS:
1052 info->data = adapter->num_rx_queues;
1053 break;
1054 case ETHTOOL_GRXFH:
1055 if (!VMXNET3_VERSION_GE_4(adapter)) {
1056 err = -EOPNOTSUPP;
1057 break;
1058 }
1059 #ifdef VMXNET3_RSS
1060 if (!adapter->rss) {
1061 err = -EOPNOTSUPP;
1062 break;
1063 }
1064 #endif
1065 err = vmxnet3_get_rss_hash_opts(adapter, info);
1066 break;
1067 default:
1068 err = -EOPNOTSUPP;
1069 break;
1070 }
1071
1072 return err;
1073 }
1074
1075 static int
1076 vmxnet3_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *info)
1077 {
1078 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1079 int err = 0;
1080
1081 if (!VMXNET3_VERSION_GE_4(adapter)) {
1082 err = -EOPNOTSUPP;
1083 goto done;
1084 }
1085 #ifdef VMXNET3_RSS
1086 if (!adapter->rss) {
1087 err = -EOPNOTSUPP;
1088 goto done;
1089 }
1090 #endif
1091
1092 switch (info->cmd) {
1093 case ETHTOOL_SRXFH:
1094 err = vmxnet3_set_rss_hash_opt(netdev, adapter, info);
1095 break;
1096 default:
1097 err = -EOPNOTSUPP;
1098 break;
1099 }
1100
1101 done:
1102 return err;
1103 }
1104
1105 #ifdef VMXNET3_RSS
1106 static u32
1107 vmxnet3_get_rss_indir_size(struct net_device *netdev)
1108 {
1109 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1110 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
1111
1112 return rssConf->indTableSize;
1113 }
1114
1115 static int
1116 vmxnet3_get_rss(struct net_device *netdev, u32 *p, u8 *key, u8 *hfunc)
1117 {
1118 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1119 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
1120 unsigned int n = rssConf->indTableSize;
1121
1122 if (hfunc)
1123 *hfunc = ETH_RSS_HASH_TOP;
1124 if (!p)
1125 return 0;
1126 if (n > UPT1_RSS_MAX_IND_TABLE_SIZE)
1127 return 0;
1128 while (n--)
1129 p[n] = rssConf->indTable[n];
1130 return 0;
1131
1132 }
1133
1134 static int
1135 vmxnet3_set_rss(struct net_device *netdev, const u32 *p, const u8 *key,
1136 const u8 hfunc)
1137 {
1138 unsigned int i;
1139 unsigned long flags;
1140 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1141 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
1142
1143
1144 if (key ||
1145 (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
1146 return -EOPNOTSUPP;
1147 if (!p)
1148 return 0;
1149 for (i = 0; i < rssConf->indTableSize; i++)
1150 rssConf->indTable[i] = p[i];
1151
1152 spin_lock_irqsave(&adapter->cmd_lock, flags);
1153 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1154 VMXNET3_CMD_UPDATE_RSSIDT);
1155 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1156
1157 return 0;
1158
1159 }
1160 #endif
1161
1162 static int vmxnet3_get_coalesce(struct net_device *netdev,
1163 struct ethtool_coalesce *ec,
1164 struct kernel_ethtool_coalesce *kernel_coal,
1165 struct netlink_ext_ack *extack)
1166 {
1167 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1168
1169 if (!VMXNET3_VERSION_GE_3(adapter))
1170 return -EOPNOTSUPP;
1171
1172 switch (adapter->coal_conf->coalMode) {
1173 case VMXNET3_COALESCE_DISABLED:
1174
1175 break;
1176 case VMXNET3_COALESCE_ADAPT:
1177 ec->use_adaptive_rx_coalesce = true;
1178 break;
1179 case VMXNET3_COALESCE_STATIC:
1180 ec->tx_max_coalesced_frames =
1181 adapter->coal_conf->coalPara.coalStatic.tx_comp_depth;
1182 ec->rx_max_coalesced_frames =
1183 adapter->coal_conf->coalPara.coalStatic.rx_depth;
1184 break;
1185 case VMXNET3_COALESCE_RBC: {
1186 u32 rbc_rate;
1187
1188 rbc_rate = adapter->coal_conf->coalPara.coalRbc.rbc_rate;
1189 ec->rx_coalesce_usecs = VMXNET3_COAL_RBC_USECS(rbc_rate);
1190 }
1191 break;
1192 default:
1193 return -EOPNOTSUPP;
1194 }
1195
1196 return 0;
1197 }
1198
1199 static int vmxnet3_set_coalesce(struct net_device *netdev,
1200 struct ethtool_coalesce *ec,
1201 struct kernel_ethtool_coalesce *kernel_coal,
1202 struct netlink_ext_ack *extack)
1203 {
1204 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1205 struct Vmxnet3_DriverShared *shared = adapter->shared;
1206 union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo;
1207 unsigned long flags;
1208
1209 if (!VMXNET3_VERSION_GE_3(adapter))
1210 return -EOPNOTSUPP;
1211
1212 if ((ec->rx_coalesce_usecs == 0) &&
1213 (ec->use_adaptive_rx_coalesce == 0) &&
1214 (ec->tx_max_coalesced_frames == 0) &&
1215 (ec->rx_max_coalesced_frames == 0)) {
1216 memset(adapter->coal_conf, 0, sizeof(*adapter->coal_conf));
1217 adapter->coal_conf->coalMode = VMXNET3_COALESCE_DISABLED;
1218 goto done;
1219 }
1220
1221 if (ec->rx_coalesce_usecs != 0) {
1222 u32 rbc_rate;
1223
1224 if ((ec->use_adaptive_rx_coalesce != 0) ||
1225 (ec->tx_max_coalesced_frames != 0) ||
1226 (ec->rx_max_coalesced_frames != 0)) {
1227 return -EINVAL;
1228 }
1229
1230 rbc_rate = VMXNET3_COAL_RBC_RATE(ec->rx_coalesce_usecs);
1231 if (rbc_rate < VMXNET3_COAL_RBC_MIN_RATE ||
1232 rbc_rate > VMXNET3_COAL_RBC_MAX_RATE) {
1233 return -EINVAL;
1234 }
1235
1236 memset(adapter->coal_conf, 0, sizeof(*adapter->coal_conf));
1237 adapter->coal_conf->coalMode = VMXNET3_COALESCE_RBC;
1238 adapter->coal_conf->coalPara.coalRbc.rbc_rate = rbc_rate;
1239 goto done;
1240 }
1241
1242 if (ec->use_adaptive_rx_coalesce != 0) {
1243 if (ec->tx_max_coalesced_frames != 0 ||
1244 ec->rx_max_coalesced_frames != 0) {
1245 return -EINVAL;
1246 }
1247 memset(adapter->coal_conf, 0, sizeof(*adapter->coal_conf));
1248 adapter->coal_conf->coalMode = VMXNET3_COALESCE_ADAPT;
1249 goto done;
1250 }
1251
1252 if ((ec->tx_max_coalesced_frames != 0) ||
1253 (ec->rx_max_coalesced_frames != 0)) {
1254 if ((ec->tx_max_coalesced_frames >
1255 VMXNET3_COAL_STATIC_MAX_DEPTH) ||
1256 (ec->rx_max_coalesced_frames >
1257 VMXNET3_COAL_STATIC_MAX_DEPTH)) {
1258 return -EINVAL;
1259 }
1260
1261 memset(adapter->coal_conf, 0, sizeof(*adapter->coal_conf));
1262 adapter->coal_conf->coalMode = VMXNET3_COALESCE_STATIC;
1263
1264 adapter->coal_conf->coalPara.coalStatic.tx_comp_depth =
1265 (ec->tx_max_coalesced_frames ?
1266 ec->tx_max_coalesced_frames :
1267 VMXNET3_COAL_STATIC_DEFAULT_DEPTH);
1268
1269 adapter->coal_conf->coalPara.coalStatic.rx_depth =
1270 (ec->rx_max_coalesced_frames ?
1271 ec->rx_max_coalesced_frames :
1272 VMXNET3_COAL_STATIC_DEFAULT_DEPTH);
1273
1274 adapter->coal_conf->coalPara.coalStatic.tx_depth =
1275 VMXNET3_COAL_STATIC_DEFAULT_DEPTH;
1276 goto done;
1277 }
1278
1279 done:
1280 adapter->default_coal_mode = false;
1281 if (netif_running(netdev)) {
1282 spin_lock_irqsave(&adapter->cmd_lock, flags);
1283 cmdInfo->varConf.confVer = 1;
1284 cmdInfo->varConf.confLen =
1285 cpu_to_le32(sizeof(*adapter->coal_conf));
1286 cmdInfo->varConf.confPA = cpu_to_le64(adapter->coal_conf_pa);
1287 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1288 VMXNET3_CMD_SET_COALESCE);
1289 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1290 }
1291
1292 return 0;
1293 }
1294
1295 static void vmxnet3_get_channels(struct net_device *netdev,
1296 struct ethtool_channels *ec)
1297 {
1298 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1299
1300 if (IS_ENABLED(CONFIG_PCI_MSI) && adapter->intr.type == VMXNET3_IT_MSIX) {
1301 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) {
1302 ec->combined_count = adapter->num_tx_queues;
1303 } else {
1304 ec->rx_count = adapter->num_rx_queues;
1305 ec->tx_count =
1306 adapter->share_intr == VMXNET3_INTR_TXSHARE ?
1307 1 : adapter->num_tx_queues;
1308 }
1309 } else {
1310 ec->combined_count = 1;
1311 }
1312
1313 ec->other_count = 1;
1314
1315
1316
1317 ec->max_rx = ec->rx_count;
1318 ec->max_tx = ec->tx_count;
1319 ec->max_combined = ec->combined_count;
1320 ec->max_other = ec->other_count;
1321 }
1322
1323 static const struct ethtool_ops vmxnet3_ethtool_ops = {
1324 .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |
1325 ETHTOOL_COALESCE_MAX_FRAMES |
1326 ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
1327 .get_drvinfo = vmxnet3_get_drvinfo,
1328 .get_regs_len = vmxnet3_get_regs_len,
1329 .get_regs = vmxnet3_get_regs,
1330 .get_wol = vmxnet3_get_wol,
1331 .set_wol = vmxnet3_set_wol,
1332 .get_link = ethtool_op_get_link,
1333 .get_coalesce = vmxnet3_get_coalesce,
1334 .set_coalesce = vmxnet3_set_coalesce,
1335 .get_strings = vmxnet3_get_strings,
1336 .get_sset_count = vmxnet3_get_sset_count,
1337 .get_ethtool_stats = vmxnet3_get_ethtool_stats,
1338 .get_ringparam = vmxnet3_get_ringparam,
1339 .set_ringparam = vmxnet3_set_ringparam,
1340 .get_rxnfc = vmxnet3_get_rxnfc,
1341 .set_rxnfc = vmxnet3_set_rxnfc,
1342 #ifdef VMXNET3_RSS
1343 .get_rxfh_indir_size = vmxnet3_get_rss_indir_size,
1344 .get_rxfh = vmxnet3_get_rss,
1345 .set_rxfh = vmxnet3_set_rss,
1346 #endif
1347 .get_link_ksettings = vmxnet3_get_link_ksettings,
1348 .get_channels = vmxnet3_get_channels,
1349 };
1350
1351 void vmxnet3_set_ethtool_ops(struct net_device *netdev)
1352 {
1353 netdev->ethtool_ops = &vmxnet3_ethtool_ops;
1354 }