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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * ASIX AX8817X based USB 2.0 Ethernet Devices
0004  * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
0005  * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
0006  * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
0007  * Copyright (c) 2002-2003 TiVo Inc.
0008  */
0009 
0010 #include "asix.h"
0011 
0012 #define PHY_MODE_MARVELL    0x0000
0013 #define MII_MARVELL_LED_CTRL    0x0018
0014 #define MII_MARVELL_STATUS  0x001b
0015 #define MII_MARVELL_CTRL    0x0014
0016 
0017 #define MARVELL_LED_MANUAL  0x0019
0018 
0019 #define MARVELL_STATUS_HWCFG    0x0004
0020 
0021 #define MARVELL_CTRL_TXDELAY    0x0002
0022 #define MARVELL_CTRL_RXDELAY    0x0080
0023 
0024 #define PHY_MODE_RTL8211CL  0x000C
0025 
0026 #define AX88772A_PHY14H     0x14
0027 #define AX88772A_PHY14H_DEFAULT 0x442C
0028 
0029 #define AX88772A_PHY15H     0x15
0030 #define AX88772A_PHY15H_DEFAULT 0x03C8
0031 
0032 #define AX88772A_PHY16H     0x16
0033 #define AX88772A_PHY16H_DEFAULT 0x4044
0034 
0035 struct ax88172_int_data {
0036     __le16 res1;
0037     u8 link;
0038     __le16 res2;
0039     u8 status;
0040     __le16 res3;
0041 } __packed;
0042 
0043 static void asix_status(struct usbnet *dev, struct urb *urb)
0044 {
0045     struct ax88172_int_data *event;
0046     int link;
0047 
0048     if (urb->actual_length < 8)
0049         return;
0050 
0051     event = urb->transfer_buffer;
0052     link = event->link & 0x01;
0053     if (netif_carrier_ok(dev->net) != link) {
0054         usbnet_link_change(dev, link, 1);
0055         netdev_dbg(dev->net, "Link Status is: %d\n", link);
0056     }
0057 }
0058 
0059 static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
0060 {
0061     if (is_valid_ether_addr(addr)) {
0062         eth_hw_addr_set(dev->net, addr);
0063     } else {
0064         netdev_info(dev->net, "invalid hw address, using random\n");
0065         eth_hw_addr_random(dev->net);
0066     }
0067 }
0068 
0069 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
0070 static u32 asix_get_phyid(struct usbnet *dev)
0071 {
0072     int phy_reg;
0073     u32 phy_id;
0074     int i;
0075 
0076     /* Poll for the rare case the FW or phy isn't ready yet.  */
0077     for (i = 0; i < 100; i++) {
0078         phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
0079         if (phy_reg < 0)
0080             return 0;
0081         if (phy_reg != 0 && phy_reg != 0xFFFF)
0082             break;
0083         mdelay(1);
0084     }
0085 
0086     if (phy_reg <= 0 || phy_reg == 0xFFFF)
0087         return 0;
0088 
0089     phy_id = (phy_reg & 0xffff) << 16;
0090 
0091     phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
0092     if (phy_reg < 0)
0093         return 0;
0094 
0095     phy_id |= (phy_reg & 0xffff);
0096 
0097     return phy_id;
0098 }
0099 
0100 static u32 asix_get_link(struct net_device *net)
0101 {
0102     struct usbnet *dev = netdev_priv(net);
0103 
0104     return mii_link_ok(&dev->mii);
0105 }
0106 
0107 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
0108 {
0109     struct usbnet *dev = netdev_priv(net);
0110 
0111     return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
0112 }
0113 
0114 /* We need to override some ethtool_ops so we require our
0115    own structure so we don't interfere with other usbnet
0116    devices that may be connected at the same time. */
0117 static const struct ethtool_ops ax88172_ethtool_ops = {
0118     .get_drvinfo        = asix_get_drvinfo,
0119     .get_link       = asix_get_link,
0120     .get_msglevel       = usbnet_get_msglevel,
0121     .set_msglevel       = usbnet_set_msglevel,
0122     .get_wol        = asix_get_wol,
0123     .set_wol        = asix_set_wol,
0124     .get_eeprom_len     = asix_get_eeprom_len,
0125     .get_eeprom     = asix_get_eeprom,
0126     .set_eeprom     = asix_set_eeprom,
0127     .nway_reset     = usbnet_nway_reset,
0128     .get_link_ksettings = usbnet_get_link_ksettings_mii,
0129     .set_link_ksettings = usbnet_set_link_ksettings_mii,
0130 };
0131 
0132 static void ax88172_set_multicast(struct net_device *net)
0133 {
0134     struct usbnet *dev = netdev_priv(net);
0135     struct asix_data *data = (struct asix_data *)&dev->data;
0136     u8 rx_ctl = 0x8c;
0137 
0138     if (net->flags & IFF_PROMISC) {
0139         rx_ctl |= 0x01;
0140     } else if (net->flags & IFF_ALLMULTI ||
0141            netdev_mc_count(net) > AX_MAX_MCAST) {
0142         rx_ctl |= 0x02;
0143     } else if (netdev_mc_empty(net)) {
0144         /* just broadcast and directed */
0145     } else {
0146         /* We use the 20 byte dev->data
0147          * for our 8 byte filter buffer
0148          * to avoid allocating memory that
0149          * is tricky to free later */
0150         struct netdev_hw_addr *ha;
0151         u32 crc_bits;
0152 
0153         memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
0154 
0155         /* Build the multicast hash filter. */
0156         netdev_for_each_mc_addr(ha, net) {
0157             crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
0158             data->multi_filter[crc_bits >> 3] |=
0159                 1 << (crc_bits & 7);
0160         }
0161 
0162         asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
0163                    AX_MCAST_FILTER_SIZE, data->multi_filter);
0164 
0165         rx_ctl |= 0x10;
0166     }
0167 
0168     asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
0169 }
0170 
0171 static int ax88172_link_reset(struct usbnet *dev)
0172 {
0173     u8 mode;
0174     struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
0175 
0176     mii_check_media(&dev->mii, 1, 1);
0177     mii_ethtool_gset(&dev->mii, &ecmd);
0178     mode = AX88172_MEDIUM_DEFAULT;
0179 
0180     if (ecmd.duplex != DUPLEX_FULL)
0181         mode |= ~AX88172_MEDIUM_FD;
0182 
0183     netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
0184            ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
0185 
0186     asix_write_medium_mode(dev, mode, 0);
0187 
0188     return 0;
0189 }
0190 
0191 static const struct net_device_ops ax88172_netdev_ops = {
0192     .ndo_open       = usbnet_open,
0193     .ndo_stop       = usbnet_stop,
0194     .ndo_start_xmit     = usbnet_start_xmit,
0195     .ndo_tx_timeout     = usbnet_tx_timeout,
0196     .ndo_change_mtu     = usbnet_change_mtu,
0197     .ndo_get_stats64    = dev_get_tstats64,
0198     .ndo_set_mac_address    = eth_mac_addr,
0199     .ndo_validate_addr  = eth_validate_addr,
0200     .ndo_eth_ioctl      = asix_ioctl,
0201     .ndo_set_rx_mode    = ax88172_set_multicast,
0202 };
0203 
0204 static void asix_phy_reset(struct usbnet *dev, unsigned int reset_bits)
0205 {
0206     unsigned int timeout = 5000;
0207 
0208     asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, reset_bits);
0209 
0210     /* give phy_id a chance to process reset */
0211     udelay(500);
0212 
0213     /* See IEEE 802.3 "22.2.4.1.1 Reset": 500ms max */
0214     while (timeout--) {
0215         if (asix_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR)
0216                             & BMCR_RESET)
0217             udelay(100);
0218         else
0219             return;
0220     }
0221 
0222     netdev_err(dev->net, "BMCR_RESET timeout on phy_id %d\n",
0223            dev->mii.phy_id);
0224 }
0225 
0226 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
0227 {
0228     int ret = 0;
0229     u8 buf[ETH_ALEN] = {0};
0230     int i;
0231     unsigned long gpio_bits = dev->driver_info->data;
0232 
0233     usbnet_get_endpoints(dev,intf);
0234 
0235     /* Toggle the GPIOs in a manufacturer/model specific way */
0236     for (i = 2; i >= 0; i--) {
0237         ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
0238                 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL, 0);
0239         if (ret < 0)
0240             goto out;
0241         msleep(5);
0242     }
0243 
0244     ret = asix_write_rx_ctl(dev, 0x80, 0);
0245     if (ret < 0)
0246         goto out;
0247 
0248     /* Get the MAC address */
0249     ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
0250                 0, 0, ETH_ALEN, buf, 0);
0251     if (ret < 0) {
0252         netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
0253                ret);
0254         goto out;
0255     }
0256 
0257     asix_set_netdev_dev_addr(dev, buf);
0258 
0259     /* Initialize MII structure */
0260     dev->mii.dev = dev->net;
0261     dev->mii.mdio_read = asix_mdio_read;
0262     dev->mii.mdio_write = asix_mdio_write;
0263     dev->mii.phy_id_mask = 0x3f;
0264     dev->mii.reg_num_mask = 0x1f;
0265 
0266     dev->mii.phy_id = asix_read_phy_addr(dev, true);
0267     if (dev->mii.phy_id < 0)
0268         return dev->mii.phy_id;
0269 
0270     dev->net->netdev_ops = &ax88172_netdev_ops;
0271     dev->net->ethtool_ops = &ax88172_ethtool_ops;
0272     dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
0273     dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
0274 
0275     asix_phy_reset(dev, BMCR_RESET);
0276     asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
0277         ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
0278     mii_nway_restart(&dev->mii);
0279 
0280     return 0;
0281 
0282 out:
0283     return ret;
0284 }
0285 
0286 static void ax88772_ethtool_get_strings(struct net_device *netdev, u32 sset,
0287                     u8 *data)
0288 {
0289     switch (sset) {
0290     case ETH_SS_TEST:
0291         net_selftest_get_strings(data);
0292         break;
0293     }
0294 }
0295 
0296 static int ax88772_ethtool_get_sset_count(struct net_device *ndev, int sset)
0297 {
0298     switch (sset) {
0299     case ETH_SS_TEST:
0300         return net_selftest_get_count();
0301     default:
0302         return -EOPNOTSUPP;
0303     }
0304 }
0305 
0306 static const struct ethtool_ops ax88772_ethtool_ops = {
0307     .get_drvinfo        = asix_get_drvinfo,
0308     .get_link       = usbnet_get_link,
0309     .get_msglevel       = usbnet_get_msglevel,
0310     .set_msglevel       = usbnet_set_msglevel,
0311     .get_wol        = asix_get_wol,
0312     .set_wol        = asix_set_wol,
0313     .get_eeprom_len     = asix_get_eeprom_len,
0314     .get_eeprom     = asix_get_eeprom,
0315     .set_eeprom     = asix_set_eeprom,
0316     .nway_reset     = phy_ethtool_nway_reset,
0317     .get_link_ksettings = phy_ethtool_get_link_ksettings,
0318     .set_link_ksettings = phy_ethtool_set_link_ksettings,
0319     .self_test      = net_selftest,
0320     .get_strings        = ax88772_ethtool_get_strings,
0321     .get_sset_count     = ax88772_ethtool_get_sset_count,
0322 };
0323 
0324 static int ax88772_reset(struct usbnet *dev)
0325 {
0326     struct asix_data *data = (struct asix_data *)&dev->data;
0327     struct asix_common_private *priv = dev->driver_priv;
0328     int ret;
0329 
0330     /* Rewrite MAC address */
0331     ether_addr_copy(data->mac_addr, dev->net->dev_addr);
0332     ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
0333                  ETH_ALEN, data->mac_addr, 0);
0334     if (ret < 0)
0335         goto out;
0336 
0337     /* Set RX_CTL to default values with 2k buffer, and enable cactus */
0338     ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
0339     if (ret < 0)
0340         goto out;
0341 
0342     ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, 0);
0343     if (ret < 0)
0344         goto out;
0345 
0346     phy_start(priv->phydev);
0347 
0348     return 0;
0349 
0350 out:
0351     return ret;
0352 }
0353 
0354 static int ax88772_hw_reset(struct usbnet *dev, int in_pm)
0355 {
0356     struct asix_data *data = (struct asix_data *)&dev->data;
0357     struct asix_common_private *priv = dev->driver_priv;
0358     u16 rx_ctl;
0359     int ret;
0360 
0361     ret = asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_2 |
0362                   AX_GPIO_GPO2EN, 5, in_pm);
0363     if (ret < 0)
0364         goto out;
0365 
0366     ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy,
0367                  0, 0, NULL, in_pm);
0368     if (ret < 0) {
0369         netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
0370         goto out;
0371     }
0372 
0373     if (priv->embd_phy) {
0374         ret = asix_sw_reset(dev, AX_SWRESET_IPPD, in_pm);
0375         if (ret < 0)
0376             goto out;
0377 
0378         usleep_range(10000, 11000);
0379 
0380         ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
0381         if (ret < 0)
0382             goto out;
0383 
0384         msleep(60);
0385 
0386         ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL,
0387                     in_pm);
0388         if (ret < 0)
0389             goto out;
0390     } else {
0391         ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL,
0392                     in_pm);
0393         if (ret < 0)
0394             goto out;
0395     }
0396 
0397     msleep(150);
0398 
0399     if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
0400                        MII_PHYSID1))){
0401         ret = -EIO;
0402         goto out;
0403     }
0404 
0405     ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
0406     if (ret < 0)
0407         goto out;
0408 
0409     ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
0410     if (ret < 0)
0411         goto out;
0412 
0413     ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
0414                  AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
0415                  AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
0416     if (ret < 0) {
0417         netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
0418         goto out;
0419     }
0420 
0421     /* Rewrite MAC address */
0422     ether_addr_copy(data->mac_addr, dev->net->dev_addr);
0423     ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
0424                  ETH_ALEN, data->mac_addr, in_pm);
0425     if (ret < 0)
0426         goto out;
0427 
0428     /* Set RX_CTL to default values with 2k buffer, and enable cactus */
0429     ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
0430     if (ret < 0)
0431         goto out;
0432 
0433     rx_ctl = asix_read_rx_ctl(dev, in_pm);
0434     netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
0435            rx_ctl);
0436 
0437     rx_ctl = asix_read_medium_status(dev, in_pm);
0438     netdev_dbg(dev->net,
0439            "Medium Status is 0x%04x after all initializations\n",
0440            rx_ctl);
0441 
0442     return 0;
0443 
0444 out:
0445     return ret;
0446 }
0447 
0448 static int ax88772a_hw_reset(struct usbnet *dev, int in_pm)
0449 {
0450     struct asix_data *data = (struct asix_data *)&dev->data;
0451     struct asix_common_private *priv = dev->driver_priv;
0452     u16 rx_ctl, phy14h, phy15h, phy16h;
0453     int ret;
0454 
0455     ret = asix_write_gpio(dev, AX_GPIO_RSE, 5, in_pm);
0456     if (ret < 0)
0457         goto out;
0458 
0459     ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy |
0460                  AX_PHYSEL_SSEN, 0, 0, NULL, in_pm);
0461     if (ret < 0) {
0462         netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
0463         goto out;
0464     }
0465     usleep_range(10000, 11000);
0466 
0467     ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_IPRL, in_pm);
0468     if (ret < 0)
0469         goto out;
0470 
0471     usleep_range(10000, 11000);
0472 
0473     ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
0474     if (ret < 0)
0475         goto out;
0476 
0477     msleep(160);
0478 
0479     ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
0480     if (ret < 0)
0481         goto out;
0482 
0483     ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
0484     if (ret < 0)
0485         goto out;
0486 
0487     msleep(200);
0488 
0489     if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
0490                        MII_PHYSID1))) {
0491         ret = -1;
0492         goto out;
0493     }
0494 
0495     if (priv->chipcode == AX_AX88772B_CHIPCODE) {
0496         ret = asix_write_cmd(dev, AX_QCTCTRL, 0x8000, 0x8001,
0497                      0, NULL, in_pm);
0498         if (ret < 0) {
0499             netdev_dbg(dev->net, "Write BQ setting failed: %d\n",
0500                    ret);
0501             goto out;
0502         }
0503     } else if (priv->chipcode == AX_AX88772A_CHIPCODE) {
0504         /* Check if the PHY registers have default settings */
0505         phy14h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
0506                          AX88772A_PHY14H);
0507         phy15h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
0508                          AX88772A_PHY15H);
0509         phy16h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
0510                          AX88772A_PHY16H);
0511 
0512         netdev_dbg(dev->net,
0513                "772a_hw_reset: MR20=0x%x MR21=0x%x MR22=0x%x\n",
0514                phy14h, phy15h, phy16h);
0515 
0516         /* Restore PHY registers default setting if not */
0517         if (phy14h != AX88772A_PHY14H_DEFAULT)
0518             asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
0519                          AX88772A_PHY14H,
0520                          AX88772A_PHY14H_DEFAULT);
0521         if (phy15h != AX88772A_PHY15H_DEFAULT)
0522             asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
0523                          AX88772A_PHY15H,
0524                          AX88772A_PHY15H_DEFAULT);
0525         if (phy16h != AX88772A_PHY16H_DEFAULT)
0526             asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
0527                          AX88772A_PHY16H,
0528                          AX88772A_PHY16H_DEFAULT);
0529     }
0530 
0531     ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
0532                 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
0533                 AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
0534     if (ret < 0) {
0535         netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
0536         goto out;
0537     }
0538 
0539     /* Rewrite MAC address */
0540     memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
0541     ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
0542                             data->mac_addr, in_pm);
0543     if (ret < 0)
0544         goto out;
0545 
0546     /* Set RX_CTL to default values with 2k buffer, and enable cactus */
0547     ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
0548     if (ret < 0)
0549         goto out;
0550 
0551     ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
0552     if (ret < 0)
0553         return ret;
0554 
0555     /* Set RX_CTL to default values with 2k buffer, and enable cactus */
0556     ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
0557     if (ret < 0)
0558         goto out;
0559 
0560     rx_ctl = asix_read_rx_ctl(dev, in_pm);
0561     netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
0562            rx_ctl);
0563 
0564     rx_ctl = asix_read_medium_status(dev, in_pm);
0565     netdev_dbg(dev->net,
0566            "Medium Status is 0x%04x after all initializations\n",
0567            rx_ctl);
0568 
0569     return 0;
0570 
0571 out:
0572     return ret;
0573 }
0574 
0575 static const struct net_device_ops ax88772_netdev_ops = {
0576     .ndo_open       = usbnet_open,
0577     .ndo_stop       = usbnet_stop,
0578     .ndo_start_xmit     = usbnet_start_xmit,
0579     .ndo_tx_timeout     = usbnet_tx_timeout,
0580     .ndo_change_mtu     = usbnet_change_mtu,
0581     .ndo_get_stats64    = dev_get_tstats64,
0582     .ndo_set_mac_address    = asix_set_mac_address,
0583     .ndo_validate_addr  = eth_validate_addr,
0584     .ndo_eth_ioctl      = phy_do_ioctl_running,
0585     .ndo_set_rx_mode        = asix_set_multicast,
0586 };
0587 
0588 static void ax88772_suspend(struct usbnet *dev)
0589 {
0590     struct asix_common_private *priv = dev->driver_priv;
0591     u16 medium;
0592 
0593     if (netif_running(dev->net))
0594         phy_stop(priv->phydev);
0595 
0596     /* Stop MAC operation */
0597     medium = asix_read_medium_status(dev, 1);
0598     medium &= ~AX_MEDIUM_RE;
0599     asix_write_medium_mode(dev, medium, 1);
0600 
0601     netdev_dbg(dev->net, "ax88772_suspend: medium=0x%04x\n",
0602            asix_read_medium_status(dev, 1));
0603 }
0604 
0605 static int asix_suspend(struct usb_interface *intf, pm_message_t message)
0606 {
0607     struct usbnet *dev = usb_get_intfdata(intf);
0608     struct asix_common_private *priv = dev->driver_priv;
0609 
0610     if (priv && priv->suspend)
0611         priv->suspend(dev);
0612 
0613     return usbnet_suspend(intf, message);
0614 }
0615 
0616 static void ax88772_resume(struct usbnet *dev)
0617 {
0618     struct asix_common_private *priv = dev->driver_priv;
0619     int i;
0620 
0621     for (i = 0; i < 3; i++)
0622         if (!priv->reset(dev, 1))
0623             break;
0624 
0625     if (netif_running(dev->net))
0626         phy_start(priv->phydev);
0627 }
0628 
0629 static int asix_resume(struct usb_interface *intf)
0630 {
0631     struct usbnet *dev = usb_get_intfdata(intf);
0632     struct asix_common_private *priv = dev->driver_priv;
0633 
0634     if (priv && priv->resume)
0635         priv->resume(dev);
0636 
0637     return usbnet_resume(intf);
0638 }
0639 
0640 static int ax88772_init_mdio(struct usbnet *dev)
0641 {
0642     struct asix_common_private *priv = dev->driver_priv;
0643 
0644     priv->mdio = devm_mdiobus_alloc(&dev->udev->dev);
0645     if (!priv->mdio)
0646         return -ENOMEM;
0647 
0648     priv->mdio->priv = dev;
0649     priv->mdio->read = &asix_mdio_bus_read;
0650     priv->mdio->write = &asix_mdio_bus_write;
0651     priv->mdio->name = "Asix MDIO Bus";
0652     /* mii bus name is usb-<usb bus number>-<usb device number> */
0653     snprintf(priv->mdio->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
0654          dev->udev->bus->busnum, dev->udev->devnum);
0655 
0656     return devm_mdiobus_register(&dev->udev->dev, priv->mdio);
0657 }
0658 
0659 static int ax88772_init_phy(struct usbnet *dev)
0660 {
0661     struct asix_common_private *priv = dev->driver_priv;
0662     int ret;
0663 
0664     priv->phydev = mdiobus_get_phy(priv->mdio, priv->phy_addr);
0665     if (!priv->phydev) {
0666         netdev_err(dev->net, "Could not find PHY\n");
0667         return -ENODEV;
0668     }
0669 
0670     ret = phy_connect_direct(dev->net, priv->phydev, &asix_adjust_link,
0671                  PHY_INTERFACE_MODE_INTERNAL);
0672     if (ret) {
0673         netdev_err(dev->net, "Could not connect PHY\n");
0674         return ret;
0675     }
0676 
0677     phy_suspend(priv->phydev);
0678     priv->phydev->mac_managed_pm = 1;
0679 
0680     phy_attached_info(priv->phydev);
0681 
0682     if (priv->embd_phy)
0683         return 0;
0684 
0685     /* In case main PHY is not the embedded PHY and MAC is RMII clock
0686      * provider, we need to suspend embedded PHY by keeping PLL enabled
0687      * (AX_SWRESET_IPPD == 0).
0688      */
0689     priv->phydev_int = mdiobus_get_phy(priv->mdio, AX_EMBD_PHY_ADDR);
0690     if (!priv->phydev_int) {
0691         netdev_err(dev->net, "Could not find internal PHY\n");
0692         return -ENODEV;
0693     }
0694 
0695     priv->phydev_int->mac_managed_pm = 1;
0696     phy_suspend(priv->phydev_int);
0697 
0698     return 0;
0699 }
0700 
0701 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
0702 {
0703     struct asix_common_private *priv;
0704     u8 buf[ETH_ALEN] = {0};
0705     int ret, i;
0706 
0707     priv = devm_kzalloc(&dev->udev->dev, sizeof(*priv), GFP_KERNEL);
0708     if (!priv)
0709         return -ENOMEM;
0710 
0711     dev->driver_priv = priv;
0712 
0713     usbnet_get_endpoints(dev, intf);
0714 
0715     /* Maybe the boot loader passed the MAC address via device tree */
0716     if (!eth_platform_get_mac_address(&dev->udev->dev, buf)) {
0717         netif_dbg(dev, ifup, dev->net,
0718               "MAC address read from device tree");
0719     } else {
0720         /* Try getting the MAC address from EEPROM */
0721         if (dev->driver_info->data & FLAG_EEPROM_MAC) {
0722             for (i = 0; i < (ETH_ALEN >> 1); i++) {
0723                 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM,
0724                             0x04 + i, 0, 2, buf + i * 2,
0725                             0);
0726                 if (ret < 0)
0727                     break;
0728             }
0729         } else {
0730             ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
0731                         0, 0, ETH_ALEN, buf, 0);
0732         }
0733 
0734         if (ret < 0) {
0735             netdev_dbg(dev->net, "Failed to read MAC address: %d\n",
0736                    ret);
0737             return ret;
0738         }
0739     }
0740 
0741     asix_set_netdev_dev_addr(dev, buf);
0742 
0743     dev->net->netdev_ops = &ax88772_netdev_ops;
0744     dev->net->ethtool_ops = &ax88772_ethtool_ops;
0745     dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
0746     dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
0747 
0748     ret = asix_read_phy_addr(dev, true);
0749     if (ret < 0)
0750         return ret;
0751 
0752     priv->phy_addr = ret;
0753     priv->embd_phy = ((priv->phy_addr & 0x1f) == AX_EMBD_PHY_ADDR);
0754 
0755     ret = asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0, 0, 1,
0756                 &priv->chipcode, 0);
0757     if (ret < 0) {
0758         netdev_dbg(dev->net, "Failed to read STATMNGSTS_REG: %d\n", ret);
0759         return ret;
0760     }
0761 
0762     priv->chipcode &= AX_CHIPCODE_MASK;
0763 
0764     priv->resume = ax88772_resume;
0765     priv->suspend = ax88772_suspend;
0766     if (priv->chipcode == AX_AX88772_CHIPCODE)
0767         priv->reset = ax88772_hw_reset;
0768     else
0769         priv->reset = ax88772a_hw_reset;
0770 
0771     ret = priv->reset(dev, 0);
0772     if (ret < 0) {
0773         netdev_dbg(dev->net, "Failed to reset AX88772: %d\n", ret);
0774         return ret;
0775     }
0776 
0777     /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
0778     if (dev->driver_info->flags & FLAG_FRAMING_AX) {
0779         /* hard_mtu  is still the default - the device does not support
0780            jumbo eth frames */
0781         dev->rx_urb_size = 2048;
0782     }
0783 
0784     priv->presvd_phy_bmcr = 0;
0785     priv->presvd_phy_advertise = 0;
0786 
0787     ret = ax88772_init_mdio(dev);
0788     if (ret)
0789         return ret;
0790 
0791     return ax88772_init_phy(dev);
0792 }
0793 
0794 static int ax88772_stop(struct usbnet *dev)
0795 {
0796     struct asix_common_private *priv = dev->driver_priv;
0797 
0798     phy_stop(priv->phydev);
0799 
0800     return 0;
0801 }
0802 
0803 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
0804 {
0805     struct asix_common_private *priv = dev->driver_priv;
0806 
0807     phy_disconnect(priv->phydev);
0808     asix_rx_fixup_common_free(dev->driver_priv);
0809 }
0810 
0811 static void ax88178_unbind(struct usbnet *dev, struct usb_interface *intf)
0812 {
0813     asix_rx_fixup_common_free(dev->driver_priv);
0814     kfree(dev->driver_priv);
0815 }
0816 
0817 static const struct ethtool_ops ax88178_ethtool_ops = {
0818     .get_drvinfo        = asix_get_drvinfo,
0819     .get_link       = asix_get_link,
0820     .get_msglevel       = usbnet_get_msglevel,
0821     .set_msglevel       = usbnet_set_msglevel,
0822     .get_wol        = asix_get_wol,
0823     .set_wol        = asix_set_wol,
0824     .get_eeprom_len     = asix_get_eeprom_len,
0825     .get_eeprom     = asix_get_eeprom,
0826     .set_eeprom     = asix_set_eeprom,
0827     .nway_reset     = usbnet_nway_reset,
0828     .get_link_ksettings = usbnet_get_link_ksettings_mii,
0829     .set_link_ksettings = usbnet_set_link_ksettings_mii,
0830 };
0831 
0832 static int marvell_phy_init(struct usbnet *dev)
0833 {
0834     struct asix_data *data = (struct asix_data *)&dev->data;
0835     u16 reg;
0836 
0837     netdev_dbg(dev->net, "marvell_phy_init()\n");
0838 
0839     reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
0840     netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
0841 
0842     asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
0843             MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
0844 
0845     if (data->ledmode) {
0846         reg = asix_mdio_read(dev->net, dev->mii.phy_id,
0847             MII_MARVELL_LED_CTRL);
0848         netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
0849 
0850         reg &= 0xf8ff;
0851         reg |= (1 + 0x0100);
0852         asix_mdio_write(dev->net, dev->mii.phy_id,
0853             MII_MARVELL_LED_CTRL, reg);
0854 
0855         reg = asix_mdio_read(dev->net, dev->mii.phy_id,
0856             MII_MARVELL_LED_CTRL);
0857         netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
0858     }
0859 
0860     return 0;
0861 }
0862 
0863 static int rtl8211cl_phy_init(struct usbnet *dev)
0864 {
0865     struct asix_data *data = (struct asix_data *)&dev->data;
0866 
0867     netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
0868 
0869     asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
0870     asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
0871     asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
0872         asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
0873     asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
0874 
0875     if (data->ledmode == 12) {
0876         asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
0877         asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
0878         asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
0879     }
0880 
0881     return 0;
0882 }
0883 
0884 static int marvell_led_status(struct usbnet *dev, u16 speed)
0885 {
0886     u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
0887 
0888     netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
0889 
0890     /* Clear out the center LED bits - 0x03F0 */
0891     reg &= 0xfc0f;
0892 
0893     switch (speed) {
0894         case SPEED_1000:
0895             reg |= 0x03e0;
0896             break;
0897         case SPEED_100:
0898             reg |= 0x03b0;
0899             break;
0900         default:
0901             reg |= 0x02f0;
0902     }
0903 
0904     netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
0905     asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
0906 
0907     return 0;
0908 }
0909 
0910 static int ax88178_reset(struct usbnet *dev)
0911 {
0912     struct asix_data *data = (struct asix_data *)&dev->data;
0913     int ret;
0914     __le16 eeprom;
0915     u8 status;
0916     int gpio0 = 0;
0917     u32 phyid;
0918 
0919     ret = asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status, 0);
0920     if (ret < 0) {
0921         netdev_dbg(dev->net, "Failed to read GPIOS: %d\n", ret);
0922         return ret;
0923     }
0924 
0925     netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
0926 
0927     asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL, 0);
0928     ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom, 0);
0929     if (ret < 0) {
0930         netdev_dbg(dev->net, "Failed to read EEPROM: %d\n", ret);
0931         return ret;
0932     }
0933 
0934     asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL, 0);
0935 
0936     netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
0937 
0938     if (eeprom == cpu_to_le16(0xffff)) {
0939         data->phymode = PHY_MODE_MARVELL;
0940         data->ledmode = 0;
0941         gpio0 = 1;
0942     } else {
0943         data->phymode = le16_to_cpu(eeprom) & 0x7F;
0944         data->ledmode = le16_to_cpu(eeprom) >> 8;
0945         gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
0946     }
0947     netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
0948 
0949     /* Power up external GigaPHY through AX88178 GPIO pin */
0950     asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 |
0951             AX_GPIO_GPO1EN, 40, 0);
0952     if ((le16_to_cpu(eeprom) >> 8) != 1) {
0953         asix_write_gpio(dev, 0x003c, 30, 0);
0954         asix_write_gpio(dev, 0x001c, 300, 0);
0955         asix_write_gpio(dev, 0x003c, 30, 0);
0956     } else {
0957         netdev_dbg(dev->net, "gpio phymode == 1 path\n");
0958         asix_write_gpio(dev, AX_GPIO_GPO1EN, 30, 0);
0959         asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30, 0);
0960     }
0961 
0962     /* Read PHYID register *AFTER* powering up PHY */
0963     phyid = asix_get_phyid(dev);
0964     netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
0965 
0966     /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
0967     asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL, 0);
0968 
0969     asix_sw_reset(dev, 0, 0);
0970     msleep(150);
0971 
0972     asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
0973     msleep(150);
0974 
0975     asix_write_rx_ctl(dev, 0, 0);
0976 
0977     if (data->phymode == PHY_MODE_MARVELL) {
0978         marvell_phy_init(dev);
0979         msleep(60);
0980     } else if (data->phymode == PHY_MODE_RTL8211CL)
0981         rtl8211cl_phy_init(dev);
0982 
0983     asix_phy_reset(dev, BMCR_RESET | BMCR_ANENABLE);
0984     asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
0985             ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
0986     asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
0987             ADVERTISE_1000FULL);
0988 
0989     asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT, 0);
0990     mii_nway_restart(&dev->mii);
0991 
0992     /* Rewrite MAC address */
0993     memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
0994     ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
0995                             data->mac_addr, 0);
0996     if (ret < 0)
0997         return ret;
0998 
0999     ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
1000     if (ret < 0)
1001         return ret;
1002 
1003     return 0;
1004 }
1005 
1006 static int ax88178_link_reset(struct usbnet *dev)
1007 {
1008     u16 mode;
1009     struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1010     struct asix_data *data = (struct asix_data *)&dev->data;
1011     u32 speed;
1012 
1013     netdev_dbg(dev->net, "ax88178_link_reset()\n");
1014 
1015     mii_check_media(&dev->mii, 1, 1);
1016     mii_ethtool_gset(&dev->mii, &ecmd);
1017     mode = AX88178_MEDIUM_DEFAULT;
1018     speed = ethtool_cmd_speed(&ecmd);
1019 
1020     if (speed == SPEED_1000)
1021         mode |= AX_MEDIUM_GM;
1022     else if (speed == SPEED_100)
1023         mode |= AX_MEDIUM_PS;
1024     else
1025         mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1026 
1027     mode |= AX_MEDIUM_ENCK;
1028 
1029     if (ecmd.duplex == DUPLEX_FULL)
1030         mode |= AX_MEDIUM_FD;
1031     else
1032         mode &= ~AX_MEDIUM_FD;
1033 
1034     netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1035            speed, ecmd.duplex, mode);
1036 
1037     asix_write_medium_mode(dev, mode, 0);
1038 
1039     if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1040         marvell_led_status(dev, speed);
1041 
1042     return 0;
1043 }
1044 
1045 static void ax88178_set_mfb(struct usbnet *dev)
1046 {
1047     u16 mfb = AX_RX_CTL_MFB_16384;
1048     u16 rxctl;
1049     u16 medium;
1050     int old_rx_urb_size = dev->rx_urb_size;
1051 
1052     if (dev->hard_mtu < 2048) {
1053         dev->rx_urb_size = 2048;
1054         mfb = AX_RX_CTL_MFB_2048;
1055     } else if (dev->hard_mtu < 4096) {
1056         dev->rx_urb_size = 4096;
1057         mfb = AX_RX_CTL_MFB_4096;
1058     } else if (dev->hard_mtu < 8192) {
1059         dev->rx_urb_size = 8192;
1060         mfb = AX_RX_CTL_MFB_8192;
1061     } else if (dev->hard_mtu < 16384) {
1062         dev->rx_urb_size = 16384;
1063         mfb = AX_RX_CTL_MFB_16384;
1064     }
1065 
1066     rxctl = asix_read_rx_ctl(dev, 0);
1067     asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb, 0);
1068 
1069     medium = asix_read_medium_status(dev, 0);
1070     if (dev->net->mtu > 1500)
1071         medium |= AX_MEDIUM_JFE;
1072     else
1073         medium &= ~AX_MEDIUM_JFE;
1074     asix_write_medium_mode(dev, medium, 0);
1075 
1076     if (dev->rx_urb_size > old_rx_urb_size)
1077         usbnet_unlink_rx_urbs(dev);
1078 }
1079 
1080 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1081 {
1082     struct usbnet *dev = netdev_priv(net);
1083     int ll_mtu = new_mtu + net->hard_header_len + 4;
1084 
1085     netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1086 
1087     if ((ll_mtu % dev->maxpacket) == 0)
1088         return -EDOM;
1089 
1090     net->mtu = new_mtu;
1091     dev->hard_mtu = net->mtu + net->hard_header_len;
1092     ax88178_set_mfb(dev);
1093 
1094     /* max qlen depend on hard_mtu and rx_urb_size */
1095     usbnet_update_max_qlen(dev);
1096 
1097     return 0;
1098 }
1099 
1100 static const struct net_device_ops ax88178_netdev_ops = {
1101     .ndo_open       = usbnet_open,
1102     .ndo_stop       = usbnet_stop,
1103     .ndo_start_xmit     = usbnet_start_xmit,
1104     .ndo_tx_timeout     = usbnet_tx_timeout,
1105     .ndo_get_stats64    = dev_get_tstats64,
1106     .ndo_set_mac_address    = asix_set_mac_address,
1107     .ndo_validate_addr  = eth_validate_addr,
1108     .ndo_set_rx_mode    = asix_set_multicast,
1109     .ndo_eth_ioctl      = asix_ioctl,
1110     .ndo_change_mtu     = ax88178_change_mtu,
1111 };
1112 
1113 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1114 {
1115     int ret;
1116     u8 buf[ETH_ALEN] = {0};
1117 
1118     usbnet_get_endpoints(dev,intf);
1119 
1120     /* Get the MAC address */
1121     ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);
1122     if (ret < 0) {
1123         netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
1124         return ret;
1125     }
1126 
1127     asix_set_netdev_dev_addr(dev, buf);
1128 
1129     /* Initialize MII structure */
1130     dev->mii.dev = dev->net;
1131     dev->mii.mdio_read = asix_mdio_read;
1132     dev->mii.mdio_write = asix_mdio_write;
1133     dev->mii.phy_id_mask = 0x1f;
1134     dev->mii.reg_num_mask = 0xff;
1135     dev->mii.supports_gmii = 1;
1136 
1137     dev->mii.phy_id = asix_read_phy_addr(dev, true);
1138     if (dev->mii.phy_id < 0)
1139         return dev->mii.phy_id;
1140 
1141     dev->net->netdev_ops = &ax88178_netdev_ops;
1142     dev->net->ethtool_ops = &ax88178_ethtool_ops;
1143     dev->net->max_mtu = 16384 - (dev->net->hard_header_len + 4);
1144 
1145     /* Blink LEDS so users know driver saw dongle */
1146     asix_sw_reset(dev, 0, 0);
1147     msleep(150);
1148 
1149     asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
1150     msleep(150);
1151 
1152     /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1153     if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1154         /* hard_mtu  is still the default - the device does not support
1155            jumbo eth frames */
1156         dev->rx_urb_size = 2048;
1157     }
1158 
1159     dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
1160     if (!dev->driver_priv)
1161             return -ENOMEM;
1162 
1163     return 0;
1164 }
1165 
1166 static const struct driver_info ax8817x_info = {
1167     .description = "ASIX AX8817x USB 2.0 Ethernet",
1168     .bind = ax88172_bind,
1169     .status = asix_status,
1170     .link_reset = ax88172_link_reset,
1171     .reset = ax88172_link_reset,
1172     .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1173     .data = 0x00130103,
1174 };
1175 
1176 static const struct driver_info dlink_dub_e100_info = {
1177     .description = "DLink DUB-E100 USB Ethernet",
1178     .bind = ax88172_bind,
1179     .status = asix_status,
1180     .link_reset = ax88172_link_reset,
1181     .reset = ax88172_link_reset,
1182     .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1183     .data = 0x009f9d9f,
1184 };
1185 
1186 static const struct driver_info netgear_fa120_info = {
1187     .description = "Netgear FA-120 USB Ethernet",
1188     .bind = ax88172_bind,
1189     .status = asix_status,
1190     .link_reset = ax88172_link_reset,
1191     .reset = ax88172_link_reset,
1192     .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1193     .data = 0x00130103,
1194 };
1195 
1196 static const struct driver_info hawking_uf200_info = {
1197     .description = "Hawking UF200 USB Ethernet",
1198     .bind = ax88172_bind,
1199     .status = asix_status,
1200     .link_reset = ax88172_link_reset,
1201     .reset = ax88172_link_reset,
1202     .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1203     .data = 0x001f1d1f,
1204 };
1205 
1206 static const struct driver_info ax88772_info = {
1207     .description = "ASIX AX88772 USB 2.0 Ethernet",
1208     .bind = ax88772_bind,
1209     .unbind = ax88772_unbind,
1210     .status = asix_status,
1211     .reset = ax88772_reset,
1212     .stop = ax88772_stop,
1213     .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
1214     .rx_fixup = asix_rx_fixup_common,
1215     .tx_fixup = asix_tx_fixup,
1216 };
1217 
1218 static const struct driver_info ax88772b_info = {
1219     .description = "ASIX AX88772B USB 2.0 Ethernet",
1220     .bind = ax88772_bind,
1221     .unbind = ax88772_unbind,
1222     .status = asix_status,
1223     .reset = ax88772_reset,
1224     .stop = ax88772_stop,
1225     .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1226              FLAG_MULTI_PACKET,
1227     .rx_fixup = asix_rx_fixup_common,
1228     .tx_fixup = asix_tx_fixup,
1229     .data = FLAG_EEPROM_MAC,
1230 };
1231 
1232 static const struct driver_info ax88178_info = {
1233     .description = "ASIX AX88178 USB 2.0 Ethernet",
1234     .bind = ax88178_bind,
1235     .unbind = ax88178_unbind,
1236     .status = asix_status,
1237     .link_reset = ax88178_link_reset,
1238     .reset = ax88178_reset,
1239     .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1240          FLAG_MULTI_PACKET,
1241     .rx_fixup = asix_rx_fixup_common,
1242     .tx_fixup = asix_tx_fixup,
1243 };
1244 
1245 /*
1246  * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
1247  * no-name packaging.
1248  * USB device strings are:
1249  *   1: Manufacturer: USBLINK
1250  *   2: Product: HG20F9 USB2.0
1251  *   3: Serial: 000003
1252  * Appears to be compatible with Asix 88772B.
1253  */
1254 static const struct driver_info hg20f9_info = {
1255     .description = "HG20F9 USB 2.0 Ethernet",
1256     .bind = ax88772_bind,
1257     .unbind = ax88772_unbind,
1258     .status = asix_status,
1259     .reset = ax88772_reset,
1260     .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1261              FLAG_MULTI_PACKET,
1262     .rx_fixup = asix_rx_fixup_common,
1263     .tx_fixup = asix_tx_fixup,
1264     .data = FLAG_EEPROM_MAC,
1265 };
1266 
1267 static const struct usb_device_id   products [] = {
1268 {
1269     // Linksys USB200M
1270     USB_DEVICE (0x077b, 0x2226),
1271     .driver_info =  (unsigned long) &ax8817x_info,
1272 }, {
1273     // Netgear FA120
1274     USB_DEVICE (0x0846, 0x1040),
1275     .driver_info =  (unsigned long) &netgear_fa120_info,
1276 }, {
1277     // DLink DUB-E100
1278     USB_DEVICE (0x2001, 0x1a00),
1279     .driver_info =  (unsigned long) &dlink_dub_e100_info,
1280 }, {
1281     // Intellinet, ST Lab USB Ethernet
1282     USB_DEVICE (0x0b95, 0x1720),
1283     .driver_info =  (unsigned long) &ax8817x_info,
1284 }, {
1285     // Hawking UF200, TrendNet TU2-ET100
1286     USB_DEVICE (0x07b8, 0x420a),
1287     .driver_info =  (unsigned long) &hawking_uf200_info,
1288 }, {
1289     // Billionton Systems, USB2AR
1290     USB_DEVICE (0x08dd, 0x90ff),
1291     .driver_info =  (unsigned long) &ax8817x_info,
1292 }, {
1293     // Billionton Systems, GUSB2AM-1G-B
1294     USB_DEVICE(0x08dd, 0x0114),
1295     .driver_info =  (unsigned long) &ax88178_info,
1296 }, {
1297     // ATEN UC210T
1298     USB_DEVICE (0x0557, 0x2009),
1299     .driver_info =  (unsigned long) &ax8817x_info,
1300 }, {
1301     // Buffalo LUA-U2-KTX
1302     USB_DEVICE (0x0411, 0x003d),
1303     .driver_info =  (unsigned long) &ax8817x_info,
1304 }, {
1305     // Buffalo LUA-U2-GT 10/100/1000
1306     USB_DEVICE (0x0411, 0x006e),
1307     .driver_info =  (unsigned long) &ax88178_info,
1308 }, {
1309     // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1310     USB_DEVICE (0x6189, 0x182d),
1311     .driver_info =  (unsigned long) &ax8817x_info,
1312 }, {
1313     // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1314     USB_DEVICE (0x0df6, 0x0056),
1315     .driver_info =  (unsigned long) &ax88178_info,
1316 }, {
1317     // Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter"
1318     USB_DEVICE (0x0df6, 0x061c),
1319     .driver_info =  (unsigned long) &ax88178_info,
1320 }, {
1321     // corega FEther USB2-TX
1322     USB_DEVICE (0x07aa, 0x0017),
1323     .driver_info =  (unsigned long) &ax8817x_info,
1324 }, {
1325     // Surecom EP-1427X-2
1326     USB_DEVICE (0x1189, 0x0893),
1327     .driver_info = (unsigned long) &ax8817x_info,
1328 }, {
1329     // goodway corp usb gwusb2e
1330     USB_DEVICE (0x1631, 0x6200),
1331     .driver_info = (unsigned long) &ax8817x_info,
1332 }, {
1333     // JVC MP-PRX1 Port Replicator
1334     USB_DEVICE (0x04f1, 0x3008),
1335     .driver_info = (unsigned long) &ax8817x_info,
1336 }, {
1337     // Lenovo U2L100P 10/100
1338     USB_DEVICE (0x17ef, 0x7203),
1339     .driver_info = (unsigned long)&ax88772b_info,
1340 }, {
1341     // ASIX AX88772B 10/100
1342     USB_DEVICE (0x0b95, 0x772b),
1343     .driver_info = (unsigned long) &ax88772b_info,
1344 }, {
1345     // ASIX AX88772 10/100
1346     USB_DEVICE (0x0b95, 0x7720),
1347     .driver_info = (unsigned long) &ax88772_info,
1348 }, {
1349     // ASIX AX88178 10/100/1000
1350     USB_DEVICE (0x0b95, 0x1780),
1351     .driver_info = (unsigned long) &ax88178_info,
1352 }, {
1353     // Logitec LAN-GTJ/U2A
1354     USB_DEVICE (0x0789, 0x0160),
1355     .driver_info = (unsigned long) &ax88178_info,
1356 }, {
1357     // Linksys USB200M Rev 2
1358     USB_DEVICE (0x13b1, 0x0018),
1359     .driver_info = (unsigned long) &ax88772_info,
1360 }, {
1361     // 0Q0 cable ethernet
1362     USB_DEVICE (0x1557, 0x7720),
1363     .driver_info = (unsigned long) &ax88772_info,
1364 }, {
1365     // DLink DUB-E100 H/W Ver B1
1366     USB_DEVICE (0x07d1, 0x3c05),
1367     .driver_info = (unsigned long) &ax88772_info,
1368 }, {
1369     // DLink DUB-E100 H/W Ver B1 Alternate
1370     USB_DEVICE (0x2001, 0x3c05),
1371     .driver_info = (unsigned long) &ax88772_info,
1372 }, {
1373        // DLink DUB-E100 H/W Ver C1
1374        USB_DEVICE (0x2001, 0x1a02),
1375        .driver_info = (unsigned long) &ax88772_info,
1376 }, {
1377     // Linksys USB1000
1378     USB_DEVICE (0x1737, 0x0039),
1379     .driver_info = (unsigned long) &ax88178_info,
1380 }, {
1381     // IO-DATA ETG-US2
1382     USB_DEVICE (0x04bb, 0x0930),
1383     .driver_info = (unsigned long) &ax88178_info,
1384 }, {
1385     // Belkin F5D5055
1386     USB_DEVICE(0x050d, 0x5055),
1387     .driver_info = (unsigned long) &ax88178_info,
1388 }, {
1389     // Apple USB Ethernet Adapter
1390     USB_DEVICE(0x05ac, 0x1402),
1391     .driver_info = (unsigned long) &ax88772_info,
1392 }, {
1393     // Cables-to-Go USB Ethernet Adapter
1394     USB_DEVICE(0x0b95, 0x772a),
1395     .driver_info = (unsigned long) &ax88772_info,
1396 }, {
1397     // ABOCOM for pci
1398     USB_DEVICE(0x14ea, 0xab11),
1399     .driver_info = (unsigned long) &ax88178_info,
1400 }, {
1401     // ASIX 88772a
1402     USB_DEVICE(0x0db0, 0xa877),
1403     .driver_info = (unsigned long) &ax88772_info,
1404 }, {
1405     // Asus USB Ethernet Adapter
1406     USB_DEVICE (0x0b95, 0x7e2b),
1407     .driver_info = (unsigned long)&ax88772b_info,
1408 }, {
1409     /* ASIX 88172a demo board */
1410     USB_DEVICE(0x0b95, 0x172a),
1411     .driver_info = (unsigned long) &ax88172a_info,
1412 }, {
1413     /*
1414      * USBLINK HG20F9 "USB 2.0 LAN"
1415      * Appears to have gazumped Linksys's manufacturer ID but
1416      * doesn't (yet) conflict with any known Linksys product.
1417      */
1418     USB_DEVICE(0x066b, 0x20f9),
1419     .driver_info = (unsigned long) &hg20f9_info,
1420 },
1421     { },        // END
1422 };
1423 MODULE_DEVICE_TABLE(usb, products);
1424 
1425 static struct usb_driver asix_driver = {
1426     .name =     DRIVER_NAME,
1427     .id_table = products,
1428     .probe =    usbnet_probe,
1429     .suspend =  asix_suspend,
1430     .resume =   asix_resume,
1431     .reset_resume = asix_resume,
1432     .disconnect =   usbnet_disconnect,
1433     .supports_autosuspend = 1,
1434     .disable_hub_initiated_lpm = 1,
1435 };
1436 
1437 module_usb_driver(asix_driver);
1438 
1439 MODULE_AUTHOR("David Hollis");
1440 MODULE_VERSION(DRIVER_VERSION);
1441 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1442 MODULE_LICENSE("GPL");
1443
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