net/phy/phylink.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * phylink models the MAC to optional PHY connection, supporting
0004  * technologies such as SFP cages where the PHY is hot-pluggable.
0005  *
0006  * Copyright (C) 2015 Russell King
0007  */
0008 #include <linux/acpi.h>
0009 #include <linux/ethtool.h>
0010 #include <linux/export.h>
0011 #include <linux/gpio/consumer.h>
0012 #include <linux/netdevice.h>
0013 #include <linux/of.h>
0014 #include <linux/of_mdio.h>
0015 #include <linux/phy.h>
0016 #include <linux/phy_fixed.h>
0017 #include <linux/phylink.h>
0018 #include <linux/rtnetlink.h>
0019 #include <linux/spinlock.h>
0020 #include <linux/timer.h>
0021 #include <linux/workqueue.h>
0022
0023 #include "sfp.h"
0024 #include "swphy.h"
0025
0026 #define SUPPORTED_INTERFACES \
0027     (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
0028      SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
0029 #define ADVERTISED_INTERFACES \
0030     (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
0031      ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
0032
0033 enum {
0034     PHYLINK_DISABLE_STOPPED,
0035     PHYLINK_DISABLE_LINK,
0036     PHYLINK_DISABLE_MAC_WOL,
0037 };
0038
0039 /**
0040  * struct phylink - internal data type for phylink
0041  */
0042 struct phylink {
0043     /* private: */
0044     struct net_device *netdev;
0045     const struct phylink_mac_ops *mac_ops;
0046     struct phylink_config *config;
0047     struct phylink_pcs *pcs;
0048     struct device *dev;
0049     unsigned int old_link_state:1;
0050
0051     unsigned long phylink_disable_state; /* bitmask of disables */
0052     struct phy_device *phydev;
0053     phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
0054     u8 cfg_link_an_mode;        /* MLO_AN_xxx */
0055     u8 cur_link_an_mode;
0056     u8 link_port;           /* The current non-phy ethtool port */
0057     __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
0058
0059     /* The link configuration settings */
0060     struct phylink_link_state link_config;
0061
0062     /* The current settings */
0063     phy_interface_t cur_interface;
0064
0065     struct gpio_desc *link_gpio;
0066     unsigned int link_irq;
0067     struct timer_list link_poll;
0068     void (*get_fixed_state)(struct net_device *dev,
0069                 struct phylink_link_state *s);
0070
0071     struct mutex state_mutex;
0072     struct phylink_link_state phy_state;
0073     struct work_struct resolve;
0074
0075     bool mac_link_dropped;
0076     bool using_mac_select_pcs;
0077
0078     struct sfp_bus *sfp_bus;
0079     bool sfp_may_have_phy;
0080     __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
0081     u8 sfp_port;
0082 };
0083
0084 #define phylink_printk(level, pl, fmt, ...) \
0085     do { \
0086         if ((pl)->config->type == PHYLINK_NETDEV) \
0087             netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
0088         else if ((pl)->config->type == PHYLINK_DEV) \
0089             dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
0090     } while (0)
0091
0092 #define phylink_err(pl, fmt, ...) \
0093     phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
0094 #define phylink_warn(pl, fmt, ...) \
0095     phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
0096 #define phylink_info(pl, fmt, ...) \
0097     phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
0098 #if defined(CONFIG_DYNAMIC_DEBUG)
0099 #define phylink_dbg(pl, fmt, ...) \
0100 do {                                    \
0101     if ((pl)->config->type == PHYLINK_NETDEV)           \
0102         netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);       \
0103     else if ((pl)->config->type == PHYLINK_DEV)         \
0104         dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);         \
0105 } while (0)
0106 #elif defined(DEBUG)
0107 #define phylink_dbg(pl, fmt, ...)                   \
0108     phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
0109 #else
0110 #define phylink_dbg(pl, fmt, ...)                   \
0111 ({                                  \
0112     if (0)                              \
0113         phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
0114 })
0115 #endif
0116
0117 /**
0118  * phylink_set_port_modes() - set the port type modes in the ethtool mask
0119  * @mask: ethtool link mode mask
0120  *
0121  * Sets all the port type modes in the ethtool mask.  MAC drivers should
0122  * use this in their 'validate' callback.
0123  */
0124 void phylink_set_port_modes(unsigned long *mask)
0125 {
0126     phylink_set(mask, TP);
0127     phylink_set(mask, AUI);
0128     phylink_set(mask, MII);
0129     phylink_set(mask, FIBRE);
0130     phylink_set(mask, BNC);
0131     phylink_set(mask, Backplane);
0132 }
0133 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
0134
0135 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
0136 {
0137     __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
0138
0139     phylink_set_port_modes(tmp);
0140     phylink_set(tmp, Autoneg);
0141     phylink_set(tmp, Pause);
0142     phylink_set(tmp, Asym_Pause);
0143
0144     return linkmode_subset(linkmode, tmp);
0145 }
0146
0147 static const char *phylink_an_mode_str(unsigned int mode)
0148 {
0149     static const char *modestr[] = {
0150         [MLO_AN_PHY] = "phy",
0151         [MLO_AN_FIXED] = "fixed",
0152         [MLO_AN_INBAND] = "inband",
0153     };
0154
0155     return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
0156 }
0157
0158 static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
0159                       unsigned long caps)
0160 {
0161     if (caps & MAC_SYM_PAUSE)
0162         __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
0163
0164     if (caps & MAC_ASYM_PAUSE)
0165         __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
0166
0167     if (caps & MAC_10HD)
0168         __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
0169
0170     if (caps & MAC_10FD) {
0171         __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
0172         __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
0173     }
0174
0175     if (caps & MAC_100HD) {
0176         __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
0177         __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
0178     }
0179
0180     if (caps & MAC_100FD) {
0181         __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
0182         __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
0183         __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
0184     }
0185
0186     if (caps & MAC_1000HD)
0187         __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
0188
0189     if (caps & MAC_1000FD) {
0190         __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
0191         __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
0192         __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
0193         __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
0194     }
0195
0196     if (caps & MAC_2500FD) {
0197         __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
0198         __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
0199     }
0200
0201     if (caps & MAC_5000FD)
0202         __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
0203
0204     if (caps & MAC_10000FD) {
0205         __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
0206         __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
0207         __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
0208         __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
0209         __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
0210         __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
0211         __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
0212         __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
0213         __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
0214     }
0215
0216     if (caps & MAC_25000FD) {
0217         __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
0218         __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
0219         __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
0220     }
0221
0222     if (caps & MAC_40000FD) {
0223         __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
0224         __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
0225         __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
0226         __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
0227     }
0228
0229     if (caps & MAC_50000FD) {
0230         __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
0231         __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
0232         __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
0233         __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
0234         __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
0235         __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
0236         __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
0237               linkmodes);
0238         __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
0239     }
0240
0241     if (caps & MAC_56000FD) {
0242         __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
0243         __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
0244         __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
0245         __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
0246     }
0247
0248     if (caps & MAC_100000FD) {
0249         __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
0250         __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
0251         __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
0252         __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
0253               linkmodes);
0254         __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
0255         __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
0256         __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
0257         __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
0258               linkmodes);
0259         __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
0260         __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
0261         __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
0262         __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
0263               linkmodes);
0264         __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
0265         __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
0266     }
0267
0268     if (caps & MAC_200000FD) {
0269         __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
0270         __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
0271         __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
0272               linkmodes);
0273         __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
0274         __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
0275         __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
0276         __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
0277         __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
0278               linkmodes);
0279         __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
0280         __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
0281     }
0282
0283     if (caps & MAC_400000FD) {
0284         __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
0285         __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
0286         __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
0287               linkmodes);
0288         __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
0289         __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
0290         __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
0291         __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
0292         __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
0293               linkmodes);
0294         __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
0295         __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
0296     }
0297 }
0298
0299 /**
0300  * phylink_get_linkmodes() - get acceptable link modes
0301  * @linkmodes: ethtool linkmode mask (must be already initialised)
0302  * @interface: phy interface mode defined by &typedef phy_interface_t
0303  * @mac_capabilities: bitmask of MAC capabilities
0304  *
0305  * Set all possible pause, speed and duplex linkmodes in @linkmodes that
0306  * are supported by the @interface mode and @mac_capabilities. @linkmodes
0307  * must have been initialised previously.
0308  */
0309 void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
0310                unsigned long mac_capabilities)
0311 {
0312     unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
0313
0314     switch (interface) {
0315     case PHY_INTERFACE_MODE_USXGMII:
0316         caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
0317         fallthrough;
0318
0319     case PHY_INTERFACE_MODE_RGMII_TXID:
0320     case PHY_INTERFACE_MODE_RGMII_RXID:
0321     case PHY_INTERFACE_MODE_RGMII_ID:
0322     case PHY_INTERFACE_MODE_RGMII:
0323     case PHY_INTERFACE_MODE_QSGMII:
0324     case PHY_INTERFACE_MODE_SGMII:
0325     case PHY_INTERFACE_MODE_GMII:
0326         caps |= MAC_1000HD | MAC_1000FD;
0327         fallthrough;
0328
0329     case PHY_INTERFACE_MODE_REVRMII:
0330     case PHY_INTERFACE_MODE_RMII:
0331     case PHY_INTERFACE_MODE_SMII:
0332     case PHY_INTERFACE_MODE_REVMII:
0333     case PHY_INTERFACE_MODE_MII:
0334         caps |= MAC_10HD | MAC_10FD;
0335         fallthrough;
0336
0337     case PHY_INTERFACE_MODE_100BASEX:
0338         caps |= MAC_100HD | MAC_100FD;
0339         break;
0340
0341     case PHY_INTERFACE_MODE_TBI:
0342     case PHY_INTERFACE_MODE_MOCA:
0343     case PHY_INTERFACE_MODE_RTBI:
0344     case PHY_INTERFACE_MODE_1000BASEX:
0345         caps |= MAC_1000HD;
0346         fallthrough;
0347     case PHY_INTERFACE_MODE_TRGMII:
0348         caps |= MAC_1000FD;
0349         break;
0350
0351     case PHY_INTERFACE_MODE_2500BASEX:
0352         caps |= MAC_2500FD;
0353         break;
0354
0355     case PHY_INTERFACE_MODE_5GBASER:
0356         caps |= MAC_5000FD;
0357         break;
0358
0359     case PHY_INTERFACE_MODE_XGMII:
0360     case PHY_INTERFACE_MODE_RXAUI:
0361     case PHY_INTERFACE_MODE_XAUI:
0362     case PHY_INTERFACE_MODE_10GBASER:
0363     case PHY_INTERFACE_MODE_10GKR:
0364         caps |= MAC_10000FD;
0365         break;
0366
0367     case PHY_INTERFACE_MODE_25GBASER:
0368         caps |= MAC_25000FD;
0369         break;
0370
0371     case PHY_INTERFACE_MODE_XLGMII:
0372         caps |= MAC_40000FD;
0373         break;
0374
0375     case PHY_INTERFACE_MODE_INTERNAL:
0376         caps |= ~0;
0377         break;
0378
0379     case PHY_INTERFACE_MODE_NA:
0380     case PHY_INTERFACE_MODE_MAX:
0381         break;
0382     }
0383
0384     phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities);
0385 }
0386 EXPORT_SYMBOL_GPL(phylink_get_linkmodes);
0387
0388 /**
0389  * phylink_generic_validate() - generic validate() callback implementation
0390  * @config: a pointer to a &struct phylink_config.
0391  * @supported: ethtool bitmask for supported link modes.
0392  * @state: a pointer to a &struct phylink_link_state.
0393  *
0394  * Generic implementation of the validate() callback that MAC drivers can
0395  * use when they pass the range of supported interfaces and MAC capabilities.
0396  * This makes use of phylink_get_linkmodes().
0397  */
0398 void phylink_generic_validate(struct phylink_config *config,
0399                   unsigned long *supported,
0400                   struct phylink_link_state *state)
0401 {
0402     __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
0403
0404     phylink_set_port_modes(mask);
0405     phylink_set(mask, Autoneg);
0406     phylink_get_linkmodes(mask, state->interface, config->mac_capabilities);
0407
0408     linkmode_and(supported, supported, mask);
0409     linkmode_and(state->advertising, state->advertising, mask);
0410 }
0411 EXPORT_SYMBOL_GPL(phylink_generic_validate);
0412
0413 static int phylink_validate_mac_and_pcs(struct phylink *pl,
0414                     unsigned long *supported,
0415                     struct phylink_link_state *state)
0416 {
0417     struct phylink_pcs *pcs;
0418     int ret;
0419
0420     /* Get the PCS for this interface mode */
0421     if (pl->using_mac_select_pcs) {
0422         pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
0423         if (IS_ERR(pcs))
0424             return PTR_ERR(pcs);
0425     } else {
0426         pcs = pl->pcs;
0427     }
0428
0429     if (pcs) {
0430         /* The PCS, if present, must be setup before phylink_create()
0431          * has been called. If the ops is not initialised, print an
0432          * error and backtrace rather than oopsing the kernel.
0433          */
0434         if (!pcs->ops) {
0435             phylink_err(pl, "interface %s: uninitialised PCS\n",
0436                     phy_modes(state->interface));
0437             dump_stack();
0438             return -EINVAL;
0439         }
0440
0441         /* Validate the link parameters with the PCS */
0442         if (pcs->ops->pcs_validate) {
0443             ret = pcs->ops->pcs_validate(pcs, supported, state);
0444             if (ret < 0 || phylink_is_empty_linkmode(supported))
0445                 return -EINVAL;
0446
0447             /* Ensure the advertising mask is a subset of the
0448              * supported mask.
0449              */
0450             linkmode_and(state->advertising, state->advertising,
0451                      supported);
0452         }
0453     }
0454
0455     /* Then validate the link parameters with the MAC */
0456     pl->mac_ops->validate(pl->config, supported, state);
0457
0458     return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
0459 }
0460
0461 static int phylink_validate_any(struct phylink *pl, unsigned long *supported,
0462                 struct phylink_link_state *state)
0463 {
0464     __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
0465     __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
0466     __ETHTOOL_DECLARE_LINK_MODE_MASK(s);
0467     struct phylink_link_state t;
0468     int intf;
0469
0470     for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
0471         if (test_bit(intf, pl->config->supported_interfaces)) {
0472             linkmode_copy(s, supported);
0473
0474             t = *state;
0475             t.interface = intf;
0476             if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
0477                 linkmode_or(all_s, all_s, s);
0478                 linkmode_or(all_adv, all_adv, t.advertising);
0479             }
0480         }
0481     }
0482
0483     linkmode_copy(supported, all_s);
0484     linkmode_copy(state->advertising, all_adv);
0485
0486     return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
0487 }
0488
0489 static int phylink_validate(struct phylink *pl, unsigned long *supported,
0490                 struct phylink_link_state *state)
0491 {
0492     if (!phy_interface_empty(pl->config->supported_interfaces)) {
0493         if (state->interface == PHY_INTERFACE_MODE_NA)
0494             return phylink_validate_any(pl, supported, state);
0495
0496         if (!test_bit(state->interface,
0497                   pl->config->supported_interfaces))
0498             return -EINVAL;
0499     }
0500
0501     return phylink_validate_mac_and_pcs(pl, supported, state);
0502 }
0503
0504 static int phylink_parse_fixedlink(struct phylink *pl,
0505                    struct fwnode_handle *fwnode)
0506 {
0507     struct fwnode_handle *fixed_node;
0508     const struct phy_setting *s;
0509     struct gpio_desc *desc;
0510     u32 speed;
0511     int ret;
0512
0513     fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
0514     if (fixed_node) {
0515         ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
0516
0517         pl->link_config.speed = speed;
0518         pl->link_config.duplex = DUPLEX_HALF;
0519
0520         if (fwnode_property_read_bool(fixed_node, "full-duplex"))
0521             pl->link_config.duplex = DUPLEX_FULL;
0522
0523         /* We treat the "pause" and "asym-pause" terminology as
0524          * defining the link partner's ability.
0525          */
0526         if (fwnode_property_read_bool(fixed_node, "pause"))
0527             __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
0528                   pl->link_config.lp_advertising);
0529         if (fwnode_property_read_bool(fixed_node, "asym-pause"))
0530             __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
0531                   pl->link_config.lp_advertising);
0532
0533         if (ret == 0) {
0534             desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
0535                               GPIOD_IN, "?");
0536
0537             if (!IS_ERR(desc))
0538                 pl->link_gpio = desc;
0539             else if (desc == ERR_PTR(-EPROBE_DEFER))
0540                 ret = -EPROBE_DEFER;
0541         }
0542         fwnode_handle_put(fixed_node);
0543
0544         if (ret)
0545             return ret;
0546     } else {
0547         u32 prop[5];
0548
0549         ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
0550                              NULL, 0);
0551         if (ret != ARRAY_SIZE(prop)) {
0552             phylink_err(pl, "broken fixed-link?\n");
0553             return -EINVAL;
0554         }
0555
0556         ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
0557                              prop, ARRAY_SIZE(prop));
0558         if (!ret) {
0559             pl->link_config.duplex = prop[1] ?
0560                         DUPLEX_FULL : DUPLEX_HALF;
0561             pl->link_config.speed = prop[2];
0562             if (prop[3])
0563                 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
0564                       pl->link_config.lp_advertising);
0565             if (prop[4])
0566                 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
0567                       pl->link_config.lp_advertising);
0568         }
0569     }
0570
0571     if (pl->link_config.speed > SPEED_1000 &&
0572         pl->link_config.duplex != DUPLEX_FULL)
0573         phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
0574                  pl->link_config.speed);
0575
0576     bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
0577     linkmode_copy(pl->link_config.advertising, pl->supported);
0578     phylink_validate(pl, pl->supported, &pl->link_config);
0579
0580     s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
0581                    pl->supported, true);
0582     linkmode_zero(pl->supported);
0583     phylink_set(pl->supported, MII);
0584     phylink_set(pl->supported, Pause);
0585     phylink_set(pl->supported, Asym_Pause);
0586     phylink_set(pl->supported, Autoneg);
0587     if (s) {
0588         __set_bit(s->bit, pl->supported);
0589         __set_bit(s->bit, pl->link_config.lp_advertising);
0590     } else {
0591         phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
0592                  pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
0593                  pl->link_config.speed);
0594     }
0595
0596     linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
0597              pl->supported);
0598
0599     pl->link_config.link = 1;
0600     pl->link_config.an_complete = 1;
0601
0602     return 0;
0603 }
0604
0605 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
0606 {
0607     struct fwnode_handle *dn;
0608     const char *managed;
0609
0610     dn = fwnode_get_named_child_node(fwnode, "fixed-link");
0611     if (dn || fwnode_property_present(fwnode, "fixed-link"))
0612         pl->cfg_link_an_mode = MLO_AN_FIXED;
0613     fwnode_handle_put(dn);
0614
0615     if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
0616          strcmp(managed, "in-band-status") == 0) ||
0617         pl->config->ovr_an_inband) {
0618         if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
0619             phylink_err(pl,
0620                     "can't use both fixed-link and in-band-status\n");
0621             return -EINVAL;
0622         }
0623
0624         linkmode_zero(pl->supported);
0625         phylink_set(pl->supported, MII);
0626         phylink_set(pl->supported, Autoneg);
0627         phylink_set(pl->supported, Asym_Pause);
0628         phylink_set(pl->supported, Pause);
0629         pl->link_config.an_enabled = true;
0630         pl->cfg_link_an_mode = MLO_AN_INBAND;
0631
0632         switch (pl->link_config.interface) {
0633         case PHY_INTERFACE_MODE_SGMII:
0634         case PHY_INTERFACE_MODE_QSGMII:
0635             phylink_set(pl->supported, 10baseT_Half);
0636             phylink_set(pl->supported, 10baseT_Full);
0637             phylink_set(pl->supported, 100baseT_Half);
0638             phylink_set(pl->supported, 100baseT_Full);
0639             phylink_set(pl->supported, 1000baseT_Half);
0640             phylink_set(pl->supported, 1000baseT_Full);
0641             break;
0642
0643         case PHY_INTERFACE_MODE_1000BASEX:
0644             phylink_set(pl->supported, 1000baseX_Full);
0645             break;
0646
0647         case PHY_INTERFACE_MODE_2500BASEX:
0648             phylink_set(pl->supported, 2500baseX_Full);
0649             break;
0650
0651         case PHY_INTERFACE_MODE_5GBASER:
0652             phylink_set(pl->supported, 5000baseT_Full);
0653             break;
0654
0655         case PHY_INTERFACE_MODE_25GBASER:
0656             phylink_set(pl->supported, 25000baseCR_Full);
0657             phylink_set(pl->supported, 25000baseKR_Full);
0658             phylink_set(pl->supported, 25000baseSR_Full);
0659             fallthrough;
0660         case PHY_INTERFACE_MODE_USXGMII:
0661         case PHY_INTERFACE_MODE_10GKR:
0662         case PHY_INTERFACE_MODE_10GBASER:
0663             phylink_set(pl->supported, 10baseT_Half);
0664             phylink_set(pl->supported, 10baseT_Full);
0665             phylink_set(pl->supported, 100baseT_Half);
0666             phylink_set(pl->supported, 100baseT_Full);
0667             phylink_set(pl->supported, 1000baseT_Half);
0668             phylink_set(pl->supported, 1000baseT_Full);
0669             phylink_set(pl->supported, 1000baseX_Full);
0670             phylink_set(pl->supported, 1000baseKX_Full);
0671             phylink_set(pl->supported, 2500baseT_Full);
0672             phylink_set(pl->supported, 2500baseX_Full);
0673             phylink_set(pl->supported, 5000baseT_Full);
0674             phylink_set(pl->supported, 10000baseT_Full);
0675             phylink_set(pl->supported, 10000baseKR_Full);
0676             phylink_set(pl->supported, 10000baseKX4_Full);
0677             phylink_set(pl->supported, 10000baseCR_Full);
0678             phylink_set(pl->supported, 10000baseSR_Full);
0679             phylink_set(pl->supported, 10000baseLR_Full);
0680             phylink_set(pl->supported, 10000baseLRM_Full);
0681             phylink_set(pl->supported, 10000baseER_Full);
0682             break;
0683
0684         case PHY_INTERFACE_MODE_XLGMII:
0685             phylink_set(pl->supported, 25000baseCR_Full);
0686             phylink_set(pl->supported, 25000baseKR_Full);
0687             phylink_set(pl->supported, 25000baseSR_Full);
0688             phylink_set(pl->supported, 40000baseKR4_Full);
0689             phylink_set(pl->supported, 40000baseCR4_Full);
0690             phylink_set(pl->supported, 40000baseSR4_Full);
0691             phylink_set(pl->supported, 40000baseLR4_Full);
0692             phylink_set(pl->supported, 50000baseCR2_Full);
0693             phylink_set(pl->supported, 50000baseKR2_Full);
0694             phylink_set(pl->supported, 50000baseSR2_Full);
0695             phylink_set(pl->supported, 50000baseKR_Full);
0696             phylink_set(pl->supported, 50000baseSR_Full);
0697             phylink_set(pl->supported, 50000baseCR_Full);
0698             phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
0699             phylink_set(pl->supported, 50000baseDR_Full);
0700             phylink_set(pl->supported, 100000baseKR4_Full);
0701             phylink_set(pl->supported, 100000baseSR4_Full);
0702             phylink_set(pl->supported, 100000baseCR4_Full);
0703             phylink_set(pl->supported, 100000baseLR4_ER4_Full);
0704             phylink_set(pl->supported, 100000baseKR2_Full);
0705             phylink_set(pl->supported, 100000baseSR2_Full);
0706             phylink_set(pl->supported, 100000baseCR2_Full);
0707             phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
0708             phylink_set(pl->supported, 100000baseDR2_Full);
0709             break;
0710
0711         default:
0712             phylink_err(pl,
0713                     "incorrect link mode %s for in-band status\n",
0714                     phy_modes(pl->link_config.interface));
0715             return -EINVAL;
0716         }
0717
0718         linkmode_copy(pl->link_config.advertising, pl->supported);
0719
0720         if (phylink_validate(pl, pl->supported, &pl->link_config)) {
0721             phylink_err(pl,
0722                     "failed to validate link configuration for in-band status\n");
0723             return -EINVAL;
0724         }
0725
0726         /* Check if MAC/PCS also supports Autoneg. */
0727         pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg);
0728     }
0729
0730     return 0;
0731 }
0732
0733 static void phylink_apply_manual_flow(struct phylink *pl,
0734                       struct phylink_link_state *state)
0735 {
0736     /* If autoneg is disabled, pause AN is also disabled */
0737     if (!state->an_enabled)
0738         state->pause &= ~MLO_PAUSE_AN;
0739
0740     /* Manual configuration of pause modes */
0741     if (!(pl->link_config.pause & MLO_PAUSE_AN))
0742         state->pause = pl->link_config.pause;
0743 }
0744
0745 static void phylink_resolve_flow(struct phylink_link_state *state)
0746 {
0747     bool tx_pause, rx_pause;
0748
0749     state->pause = MLO_PAUSE_NONE;
0750     if (state->duplex == DUPLEX_FULL) {
0751         linkmode_resolve_pause(state->advertising,
0752                        state->lp_advertising,
0753                        &tx_pause, &rx_pause);
0754         if (tx_pause)
0755             state->pause |= MLO_PAUSE_TX;
0756         if (rx_pause)
0757             state->pause |= MLO_PAUSE_RX;
0758     }
0759 }
0760
0761 static void phylink_pcs_poll_stop(struct phylink *pl)
0762 {
0763     if (pl->cfg_link_an_mode == MLO_AN_INBAND)
0764         del_timer(&pl->link_poll);
0765 }
0766
0767 static void phylink_pcs_poll_start(struct phylink *pl)
0768 {
0769     if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
0770         mod_timer(&pl->link_poll, jiffies + HZ);
0771 }
0772
0773 static void phylink_mac_config(struct phylink *pl,
0774                    const struct phylink_link_state *state)
0775 {
0776     phylink_dbg(pl,
0777             "%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n",
0778             __func__, phylink_an_mode_str(pl->cur_link_an_mode),
0779             phy_modes(state->interface),
0780             phy_speed_to_str(state->speed),
0781             phy_duplex_to_str(state->duplex),
0782             __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
0783             state->pause, state->link, state->an_enabled);
0784
0785     pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state);
0786 }
0787
0788 static void phylink_mac_pcs_an_restart(struct phylink *pl)
0789 {
0790     if (pl->link_config.an_enabled &&
0791         phy_interface_mode_is_8023z(pl->link_config.interface) &&
0792         phylink_autoneg_inband(pl->cur_link_an_mode)) {
0793         if (pl->pcs)
0794             pl->pcs->ops->pcs_an_restart(pl->pcs);
0795         else if (pl->config->legacy_pre_march2020)
0796             pl->mac_ops->mac_an_restart(pl->config);
0797     }
0798 }
0799
0800 static void phylink_major_config(struct phylink *pl, bool restart,
0801                   const struct phylink_link_state *state)
0802 {
0803     struct phylink_pcs *pcs = NULL;
0804     bool pcs_changed = false;
0805     int err;
0806
0807     phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
0808
0809     if (pl->using_mac_select_pcs) {
0810         pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
0811         if (IS_ERR(pcs)) {
0812             phylink_err(pl,
0813                     "mac_select_pcs unexpectedly failed: %pe\n",
0814                     pcs);
0815             return;
0816         }
0817
0818         pcs_changed = pcs && pl->pcs != pcs;
0819     }
0820
0821     phylink_pcs_poll_stop(pl);
0822
0823     if (pl->mac_ops->mac_prepare) {
0824         err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
0825                            state->interface);
0826         if (err < 0) {
0827             phylink_err(pl, "mac_prepare failed: %pe\n",
0828                     ERR_PTR(err));
0829             return;
0830         }
0831     }
0832
0833     /* If we have a new PCS, switch to the new PCS after preparing the MAC
0834      * for the change.
0835      */
0836     if (pcs_changed)
0837         pl->pcs = pcs;
0838
0839     phylink_mac_config(pl, state);
0840
0841     if (pl->pcs) {
0842         err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
0843                            state->interface,
0844                            state->advertising,
0845                            !!(pl->link_config.pause &
0846                           MLO_PAUSE_AN));
0847         if (err < 0)
0848             phylink_err(pl, "pcs_config failed: %pe\n",
0849                     ERR_PTR(err));
0850         if (err > 0)
0851             restart = true;
0852     }
0853     if (restart)
0854         phylink_mac_pcs_an_restart(pl);
0855
0856     if (pl->mac_ops->mac_finish) {
0857         err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
0858                           state->interface);
0859         if (err < 0)
0860             phylink_err(pl, "mac_finish failed: %pe\n",
0861                     ERR_PTR(err));
0862     }
0863
0864     phylink_pcs_poll_start(pl);
0865 }
0866
0867 /*
0868  * Reconfigure for a change of inband advertisement.
0869  * If we have a separate PCS, we only need to call its pcs_config() method,
0870  * and then restart AN if it indicates something changed. Otherwise, we do
0871  * the full MAC reconfiguration.
0872  */
0873 static int phylink_change_inband_advert(struct phylink *pl)
0874 {
0875     int ret;
0876
0877     if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
0878         return 0;
0879
0880     if (!pl->pcs && pl->config->legacy_pre_march2020) {
0881         /* Legacy method */
0882         phylink_mac_config(pl, &pl->link_config);
0883         phylink_mac_pcs_an_restart(pl);
0884         return 0;
0885     }
0886
0887     phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
0888             phylink_an_mode_str(pl->cur_link_an_mode),
0889             phy_modes(pl->link_config.interface),
0890             __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
0891             pl->link_config.pause);
0892
0893     /* Modern PCS-based method; update the advert at the PCS, and
0894      * restart negotiation if the pcs_config() helper indicates that
0895      * the programmed advertisement has changed.
0896      */
0897     ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
0898                        pl->link_config.interface,
0899                        pl->link_config.advertising,
0900                        !!(pl->link_config.pause &
0901                       MLO_PAUSE_AN));
0902     if (ret < 0)
0903         return ret;
0904
0905     if (ret > 0)
0906         phylink_mac_pcs_an_restart(pl);
0907
0908     return 0;
0909 }
0910
0911 static void phylink_mac_pcs_get_state(struct phylink *pl,
0912                       struct phylink_link_state *state)
0913 {
0914     linkmode_copy(state->advertising, pl->link_config.advertising);
0915     linkmode_zero(state->lp_advertising);
0916     state->interface = pl->link_config.interface;
0917     state->an_enabled = pl->link_config.an_enabled;
0918     if  (state->an_enabled) {
0919         state->speed = SPEED_UNKNOWN;
0920         state->duplex = DUPLEX_UNKNOWN;
0921         state->pause = MLO_PAUSE_NONE;
0922     } else {
0923         state->speed =  pl->link_config.speed;
0924         state->duplex = pl->link_config.duplex;
0925         state->pause = pl->link_config.pause;
0926     }
0927     state->an_complete = 0;
0928     state->link = 1;
0929
0930     if (pl->pcs)
0931         pl->pcs->ops->pcs_get_state(pl->pcs, state);
0932     else if (pl->mac_ops->mac_pcs_get_state &&
0933          pl->config->legacy_pre_march2020)
0934         pl->mac_ops->mac_pcs_get_state(pl->config, state);
0935     else
0936         state->link = 0;
0937 }
0938
0939 /* The fixed state is... fixed except for the link state,
0940  * which may be determined by a GPIO or a callback.
0941  */
0942 static void phylink_get_fixed_state(struct phylink *pl,
0943                     struct phylink_link_state *state)
0944 {
0945     *state = pl->link_config;
0946     if (pl->config->get_fixed_state)
0947         pl->config->get_fixed_state(pl->config, state);
0948     else if (pl->link_gpio)
0949         state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
0950
0951     phylink_resolve_flow(state);
0952 }
0953
0954 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
0955 {
0956     struct phylink_link_state link_state;
0957
0958     switch (pl->cur_link_an_mode) {
0959     case MLO_AN_PHY:
0960         link_state = pl->phy_state;
0961         break;
0962
0963     case MLO_AN_FIXED:
0964         phylink_get_fixed_state(pl, &link_state);
0965         break;
0966
0967     case MLO_AN_INBAND:
0968         link_state = pl->link_config;
0969         if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
0970             link_state.pause = MLO_PAUSE_NONE;
0971         break;
0972
0973     default: /* can't happen */
0974         return;
0975     }
0976
0977     link_state.link = false;
0978
0979     phylink_apply_manual_flow(pl, &link_state);
0980     phylink_major_config(pl, force_restart, &link_state);
0981 }
0982
0983 static const char *phylink_pause_to_str(int pause)
0984 {
0985     switch (pause & MLO_PAUSE_TXRX_MASK) {
0986     case MLO_PAUSE_TX | MLO_PAUSE_RX:
0987         return "rx/tx";
0988     case MLO_PAUSE_TX:
0989         return "tx";
0990     case MLO_PAUSE_RX:
0991         return "rx";
0992     default:
0993         return "off";
0994     }
0995 }
0996
0997 static void phylink_link_up(struct phylink *pl,
0998                 struct phylink_link_state link_state)
0999 {
1000     struct net_device *ndev = pl->netdev;
1001
1002     pl->cur_interface = link_state.interface;
1003
1004     if (pl->pcs && pl->pcs->ops->pcs_link_up)
1005         pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode,
1006                      pl->cur_interface,
1007                      link_state.speed, link_state.duplex);
1008
1009     pl->mac_ops->mac_link_up(pl->config, pl->phydev,
1010                  pl->cur_link_an_mode, pl->cur_interface,
1011                  link_state.speed, link_state.duplex,
1012                  !!(link_state.pause & MLO_PAUSE_TX),
1013                  !!(link_state.pause & MLO_PAUSE_RX));
1014
1015     if (ndev)
1016         netif_carrier_on(ndev);
1017
1018     phylink_info(pl,
1019              "Link is Up - %s/%s - flow control %s\n",
1020              phy_speed_to_str(link_state.speed),
1021              phy_duplex_to_str(link_state.duplex),
1022              phylink_pause_to_str(link_state.pause));
1023 }
1024
1025 static void phylink_link_down(struct phylink *pl)
1026 {
1027     struct net_device *ndev = pl->netdev;
1028
1029     if (ndev)
1030         netif_carrier_off(ndev);
1031     pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1032                    pl->cur_interface);
1033     phylink_info(pl, "Link is Down\n");
1034 }
1035
1036 static void phylink_resolve(struct work_struct *w)
1037 {
1038     struct phylink *pl = container_of(w, struct phylink, resolve);
1039     struct phylink_link_state link_state;
1040     struct net_device *ndev = pl->netdev;
1041     bool mac_config = false;
1042     bool retrigger = false;
1043     bool cur_link_state;
1044
1045     mutex_lock(&pl->state_mutex);
1046     if (pl->netdev)
1047         cur_link_state = netif_carrier_ok(ndev);
1048     else
1049         cur_link_state = pl->old_link_state;
1050
1051     if (pl->phylink_disable_state) {
1052         pl->mac_link_dropped = false;
1053         link_state.link = false;
1054     } else if (pl->mac_link_dropped) {
1055         link_state.link = false;
1056         retrigger = true;
1057     } else {
1058         switch (pl->cur_link_an_mode) {
1059         case MLO_AN_PHY:
1060             link_state = pl->phy_state;
1061             phylink_apply_manual_flow(pl, &link_state);
1062             mac_config = link_state.link;
1063             break;
1064
1065         case MLO_AN_FIXED:
1066             phylink_get_fixed_state(pl, &link_state);
1067             mac_config = link_state.link;
1068             break;
1069
1070         case MLO_AN_INBAND:
1071             phylink_mac_pcs_get_state(pl, &link_state);
1072
1073             /* The PCS may have a latching link-fail indicator.
1074              * If the link was up, bring the link down and
1075              * re-trigger the resolve. Otherwise, re-read the
1076              * PCS state to get the current status of the link.
1077              */
1078             if (!link_state.link) {
1079                 if (cur_link_state)
1080                     retrigger = true;
1081                 else
1082                     phylink_mac_pcs_get_state(pl,
1083                                   &link_state);
1084             }
1085
1086             /* If we have a phy, the "up" state is the union of
1087              * both the PHY and the MAC
1088              */
1089             if (pl->phydev)
1090                 link_state.link &= pl->phy_state.link;
1091
1092             /* Only update if the PHY link is up */
1093             if (pl->phydev && pl->phy_state.link) {
1094                 /* If the interface has changed, force a
1095                  * link down event if the link isn't already
1096                  * down, and re-resolve.
1097                  */
1098                 if (link_state.interface !=
1099                     pl->phy_state.interface) {
1100                     retrigger = true;
1101                     link_state.link = false;
1102                 }
1103                 link_state.interface = pl->phy_state.interface;
1104
1105                 /* If we have a PHY, we need to update with
1106                  * the PHY flow control bits.
1107                  */
1108                 link_state.pause = pl->phy_state.pause;
1109                 mac_config = true;
1110             }
1111             phylink_apply_manual_flow(pl, &link_state);
1112             break;
1113         }
1114     }
1115
1116     if (mac_config) {
1117         if (link_state.interface != pl->link_config.interface) {
1118             /* The interface has changed, force the link down and
1119              * then reconfigure.
1120              */
1121             if (cur_link_state) {
1122                 phylink_link_down(pl);
1123                 cur_link_state = false;
1124             }
1125             phylink_major_config(pl, false, &link_state);
1126             pl->link_config.interface = link_state.interface;
1127         } else if (!pl->pcs && pl->config->legacy_pre_march2020) {
1128             /* The interface remains unchanged, only the speed,
1129              * duplex or pause settings have changed. Call the
1130              * old mac_config() method to configure the MAC/PCS
1131              * only if we do not have a legacy MAC driver.
1132              */
1133             phylink_mac_config(pl, &link_state);
1134         }
1135     }
1136
1137     if (link_state.link != cur_link_state) {
1138         pl->old_link_state = link_state.link;
1139         if (!link_state.link)
1140             phylink_link_down(pl);
1141         else
1142             phylink_link_up(pl, link_state);
1143     }
1144     if (!link_state.link && retrigger) {
1145         pl->mac_link_dropped = false;
1146         queue_work(system_power_efficient_wq, &pl->resolve);
1147     }
1148     mutex_unlock(&pl->state_mutex);
1149 }
1150
1151 static void phylink_run_resolve(struct phylink *pl)
1152 {
1153     if (!pl->phylink_disable_state)
1154         queue_work(system_power_efficient_wq, &pl->resolve);
1155 }
1156
1157 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1158 {
1159     unsigned long state = pl->phylink_disable_state;
1160
1161     set_bit(bit, &pl->phylink_disable_state);
1162     if (state == 0) {
1163         queue_work(system_power_efficient_wq, &pl->resolve);
1164         flush_work(&pl->resolve);
1165     }
1166 }
1167
1168 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1169 {
1170     clear_bit(bit, &pl->phylink_disable_state);
1171     phylink_run_resolve(pl);
1172 }
1173
1174 static void phylink_fixed_poll(struct timer_list *t)
1175 {
1176     struct phylink *pl = container_of(t, struct phylink, link_poll);
1177
1178     mod_timer(t, jiffies + HZ);
1179
1180     phylink_run_resolve(pl);
1181 }
1182
1183 static const struct sfp_upstream_ops sfp_phylink_ops;
1184
1185 static int phylink_register_sfp(struct phylink *pl,
1186                 struct fwnode_handle *fwnode)
1187 {
1188     struct sfp_bus *bus;
1189     int ret;
1190
1191     if (!fwnode)
1192         return 0;
1193
1194     bus = sfp_bus_find_fwnode(fwnode);
1195     if (IS_ERR(bus)) {
1196         phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1197         return PTR_ERR(bus);
1198     }
1199
1200     pl->sfp_bus = bus;
1201
1202     ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1203     sfp_bus_put(bus);
1204
1205     return ret;
1206 }
1207
1208 /**
1209  * phylink_create() - create a phylink instance
1210  * @config: a pointer to the target &struct phylink_config
1211  * @fwnode: a pointer to a &struct fwnode_handle describing the network
1212  *  interface
1213  * @iface: the desired link mode defined by &typedef phy_interface_t
1214  * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1215  *
1216  * Create a new phylink instance, and parse the link parameters found in @np.
1217  * This will parse in-band modes, fixed-link or SFP configuration.
1218  *
1219  * Note: the rtnl lock must not be held when calling this function.
1220  *
1221  * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1222  * must use IS_ERR() to check for errors from this function.
1223  */
1224 struct phylink *phylink_create(struct phylink_config *config,
1225                    struct fwnode_handle *fwnode,
1226                    phy_interface_t iface,
1227                    const struct phylink_mac_ops *mac_ops)
1228 {
1229     bool using_mac_select_pcs = false;
1230     struct phylink *pl;
1231     int ret;
1232
1233     if (mac_ops->mac_select_pcs &&
1234         mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1235           ERR_PTR(-EOPNOTSUPP))
1236         using_mac_select_pcs = true;
1237
1238     /* Validate the supplied configuration */
1239     if (using_mac_select_pcs &&
1240         phy_interface_empty(config->supported_interfaces)) {
1241         dev_err(config->dev,
1242             "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n");
1243         return ERR_PTR(-EINVAL);
1244     }
1245
1246     pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1247     if (!pl)
1248         return ERR_PTR(-ENOMEM);
1249
1250     mutex_init(&pl->state_mutex);
1251     INIT_WORK(&pl->resolve, phylink_resolve);
1252
1253     pl->config = config;
1254     if (config->type == PHYLINK_NETDEV) {
1255         pl->netdev = to_net_dev(config->dev);
1256     } else if (config->type == PHYLINK_DEV) {
1257         pl->dev = config->dev;
1258     } else {
1259         kfree(pl);
1260         return ERR_PTR(-EINVAL);
1261     }
1262
1263     pl->using_mac_select_pcs = using_mac_select_pcs;
1264     pl->phy_state.interface = iface;
1265     pl->link_interface = iface;
1266     if (iface == PHY_INTERFACE_MODE_MOCA)
1267         pl->link_port = PORT_BNC;
1268     else
1269         pl->link_port = PORT_MII;
1270     pl->link_config.interface = iface;
1271     pl->link_config.pause = MLO_PAUSE_AN;
1272     pl->link_config.speed = SPEED_UNKNOWN;
1273     pl->link_config.duplex = DUPLEX_UNKNOWN;
1274     pl->link_config.an_enabled = true;
1275     pl->mac_ops = mac_ops;
1276     __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1277     timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1278
1279     bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1280     linkmode_copy(pl->link_config.advertising, pl->supported);
1281     phylink_validate(pl, pl->supported, &pl->link_config);
1282
1283     ret = phylink_parse_mode(pl, fwnode);
1284     if (ret < 0) {
1285         kfree(pl);
1286         return ERR_PTR(ret);
1287     }
1288
1289     if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1290         ret = phylink_parse_fixedlink(pl, fwnode);
1291         if (ret < 0) {
1292             kfree(pl);
1293             return ERR_PTR(ret);
1294         }
1295     }
1296
1297     pl->cur_link_an_mode = pl->cfg_link_an_mode;
1298
1299     ret = phylink_register_sfp(pl, fwnode);
1300     if (ret < 0) {
1301         kfree(pl);
1302         return ERR_PTR(ret);
1303     }
1304
1305     return pl;
1306 }
1307 EXPORT_SYMBOL_GPL(phylink_create);
1308
1309 /**
1310  * phylink_destroy() - cleanup and destroy the phylink instance
1311  * @pl: a pointer to a &struct phylink returned from phylink_create()
1312  *
1313  * Destroy a phylink instance. Any PHY that has been attached must have been
1314  * cleaned up via phylink_disconnect_phy() prior to calling this function.
1315  *
1316  * Note: the rtnl lock must not be held when calling this function.
1317  */
1318 void phylink_destroy(struct phylink *pl)
1319 {
1320     sfp_bus_del_upstream(pl->sfp_bus);
1321     if (pl->link_gpio)
1322         gpiod_put(pl->link_gpio);
1323
1324     cancel_work_sync(&pl->resolve);
1325     kfree(pl);
1326 }
1327 EXPORT_SYMBOL_GPL(phylink_destroy);
1328
1329 static void phylink_phy_change(struct phy_device *phydev, bool up)
1330 {
1331     struct phylink *pl = phydev->phylink;
1332     bool tx_pause, rx_pause;
1333
1334     phy_get_pause(phydev, &tx_pause, &rx_pause);
1335
1336     mutex_lock(&pl->state_mutex);
1337     pl->phy_state.speed = phydev->speed;
1338     pl->phy_state.duplex = phydev->duplex;
1339     pl->phy_state.pause = MLO_PAUSE_NONE;
1340     if (tx_pause)
1341         pl->phy_state.pause |= MLO_PAUSE_TX;
1342     if (rx_pause)
1343         pl->phy_state.pause |= MLO_PAUSE_RX;
1344     pl->phy_state.interface = phydev->interface;
1345     pl->phy_state.link = up;
1346     mutex_unlock(&pl->state_mutex);
1347
1348     phylink_run_resolve(pl);
1349
1350     phylink_dbg(pl, "phy link %s %s/%s/%s/%s\n", up ? "up" : "down",
1351             phy_modes(phydev->interface),
1352             phy_speed_to_str(phydev->speed),
1353             phy_duplex_to_str(phydev->duplex),
1354             phylink_pause_to_str(pl->phy_state.pause));
1355 }
1356
1357 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1358                    phy_interface_t interface)
1359 {
1360     struct phylink_link_state config;
1361     __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1362     char *irq_str;
1363     int ret;
1364
1365     /*
1366      * This is the new way of dealing with flow control for PHYs,
1367      * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1368      * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1369      * using our validate call to the MAC, we rely upon the MAC
1370      * clearing the bits from both supported and advertising fields.
1371      */
1372     phy_support_asym_pause(phy);
1373
1374     memset(&config, 0, sizeof(config));
1375     linkmode_copy(supported, phy->supported);
1376     linkmode_copy(config.advertising, phy->advertising);
1377
1378     /* Clause 45 PHYs switch their Serdes lane between several different
1379      * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G
1380      * speeds. We really need to know which interface modes the PHY and
1381      * MAC supports to properly work out which linkmodes can be supported.
1382      */
1383     if (phy->is_c45 &&
1384         interface != PHY_INTERFACE_MODE_RXAUI &&
1385         interface != PHY_INTERFACE_MODE_XAUI &&
1386         interface != PHY_INTERFACE_MODE_USXGMII)
1387         config.interface = PHY_INTERFACE_MODE_NA;
1388     else
1389         config.interface = interface;
1390
1391     ret = phylink_validate(pl, supported, &config);
1392     if (ret) {
1393         phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1394                  phy_modes(config.interface),
1395                  __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1396                  __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1397                  ERR_PTR(ret));
1398         return ret;
1399     }
1400
1401     phy->phylink = pl;
1402     phy->phy_link_change = phylink_phy_change;
1403
1404     irq_str = phy_attached_info_irq(phy);
1405     phylink_info(pl,
1406              "PHY [%s] driver [%s] (irq=%s)\n",
1407              dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1408     kfree(irq_str);
1409
1410     mutex_lock(&phy->lock);
1411     mutex_lock(&pl->state_mutex);
1412     pl->phydev = phy;
1413     pl->phy_state.interface = interface;
1414     pl->phy_state.pause = MLO_PAUSE_NONE;
1415     pl->phy_state.speed = SPEED_UNKNOWN;
1416     pl->phy_state.duplex = DUPLEX_UNKNOWN;
1417     linkmode_copy(pl->supported, supported);
1418     linkmode_copy(pl->link_config.advertising, config.advertising);
1419
1420     /* Restrict the phy advertisement according to the MAC support. */
1421     linkmode_copy(phy->advertising, config.advertising);
1422     mutex_unlock(&pl->state_mutex);
1423     mutex_unlock(&phy->lock);
1424
1425     phylink_dbg(pl,
1426             "phy: %s setting supported %*pb advertising %*pb\n",
1427             phy_modes(interface),
1428             __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1429             __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1430
1431     if (phy_interrupt_is_valid(phy))
1432         phy_request_interrupt(phy);
1433
1434     return 0;
1435 }
1436
1437 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1438                   phy_interface_t interface)
1439 {
1440     if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1441             (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1442              phy_interface_mode_is_8023z(interface))))
1443         return -EINVAL;
1444
1445     if (pl->phydev)
1446         return -EBUSY;
1447
1448     return phy_attach_direct(pl->netdev, phy, 0, interface);
1449 }
1450
1451 /**
1452  * phylink_connect_phy() - connect a PHY to the phylink instance
1453  * @pl: a pointer to a &struct phylink returned from phylink_create()
1454  * @phy: a pointer to a &struct phy_device.
1455  *
1456  * Connect @phy to the phylink instance specified by @pl by calling
1457  * phy_attach_direct(). Configure the @phy according to the MAC driver's
1458  * capabilities, start the PHYLIB state machine and enable any interrupts
1459  * that the PHY supports.
1460  *
1461  * This updates the phylink's ethtool supported and advertising link mode
1462  * masks.
1463  *
1464  * Returns 0 on success or a negative errno.
1465  */
1466 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1467 {
1468     int ret;
1469
1470     /* Use PHY device/driver interface */
1471     if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1472         pl->link_interface = phy->interface;
1473         pl->link_config.interface = pl->link_interface;
1474     }
1475
1476     ret = phylink_attach_phy(pl, phy, pl->link_interface);
1477     if (ret < 0)
1478         return ret;
1479
1480     ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1481     if (ret)
1482         phy_detach(phy);
1483
1484     return ret;
1485 }
1486 EXPORT_SYMBOL_GPL(phylink_connect_phy);
1487
1488 /**
1489  * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1490  * @pl: a pointer to a &struct phylink returned from phylink_create()
1491  * @dn: a pointer to a &struct device_node.
1492  * @flags: PHY-specific flags to communicate to the PHY device driver
1493  *
1494  * Connect the phy specified in the device node @dn to the phylink instance
1495  * specified by @pl. Actions specified in phylink_connect_phy() will be
1496  * performed.
1497  *
1498  * Returns 0 on success or a negative errno.
1499  */
1500 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1501                u32 flags)
1502 {
1503     return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1504 }
1505 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1506
1507 /**
1508  * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1509  * @pl: a pointer to a &struct phylink returned from phylink_create()
1510  * @fwnode: a pointer to a &struct fwnode_handle.
1511  * @flags: PHY-specific flags to communicate to the PHY device driver
1512  *
1513  * Connect the phy specified @fwnode to the phylink instance specified
1514  * by @pl.
1515  *
1516  * Returns 0 on success or a negative errno.
1517  */
1518 int phylink_fwnode_phy_connect(struct phylink *pl,
1519                    struct fwnode_handle *fwnode,
1520                    u32 flags)
1521 {
1522     struct fwnode_handle *phy_fwnode;
1523     struct phy_device *phy_dev;
1524     int ret;
1525
1526     /* Fixed links and 802.3z are handled without needing a PHY */
1527     if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1528         (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1529          phy_interface_mode_is_8023z(pl->link_interface)))
1530         return 0;
1531
1532     phy_fwnode = fwnode_get_phy_node(fwnode);
1533     if (IS_ERR(phy_fwnode)) {
1534         if (pl->cfg_link_an_mode == MLO_AN_PHY)
1535             return -ENODEV;
1536         return 0;
1537     }
1538
1539     phy_dev = fwnode_phy_find_device(phy_fwnode);
1540     /* We're done with the phy_node handle */
1541     fwnode_handle_put(phy_fwnode);
1542     if (!phy_dev)
1543         return -ENODEV;
1544
1545     /* Use PHY device/driver interface */
1546     if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1547         pl->link_interface = phy_dev->interface;
1548         pl->link_config.interface = pl->link_interface;
1549     }
1550
1551     ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1552                 pl->link_interface);
1553     if (ret) {
1554         phy_device_free(phy_dev);
1555         return ret;
1556     }
1557
1558     ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1559     if (ret)
1560         phy_detach(phy_dev);
1561
1562     return ret;
1563 }
1564 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
1565
1566 /**
1567  * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1568  *   instance.
1569  * @pl: a pointer to a &struct phylink returned from phylink_create()
1570  *
1571  * Disconnect any current PHY from the phylink instance described by @pl.
1572  */
1573 void phylink_disconnect_phy(struct phylink *pl)
1574 {
1575     struct phy_device *phy;
1576
1577     ASSERT_RTNL();
1578
1579     phy = pl->phydev;
1580     if (phy) {
1581         mutex_lock(&phy->lock);
1582         mutex_lock(&pl->state_mutex);
1583         pl->phydev = NULL;
1584         mutex_unlock(&pl->state_mutex);
1585         mutex_unlock(&phy->lock);
1586         flush_work(&pl->resolve);
1587
1588         phy_disconnect(phy);
1589     }
1590 }
1591 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
1592
1593 /**
1594  * phylink_mac_change() - notify phylink of a change in MAC state
1595  * @pl: a pointer to a &struct phylink returned from phylink_create()
1596  * @up: indicates whether the link is currently up.
1597  *
1598  * The MAC driver should call this driver when the state of its link
1599  * changes (eg, link failure, new negotiation results, etc.)
1600  */
1601 void phylink_mac_change(struct phylink *pl, bool up)
1602 {
1603     if (!up)
1604         pl->mac_link_dropped = true;
1605     phylink_run_resolve(pl);
1606     phylink_dbg(pl, "mac link %s\n", up ? "up" : "down");
1607 }
1608 EXPORT_SYMBOL_GPL(phylink_mac_change);
1609
1610 static irqreturn_t phylink_link_handler(int irq, void *data)
1611 {
1612     struct phylink *pl = data;
1613
1614     phylink_run_resolve(pl);
1615
1616     return IRQ_HANDLED;
1617 }
1618
1619 /**
1620  * phylink_start() - start a phylink instance
1621  * @pl: a pointer to a &struct phylink returned from phylink_create()
1622  *
1623  * Start the phylink instance specified by @pl, configuring the MAC for the
1624  * desired link mode(s) and negotiation style. This should be called from the
1625  * network device driver's &struct net_device_ops ndo_open() method.
1626  */
1627 void phylink_start(struct phylink *pl)
1628 {
1629     bool poll = false;
1630
1631     ASSERT_RTNL();
1632
1633     phylink_info(pl, "configuring for %s/%s link mode\n",
1634              phylink_an_mode_str(pl->cur_link_an_mode),
1635              phy_modes(pl->link_config.interface));
1636
1637     /* Always set the carrier off */
1638     if (pl->netdev)
1639         netif_carrier_off(pl->netdev);
1640
1641     /* Apply the link configuration to the MAC when starting. This allows
1642      * a fixed-link to start with the correct parameters, and also
1643      * ensures that we set the appropriate advertisement for Serdes links.
1644      *
1645      * Restart autonegotiation if using 802.3z to ensure that the link
1646      * parameters are properly negotiated.  This is necessary for DSA
1647      * switches using 802.3z negotiation to ensure they see our modes.
1648      */
1649     phylink_mac_initial_config(pl, true);
1650
1651     phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
1652
1653     if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
1654         int irq = gpiod_to_irq(pl->link_gpio);
1655
1656         if (irq > 0) {
1657             if (!request_irq(irq, phylink_link_handler,
1658                      IRQF_TRIGGER_RISING |
1659                      IRQF_TRIGGER_FALLING,
1660                      "netdev link", pl))
1661                 pl->link_irq = irq;
1662             else
1663                 irq = 0;
1664         }
1665         if (irq <= 0)
1666             poll = true;
1667     }
1668
1669     switch (pl->cfg_link_an_mode) {
1670     case MLO_AN_FIXED:
1671         poll |= pl->config->poll_fixed_state;
1672         break;
1673     case MLO_AN_INBAND:
1674         if (pl->pcs)
1675             poll |= pl->pcs->poll;
1676         break;
1677     }
1678     if (poll)
1679         mod_timer(&pl->link_poll, jiffies + HZ);
1680     if (pl->phydev)
1681         phy_start(pl->phydev);
1682     if (pl->sfp_bus)
1683         sfp_upstream_start(pl->sfp_bus);
1684 }
1685 EXPORT_SYMBOL_GPL(phylink_start);
1686
1687 /**
1688  * phylink_stop() - stop a phylink instance
1689  * @pl: a pointer to a &struct phylink returned from phylink_create()
1690  *
1691  * Stop the phylink instance specified by @pl. This should be called from the
1692  * network device driver's &struct net_device_ops ndo_stop() method.  The
1693  * network device's carrier state should not be changed prior to calling this
1694  * function.
1695  *
1696  * This will synchronously bring down the link if the link is not already
1697  * down (in other words, it will trigger a mac_link_down() method call.)
1698  */
1699 void phylink_stop(struct phylink *pl)
1700 {
1701     ASSERT_RTNL();
1702
1703     if (pl->sfp_bus)
1704         sfp_upstream_stop(pl->sfp_bus);
1705     if (pl->phydev)
1706         phy_stop(pl->phydev);
1707     del_timer_sync(&pl->link_poll);
1708     if (pl->link_irq) {
1709         free_irq(pl->link_irq, pl);
1710         pl->link_irq = 0;
1711     }
1712
1713     phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
1714 }
1715 EXPORT_SYMBOL_GPL(phylink_stop);
1716
1717 /**
1718  * phylink_suspend() - handle a network device suspend event
1719  * @pl: a pointer to a &struct phylink returned from phylink_create()
1720  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
1721  *
1722  * Handle a network device suspend event. There are several cases:
1723  *
1724  * - If Wake-on-Lan is not active, we can bring down the link between
1725  *   the MAC and PHY by calling phylink_stop().
1726  * - If Wake-on-Lan is active, and being handled only by the PHY, we
1727  *   can also bring down the link between the MAC and PHY.
1728  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
1729  *   still needs to receive packets, so we can not bring the link down.
1730  */
1731 void phylink_suspend(struct phylink *pl, bool mac_wol)
1732 {
1733     ASSERT_RTNL();
1734
1735     if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
1736         /* Wake-on-Lan enabled, MAC handling */
1737         mutex_lock(&pl->state_mutex);
1738
1739         /* Stop the resolver bringing the link up */
1740         __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
1741
1742         /* Disable the carrier, to prevent transmit timeouts,
1743          * but one would hope all packets have been sent. This
1744          * also means phylink_resolve() will do nothing.
1745          */
1746         if (pl->netdev)
1747             netif_carrier_off(pl->netdev);
1748         else
1749             pl->old_link_state = false;
1750
1751         /* We do not call mac_link_down() here as we want the
1752          * link to remain up to receive the WoL packets.
1753          */
1754         mutex_unlock(&pl->state_mutex);
1755     } else {
1756         phylink_stop(pl);
1757     }
1758 }
1759 EXPORT_SYMBOL_GPL(phylink_suspend);
1760
1761 /**
1762  * phylink_resume() - handle a network device resume event
1763  * @pl: a pointer to a &struct phylink returned from phylink_create()
1764  *
1765  * Undo the effects of phylink_suspend(), returning the link to an
1766  * operational state.
1767  */
1768 void phylink_resume(struct phylink *pl)
1769 {
1770     ASSERT_RTNL();
1771
1772     if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
1773         /* Wake-on-Lan enabled, MAC handling */
1774
1775         /* Call mac_link_down() so we keep the overall state balanced.
1776          * Do this under the state_mutex lock for consistency. This
1777          * will cause a "Link Down" message to be printed during
1778          * resume, which is harmless - the true link state will be
1779          * printed when we run a resolve.
1780          */
1781         mutex_lock(&pl->state_mutex);
1782         phylink_link_down(pl);
1783         mutex_unlock(&pl->state_mutex);
1784
1785         /* Re-apply the link parameters so that all the settings get
1786          * restored to the MAC.
1787          */
1788         phylink_mac_initial_config(pl, true);
1789
1790         /* Re-enable and re-resolve the link parameters */
1791         phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
1792     } else {
1793         phylink_start(pl);
1794     }
1795 }
1796 EXPORT_SYMBOL_GPL(phylink_resume);
1797
1798 /**
1799  * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
1800  * @pl: a pointer to a &struct phylink returned from phylink_create()
1801  * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
1802  *
1803  * Read the wake on lan parameters from the PHY attached to the phylink
1804  * instance specified by @pl. If no PHY is currently attached, report no
1805  * support for wake on lan.
1806  */
1807 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
1808 {
1809     ASSERT_RTNL();
1810
1811     wol->supported = 0;
1812     wol->wolopts = 0;
1813
1814     if (pl->phydev)
1815         phy_ethtool_get_wol(pl->phydev, wol);
1816 }
1817 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
1818
1819 /**
1820  * phylink_ethtool_set_wol() - set wake on lan parameters
1821  * @pl: a pointer to a &struct phylink returned from phylink_create()
1822  * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
1823  *
1824  * Set the wake on lan parameters for the PHY attached to the phylink
1825  * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
1826  * error.
1827  *
1828  * Returns zero on success or negative errno code.
1829  */
1830 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
1831 {
1832     int ret = -EOPNOTSUPP;
1833
1834     ASSERT_RTNL();
1835
1836     if (pl->phydev)
1837         ret = phy_ethtool_set_wol(pl->phydev, wol);
1838
1839     return ret;
1840 }
1841 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
1842
1843 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
1844 {
1845     __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
1846
1847     linkmode_zero(mask);
1848     phylink_set_port_modes(mask);
1849
1850     linkmode_and(dst, dst, mask);
1851     linkmode_or(dst, dst, b);
1852 }
1853
1854 static void phylink_get_ksettings(const struct phylink_link_state *state,
1855                   struct ethtool_link_ksettings *kset)
1856 {
1857     phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
1858     linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
1859     kset->base.speed = state->speed;
1860     kset->base.duplex = state->duplex;
1861     kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE :
1862                 AUTONEG_DISABLE;
1863 }
1864
1865 /**
1866  * phylink_ethtool_ksettings_get() - get the current link settings
1867  * @pl: a pointer to a &struct phylink returned from phylink_create()
1868  * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
1869  *
1870  * Read the current link settings for the phylink instance specified by @pl.
1871  * This will be the link settings read from the MAC, PHY or fixed link
1872  * settings depending on the current negotiation mode.
1873  */
1874 int phylink_ethtool_ksettings_get(struct phylink *pl,
1875                   struct ethtool_link_ksettings *kset)
1876 {
1877     struct phylink_link_state link_state;
1878
1879     ASSERT_RTNL();
1880
1881     if (pl->phydev)
1882         phy_ethtool_ksettings_get(pl->phydev, kset);
1883     else
1884         kset->base.port = pl->link_port;
1885
1886     linkmode_copy(kset->link_modes.supported, pl->supported);
1887
1888     switch (pl->cur_link_an_mode) {
1889     case MLO_AN_FIXED:
1890         /* We are using fixed settings. Report these as the
1891          * current link settings - and note that these also
1892          * represent the supported speeds/duplex/pause modes.
1893          */
1894         phylink_get_fixed_state(pl, &link_state);
1895         phylink_get_ksettings(&link_state, kset);
1896         break;
1897
1898     case MLO_AN_INBAND:
1899         /* If there is a phy attached, then use the reported
1900          * settings from the phy with no modification.
1901          */
1902         if (pl->phydev)
1903             break;
1904
1905         phylink_mac_pcs_get_state(pl, &link_state);
1906
1907         /* The MAC is reporting the link results from its own PCS
1908          * layer via in-band status. Report these as the current
1909          * link settings.
1910          */
1911         phylink_get_ksettings(&link_state, kset);
1912         break;
1913     }
1914
1915     return 0;
1916 }
1917 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
1918
1919 /**
1920  * phylink_ethtool_ksettings_set() - set the link settings
1921  * @pl: a pointer to a &struct phylink returned from phylink_create()
1922  * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
1923  */
1924 int phylink_ethtool_ksettings_set(struct phylink *pl,
1925                   const struct ethtool_link_ksettings *kset)
1926 {
1927     __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
1928     struct phylink_link_state config;
1929     const struct phy_setting *s;
1930
1931     ASSERT_RTNL();
1932
1933     if (pl->phydev) {
1934         /* We can rely on phylib for this update; we also do not need
1935          * to update the pl->link_config settings:
1936          * - the configuration returned via ksettings_get() will come
1937          *   from phylib whenever a PHY is present.
1938          * - link_config.interface will be updated by the PHY calling
1939          *   back via phylink_phy_change() and a subsequent resolve.
1940          * - initial link configuration for PHY mode comes from the
1941          *   last phy state updated via phylink_phy_change().
1942          * - other configuration changes (e.g. pause modes) are
1943          *   performed directly via phylib.
1944          * - if in in-band mode with a PHY, the link configuration
1945          *   is passed on the link from the PHY, and all of
1946          *   link_config.{speed,duplex,an_enabled,pause} are not used.
1947          * - the only possible use would be link_config.advertising
1948          *   pause modes when in 1000base-X mode with a PHY, but in
1949          *   the presence of a PHY, this should not be changed as that
1950          *   should be determined from the media side advertisement.
1951          */
1952         return phy_ethtool_ksettings_set(pl->phydev, kset);
1953     }
1954
1955     config = pl->link_config;
1956
1957     /* Mask out unsupported advertisements */
1958     linkmode_and(config.advertising, kset->link_modes.advertising,
1959              pl->supported);
1960
1961     /* FIXME: should we reject autoneg if phy/mac does not support it? */
1962     switch (kset->base.autoneg) {
1963     case AUTONEG_DISABLE:
1964         /* Autonegotiation disabled, select a suitable speed and
1965          * duplex.
1966          */
1967         s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
1968                        pl->supported, false);
1969         if (!s)
1970             return -EINVAL;
1971
1972         /* If we have a fixed link, refuse to change link parameters.
1973          * If the link parameters match, accept them but do nothing.
1974          */
1975         if (pl->cur_link_an_mode == MLO_AN_FIXED) {
1976             if (s->speed != pl->link_config.speed ||
1977                 s->duplex != pl->link_config.duplex)
1978                 return -EINVAL;
1979             return 0;
1980         }
1981
1982         config.speed = s->speed;
1983         config.duplex = s->duplex;
1984         break;
1985
1986     case AUTONEG_ENABLE:
1987         /* If we have a fixed link, allow autonegotiation (since that
1988          * is our default case) but do not allow the advertisement to
1989          * be changed. If the advertisement matches, simply return.
1990          */
1991         if (pl->cur_link_an_mode == MLO_AN_FIXED) {
1992             if (!linkmode_equal(config.advertising,
1993                         pl->link_config.advertising))
1994                 return -EINVAL;
1995             return 0;
1996         }
1997
1998         config.speed = SPEED_UNKNOWN;
1999         config.duplex = DUPLEX_UNKNOWN;
2000         break;
2001
2002     default:
2003         return -EINVAL;
2004     }
2005
2006     /* We have ruled out the case with a PHY attached, and the
2007      * fixed-link cases.  All that is left are in-band links.
2008      */
2009     config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE;
2010     linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2011              config.an_enabled);
2012
2013     /* If this link is with an SFP, ensure that changes to advertised modes
2014      * also cause the associated interface to be selected such that the
2015      * link can be configured correctly.
2016      */
2017     if (pl->sfp_bus) {
2018         config.interface = sfp_select_interface(pl->sfp_bus,
2019                             config.advertising);
2020         if (config.interface == PHY_INTERFACE_MODE_NA) {
2021             phylink_err(pl,
2022                     "selection of interface failed, advertisement %*pb\n",
2023                     __ETHTOOL_LINK_MODE_MASK_NBITS,
2024                     config.advertising);
2025             return -EINVAL;
2026         }
2027
2028         /* Revalidate with the selected interface */
2029         linkmode_copy(support, pl->supported);
2030         if (phylink_validate(pl, support, &config)) {
2031             phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2032                     phylink_an_mode_str(pl->cur_link_an_mode),
2033                     phy_modes(config.interface),
2034                     __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2035             return -EINVAL;
2036         }
2037     } else {
2038         /* Validate without changing the current supported mask. */
2039         linkmode_copy(support, pl->supported);
2040         if (phylink_validate(pl, support, &config))
2041             return -EINVAL;
2042     }
2043
2044     /* If autonegotiation is enabled, we must have an advertisement */
2045     if (config.an_enabled && phylink_is_empty_linkmode(config.advertising))
2046         return -EINVAL;
2047
2048     mutex_lock(&pl->state_mutex);
2049     pl->link_config.speed = config.speed;
2050     pl->link_config.duplex = config.duplex;
2051     pl->link_config.an_enabled = config.an_enabled;
2052
2053     if (pl->link_config.interface != config.interface) {
2054         /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2055         /* We need to force the link down, then change the interface */
2056         if (pl->old_link_state) {
2057             phylink_link_down(pl);
2058             pl->old_link_state = false;
2059         }
2060         if (!test_bit(PHYLINK_DISABLE_STOPPED,
2061                   &pl->phylink_disable_state))
2062             phylink_major_config(pl, false, &config);
2063         pl->link_config.interface = config.interface;
2064         linkmode_copy(pl->link_config.advertising, config.advertising);
2065     } else if (!linkmode_equal(pl->link_config.advertising,
2066                    config.advertising)) {
2067         linkmode_copy(pl->link_config.advertising, config.advertising);
2068         phylink_change_inband_advert(pl);
2069     }
2070     mutex_unlock(&pl->state_mutex);
2071
2072     return 0;
2073 }
2074 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2075
2076 /**
2077  * phylink_ethtool_nway_reset() - restart negotiation
2078  * @pl: a pointer to a &struct phylink returned from phylink_create()
2079  *
2080  * Restart negotiation for the phylink instance specified by @pl. This will
2081  * cause any attached phy to restart negotiation with the link partner, and
2082  * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2083  * negotiation.
2084  *
2085  * Returns zero on success, or negative error code.
2086  */
2087 int phylink_ethtool_nway_reset(struct phylink *pl)
2088 {
2089     int ret = 0;
2090
2091     ASSERT_RTNL();
2092
2093     if (pl->phydev)
2094         ret = phy_restart_aneg(pl->phydev);
2095     phylink_mac_pcs_an_restart(pl);
2096
2097     return ret;
2098 }
2099 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2100
2101 /**
2102  * phylink_ethtool_get_pauseparam() - get the current pause parameters
2103  * @pl: a pointer to a &struct phylink returned from phylink_create()
2104  * @pause: a pointer to a &struct ethtool_pauseparam
2105  */
2106 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2107                     struct ethtool_pauseparam *pause)
2108 {
2109     ASSERT_RTNL();
2110
2111     pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2112     pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2113     pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2114 }
2115 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2116
2117 /**
2118  * phylink_ethtool_set_pauseparam() - set the current pause parameters
2119  * @pl: a pointer to a &struct phylink returned from phylink_create()
2120  * @pause: a pointer to a &struct ethtool_pauseparam
2121  */
2122 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2123                    struct ethtool_pauseparam *pause)
2124 {
2125     struct phylink_link_state *config = &pl->link_config;
2126     bool manual_changed;
2127     int pause_state;
2128
2129     ASSERT_RTNL();
2130
2131     if (pl->cur_link_an_mode == MLO_AN_FIXED)
2132         return -EOPNOTSUPP;
2133
2134     if (!phylink_test(pl->supported, Pause) &&
2135         !phylink_test(pl->supported, Asym_Pause))
2136         return -EOPNOTSUPP;
2137
2138     if (!phylink_test(pl->supported, Asym_Pause) &&
2139         pause->rx_pause != pause->tx_pause)
2140         return -EINVAL;
2141
2142     pause_state = 0;
2143     if (pause->autoneg)
2144         pause_state |= MLO_PAUSE_AN;
2145     if (pause->rx_pause)
2146         pause_state |= MLO_PAUSE_RX;
2147     if (pause->tx_pause)
2148         pause_state |= MLO_PAUSE_TX;
2149
2150     mutex_lock(&pl->state_mutex);
2151     /*
2152      * See the comments for linkmode_set_pause(), wrt the deficiencies
2153      * with the current implementation.  A solution to this issue would
2154      * be:
2155      * ethtool  Local device
2156      *  rx  tx  Pause AsymDir
2157      *  0   0   0     0
2158      *  1   0   1     1
2159      *  0   1   0     1
2160      *  1   1   1     1
2161      * and then use the ethtool rx/tx enablement status to mask the
2162      * rx/tx pause resolution.
2163      */
2164     linkmode_set_pause(config->advertising, pause->tx_pause,
2165                pause->rx_pause);
2166
2167     manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2168              (!(pause_state & MLO_PAUSE_AN) &&
2169                (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2170
2171     config->pause = pause_state;
2172
2173     /* Update our in-band advertisement, triggering a renegotiation if
2174      * the advertisement changed.
2175      */
2176     if (!pl->phydev)
2177         phylink_change_inband_advert(pl);
2178
2179     mutex_unlock(&pl->state_mutex);
2180
2181     /* If we have a PHY, a change of the pause frame advertisement will
2182      * cause phylib to renegotiate (if AN is enabled) which will in turn
2183      * call our phylink_phy_change() and trigger a resolve.  Note that
2184      * we can't hold our state mutex while calling phy_set_asym_pause().
2185      */
2186     if (pl->phydev)
2187         phy_set_asym_pause(pl->phydev, pause->rx_pause,
2188                    pause->tx_pause);
2189
2190     /* If the manual pause settings changed, make sure we trigger a
2191      * resolve to update their state; we can not guarantee that the
2192      * link will cycle.
2193      */
2194     if (manual_changed) {
2195         pl->mac_link_dropped = true;
2196         phylink_run_resolve(pl);
2197     }
2198
2199     return 0;
2200 }
2201 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2202
2203 /**
2204  * phylink_get_eee_err() - read the energy efficient ethernet error
2205  *   counter
2206  * @pl: a pointer to a &struct phylink returned from phylink_create().
2207  *
2208  * Read the Energy Efficient Ethernet error counter from the PHY associated
2209  * with the phylink instance specified by @pl.
2210  *
2211  * Returns positive error counter value, or negative error code.
2212  */
2213 int phylink_get_eee_err(struct phylink *pl)
2214 {
2215     int ret = 0;
2216
2217     ASSERT_RTNL();
2218
2219     if (pl->phydev)
2220         ret = phy_get_eee_err(pl->phydev);
2221
2222     return ret;
2223 }
2224 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2225
2226 /**
2227  * phylink_init_eee() - init and check the EEE features
2228  * @pl: a pointer to a &struct phylink returned from phylink_create()
2229  * @clk_stop_enable: allow PHY to stop receive clock
2230  *
2231  * Must be called either with RTNL held or within mac_link_up()
2232  */
2233 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2234 {
2235     int ret = -EOPNOTSUPP;
2236
2237     if (pl->phydev)
2238         ret = phy_init_eee(pl->phydev, clk_stop_enable);
2239
2240     return ret;
2241 }
2242 EXPORT_SYMBOL_GPL(phylink_init_eee);
2243
2244 /**
2245  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2246  * @pl: a pointer to a &struct phylink returned from phylink_create()
2247  * @eee: a pointer to a &struct ethtool_eee for the read parameters
2248  */
2249 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2250 {
2251     int ret = -EOPNOTSUPP;
2252
2253     ASSERT_RTNL();
2254
2255     if (pl->phydev)
2256         ret = phy_ethtool_get_eee(pl->phydev, eee);
2257
2258     return ret;
2259 }
2260 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2261
2262 /**
2263  * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2264  * @pl: a pointer to a &struct phylink returned from phylink_create()
2265  * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2266  */
2267 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2268 {
2269     int ret = -EOPNOTSUPP;
2270
2271     ASSERT_RTNL();
2272
2273     if (pl->phydev)
2274         ret = phy_ethtool_set_eee(pl->phydev, eee);
2275
2276     return ret;
2277 }
2278 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2279
2280 /* This emulates MII registers for a fixed-mode phy operating as per the
2281  * passed in state. "aneg" defines if we report negotiation is possible.
2282  *
2283  * FIXME: should deal with negotiation state too.
2284  */
2285 static int phylink_mii_emul_read(unsigned int reg,
2286                  struct phylink_link_state *state)
2287 {
2288     struct fixed_phy_status fs;
2289     unsigned long *lpa = state->lp_advertising;
2290     int val;
2291
2292     fs.link = state->link;
2293     fs.speed = state->speed;
2294     fs.duplex = state->duplex;
2295     fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2296     fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2297
2298     val = swphy_read_reg(reg, &fs);
2299     if (reg == MII_BMSR) {
2300         if (!state->an_complete)
2301             val &= ~BMSR_ANEGCOMPLETE;
2302     }
2303     return val;
2304 }
2305
2306 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2307                 unsigned int reg)
2308 {
2309     struct phy_device *phydev = pl->phydev;
2310     int prtad, devad;
2311
2312     if (mdio_phy_id_is_c45(phy_id)) {
2313         prtad = mdio_phy_id_prtad(phy_id);
2314         devad = mdio_phy_id_devad(phy_id);
2315         return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2316                     reg);
2317     }
2318
2319     if (phydev->is_c45) {
2320         switch (reg) {
2321         case MII_BMCR:
2322         case MII_BMSR:
2323         case MII_PHYSID1:
2324         case MII_PHYSID2:
2325             devad = __ffs(phydev->c45_ids.mmds_present);
2326             break;
2327         case MII_ADVERTISE:
2328         case MII_LPA:
2329             if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2330                 return -EINVAL;
2331             devad = MDIO_MMD_AN;
2332             if (reg == MII_ADVERTISE)
2333                 reg = MDIO_AN_ADVERTISE;
2334             else
2335                 reg = MDIO_AN_LPA;
2336             break;
2337         default:
2338             return -EINVAL;
2339         }
2340         prtad = phy_id;
2341         return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2342                     reg);
2343     }
2344
2345     return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2346 }
2347
2348 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2349                  unsigned int reg, unsigned int val)
2350 {
2351     struct phy_device *phydev = pl->phydev;
2352     int prtad, devad;
2353
2354     if (mdio_phy_id_is_c45(phy_id)) {
2355         prtad = mdio_phy_id_prtad(phy_id);
2356         devad = mdio_phy_id_devad(phy_id);
2357         return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2358                      reg, val);
2359     }
2360
2361     if (phydev->is_c45) {
2362         switch (reg) {
2363         case MII_BMCR:
2364         case MII_BMSR:
2365         case MII_PHYSID1:
2366         case MII_PHYSID2:
2367             devad = __ffs(phydev->c45_ids.mmds_present);
2368             break;
2369         case MII_ADVERTISE:
2370         case MII_LPA:
2371             if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2372                 return -EINVAL;
2373             devad = MDIO_MMD_AN;
2374             if (reg == MII_ADVERTISE)
2375                 reg = MDIO_AN_ADVERTISE;
2376             else
2377                 reg = MDIO_AN_LPA;
2378             break;
2379         default:
2380             return -EINVAL;
2381         }
2382         return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2383                      reg, val);
2384     }
2385
2386     return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2387 }
2388
2389 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2390                 unsigned int reg)
2391 {
2392     struct phylink_link_state state;
2393     int val = 0xffff;
2394
2395     switch (pl->cur_link_an_mode) {
2396     case MLO_AN_FIXED:
2397         if (phy_id == 0) {
2398             phylink_get_fixed_state(pl, &state);
2399             val = phylink_mii_emul_read(reg, &state);
2400         }
2401         break;
2402
2403     case MLO_AN_PHY:
2404         return -EOPNOTSUPP;
2405
2406     case MLO_AN_INBAND:
2407         if (phy_id == 0) {
2408             phylink_mac_pcs_get_state(pl, &state);
2409             val = phylink_mii_emul_read(reg, &state);
2410         }
2411         break;
2412     }
2413
2414     return val & 0xffff;
2415 }
2416
2417 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2418                  unsigned int reg, unsigned int val)
2419 {
2420     switch (pl->cur_link_an_mode) {
2421     case MLO_AN_FIXED:
2422         break;
2423
2424     case MLO_AN_PHY:
2425         return -EOPNOTSUPP;
2426
2427     case MLO_AN_INBAND:
2428         break;
2429     }
2430
2431     return 0;
2432 }
2433
2434 /**
2435  * phylink_mii_ioctl() - generic mii ioctl interface
2436  * @pl: a pointer to a &struct phylink returned from phylink_create()
2437  * @ifr: a pointer to a &struct ifreq for socket ioctls
2438  * @cmd: ioctl cmd to execute
2439  *
2440  * Perform the specified MII ioctl on the PHY attached to the phylink instance
2441  * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2442  *
2443  * Returns: zero on success or negative error code.
2444  *
2445  * %SIOCGMIIPHY:
2446  *  read register from the current PHY.
2447  * %SIOCGMIIREG:
2448  *  read register from the specified PHY.
2449  * %SIOCSMIIREG:
2450  *  set a register on the specified PHY.
2451  */
2452 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2453 {
2454     struct mii_ioctl_data *mii = if_mii(ifr);
2455     int  ret;
2456
2457     ASSERT_RTNL();
2458
2459     if (pl->phydev) {
2460         /* PHYs only exist for MLO_AN_PHY and SGMII */
2461         switch (cmd) {
2462         case SIOCGMIIPHY:
2463             mii->phy_id = pl->phydev->mdio.addr;
2464             fallthrough;
2465
2466         case SIOCGMIIREG:
2467             ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2468             if (ret >= 0) {
2469                 mii->val_out = ret;
2470                 ret = 0;
2471             }
2472             break;
2473
2474         case SIOCSMIIREG:
2475             ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2476                         mii->val_in);
2477             break;
2478
2479         default:
2480             ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
2481             break;
2482         }
2483     } else {
2484         switch (cmd) {
2485         case SIOCGMIIPHY:
2486             mii->phy_id = 0;
2487             fallthrough;
2488
2489         case SIOCGMIIREG:
2490             ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
2491             if (ret >= 0) {
2492                 mii->val_out = ret;
2493                 ret = 0;
2494             }
2495             break;
2496
2497         case SIOCSMIIREG:
2498             ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
2499                         mii->val_in);
2500             break;
2501
2502         default:
2503             ret = -EOPNOTSUPP;
2504             break;
2505         }
2506     }
2507
2508     return ret;
2509 }
2510 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2511
2512 /**
2513  * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2514  *   link partners
2515  * @pl: a pointer to a &struct phylink returned from phylink_create()
2516  * @sync: perform action synchronously
2517  *
2518  * If we have a PHY that is not part of a SFP module, then set the speed
2519  * as described in the phy_speed_down() function. Please see this function
2520  * for a description of the @sync parameter.
2521  *
2522  * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2523  */
2524 int phylink_speed_down(struct phylink *pl, bool sync)
2525 {
2526     int ret = 0;
2527
2528     ASSERT_RTNL();
2529
2530     if (!pl->sfp_bus && pl->phydev)
2531         ret = phy_speed_down(pl->phydev, sync);
2532
2533     return ret;
2534 }
2535 EXPORT_SYMBOL_GPL(phylink_speed_down);
2536
2537 /**
2538  * phylink_speed_up() - restore the advertised speeds prior to the call to
2539  *   phylink_speed_down()
2540  * @pl: a pointer to a &struct phylink returned from phylink_create()
2541  *
2542  * If we have a PHY that is not part of a SFP module, then restore the
2543  * PHY speeds as per phy_speed_up().
2544  *
2545  * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2546  */
2547 int phylink_speed_up(struct phylink *pl)
2548 {
2549     int ret = 0;
2550
2551     ASSERT_RTNL();
2552
2553     if (!pl->sfp_bus && pl->phydev)
2554         ret = phy_speed_up(pl->phydev);
2555
2556     return ret;
2557 }
2558 EXPORT_SYMBOL_GPL(phylink_speed_up);
2559
2560 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
2561 {
2562     struct phylink *pl = upstream;
2563
2564     pl->netdev->sfp_bus = bus;
2565 }
2566
2567 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
2568 {
2569     struct phylink *pl = upstream;
2570
2571     pl->netdev->sfp_bus = NULL;
2572 }
2573
2574 static int phylink_sfp_config(struct phylink *pl, u8 mode,
2575                   const unsigned long *supported,
2576                   const unsigned long *advertising)
2577 {
2578     __ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
2579     __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2580     struct phylink_link_state config;
2581     phy_interface_t iface;
2582     bool changed;
2583     int ret;
2584
2585     linkmode_copy(support, supported);
2586
2587     memset(&config, 0, sizeof(config));
2588     linkmode_copy(config.advertising, advertising);
2589     config.interface = PHY_INTERFACE_MODE_NA;
2590     config.speed = SPEED_UNKNOWN;
2591     config.duplex = DUPLEX_UNKNOWN;
2592     config.pause = MLO_PAUSE_AN;
2593     config.an_enabled = pl->link_config.an_enabled;
2594
2595     /* Ignore errors if we're expecting a PHY to attach later */
2596     ret = phylink_validate(pl, support, &config);
2597     if (ret) {
2598         phylink_err(pl, "validation with support %*pb failed: %pe\n",
2599                 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
2600                 ERR_PTR(ret));
2601         return ret;
2602     }
2603
2604     iface = sfp_select_interface(pl->sfp_bus, config.advertising);
2605     if (iface == PHY_INTERFACE_MODE_NA) {
2606         phylink_err(pl,
2607                 "selection of interface failed, advertisement %*pb\n",
2608                 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
2609         return -EINVAL;
2610     }
2611
2612     config.interface = iface;
2613     linkmode_copy(support1, support);
2614     ret = phylink_validate(pl, support1, &config);
2615     if (ret) {
2616         phylink_err(pl,
2617                 "validation of %s/%s with support %*pb failed: %pe\n",
2618                 phylink_an_mode_str(mode),
2619                 phy_modes(config.interface),
2620                 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
2621                 ERR_PTR(ret));
2622         return ret;
2623     }
2624
2625     phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
2626             phylink_an_mode_str(mode), phy_modes(config.interface),
2627             __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2628
2629     if (phy_interface_mode_is_8023z(iface) && pl->phydev)
2630         return -EINVAL;
2631
2632     changed = !linkmode_equal(pl->supported, support) ||
2633           !linkmode_equal(pl->link_config.advertising,
2634                   config.advertising);
2635     if (changed) {
2636         linkmode_copy(pl->supported, support);
2637         linkmode_copy(pl->link_config.advertising, config.advertising);
2638     }
2639
2640     if (pl->cur_link_an_mode != mode ||
2641         pl->link_config.interface != config.interface) {
2642         pl->link_config.interface = config.interface;
2643         pl->cur_link_an_mode = mode;
2644
2645         changed = true;
2646
2647         phylink_info(pl, "switched to %s/%s link mode\n",
2648                  phylink_an_mode_str(mode),
2649                  phy_modes(config.interface));
2650     }
2651
2652     pl->link_port = pl->sfp_port;
2653
2654     if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
2655                  &pl->phylink_disable_state))
2656         phylink_mac_initial_config(pl, false);
2657
2658     return ret;
2659 }
2660
2661 static int phylink_sfp_module_insert(void *upstream,
2662                      const struct sfp_eeprom_id *id)
2663 {
2664     struct phylink *pl = upstream;
2665     unsigned long *support = pl->sfp_support;
2666
2667     ASSERT_RTNL();
2668
2669     linkmode_zero(support);
2670     sfp_parse_support(pl->sfp_bus, id, support);
2671     pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, support);
2672
2673     /* If this module may have a PHY connecting later, defer until later */
2674     pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
2675     if (pl->sfp_may_have_phy)
2676         return 0;
2677
2678     return phylink_sfp_config(pl, MLO_AN_INBAND, support, support);
2679 }
2680
2681 static int phylink_sfp_module_start(void *upstream)
2682 {
2683     struct phylink *pl = upstream;
2684
2685     /* If this SFP module has a PHY, start the PHY now. */
2686     if (pl->phydev) {
2687         phy_start(pl->phydev);
2688         return 0;
2689     }
2690
2691     /* If the module may have a PHY but we didn't detect one we
2692      * need to configure the MAC here.
2693      */
2694     if (!pl->sfp_may_have_phy)
2695         return 0;
2696
2697     return phylink_sfp_config(pl, MLO_AN_INBAND,
2698                   pl->sfp_support, pl->sfp_support);
2699 }
2700
2701 static void phylink_sfp_module_stop(void *upstream)
2702 {
2703     struct phylink *pl = upstream;
2704
2705     /* If this SFP module has a PHY, stop it. */
2706     if (pl->phydev)
2707         phy_stop(pl->phydev);
2708 }
2709
2710 static void phylink_sfp_link_down(void *upstream)
2711 {
2712     struct phylink *pl = upstream;
2713
2714     ASSERT_RTNL();
2715
2716     phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
2717 }
2718
2719 static void phylink_sfp_link_up(void *upstream)
2720 {
2721     struct phylink *pl = upstream;
2722
2723     ASSERT_RTNL();
2724
2725     phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
2726 }
2727
2728 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
2729  * or 802.3z control word, so inband will not work.
2730  */
2731 static bool phylink_phy_no_inband(struct phy_device *phy)
2732 {
2733     return phy->is_c45 &&
2734         (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150;
2735 }
2736
2737 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
2738 {
2739     struct phylink *pl = upstream;
2740     phy_interface_t interface;
2741     u8 mode;
2742     int ret;
2743
2744     /*
2745      * This is the new way of dealing with flow control for PHYs,
2746      * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
2747      * phy drivers should not set SUPPORTED_[Asym_]Pause") except
2748      * using our validate call to the MAC, we rely upon the MAC
2749      * clearing the bits from both supported and advertising fields.
2750      */
2751     phy_support_asym_pause(phy);
2752
2753     if (phylink_phy_no_inband(phy))
2754         mode = MLO_AN_PHY;
2755     else
2756         mode = MLO_AN_INBAND;
2757
2758     /* Do the initial configuration */
2759     ret = phylink_sfp_config(pl, mode, phy->supported, phy->advertising);
2760     if (ret < 0)
2761         return ret;
2762
2763     interface = pl->link_config.interface;
2764     ret = phylink_attach_phy(pl, phy, interface);
2765     if (ret < 0)
2766         return ret;
2767
2768     ret = phylink_bringup_phy(pl, phy, interface);
2769     if (ret)
2770         phy_detach(phy);
2771
2772     return ret;
2773 }
2774
2775 static void phylink_sfp_disconnect_phy(void *upstream)
2776 {
2777     phylink_disconnect_phy(upstream);
2778 }
2779
2780 static const struct sfp_upstream_ops sfp_phylink_ops = {
2781     .attach = phylink_sfp_attach,
2782     .detach = phylink_sfp_detach,
2783     .module_insert = phylink_sfp_module_insert,
2784     .module_start = phylink_sfp_module_start,
2785     .module_stop = phylink_sfp_module_stop,
2786     .link_up = phylink_sfp_link_up,
2787     .link_down = phylink_sfp_link_down,
2788     .connect_phy = phylink_sfp_connect_phy,
2789     .disconnect_phy = phylink_sfp_disconnect_phy,
2790 };
2791
2792 /* Helpers for MAC drivers */
2793
2794 static void phylink_decode_c37_word(struct phylink_link_state *state,
2795                     uint16_t config_reg, int speed)
2796 {
2797     bool tx_pause, rx_pause;
2798     int fd_bit;
2799
2800     if (speed == SPEED_2500)
2801         fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
2802     else
2803         fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
2804
2805     mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
2806
2807     if (linkmode_test_bit(fd_bit, state->advertising) &&
2808         linkmode_test_bit(fd_bit, state->lp_advertising)) {
2809         state->speed = speed;
2810         state->duplex = DUPLEX_FULL;
2811     } else {
2812         /* negotiation failure */
2813         state->link = false;
2814     }
2815
2816     linkmode_resolve_pause(state->advertising, state->lp_advertising,
2817                    &tx_pause, &rx_pause);
2818
2819     if (tx_pause)
2820         state->pause |= MLO_PAUSE_TX;
2821     if (rx_pause)
2822         state->pause |= MLO_PAUSE_RX;
2823 }
2824
2825 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
2826                       uint16_t config_reg)
2827 {
2828     if (!(config_reg & LPA_SGMII_LINK)) {
2829         state->link = false;
2830         return;
2831     }
2832
2833     switch (config_reg & LPA_SGMII_SPD_MASK) {
2834     case LPA_SGMII_10:
2835         state->speed = SPEED_10;
2836         break;
2837     case LPA_SGMII_100:
2838         state->speed = SPEED_100;
2839         break;
2840     case LPA_SGMII_1000:
2841         state->speed = SPEED_1000;
2842         break;
2843     default:
2844         state->link = false;
2845         return;
2846     }
2847     if (config_reg & LPA_SGMII_FULL_DUPLEX)
2848         state->duplex = DUPLEX_FULL;
2849     else
2850         state->duplex = DUPLEX_HALF;
2851 }
2852
2853 /**
2854  * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
2855  * @state: a pointer to a struct phylink_link_state.
2856  * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
2857  *
2858  * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
2859  * code word.  Decode the USXGMII code word and populate the corresponding fields
2860  * (speed, duplex) into the phylink_link_state structure.
2861  */
2862 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
2863                  uint16_t lpa)
2864 {
2865     switch (lpa & MDIO_USXGMII_SPD_MASK) {
2866     case MDIO_USXGMII_10:
2867         state->speed = SPEED_10;
2868         break;
2869     case MDIO_USXGMII_100:
2870         state->speed = SPEED_100;
2871         break;
2872     case MDIO_USXGMII_1000:
2873         state->speed = SPEED_1000;
2874         break;
2875     case MDIO_USXGMII_2500:
2876         state->speed = SPEED_2500;
2877         break;
2878     case MDIO_USXGMII_5000:
2879         state->speed = SPEED_5000;
2880         break;
2881     case MDIO_USXGMII_10G:
2882         state->speed = SPEED_10000;
2883         break;
2884     default:
2885         state->link = false;
2886         return;
2887     }
2888
2889     if (lpa & MDIO_USXGMII_FULL_DUPLEX)
2890         state->duplex = DUPLEX_FULL;
2891     else
2892         state->duplex = DUPLEX_HALF;
2893 }
2894 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
2895
2896 /**
2897  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
2898  * @state: a pointer to a &struct phylink_link_state.
2899  * @bmsr: The value of the %MII_BMSR register
2900  * @lpa: The value of the %MII_LPA register
2901  *
2902  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
2903  * clause 37 negotiation and/or SGMII control.
2904  *
2905  * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
2906  * the phylink @state structure. This is suitable to be used for implementing
2907  * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if
2908  * accessing @bmsr and @lpa cannot be done with MDIO directly.
2909  */
2910 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
2911                       u16 bmsr, u16 lpa)
2912 {
2913     state->link = !!(bmsr & BMSR_LSTATUS);
2914     state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
2915     /* If there is no link or autonegotiation is disabled, the LP advertisement
2916      * data is not meaningful, so don't go any further.
2917      */
2918     if (!state->link || !state->an_enabled)
2919         return;
2920
2921     switch (state->interface) {
2922     case PHY_INTERFACE_MODE_1000BASEX:
2923         phylink_decode_c37_word(state, lpa, SPEED_1000);
2924         break;
2925
2926     case PHY_INTERFACE_MODE_2500BASEX:
2927         phylink_decode_c37_word(state, lpa, SPEED_2500);
2928         break;
2929
2930     case PHY_INTERFACE_MODE_SGMII:
2931     case PHY_INTERFACE_MODE_QSGMII:
2932         phylink_decode_sgmii_word(state, lpa);
2933         break;
2934
2935     default:
2936         state->link = false;
2937         break;
2938     }
2939 }
2940 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
2941
2942 /**
2943  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
2944  * @pcs: a pointer to a &struct mdio_device.
2945  * @state: a pointer to a &struct phylink_link_state.
2946  *
2947  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
2948  * clause 37 negotiation and/or SGMII control.
2949  *
2950  * Read the MAC PCS state from the MII device configured in @config and
2951  * parse the Clause 37 or Cisco SGMII link partner negotiation word into
2952  * the phylink @state structure. This is suitable to be directly plugged
2953  * into the mac_pcs_get_state() member of the struct phylink_mac_ops
2954  * structure.
2955  */
2956 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
2957                    struct phylink_link_state *state)
2958 {
2959     int bmsr, lpa;
2960
2961     bmsr = mdiodev_read(pcs, MII_BMSR);
2962     lpa = mdiodev_read(pcs, MII_LPA);
2963     if (bmsr < 0 || lpa < 0) {
2964         state->link = false;
2965         return;
2966     }
2967
2968     phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
2969 }
2970 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
2971
2972 /**
2973  * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
2974  *  advertisement
2975  * @interface: the PHY interface mode being configured
2976  * @advertising: the ethtool advertisement mask
2977  *
2978  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
2979  * clause 37 negotiation and/or SGMII control.
2980  *
2981  * Encode the clause 37 PCS advertisement as specified by @interface and
2982  * @advertising.
2983  *
2984  * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
2985  */
2986 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
2987                          const unsigned long *advertising)
2988 {
2989     u16 adv;
2990
2991     switch (interface) {
2992     case PHY_INTERFACE_MODE_1000BASEX:
2993     case PHY_INTERFACE_MODE_2500BASEX:
2994         adv = ADVERTISE_1000XFULL;
2995         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
2996                       advertising))
2997             adv |= ADVERTISE_1000XPAUSE;
2998         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
2999                       advertising))
3000             adv |= ADVERTISE_1000XPSE_ASYM;
3001         return adv;
3002     case PHY_INTERFACE_MODE_SGMII:
3003     case PHY_INTERFACE_MODE_QSGMII:
3004         return 0x0001;
3005     default:
3006         /* Nothing to do for other modes */
3007         return -EINVAL;
3008     }
3009 }
3010 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3011
3012 /**
3013  * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3014  * @pcs: a pointer to a &struct mdio_device.
3015  * @mode: link autonegotiation mode
3016  * @interface: the PHY interface mode being configured
3017  * @advertising: the ethtool advertisement mask
3018  *
3019  * Configure a Clause 22 PCS PHY with the appropriate negotiation
3020  * parameters for the @mode, @interface and @advertising parameters.
3021  * Returns negative error number on failure, zero if the advertisement
3022  * has not changed, or positive if there is a change.
3023  */
3024 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode,
3025                    phy_interface_t interface,
3026                    const unsigned long *advertising)
3027 {
3028     bool changed = 0;
3029     u16 bmcr;
3030     int ret, adv;
3031
3032     adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3033     if (adv >= 0) {
3034         ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3035                          MII_ADVERTISE, 0xffff, adv);
3036         if (ret < 0)
3037             return ret;
3038         changed = ret;
3039     }
3040
3041     /* Ensure ISOLATE bit is disabled */
3042     if (mode == MLO_AN_INBAND &&
3043         (interface == PHY_INTERFACE_MODE_SGMII ||
3044          interface == PHY_INTERFACE_MODE_QSGMII ||
3045          linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising)))
3046         bmcr = BMCR_ANENABLE;
3047     else
3048         bmcr = 0;
3049
3050     ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3051     if (ret < 0)
3052         return ret;
3053
3054     return changed;
3055 }
3056 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3057
3058 /**
3059  * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3060  * @pcs: a pointer to a &struct mdio_device.
3061  *
3062  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3063  * clause 37 negotiation.
3064  *
3065  * Restart the clause 37 negotiation with the link partner. This is
3066  * suitable to be directly plugged into the mac_pcs_get_state() member
3067  * of the struct phylink_mac_ops structure.
3068  */
3069 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3070 {
3071     int val = mdiodev_read(pcs, MII_BMCR);
3072
3073     if (val >= 0) {
3074         val |= BMCR_ANRESTART;
3075
3076         mdiodev_write(pcs, MII_BMCR, val);
3077     }
3078 }
3079 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3080
3081 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3082                    struct phylink_link_state *state)
3083 {
3084     struct mii_bus *bus = pcs->bus;
3085     int addr = pcs->addr;
3086     int stat;
3087
3088     stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3089     if (stat < 0) {
3090         state->link = false;
3091         return;
3092     }
3093
3094     state->link = !!(stat & MDIO_STAT1_LSTATUS);
3095     if (!state->link)
3096         return;
3097
3098     switch (state->interface) {
3099     case PHY_INTERFACE_MODE_10GBASER:
3100         state->speed = SPEED_10000;
3101         state->duplex = DUPLEX_FULL;
3102         break;
3103
3104     default:
3105         break;
3106     }
3107 }
3108 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3109
3110 MODULE_LICENSE("GPL v2");