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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * AT86RF230/RF231 driver
0004  *
0005  * Copyright (C) 2009-2012 Siemens AG
0006  *
0007  * Written by:
0008  * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
0009  * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
0010  * Alexander Aring <aar@pengutronix.de>
0011  */
0012 #include <linux/kernel.h>
0013 #include <linux/module.h>
0014 #include <linux/hrtimer.h>
0015 #include <linux/jiffies.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/irq.h>
0018 #include <linux/gpio.h>
0019 #include <linux/delay.h>
0020 #include <linux/spi/spi.h>
0021 #include <linux/spi/at86rf230.h>
0022 #include <linux/regmap.h>
0023 #include <linux/skbuff.h>
0024 #include <linux/of_gpio.h>
0025 #include <linux/ieee802154.h>
0026 
0027 #include <net/mac802154.h>
0028 #include <net/cfg802154.h>
0029 
0030 #include "at86rf230.h"
0031 
0032 struct at86rf230_local;
0033 /* at86rf2xx chip depend data.
0034  * All timings are in us.
0035  */
0036 struct at86rf2xx_chip_data {
0037     u16 t_sleep_cycle;
0038     u16 t_channel_switch;
0039     u16 t_reset_to_off;
0040     u16 t_off_to_aack;
0041     u16 t_off_to_tx_on;
0042     u16 t_off_to_sleep;
0043     u16 t_sleep_to_off;
0044     u16 t_frame;
0045     u16 t_p_ack;
0046     int rssi_base_val;
0047 
0048     int (*set_channel)(struct at86rf230_local *, u8, u8);
0049     int (*set_txpower)(struct at86rf230_local *, s32);
0050 };
0051 
0052 #define AT86RF2XX_MAX_BUF       (127 + 3)
0053 /* tx retries to access the TX_ON state
0054  * if it's above then force change will be started.
0055  *
0056  * We assume the max_frame_retries (7) value of 802.15.4 here.
0057  */
0058 #define AT86RF2XX_MAX_TX_RETRIES    7
0059 /* We use the recommended 5 minutes timeout to recalibrate */
0060 #define AT86RF2XX_CAL_LOOP_TIMEOUT  (5 * 60 * HZ)
0061 
0062 struct at86rf230_state_change {
0063     struct at86rf230_local *lp;
0064     int irq;
0065 
0066     struct hrtimer timer;
0067     struct spi_message msg;
0068     struct spi_transfer trx;
0069     u8 buf[AT86RF2XX_MAX_BUF];
0070 
0071     void (*complete)(void *context);
0072     u8 from_state;
0073     u8 to_state;
0074     int trac;
0075 
0076     bool free;
0077 };
0078 
0079 struct at86rf230_local {
0080     struct spi_device *spi;
0081 
0082     struct ieee802154_hw *hw;
0083     struct at86rf2xx_chip_data *data;
0084     struct regmap *regmap;
0085     int slp_tr;
0086     bool sleep;
0087 
0088     struct completion state_complete;
0089     struct at86rf230_state_change state;
0090 
0091     unsigned long cal_timeout;
0092     bool is_tx;
0093     bool is_tx_from_off;
0094     bool was_tx;
0095     u8 tx_retry;
0096     struct sk_buff *tx_skb;
0097     struct at86rf230_state_change tx;
0098 };
0099 
0100 #define AT86RF2XX_NUMREGS 0x3F
0101 
0102 static void
0103 at86rf230_async_state_change(struct at86rf230_local *lp,
0104                  struct at86rf230_state_change *ctx,
0105                  const u8 state, void (*complete)(void *context));
0106 
0107 static inline void
0108 at86rf230_sleep(struct at86rf230_local *lp)
0109 {
0110     if (gpio_is_valid(lp->slp_tr)) {
0111         gpio_set_value(lp->slp_tr, 1);
0112         usleep_range(lp->data->t_off_to_sleep,
0113                  lp->data->t_off_to_sleep + 10);
0114         lp->sleep = true;
0115     }
0116 }
0117 
0118 static inline void
0119 at86rf230_awake(struct at86rf230_local *lp)
0120 {
0121     if (gpio_is_valid(lp->slp_tr)) {
0122         gpio_set_value(lp->slp_tr, 0);
0123         usleep_range(lp->data->t_sleep_to_off,
0124                  lp->data->t_sleep_to_off + 100);
0125         lp->sleep = false;
0126     }
0127 }
0128 
0129 static inline int
0130 __at86rf230_write(struct at86rf230_local *lp,
0131           unsigned int addr, unsigned int data)
0132 {
0133     bool sleep = lp->sleep;
0134     int ret;
0135 
0136     /* awake for register setting if sleep */
0137     if (sleep)
0138         at86rf230_awake(lp);
0139 
0140     ret = regmap_write(lp->regmap, addr, data);
0141 
0142     /* sleep again if was sleeping */
0143     if (sleep)
0144         at86rf230_sleep(lp);
0145 
0146     return ret;
0147 }
0148 
0149 static inline int
0150 __at86rf230_read(struct at86rf230_local *lp,
0151          unsigned int addr, unsigned int *data)
0152 {
0153     bool sleep = lp->sleep;
0154     int ret;
0155 
0156     /* awake for register setting if sleep */
0157     if (sleep)
0158         at86rf230_awake(lp);
0159 
0160     ret = regmap_read(lp->regmap, addr, data);
0161 
0162     /* sleep again if was sleeping */
0163     if (sleep)
0164         at86rf230_sleep(lp);
0165 
0166     return ret;
0167 }
0168 
0169 static inline int
0170 at86rf230_read_subreg(struct at86rf230_local *lp,
0171               unsigned int addr, unsigned int mask,
0172               unsigned int shift, unsigned int *data)
0173 {
0174     int rc;
0175 
0176     rc = __at86rf230_read(lp, addr, data);
0177     if (!rc)
0178         *data = (*data & mask) >> shift;
0179 
0180     return rc;
0181 }
0182 
0183 static inline int
0184 at86rf230_write_subreg(struct at86rf230_local *lp,
0185                unsigned int addr, unsigned int mask,
0186                unsigned int shift, unsigned int data)
0187 {
0188     bool sleep = lp->sleep;
0189     int ret;
0190 
0191     /* awake for register setting if sleep */
0192     if (sleep)
0193         at86rf230_awake(lp);
0194 
0195     ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
0196 
0197     /* sleep again if was sleeping */
0198     if (sleep)
0199         at86rf230_sleep(lp);
0200 
0201     return ret;
0202 }
0203 
0204 static inline void
0205 at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
0206 {
0207     gpio_set_value(lp->slp_tr, 1);
0208     udelay(1);
0209     gpio_set_value(lp->slp_tr, 0);
0210 }
0211 
0212 static bool
0213 at86rf230_reg_writeable(struct device *dev, unsigned int reg)
0214 {
0215     switch (reg) {
0216     case RG_TRX_STATE:
0217     case RG_TRX_CTRL_0:
0218     case RG_TRX_CTRL_1:
0219     case RG_PHY_TX_PWR:
0220     case RG_PHY_ED_LEVEL:
0221     case RG_PHY_CC_CCA:
0222     case RG_CCA_THRES:
0223     case RG_RX_CTRL:
0224     case RG_SFD_VALUE:
0225     case RG_TRX_CTRL_2:
0226     case RG_ANT_DIV:
0227     case RG_IRQ_MASK:
0228     case RG_VREG_CTRL:
0229     case RG_BATMON:
0230     case RG_XOSC_CTRL:
0231     case RG_RX_SYN:
0232     case RG_XAH_CTRL_1:
0233     case RG_FTN_CTRL:
0234     case RG_PLL_CF:
0235     case RG_PLL_DCU:
0236     case RG_SHORT_ADDR_0:
0237     case RG_SHORT_ADDR_1:
0238     case RG_PAN_ID_0:
0239     case RG_PAN_ID_1:
0240     case RG_IEEE_ADDR_0:
0241     case RG_IEEE_ADDR_1:
0242     case RG_IEEE_ADDR_2:
0243     case RG_IEEE_ADDR_3:
0244     case RG_IEEE_ADDR_4:
0245     case RG_IEEE_ADDR_5:
0246     case RG_IEEE_ADDR_6:
0247     case RG_IEEE_ADDR_7:
0248     case RG_XAH_CTRL_0:
0249     case RG_CSMA_SEED_0:
0250     case RG_CSMA_SEED_1:
0251     case RG_CSMA_BE:
0252         return true;
0253     default:
0254         return false;
0255     }
0256 }
0257 
0258 static bool
0259 at86rf230_reg_readable(struct device *dev, unsigned int reg)
0260 {
0261     bool rc;
0262 
0263     /* all writeable are also readable */
0264     rc = at86rf230_reg_writeable(dev, reg);
0265     if (rc)
0266         return rc;
0267 
0268     /* readonly regs */
0269     switch (reg) {
0270     case RG_TRX_STATUS:
0271     case RG_PHY_RSSI:
0272     case RG_IRQ_STATUS:
0273     case RG_PART_NUM:
0274     case RG_VERSION_NUM:
0275     case RG_MAN_ID_1:
0276     case RG_MAN_ID_0:
0277         return true;
0278     default:
0279         return false;
0280     }
0281 }
0282 
0283 static bool
0284 at86rf230_reg_volatile(struct device *dev, unsigned int reg)
0285 {
0286     /* can be changed during runtime */
0287     switch (reg) {
0288     case RG_TRX_STATUS:
0289     case RG_TRX_STATE:
0290     case RG_PHY_RSSI:
0291     case RG_PHY_ED_LEVEL:
0292     case RG_IRQ_STATUS:
0293     case RG_VREG_CTRL:
0294     case RG_PLL_CF:
0295     case RG_PLL_DCU:
0296         return true;
0297     default:
0298         return false;
0299     }
0300 }
0301 
0302 static bool
0303 at86rf230_reg_precious(struct device *dev, unsigned int reg)
0304 {
0305     /* don't clear irq line on read */
0306     switch (reg) {
0307     case RG_IRQ_STATUS:
0308         return true;
0309     default:
0310         return false;
0311     }
0312 }
0313 
0314 static const struct regmap_config at86rf230_regmap_spi_config = {
0315     .reg_bits = 8,
0316     .val_bits = 8,
0317     .write_flag_mask = CMD_REG | CMD_WRITE,
0318     .read_flag_mask = CMD_REG,
0319     .cache_type = REGCACHE_RBTREE,
0320     .max_register = AT86RF2XX_NUMREGS,
0321     .writeable_reg = at86rf230_reg_writeable,
0322     .readable_reg = at86rf230_reg_readable,
0323     .volatile_reg = at86rf230_reg_volatile,
0324     .precious_reg = at86rf230_reg_precious,
0325 };
0326 
0327 static void
0328 at86rf230_async_error_recover_complete(void *context)
0329 {
0330     struct at86rf230_state_change *ctx = context;
0331     struct at86rf230_local *lp = ctx->lp;
0332 
0333     if (ctx->free)
0334         kfree(ctx);
0335 
0336     if (lp->was_tx) {
0337         lp->was_tx = 0;
0338         ieee802154_xmit_hw_error(lp->hw, lp->tx_skb);
0339     }
0340 }
0341 
0342 static void
0343 at86rf230_async_error_recover(void *context)
0344 {
0345     struct at86rf230_state_change *ctx = context;
0346     struct at86rf230_local *lp = ctx->lp;
0347 
0348     if (lp->is_tx) {
0349         lp->was_tx = 1;
0350         lp->is_tx = 0;
0351     }
0352 
0353     at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
0354                      at86rf230_async_error_recover_complete);
0355 }
0356 
0357 static inline void
0358 at86rf230_async_error(struct at86rf230_local *lp,
0359               struct at86rf230_state_change *ctx, int rc)
0360 {
0361     dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
0362 
0363     at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
0364                      at86rf230_async_error_recover);
0365 }
0366 
0367 /* Generic function to get some register value in async mode */
0368 static void
0369 at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg,
0370              struct at86rf230_state_change *ctx,
0371              void (*complete)(void *context))
0372 {
0373     int rc;
0374 
0375     u8 *tx_buf = ctx->buf;
0376 
0377     tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
0378     ctx->msg.complete = complete;
0379     rc = spi_async(lp->spi, &ctx->msg);
0380     if (rc)
0381         at86rf230_async_error(lp, ctx, rc);
0382 }
0383 
0384 static void
0385 at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val,
0386               struct at86rf230_state_change *ctx,
0387               void (*complete)(void *context))
0388 {
0389     int rc;
0390 
0391     ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
0392     ctx->buf[1] = val;
0393     ctx->msg.complete = complete;
0394     rc = spi_async(lp->spi, &ctx->msg);
0395     if (rc)
0396         at86rf230_async_error(lp, ctx, rc);
0397 }
0398 
0399 static void
0400 at86rf230_async_state_assert(void *context)
0401 {
0402     struct at86rf230_state_change *ctx = context;
0403     struct at86rf230_local *lp = ctx->lp;
0404     const u8 *buf = ctx->buf;
0405     const u8 trx_state = buf[1] & TRX_STATE_MASK;
0406 
0407     /* Assert state change */
0408     if (trx_state != ctx->to_state) {
0409         /* Special handling if transceiver state is in
0410          * STATE_BUSY_RX_AACK and a SHR was detected.
0411          */
0412         if  (trx_state == STATE_BUSY_RX_AACK) {
0413             /* Undocumented race condition. If we send a state
0414              * change to STATE_RX_AACK_ON the transceiver could
0415              * change his state automatically to STATE_BUSY_RX_AACK
0416              * if a SHR was detected. This is not an error, but we
0417              * can't assert this.
0418              */
0419             if (ctx->to_state == STATE_RX_AACK_ON)
0420                 goto done;
0421 
0422             /* If we change to STATE_TX_ON without forcing and
0423              * transceiver state is STATE_BUSY_RX_AACK, we wait
0424              * 'tFrame + tPAck' receiving time. In this time the
0425              * PDU should be received. If the transceiver is still
0426              * in STATE_BUSY_RX_AACK, we run a force state change
0427              * to STATE_TX_ON. This is a timeout handling, if the
0428              * transceiver stucks in STATE_BUSY_RX_AACK.
0429              *
0430              * Additional we do several retries to try to get into
0431              * TX_ON state without forcing. If the retries are
0432              * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
0433              * will do a force change.
0434              */
0435             if (ctx->to_state == STATE_TX_ON ||
0436                 ctx->to_state == STATE_TRX_OFF) {
0437                 u8 state = ctx->to_state;
0438 
0439                 if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
0440                     state = STATE_FORCE_TRX_OFF;
0441                 lp->tx_retry++;
0442 
0443                 at86rf230_async_state_change(lp, ctx, state,
0444                                  ctx->complete);
0445                 return;
0446             }
0447         }
0448 
0449         dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
0450              ctx->from_state, ctx->to_state, trx_state);
0451     }
0452 
0453 done:
0454     if (ctx->complete)
0455         ctx->complete(context);
0456 }
0457 
0458 static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
0459 {
0460     struct at86rf230_state_change *ctx =
0461         container_of(timer, struct at86rf230_state_change, timer);
0462     struct at86rf230_local *lp = ctx->lp;
0463 
0464     at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
0465                  at86rf230_async_state_assert);
0466 
0467     return HRTIMER_NORESTART;
0468 }
0469 
0470 /* Do state change timing delay. */
0471 static void
0472 at86rf230_async_state_delay(void *context)
0473 {
0474     struct at86rf230_state_change *ctx = context;
0475     struct at86rf230_local *lp = ctx->lp;
0476     struct at86rf2xx_chip_data *c = lp->data;
0477     bool force = false;
0478     ktime_t tim;
0479 
0480     /* The force state changes are will show as normal states in the
0481      * state status subregister. We change the to_state to the
0482      * corresponding one and remember if it was a force change, this
0483      * differs if we do a state change from STATE_BUSY_RX_AACK.
0484      */
0485     switch (ctx->to_state) {
0486     case STATE_FORCE_TX_ON:
0487         ctx->to_state = STATE_TX_ON;
0488         force = true;
0489         break;
0490     case STATE_FORCE_TRX_OFF:
0491         ctx->to_state = STATE_TRX_OFF;
0492         force = true;
0493         break;
0494     default:
0495         break;
0496     }
0497 
0498     switch (ctx->from_state) {
0499     case STATE_TRX_OFF:
0500         switch (ctx->to_state) {
0501         case STATE_RX_AACK_ON:
0502             tim = c->t_off_to_aack * NSEC_PER_USEC;
0503             /* state change from TRX_OFF to RX_AACK_ON to do a
0504              * calibration, we need to reset the timeout for the
0505              * next one.
0506              */
0507             lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
0508             goto change;
0509         case STATE_TX_ARET_ON:
0510         case STATE_TX_ON:
0511             tim = c->t_off_to_tx_on * NSEC_PER_USEC;
0512             /* state change from TRX_OFF to TX_ON or ARET_ON to do
0513              * a calibration, we need to reset the timeout for the
0514              * next one.
0515              */
0516             lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
0517             goto change;
0518         default:
0519             break;
0520         }
0521         break;
0522     case STATE_BUSY_RX_AACK:
0523         switch (ctx->to_state) {
0524         case STATE_TRX_OFF:
0525         case STATE_TX_ON:
0526             /* Wait for worst case receiving time if we
0527              * didn't make a force change from BUSY_RX_AACK
0528              * to TX_ON or TRX_OFF.
0529              */
0530             if (!force) {
0531                 tim = (c->t_frame + c->t_p_ack) * NSEC_PER_USEC;
0532                 goto change;
0533             }
0534             break;
0535         default:
0536             break;
0537         }
0538         break;
0539     /* Default value, means RESET state */
0540     case STATE_P_ON:
0541         switch (ctx->to_state) {
0542         case STATE_TRX_OFF:
0543             tim = c->t_reset_to_off * NSEC_PER_USEC;
0544             goto change;
0545         default:
0546             break;
0547         }
0548         break;
0549     default:
0550         break;
0551     }
0552 
0553     /* Default delay is 1us in the most cases */
0554     udelay(1);
0555     at86rf230_async_state_timer(&ctx->timer);
0556     return;
0557 
0558 change:
0559     hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
0560 }
0561 
0562 static void
0563 at86rf230_async_state_change_start(void *context)
0564 {
0565     struct at86rf230_state_change *ctx = context;
0566     struct at86rf230_local *lp = ctx->lp;
0567     u8 *buf = ctx->buf;
0568     const u8 trx_state = buf[1] & TRX_STATE_MASK;
0569 
0570     /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
0571     if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
0572         udelay(1);
0573         at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
0574                      at86rf230_async_state_change_start);
0575         return;
0576     }
0577 
0578     /* Check if we already are in the state which we change in */
0579     if (trx_state == ctx->to_state) {
0580         if (ctx->complete)
0581             ctx->complete(context);
0582         return;
0583     }
0584 
0585     /* Set current state to the context of state change */
0586     ctx->from_state = trx_state;
0587 
0588     /* Going into the next step for a state change which do a timing
0589      * relevant delay.
0590      */
0591     at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx,
0592                   at86rf230_async_state_delay);
0593 }
0594 
0595 static void
0596 at86rf230_async_state_change(struct at86rf230_local *lp,
0597                  struct at86rf230_state_change *ctx,
0598                  const u8 state, void (*complete)(void *context))
0599 {
0600     /* Initialization for the state change context */
0601     ctx->to_state = state;
0602     ctx->complete = complete;
0603     at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
0604                  at86rf230_async_state_change_start);
0605 }
0606 
0607 static void
0608 at86rf230_sync_state_change_complete(void *context)
0609 {
0610     struct at86rf230_state_change *ctx = context;
0611     struct at86rf230_local *lp = ctx->lp;
0612 
0613     complete(&lp->state_complete);
0614 }
0615 
0616 /* This function do a sync framework above the async state change.
0617  * Some callbacks of the IEEE 802.15.4 driver interface need to be
0618  * handled synchronously.
0619  */
0620 static int
0621 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
0622 {
0623     unsigned long rc;
0624 
0625     at86rf230_async_state_change(lp, &lp->state, state,
0626                      at86rf230_sync_state_change_complete);
0627 
0628     rc = wait_for_completion_timeout(&lp->state_complete,
0629                      msecs_to_jiffies(100));
0630     if (!rc) {
0631         at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
0632         return -ETIMEDOUT;
0633     }
0634 
0635     return 0;
0636 }
0637 
0638 static void
0639 at86rf230_tx_complete(void *context)
0640 {
0641     struct at86rf230_state_change *ctx = context;
0642     struct at86rf230_local *lp = ctx->lp;
0643 
0644     if (ctx->trac == IEEE802154_SUCCESS)
0645         ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
0646     else
0647         ieee802154_xmit_error(lp->hw, lp->tx_skb, ctx->trac);
0648 
0649     kfree(ctx);
0650 }
0651 
0652 static void
0653 at86rf230_tx_on(void *context)
0654 {
0655     struct at86rf230_state_change *ctx = context;
0656     struct at86rf230_local *lp = ctx->lp;
0657 
0658     at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
0659                      at86rf230_tx_complete);
0660 }
0661 
0662 static void
0663 at86rf230_tx_trac_check(void *context)
0664 {
0665     struct at86rf230_state_change *ctx = context;
0666     struct at86rf230_local *lp = ctx->lp;
0667     u8 trac = TRAC_MASK(ctx->buf[1]);
0668 
0669     switch (trac) {
0670     case TRAC_SUCCESS:
0671     case TRAC_SUCCESS_DATA_PENDING:
0672         ctx->trac = IEEE802154_SUCCESS;
0673         break;
0674     case TRAC_CHANNEL_ACCESS_FAILURE:
0675         ctx->trac = IEEE802154_CHANNEL_ACCESS_FAILURE;
0676         break;
0677     case TRAC_NO_ACK:
0678         ctx->trac = IEEE802154_NO_ACK;
0679         break;
0680     default:
0681         ctx->trac = IEEE802154_SYSTEM_ERROR;
0682     }
0683 
0684     at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on);
0685 }
0686 
0687 static void
0688 at86rf230_rx_read_frame_complete(void *context)
0689 {
0690     struct at86rf230_state_change *ctx = context;
0691     struct at86rf230_local *lp = ctx->lp;
0692     const u8 *buf = ctx->buf;
0693     struct sk_buff *skb;
0694     u8 len, lqi;
0695 
0696     len = buf[1];
0697     if (!ieee802154_is_valid_psdu_len(len)) {
0698         dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
0699         len = IEEE802154_MTU;
0700     }
0701     lqi = buf[2 + len];
0702 
0703     skb = dev_alloc_skb(IEEE802154_MTU);
0704     if (!skb) {
0705         dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
0706         kfree(ctx);
0707         return;
0708     }
0709 
0710     skb_put_data(skb, buf + 2, len);
0711     ieee802154_rx_irqsafe(lp->hw, skb, lqi);
0712     kfree(ctx);
0713 }
0714 
0715 static void
0716 at86rf230_rx_trac_check(void *context)
0717 {
0718     struct at86rf230_state_change *ctx = context;
0719     struct at86rf230_local *lp = ctx->lp;
0720     u8 *buf = ctx->buf;
0721     int rc;
0722 
0723     buf[0] = CMD_FB;
0724     ctx->trx.len = AT86RF2XX_MAX_BUF;
0725     ctx->msg.complete = at86rf230_rx_read_frame_complete;
0726     rc = spi_async(lp->spi, &ctx->msg);
0727     if (rc) {
0728         ctx->trx.len = 2;
0729         at86rf230_async_error(lp, ctx, rc);
0730     }
0731 }
0732 
0733 static void
0734 at86rf230_irq_trx_end(void *context)
0735 {
0736     struct at86rf230_state_change *ctx = context;
0737     struct at86rf230_local *lp = ctx->lp;
0738 
0739     if (lp->is_tx) {
0740         lp->is_tx = 0;
0741         at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
0742                      at86rf230_tx_trac_check);
0743     } else {
0744         at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
0745                      at86rf230_rx_trac_check);
0746     }
0747 }
0748 
0749 static void
0750 at86rf230_irq_status(void *context)
0751 {
0752     struct at86rf230_state_change *ctx = context;
0753     struct at86rf230_local *lp = ctx->lp;
0754     const u8 *buf = ctx->buf;
0755     u8 irq = buf[1];
0756 
0757     enable_irq(lp->spi->irq);
0758 
0759     if (irq & IRQ_TRX_END) {
0760         at86rf230_irq_trx_end(ctx);
0761     } else {
0762         dev_err(&lp->spi->dev, "not supported irq %02x received\n",
0763             irq);
0764         kfree(ctx);
0765     }
0766 }
0767 
0768 static void
0769 at86rf230_setup_spi_messages(struct at86rf230_local *lp,
0770                  struct at86rf230_state_change *state)
0771 {
0772     state->lp = lp;
0773     state->irq = lp->spi->irq;
0774     spi_message_init(&state->msg);
0775     state->msg.context = state;
0776     state->trx.len = 2;
0777     state->trx.tx_buf = state->buf;
0778     state->trx.rx_buf = state->buf;
0779     spi_message_add_tail(&state->trx, &state->msg);
0780     hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
0781     state->timer.function = at86rf230_async_state_timer;
0782 }
0783 
0784 static irqreturn_t at86rf230_isr(int irq, void *data)
0785 {
0786     struct at86rf230_local *lp = data;
0787     struct at86rf230_state_change *ctx;
0788     int rc;
0789 
0790     disable_irq_nosync(irq);
0791 
0792     ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC);
0793     if (!ctx) {
0794         enable_irq(irq);
0795         return IRQ_NONE;
0796     }
0797 
0798     at86rf230_setup_spi_messages(lp, ctx);
0799     /* tell on error handling to free ctx */
0800     ctx->free = true;
0801 
0802     ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
0803     ctx->msg.complete = at86rf230_irq_status;
0804     rc = spi_async(lp->spi, &ctx->msg);
0805     if (rc) {
0806         at86rf230_async_error(lp, ctx, rc);
0807         enable_irq(irq);
0808         return IRQ_NONE;
0809     }
0810 
0811     return IRQ_HANDLED;
0812 }
0813 
0814 static void
0815 at86rf230_write_frame_complete(void *context)
0816 {
0817     struct at86rf230_state_change *ctx = context;
0818     struct at86rf230_local *lp = ctx->lp;
0819 
0820     ctx->trx.len = 2;
0821 
0822     if (gpio_is_valid(lp->slp_tr))
0823         at86rf230_slp_tr_rising_edge(lp);
0824     else
0825         at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx,
0826                       NULL);
0827 }
0828 
0829 static void
0830 at86rf230_write_frame(void *context)
0831 {
0832     struct at86rf230_state_change *ctx = context;
0833     struct at86rf230_local *lp = ctx->lp;
0834     struct sk_buff *skb = lp->tx_skb;
0835     u8 *buf = ctx->buf;
0836     int rc;
0837 
0838     lp->is_tx = 1;
0839 
0840     buf[0] = CMD_FB | CMD_WRITE;
0841     buf[1] = skb->len + 2;
0842     memcpy(buf + 2, skb->data, skb->len);
0843     ctx->trx.len = skb->len + 2;
0844     ctx->msg.complete = at86rf230_write_frame_complete;
0845     rc = spi_async(lp->spi, &ctx->msg);
0846     if (rc) {
0847         ctx->trx.len = 2;
0848         at86rf230_async_error(lp, ctx, rc);
0849     }
0850 }
0851 
0852 static void
0853 at86rf230_xmit_tx_on(void *context)
0854 {
0855     struct at86rf230_state_change *ctx = context;
0856     struct at86rf230_local *lp = ctx->lp;
0857 
0858     at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
0859                      at86rf230_write_frame);
0860 }
0861 
0862 static void
0863 at86rf230_xmit_start(void *context)
0864 {
0865     struct at86rf230_state_change *ctx = context;
0866     struct at86rf230_local *lp = ctx->lp;
0867 
0868     /* check if we change from off state */
0869     if (lp->is_tx_from_off)
0870         at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
0871                          at86rf230_write_frame);
0872     else
0873         at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
0874                          at86rf230_xmit_tx_on);
0875 }
0876 
0877 static int
0878 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
0879 {
0880     struct at86rf230_local *lp = hw->priv;
0881     struct at86rf230_state_change *ctx = &lp->tx;
0882 
0883     lp->tx_skb = skb;
0884     lp->tx_retry = 0;
0885 
0886     /* After 5 minutes in PLL and the same frequency we run again the
0887      * calibration loops which is recommended by at86rf2xx datasheets.
0888      *
0889      * The calibration is initiate by a state change from TRX_OFF
0890      * to TX_ON, the lp->cal_timeout should be reinit by state_delay
0891      * function then to start in the next 5 minutes.
0892      */
0893     if (time_is_before_jiffies(lp->cal_timeout)) {
0894         lp->is_tx_from_off = true;
0895         at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
0896                          at86rf230_xmit_start);
0897     } else {
0898         lp->is_tx_from_off = false;
0899         at86rf230_xmit_start(ctx);
0900     }
0901 
0902     return 0;
0903 }
0904 
0905 static int
0906 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
0907 {
0908     WARN_ON(!level);
0909     *level = 0xbe;
0910     return 0;
0911 }
0912 
0913 static int
0914 at86rf230_start(struct ieee802154_hw *hw)
0915 {
0916     struct at86rf230_local *lp = hw->priv;
0917 
0918     at86rf230_awake(lp);
0919     enable_irq(lp->spi->irq);
0920 
0921     return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
0922 }
0923 
0924 static void
0925 at86rf230_stop(struct ieee802154_hw *hw)
0926 {
0927     struct at86rf230_local *lp = hw->priv;
0928     u8 csma_seed[2];
0929 
0930     at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
0931 
0932     disable_irq(lp->spi->irq);
0933 
0934     /* It's recommended to set random new csma_seeds before sleep state.
0935      * Makes only sense in the stop callback, not doing this inside of
0936      * at86rf230_sleep, this is also used when we don't transmit afterwards
0937      * when calling start callback again.
0938      */
0939     get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
0940     at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
0941     at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
0942 
0943     at86rf230_sleep(lp);
0944 }
0945 
0946 static int
0947 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
0948 {
0949     return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
0950 }
0951 
0952 #define AT86RF2XX_MAX_ED_LEVELS 0xF
0953 static const s32 at86rf233_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
0954     -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000, -7800, -7600,
0955     -7400, -7200, -7000, -6800, -6600, -6400,
0956 };
0957 
0958 static const s32 at86rf231_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
0959     -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
0960     -7100, -6900, -6700, -6500, -6300, -6100,
0961 };
0962 
0963 static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
0964     -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
0965     -8000, -7800, -7600, -7400, -7200, -7000,
0966 };
0967 
0968 static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
0969     -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
0970     -7800, -7600, -7400, -7200, -7000, -6800,
0971 };
0972 
0973 static inline int
0974 at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
0975 {
0976     unsigned int cca_ed_thres;
0977     int rc;
0978 
0979     rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
0980     if (rc < 0)
0981         return rc;
0982 
0983     switch (rssi_base_val) {
0984     case -98:
0985         lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
0986         lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
0987         lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
0988         break;
0989     case -100:
0990         lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
0991         lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
0992         lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
0993         break;
0994     default:
0995         WARN_ON(1);
0996     }
0997 
0998     return 0;
0999 }
1000 
1001 static int
1002 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1003 {
1004     int rc;
1005 
1006     if (channel == 0)
1007         rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1008     else
1009         rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1010     if (rc < 0)
1011         return rc;
1012 
1013     if (page == 0) {
1014         rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1015         lp->data->rssi_base_val = -100;
1016     } else {
1017         rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1018         lp->data->rssi_base_val = -98;
1019     }
1020     if (rc < 0)
1021         return rc;
1022 
1023     rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
1024     if (rc < 0)
1025         return rc;
1026 
1027     return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1028 }
1029 
1030 static int
1031 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1032 {
1033     struct at86rf230_local *lp = hw->priv;
1034     int rc;
1035 
1036     rc = lp->data->set_channel(lp, page, channel);
1037     /* Wait for PLL */
1038     usleep_range(lp->data->t_channel_switch,
1039              lp->data->t_channel_switch + 10);
1040 
1041     lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
1042     return rc;
1043 }
1044 
1045 static int
1046 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1047                struct ieee802154_hw_addr_filt *filt,
1048                unsigned long changed)
1049 {
1050     struct at86rf230_local *lp = hw->priv;
1051 
1052     if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1053         u16 addr = le16_to_cpu(filt->short_addr);
1054 
1055         dev_vdbg(&lp->spi->dev, "%s called for saddr\n", __func__);
1056         __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1057         __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1058     }
1059 
1060     if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1061         u16 pan = le16_to_cpu(filt->pan_id);
1062 
1063         dev_vdbg(&lp->spi->dev, "%s called for pan id\n", __func__);
1064         __at86rf230_write(lp, RG_PAN_ID_0, pan);
1065         __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1066     }
1067 
1068     if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1069         u8 i, addr[8];
1070 
1071         memcpy(addr, &filt->ieee_addr, 8);
1072         dev_vdbg(&lp->spi->dev, "%s called for IEEE addr\n", __func__);
1073         for (i = 0; i < 8; i++)
1074             __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1075     }
1076 
1077     if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1078         dev_vdbg(&lp->spi->dev, "%s called for panc change\n", __func__);
1079         if (filt->pan_coord)
1080             at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1081         else
1082             at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1083     }
1084 
1085     return 0;
1086 }
1087 
1088 #define AT86RF23X_MAX_TX_POWERS 0xF
1089 static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1090     400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
1091     -800, -1200, -1700,
1092 };
1093 
1094 static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1095     300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
1096     -900, -1200, -1700,
1097 };
1098 
1099 #define AT86RF212_MAX_TX_POWERS 0x1F
1100 static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
1101     500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
1102     -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
1103     -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
1104 };
1105 
1106 static int
1107 at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
1108 {
1109     u32 i;
1110 
1111     for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1112         if (lp->hw->phy->supported.tx_powers[i] == mbm)
1113             return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
1114     }
1115 
1116     return -EINVAL;
1117 }
1118 
1119 static int
1120 at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
1121 {
1122     u32 i;
1123 
1124     for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1125         if (lp->hw->phy->supported.tx_powers[i] == mbm)
1126             return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
1127     }
1128 
1129     return -EINVAL;
1130 }
1131 
1132 static int
1133 at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
1134 {
1135     struct at86rf230_local *lp = hw->priv;
1136 
1137     return lp->data->set_txpower(lp, mbm);
1138 }
1139 
1140 static int
1141 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1142 {
1143     struct at86rf230_local *lp = hw->priv;
1144 
1145     return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1146 }
1147 
1148 static int
1149 at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1150                const struct wpan_phy_cca *cca)
1151 {
1152     struct at86rf230_local *lp = hw->priv;
1153     u8 val;
1154 
1155     /* mapping 802.15.4 to driver spec */
1156     switch (cca->mode) {
1157     case NL802154_CCA_ENERGY:
1158         val = 1;
1159         break;
1160     case NL802154_CCA_CARRIER:
1161         val = 2;
1162         break;
1163     case NL802154_CCA_ENERGY_CARRIER:
1164         switch (cca->opt) {
1165         case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1166             val = 3;
1167             break;
1168         case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1169             val = 0;
1170             break;
1171         default:
1172             return -EINVAL;
1173         }
1174         break;
1175     default:
1176         return -EINVAL;
1177     }
1178 
1179     return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1180 }
1181 
1182 static int
1183 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
1184 {
1185     struct at86rf230_local *lp = hw->priv;
1186     u32 i;
1187 
1188     for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
1189         if (hw->phy->supported.cca_ed_levels[i] == mbm)
1190             return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
1191     }
1192 
1193     return -EINVAL;
1194 }
1195 
1196 static int
1197 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1198               u8 retries)
1199 {
1200     struct at86rf230_local *lp = hw->priv;
1201     int rc;
1202 
1203     rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1204     if (rc)
1205         return rc;
1206 
1207     rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1208     if (rc)
1209         return rc;
1210 
1211     return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1212 }
1213 
1214 static int
1215 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1216 {
1217     struct at86rf230_local *lp = hw->priv;
1218 
1219     return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1220 }
1221 
1222 static int
1223 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1224 {
1225     struct at86rf230_local *lp = hw->priv;
1226     int rc;
1227 
1228     if (on) {
1229         rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1230         if (rc < 0)
1231             return rc;
1232 
1233         rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1234         if (rc < 0)
1235             return rc;
1236     } else {
1237         rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1238         if (rc < 0)
1239             return rc;
1240 
1241         rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1242         if (rc < 0)
1243             return rc;
1244     }
1245 
1246     return 0;
1247 }
1248 
1249 static const struct ieee802154_ops at86rf230_ops = {
1250     .owner = THIS_MODULE,
1251     .xmit_async = at86rf230_xmit,
1252     .ed = at86rf230_ed,
1253     .set_channel = at86rf230_channel,
1254     .start = at86rf230_start,
1255     .stop = at86rf230_stop,
1256     .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1257     .set_txpower = at86rf230_set_txpower,
1258     .set_lbt = at86rf230_set_lbt,
1259     .set_cca_mode = at86rf230_set_cca_mode,
1260     .set_cca_ed_level = at86rf230_set_cca_ed_level,
1261     .set_csma_params = at86rf230_set_csma_params,
1262     .set_frame_retries = at86rf230_set_frame_retries,
1263     .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1264 };
1265 
1266 static struct at86rf2xx_chip_data at86rf233_data = {
1267     .t_sleep_cycle = 330,
1268     .t_channel_switch = 11,
1269     .t_reset_to_off = 26,
1270     .t_off_to_aack = 80,
1271     .t_off_to_tx_on = 80,
1272     .t_off_to_sleep = 35,
1273     .t_sleep_to_off = 1000,
1274     .t_frame = 4096,
1275     .t_p_ack = 545,
1276     .rssi_base_val = -94,
1277     .set_channel = at86rf23x_set_channel,
1278     .set_txpower = at86rf23x_set_txpower,
1279 };
1280 
1281 static struct at86rf2xx_chip_data at86rf231_data = {
1282     .t_sleep_cycle = 330,
1283     .t_channel_switch = 24,
1284     .t_reset_to_off = 37,
1285     .t_off_to_aack = 110,
1286     .t_off_to_tx_on = 110,
1287     .t_off_to_sleep = 35,
1288     .t_sleep_to_off = 1000,
1289     .t_frame = 4096,
1290     .t_p_ack = 545,
1291     .rssi_base_val = -91,
1292     .set_channel = at86rf23x_set_channel,
1293     .set_txpower = at86rf23x_set_txpower,
1294 };
1295 
1296 static struct at86rf2xx_chip_data at86rf212_data = {
1297     .t_sleep_cycle = 330,
1298     .t_channel_switch = 11,
1299     .t_reset_to_off = 26,
1300     .t_off_to_aack = 200,
1301     .t_off_to_tx_on = 200,
1302     .t_off_to_sleep = 35,
1303     .t_sleep_to_off = 1000,
1304     .t_frame = 4096,
1305     .t_p_ack = 545,
1306     .rssi_base_val = -100,
1307     .set_channel = at86rf212_set_channel,
1308     .set_txpower = at86rf212_set_txpower,
1309 };
1310 
1311 static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1312 {
1313     int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1314     unsigned int dvdd;
1315     u8 csma_seed[2];
1316 
1317     rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1318     if (rc)
1319         return rc;
1320 
1321     irq_type = irq_get_trigger_type(lp->spi->irq);
1322     if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1323         irq_type == IRQ_TYPE_LEVEL_LOW)
1324         irq_pol = IRQ_ACTIVE_LOW;
1325 
1326     rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1327     if (rc)
1328         return rc;
1329 
1330     rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1331     if (rc)
1332         return rc;
1333 
1334     rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1335     if (rc)
1336         return rc;
1337 
1338     /* reset values differs in at86rf231 and at86rf233 */
1339     rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1340     if (rc)
1341         return rc;
1342 
1343     get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1344     rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1345     if (rc)
1346         return rc;
1347     rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1348     if (rc)
1349         return rc;
1350 
1351     /* CLKM changes are applied immediately */
1352     rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1353     if (rc)
1354         return rc;
1355 
1356     /* Turn CLKM Off */
1357     rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1358     if (rc)
1359         return rc;
1360     /* Wait the next SLEEP cycle */
1361     usleep_range(lp->data->t_sleep_cycle,
1362              lp->data->t_sleep_cycle + 100);
1363 
1364     /* xtal_trim value is calculated by:
1365      * CL = 0.5 * (CX + CTRIM + CPAR)
1366      *
1367      * whereas:
1368      * CL = capacitor of used crystal
1369      * CX = connected capacitors at xtal pins
1370      * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1371      *    but this is different on each board setup. You need to fine
1372      *    tuning this value via CTRIM.
1373      * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1374      *     0 pF upto 4.5 pF.
1375      *
1376      * Examples:
1377      * atben transceiver:
1378      *
1379      * CL = 8 pF
1380      * CX = 12 pF
1381      * CPAR = 3 pF (We assume the magic constant from datasheet)
1382      * CTRIM = 0.9 pF
1383      *
1384      * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1385      *
1386      * xtal_trim = 0x3
1387      *
1388      * openlabs transceiver:
1389      *
1390      * CL = 16 pF
1391      * CX = 22 pF
1392      * CPAR = 3 pF (We assume the magic constant from datasheet)
1393      * CTRIM = 4.5 pF
1394      *
1395      * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1396      *
1397      * xtal_trim = 0xf
1398      */
1399     rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1400     if (rc)
1401         return rc;
1402 
1403     rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1404     if (rc)
1405         return rc;
1406     if (!dvdd) {
1407         dev_err(&lp->spi->dev, "DVDD error\n");
1408         return -EINVAL;
1409     }
1410 
1411     /* Force setting slotted operation bit to 0. Sometimes the atben
1412      * sets this bit and I don't know why. We set this always force
1413      * to zero while probing.
1414      */
1415     return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1416 }
1417 
1418 static int
1419 at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
1420             u8 *xtal_trim)
1421 {
1422     struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1423     int ret;
1424 
1425     if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
1426         if (!pdata)
1427             return -ENOENT;
1428 
1429         *rstn = pdata->rstn;
1430         *slp_tr = pdata->slp_tr;
1431         *xtal_trim = pdata->xtal_trim;
1432         return 0;
1433     }
1434 
1435     *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1436     *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1437     ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
1438     if (ret < 0 && ret != -EINVAL)
1439         return ret;
1440 
1441     return 0;
1442 }
1443 
1444 static int
1445 at86rf230_detect_device(struct at86rf230_local *lp)
1446 {
1447     unsigned int part, version, val;
1448     u16 man_id = 0;
1449     const char *chip;
1450     int rc;
1451 
1452     rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1453     if (rc)
1454         return rc;
1455     man_id |= val;
1456 
1457     rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1458     if (rc)
1459         return rc;
1460     man_id |= (val << 8);
1461 
1462     rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1463     if (rc)
1464         return rc;
1465 
1466     rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1467     if (rc)
1468         return rc;
1469 
1470     if (man_id != 0x001f) {
1471         dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1472             man_id >> 8, man_id & 0xFF);
1473         return -EINVAL;
1474     }
1475 
1476     lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
1477             IEEE802154_HW_CSMA_PARAMS |
1478             IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
1479             IEEE802154_HW_PROMISCUOUS;
1480 
1481     lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
1482                  WPAN_PHY_FLAG_CCA_ED_LEVEL |
1483                  WPAN_PHY_FLAG_CCA_MODE;
1484 
1485     lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
1486         BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
1487     lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
1488         BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
1489 
1490     lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1491 
1492     switch (part) {
1493     case 2:
1494         chip = "at86rf230";
1495         rc = -ENOTSUPP;
1496         goto not_supp;
1497     case 3:
1498         chip = "at86rf231";
1499         lp->data = &at86rf231_data;
1500         lp->hw->phy->supported.channels[0] = 0x7FFF800;
1501         lp->hw->phy->current_channel = 11;
1502         lp->hw->phy->supported.tx_powers = at86rf231_powers;
1503         lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
1504         lp->hw->phy->supported.cca_ed_levels = at86rf231_ed_levels;
1505         lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf231_ed_levels);
1506         break;
1507     case 7:
1508         chip = "at86rf212";
1509         lp->data = &at86rf212_data;
1510         lp->hw->flags |= IEEE802154_HW_LBT;
1511         lp->hw->phy->supported.channels[0] = 0x00007FF;
1512         lp->hw->phy->supported.channels[2] = 0x00007FF;
1513         lp->hw->phy->current_channel = 5;
1514         lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
1515         lp->hw->phy->supported.tx_powers = at86rf212_powers;
1516         lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
1517         lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1518         lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1519         break;
1520     case 11:
1521         chip = "at86rf233";
1522         lp->data = &at86rf233_data;
1523         lp->hw->phy->supported.channels[0] = 0x7FFF800;
1524         lp->hw->phy->current_channel = 13;
1525         lp->hw->phy->supported.tx_powers = at86rf233_powers;
1526         lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
1527         lp->hw->phy->supported.cca_ed_levels = at86rf233_ed_levels;
1528         lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf233_ed_levels);
1529         break;
1530     default:
1531         chip = "unknown";
1532         rc = -ENOTSUPP;
1533         goto not_supp;
1534     }
1535 
1536     lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
1537     lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
1538 
1539 not_supp:
1540     dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1541 
1542     return rc;
1543 }
1544 
1545 static int at86rf230_probe(struct spi_device *spi)
1546 {
1547     struct ieee802154_hw *hw;
1548     struct at86rf230_local *lp;
1549     unsigned int status;
1550     int rc, irq_type, rstn, slp_tr;
1551     u8 xtal_trim = 0;
1552 
1553     if (!spi->irq) {
1554         dev_err(&spi->dev, "no IRQ specified\n");
1555         return -EINVAL;
1556     }
1557 
1558     rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
1559     if (rc < 0) {
1560         dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
1561         return rc;
1562     }
1563 
1564     if (gpio_is_valid(rstn)) {
1565         rc = devm_gpio_request_one(&spi->dev, rstn,
1566                        GPIOF_OUT_INIT_HIGH, "rstn");
1567         if (rc)
1568             return rc;
1569     }
1570 
1571     if (gpio_is_valid(slp_tr)) {
1572         rc = devm_gpio_request_one(&spi->dev, slp_tr,
1573                        GPIOF_OUT_INIT_LOW, "slp_tr");
1574         if (rc)
1575             return rc;
1576     }
1577 
1578     /* Reset */
1579     if (gpio_is_valid(rstn)) {
1580         udelay(1);
1581         gpio_set_value_cansleep(rstn, 0);
1582         udelay(1);
1583         gpio_set_value_cansleep(rstn, 1);
1584         usleep_range(120, 240);
1585     }
1586 
1587     hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1588     if (!hw)
1589         return -ENOMEM;
1590 
1591     lp = hw->priv;
1592     lp->hw = hw;
1593     lp->spi = spi;
1594     lp->slp_tr = slp_tr;
1595     hw->parent = &spi->dev;
1596     ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1597 
1598     lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1599     if (IS_ERR(lp->regmap)) {
1600         rc = PTR_ERR(lp->regmap);
1601         dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1602             rc);
1603         goto free_dev;
1604     }
1605 
1606     at86rf230_setup_spi_messages(lp, &lp->state);
1607     at86rf230_setup_spi_messages(lp, &lp->tx);
1608 
1609     rc = at86rf230_detect_device(lp);
1610     if (rc < 0)
1611         goto free_dev;
1612 
1613     init_completion(&lp->state_complete);
1614 
1615     spi_set_drvdata(spi, lp);
1616 
1617     rc = at86rf230_hw_init(lp, xtal_trim);
1618     if (rc)
1619         goto free_dev;
1620 
1621     /* Read irq status register to reset irq line */
1622     rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1623     if (rc)
1624         goto free_dev;
1625 
1626     irq_type = irq_get_trigger_type(spi->irq);
1627     if (!irq_type)
1628         irq_type = IRQF_TRIGGER_HIGH;
1629 
1630     rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1631                   IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1632     if (rc)
1633         goto free_dev;
1634 
1635     /* disable_irq by default and wait for starting hardware */
1636     disable_irq(spi->irq);
1637 
1638     /* going into sleep by default */
1639     at86rf230_sleep(lp);
1640 
1641     rc = ieee802154_register_hw(lp->hw);
1642     if (rc)
1643         goto free_dev;
1644 
1645     return rc;
1646 
1647 free_dev:
1648     ieee802154_free_hw(lp->hw);
1649 
1650     return rc;
1651 }
1652 
1653 static void at86rf230_remove(struct spi_device *spi)
1654 {
1655     struct at86rf230_local *lp = spi_get_drvdata(spi);
1656 
1657     /* mask all at86rf230 irq's */
1658     at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1659     ieee802154_unregister_hw(lp->hw);
1660     ieee802154_free_hw(lp->hw);
1661     dev_dbg(&spi->dev, "unregistered at86rf230\n");
1662 }
1663 
1664 static const struct of_device_id at86rf230_of_match[] = {
1665     { .compatible = "atmel,at86rf230", },
1666     { .compatible = "atmel,at86rf231", },
1667     { .compatible = "atmel,at86rf233", },
1668     { .compatible = "atmel,at86rf212", },
1669     { },
1670 };
1671 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1672 
1673 static const struct spi_device_id at86rf230_device_id[] = {
1674     { .name = "at86rf230", },
1675     { .name = "at86rf231", },
1676     { .name = "at86rf233", },
1677     { .name = "at86rf212", },
1678     { },
1679 };
1680 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1681 
1682 static struct spi_driver at86rf230_driver = {
1683     .id_table = at86rf230_device_id,
1684     .driver = {
1685         .of_match_table = of_match_ptr(at86rf230_of_match),
1686         .name   = "at86rf230",
1687     },
1688     .probe      = at86rf230_probe,
1689     .remove     = at86rf230_remove,
1690 };
1691 
1692 module_spi_driver(at86rf230_driver);
1693 
1694 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1695 MODULE_LICENSE("GPL v2");