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0030 #include <linux/module.h>
0031 #include <linux/types.h>
0032 #include <linux/net.h>
0033 #include <linux/in.h>
0034 #include <linux/if.h>
0035 #include <linux/slab.h>
0036 #include <linux/errno.h>
0037 #include <linux/bitops.h>
0038 #include <linux/random.h>
0039 #include <asm/io.h>
0040 #include <linux/interrupt.h>
0041 #include <linux/ioport.h>
0042 #include <linux/firmware.h>
0043 #include <linux/platform_device.h>
0044
0045 #include <linux/netdevice.h>
0046 #include <linux/if_arp.h>
0047 #include <linux/etherdevice.h>
0048 #include <linux/skbuff.h>
0049 #include <net/ax25.h>
0050
0051 #include <linux/kernel.h>
0052 #include <linux/proc_fs.h>
0053 #include <linux/seq_file.h>
0054 #include <net/net_namespace.h>
0055
0056 #include <linux/uaccess.h>
0057 #include <linux/init.h>
0058
0059 #include <linux/yam.h>
0060
0061
0062
0063 static const char yam_drvname[] = "yam";
0064 static const char yam_drvinfo[] __initconst = KERN_INFO \
0065 "YAM driver version 0.8 by F1OAT/F6FBB\n";
0066
0067
0068
0069 #define FIRMWARE_9600 "yam/9600.bin"
0070 #define FIRMWARE_1200 "yam/1200.bin"
0071
0072 #define YAM_9600 1
0073 #define YAM_1200 2
0074
0075 #define NR_PORTS 4
0076 #define YAM_MAGIC 0xF10A7654
0077
0078
0079
0080 #define TX_OFF 0
0081 #define TX_HEAD 1
0082 #define TX_DATA 2
0083 #define TX_CRC1 3
0084 #define TX_CRC2 4
0085 #define TX_TAIL 5
0086
0087 #define YAM_MAX_FRAME 1024
0088
0089 #define DEFAULT_BITRATE 9600
0090 #define DEFAULT_HOLDD 10
0091 #define DEFAULT_TXD 300
0092 #define DEFAULT_TXTAIL 10
0093 #define DEFAULT_SLOT 100
0094 #define DEFAULT_PERS 64
0095
0096 struct yam_port {
0097 int magic;
0098 int bitrate;
0099 int baudrate;
0100 int iobase;
0101 int irq;
0102 int dupmode;
0103
0104 struct net_device *dev;
0105
0106 int nb_rxint;
0107 int nb_mdint;
0108
0109
0110
0111 int txd;
0112 int holdd;
0113 int txtail;
0114 int slot;
0115 int pers;
0116
0117
0118
0119 int tx_state;
0120 int tx_count;
0121 int slotcnt;
0122 unsigned char tx_buf[YAM_MAX_FRAME];
0123 int tx_len;
0124 int tx_crcl, tx_crch;
0125 struct sk_buff_head send_queue;
0126
0127
0128
0129 int dcd;
0130 unsigned char rx_buf[YAM_MAX_FRAME];
0131 int rx_len;
0132 int rx_crcl, rx_crch;
0133 };
0134
0135 struct yam_mcs {
0136 unsigned char bits[YAM_FPGA_SIZE];
0137 int bitrate;
0138 struct yam_mcs *next;
0139 };
0140
0141 static struct net_device *yam_devs[NR_PORTS];
0142
0143 static struct yam_mcs *yam_data;
0144
0145 static DEFINE_TIMER(yam_timer, NULL);
0146
0147
0148
0149 #define RBR(iobase) (iobase+0)
0150 #define THR(iobase) (iobase+0)
0151 #define IER(iobase) (iobase+1)
0152 #define IIR(iobase) (iobase+2)
0153 #define FCR(iobase) (iobase+2)
0154 #define LCR(iobase) (iobase+3)
0155 #define MCR(iobase) (iobase+4)
0156 #define LSR(iobase) (iobase+5)
0157 #define MSR(iobase) (iobase+6)
0158 #define SCR(iobase) (iobase+7)
0159 #define DLL(iobase) (iobase+0)
0160 #define DLM(iobase) (iobase+1)
0161
0162 #define YAM_EXTENT 8
0163
0164
0165 #define IIR_NOPEND 1
0166 #define IIR_MSR 0
0167 #define IIR_TX 2
0168 #define IIR_RX 4
0169 #define IIR_LSR 6
0170 #define IIR_TIMEOUT 12
0171
0172 #define IIR_MASK 0x0F
0173
0174
0175 #define IER_RX 1
0176 #define IER_TX 2
0177 #define IER_LSR 4
0178 #define IER_MSR 8
0179
0180
0181 #define MCR_DTR 0x01
0182 #define MCR_RTS 0x02
0183 #define MCR_OUT1 0x04
0184 #define MCR_OUT2 0x08
0185 #define MCR_LOOP 0x10
0186
0187
0188 #define MSR_DCTS 0x01
0189 #define MSR_DDSR 0x02
0190 #define MSR_DRIN 0x04
0191 #define MSR_DDCD 0x08
0192 #define MSR_CTS 0x10
0193 #define MSR_DSR 0x20
0194 #define MSR_RING 0x40
0195 #define MSR_DCD 0x80
0196
0197
0198 #define LSR_RXC 0x01
0199 #define LSR_OE 0x02
0200 #define LSR_PE 0x04
0201 #define LSR_FE 0x08
0202 #define LSR_BREAK 0x10
0203 #define LSR_THRE 0x20
0204 #define LSR_TSRE 0x40
0205
0206
0207 #define LCR_DLAB 0x80
0208 #define LCR_BREAK 0x40
0209 #define LCR_PZERO 0x28
0210 #define LCR_PEVEN 0x18
0211 #define LCR_PODD 0x08
0212 #define LCR_STOP1 0x00
0213 #define LCR_STOP2 0x04
0214 #define LCR_BIT5 0x00
0215 #define LCR_BIT6 0x02
0216 #define LCR_BIT7 0x01
0217 #define LCR_BIT8 0x03
0218
0219
0220
0221 #define TX_RDY MSR_DCTS
0222 #define RX_DCD MSR_DCD
0223 #define RX_FLAG MSR_RING
0224 #define FPGA_DONE MSR_DSR
0225 #define PTT_ON (MCR_RTS|MCR_OUT2)
0226 #define PTT_OFF (MCR_DTR|MCR_OUT2)
0227
0228 #define ENABLE_RXINT IER_RX
0229 #define ENABLE_TXINT IER_MSR
0230 #define ENABLE_RTXINT (IER_RX|IER_MSR)
0231
0232
0233
0234
0235
0236
0237 static const unsigned char chktabl[256] =
0238 {0x00, 0x89, 0x12, 0x9b, 0x24, 0xad, 0x36, 0xbf, 0x48, 0xc1, 0x5a, 0xd3, 0x6c, 0xe5, 0x7e,
0239 0xf7, 0x81, 0x08, 0x93, 0x1a, 0xa5, 0x2c, 0xb7, 0x3e, 0xc9, 0x40, 0xdb, 0x52, 0xed, 0x64,
0240 0xff, 0x76, 0x02, 0x8b, 0x10, 0x99, 0x26, 0xaf, 0x34, 0xbd, 0x4a, 0xc3, 0x58, 0xd1, 0x6e,
0241 0xe7, 0x7c, 0xf5, 0x83, 0x0a, 0x91, 0x18, 0xa7, 0x2e, 0xb5, 0x3c, 0xcb, 0x42, 0xd9, 0x50,
0242 0xef, 0x66, 0xfd, 0x74, 0x04, 0x8d, 0x16, 0x9f, 0x20, 0xa9, 0x32, 0xbb, 0x4c, 0xc5, 0x5e,
0243 0xd7, 0x68, 0xe1, 0x7a, 0xf3, 0x85, 0x0c, 0x97, 0x1e, 0xa1, 0x28, 0xb3, 0x3a, 0xcd, 0x44,
0244 0xdf, 0x56, 0xe9, 0x60, 0xfb, 0x72, 0x06, 0x8f, 0x14, 0x9d, 0x22, 0xab, 0x30, 0xb9, 0x4e,
0245 0xc7, 0x5c, 0xd5, 0x6a, 0xe3, 0x78, 0xf1, 0x87, 0x0e, 0x95, 0x1c, 0xa3, 0x2a, 0xb1, 0x38,
0246 0xcf, 0x46, 0xdd, 0x54, 0xeb, 0x62, 0xf9, 0x70, 0x08, 0x81, 0x1a, 0x93, 0x2c, 0xa5, 0x3e,
0247 0xb7, 0x40, 0xc9, 0x52, 0xdb, 0x64, 0xed, 0x76, 0xff, 0x89, 0x00, 0x9b, 0x12, 0xad, 0x24,
0248 0xbf, 0x36, 0xc1, 0x48, 0xd3, 0x5a, 0xe5, 0x6c, 0xf7, 0x7e, 0x0a, 0x83, 0x18, 0x91, 0x2e,
0249 0xa7, 0x3c, 0xb5, 0x42, 0xcb, 0x50, 0xd9, 0x66, 0xef, 0x74, 0xfd, 0x8b, 0x02, 0x99, 0x10,
0250 0xaf, 0x26, 0xbd, 0x34, 0xc3, 0x4a, 0xd1, 0x58, 0xe7, 0x6e, 0xf5, 0x7c, 0x0c, 0x85, 0x1e,
0251 0x97, 0x28, 0xa1, 0x3a, 0xb3, 0x44, 0xcd, 0x56, 0xdf, 0x60, 0xe9, 0x72, 0xfb, 0x8d, 0x04,
0252 0x9f, 0x16, 0xa9, 0x20, 0xbb, 0x32, 0xc5, 0x4c, 0xd7, 0x5e, 0xe1, 0x68, 0xf3, 0x7a, 0x0e,
0253 0x87, 0x1c, 0x95, 0x2a, 0xa3, 0x38, 0xb1, 0x46, 0xcf, 0x54, 0xdd, 0x62, 0xeb, 0x70, 0xf9,
0254 0x8f, 0x06, 0x9d, 0x14, 0xab, 0x22, 0xb9, 0x30, 0xc7, 0x4e, 0xd5, 0x5c, 0xe3, 0x6a, 0xf1,
0255 0x78};
0256 static const unsigned char chktabh[256] =
0257 {0x00, 0x11, 0x23, 0x32, 0x46, 0x57, 0x65, 0x74, 0x8c, 0x9d, 0xaf, 0xbe, 0xca, 0xdb, 0xe9,
0258 0xf8, 0x10, 0x01, 0x33, 0x22, 0x56, 0x47, 0x75, 0x64, 0x9c, 0x8d, 0xbf, 0xae, 0xda, 0xcb,
0259 0xf9, 0xe8, 0x21, 0x30, 0x02, 0x13, 0x67, 0x76, 0x44, 0x55, 0xad, 0xbc, 0x8e, 0x9f, 0xeb,
0260 0xfa, 0xc8, 0xd9, 0x31, 0x20, 0x12, 0x03, 0x77, 0x66, 0x54, 0x45, 0xbd, 0xac, 0x9e, 0x8f,
0261 0xfb, 0xea, 0xd8, 0xc9, 0x42, 0x53, 0x61, 0x70, 0x04, 0x15, 0x27, 0x36, 0xce, 0xdf, 0xed,
0262 0xfc, 0x88, 0x99, 0xab, 0xba, 0x52, 0x43, 0x71, 0x60, 0x14, 0x05, 0x37, 0x26, 0xde, 0xcf,
0263 0xfd, 0xec, 0x98, 0x89, 0xbb, 0xaa, 0x63, 0x72, 0x40, 0x51, 0x25, 0x34, 0x06, 0x17, 0xef,
0264 0xfe, 0xcc, 0xdd, 0xa9, 0xb8, 0x8a, 0x9b, 0x73, 0x62, 0x50, 0x41, 0x35, 0x24, 0x16, 0x07,
0265 0xff, 0xee, 0xdc, 0xcd, 0xb9, 0xa8, 0x9a, 0x8b, 0x84, 0x95, 0xa7, 0xb6, 0xc2, 0xd3, 0xe1,
0266 0xf0, 0x08, 0x19, 0x2b, 0x3a, 0x4e, 0x5f, 0x6d, 0x7c, 0x94, 0x85, 0xb7, 0xa6, 0xd2, 0xc3,
0267 0xf1, 0xe0, 0x18, 0x09, 0x3b, 0x2a, 0x5e, 0x4f, 0x7d, 0x6c, 0xa5, 0xb4, 0x86, 0x97, 0xe3,
0268 0xf2, 0xc0, 0xd1, 0x29, 0x38, 0x0a, 0x1b, 0x6f, 0x7e, 0x4c, 0x5d, 0xb5, 0xa4, 0x96, 0x87,
0269 0xf3, 0xe2, 0xd0, 0xc1, 0x39, 0x28, 0x1a, 0x0b, 0x7f, 0x6e, 0x5c, 0x4d, 0xc6, 0xd7, 0xe5,
0270 0xf4, 0x80, 0x91, 0xa3, 0xb2, 0x4a, 0x5b, 0x69, 0x78, 0x0c, 0x1d, 0x2f, 0x3e, 0xd6, 0xc7,
0271 0xf5, 0xe4, 0x90, 0x81, 0xb3, 0xa2, 0x5a, 0x4b, 0x79, 0x68, 0x1c, 0x0d, 0x3f, 0x2e, 0xe7,
0272 0xf6, 0xc4, 0xd5, 0xa1, 0xb0, 0x82, 0x93, 0x6b, 0x7a, 0x48, 0x59, 0x2d, 0x3c, 0x0e, 0x1f,
0273 0xf7, 0xe6, 0xd4, 0xc5, 0xb1, 0xa0, 0x92, 0x83, 0x7b, 0x6a, 0x58, 0x49, 0x3d, 0x2c, 0x1e,
0274 0x0f};
0275
0276
0277
0278
0279
0280 static void delay(int ms)
0281 {
0282 unsigned long timeout = jiffies + ((ms * HZ) / 1000);
0283 while (time_before(jiffies, timeout))
0284 cpu_relax();
0285 }
0286
0287
0288
0289
0290
0291 static void fpga_reset(int iobase)
0292 {
0293 outb(0, IER(iobase));
0294 outb(LCR_DLAB | LCR_BIT5, LCR(iobase));
0295 outb(1, DLL(iobase));
0296 outb(0, DLM(iobase));
0297
0298 outb(LCR_BIT5, LCR(iobase));
0299 inb(LSR(iobase));
0300 inb(MSR(iobase));
0301
0302 outb(MCR_OUT1 | MCR_OUT2, MCR(iobase));
0303 delay(100);
0304
0305 outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase));
0306 delay(100);
0307 }
0308
0309
0310
0311
0312
0313 static int fpga_write(int iobase, unsigned char wrd)
0314 {
0315 unsigned char bit;
0316 int k;
0317 unsigned long timeout = jiffies + HZ / 10;
0318
0319 for (k = 0; k < 8; k++) {
0320 bit = (wrd & 0x80) ? (MCR_RTS | MCR_DTR) : MCR_DTR;
0321 outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase));
0322 wrd <<= 1;
0323 outb(0xfc, THR(iobase));
0324 while ((inb(LSR(iobase)) & LSR_TSRE) == 0)
0325 if (time_after(jiffies, timeout))
0326 return -1;
0327 }
0328
0329 return 0;
0330 }
0331
0332
0333
0334
0335
0336
0337 static unsigned char *add_mcs(unsigned char *bits, int bitrate,
0338 unsigned int predef)
0339 {
0340 const char *fw_name[2] = {FIRMWARE_9600, FIRMWARE_1200};
0341 const struct firmware *fw;
0342 struct platform_device *pdev;
0343 struct yam_mcs *p;
0344 int err;
0345
0346 switch (predef) {
0347 case 0:
0348 fw = NULL;
0349 break;
0350 case YAM_1200:
0351 case YAM_9600:
0352 predef--;
0353 pdev = platform_device_register_simple("yam", 0, NULL, 0);
0354 if (IS_ERR(pdev)) {
0355 printk(KERN_ERR "yam: Failed to register firmware\n");
0356 return NULL;
0357 }
0358 err = request_firmware(&fw, fw_name[predef], &pdev->dev);
0359 platform_device_unregister(pdev);
0360 if (err) {
0361 printk(KERN_ERR "Failed to load firmware \"%s\"\n",
0362 fw_name[predef]);
0363 return NULL;
0364 }
0365 if (fw->size != YAM_FPGA_SIZE) {
0366 printk(KERN_ERR "Bogus length %zu in firmware \"%s\"\n",
0367 fw->size, fw_name[predef]);
0368 release_firmware(fw);
0369 return NULL;
0370 }
0371 bits = (unsigned char *)fw->data;
0372 break;
0373 default:
0374 printk(KERN_ERR "yam: Invalid predef number %u\n", predef);
0375 return NULL;
0376 }
0377
0378
0379 p = yam_data;
0380 while (p) {
0381 if (p->bitrate == bitrate) {
0382 memcpy(p->bits, bits, YAM_FPGA_SIZE);
0383 goto out;
0384 }
0385 p = p->next;
0386 }
0387
0388
0389 if ((p = kmalloc(sizeof(struct yam_mcs), GFP_KERNEL)) == NULL) {
0390 release_firmware(fw);
0391 return NULL;
0392 }
0393 memcpy(p->bits, bits, YAM_FPGA_SIZE);
0394 p->bitrate = bitrate;
0395 p->next = yam_data;
0396 yam_data = p;
0397 out:
0398 release_firmware(fw);
0399 return p->bits;
0400 }
0401
0402 static unsigned char *get_mcs(int bitrate)
0403 {
0404 struct yam_mcs *p;
0405
0406 p = yam_data;
0407 while (p) {
0408 if (p->bitrate == bitrate)
0409 return p->bits;
0410 p = p->next;
0411 }
0412
0413
0414 switch (bitrate) {
0415 case 1200:
0416
0417 return add_mcs(NULL, bitrate, YAM_1200);
0418 default:
0419
0420 return add_mcs(NULL, bitrate, YAM_9600);
0421 }
0422 }
0423
0424
0425
0426
0427
0428
0429 static int fpga_download(int iobase, int bitrate)
0430 {
0431 int i, rc;
0432 unsigned char *pbits;
0433
0434 pbits = get_mcs(bitrate);
0435 if (pbits == NULL)
0436 return -1;
0437
0438 fpga_reset(iobase);
0439 for (i = 0; i < YAM_FPGA_SIZE; i++) {
0440 if (fpga_write(iobase, pbits[i])) {
0441 printk(KERN_ERR "yam: error in write cycle\n");
0442 return -1;
0443 }
0444 }
0445
0446 fpga_write(iobase, 0xFF);
0447 rc = inb(MSR(iobase));
0448
0449
0450 delay(50);
0451
0452 return (rc & MSR_DSR) ? 0 : -1;
0453 }
0454
0455
0456
0457
0458
0459
0460 static void yam_set_uart(struct net_device *dev)
0461 {
0462 struct yam_port *yp = netdev_priv(dev);
0463 int divisor = 115200 / yp->baudrate;
0464
0465 outb(0, IER(dev->base_addr));
0466 outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr));
0467 outb(divisor, DLL(dev->base_addr));
0468 outb(0, DLM(dev->base_addr));
0469 outb(LCR_BIT8, LCR(dev->base_addr));
0470 outb(PTT_OFF, MCR(dev->base_addr));
0471 outb(0x00, FCR(dev->base_addr));
0472
0473
0474
0475 inb(RBR(dev->base_addr));
0476 inb(MSR(dev->base_addr));
0477
0478
0479
0480 outb(ENABLE_RTXINT, IER(dev->base_addr));
0481 }
0482
0483
0484
0485
0486 enum uart {
0487 c_uart_unknown, c_uart_8250,
0488 c_uart_16450, c_uart_16550, c_uart_16550A
0489 };
0490
0491 static const char *uart_str[] =
0492 {"unknown", "8250", "16450", "16550", "16550A"};
0493
0494 static enum uart yam_check_uart(unsigned int iobase)
0495 {
0496 unsigned char b1, b2, b3;
0497 enum uart u;
0498 enum uart uart_tab[] =
0499 {c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A};
0500
0501 b1 = inb(MCR(iobase));
0502 outb(b1 | 0x10, MCR(iobase));
0503 b2 = inb(MSR(iobase));
0504 outb(0x1a, MCR(iobase));
0505 b3 = inb(MSR(iobase)) & 0xf0;
0506 outb(b1, MCR(iobase));
0507 outb(b2, MSR(iobase));
0508 if (b3 != 0x90)
0509 return c_uart_unknown;
0510 inb(RBR(iobase));
0511 inb(RBR(iobase));
0512 outb(0x01, FCR(iobase));
0513 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
0514 if (u == c_uart_16450) {
0515 outb(0x5a, SCR(iobase));
0516 b1 = inb(SCR(iobase));
0517 outb(0xa5, SCR(iobase));
0518 b2 = inb(SCR(iobase));
0519 if ((b1 != 0x5a) || (b2 != 0xa5))
0520 u = c_uart_8250;
0521 }
0522 return u;
0523 }
0524
0525
0526
0527
0528 static inline void yam_rx_flag(struct net_device *dev, struct yam_port *yp)
0529 {
0530 if (yp->dcd && yp->rx_len >= 3 && yp->rx_len < YAM_MAX_FRAME) {
0531 int pkt_len = yp->rx_len - 2 + 1;
0532 struct sk_buff *skb;
0533
0534 if ((yp->rx_crch & yp->rx_crcl) != 0xFF) {
0535
0536 } else {
0537 if (!(skb = dev_alloc_skb(pkt_len))) {
0538 printk(KERN_WARNING "%s: memory squeeze, dropping packet\n", dev->name);
0539 ++dev->stats.rx_dropped;
0540 } else {
0541 unsigned char *cp;
0542 cp = skb_put(skb, pkt_len);
0543 *cp++ = 0;
0544 memcpy(cp, yp->rx_buf, pkt_len - 1);
0545 skb->protocol = ax25_type_trans(skb, dev);
0546 netif_rx(skb);
0547 ++dev->stats.rx_packets;
0548 }
0549 }
0550 }
0551 yp->rx_len = 0;
0552 yp->rx_crcl = 0x21;
0553 yp->rx_crch = 0xf3;
0554 }
0555
0556 static inline void yam_rx_byte(struct net_device *dev, struct yam_port *yp, unsigned char rxb)
0557 {
0558 if (yp->rx_len < YAM_MAX_FRAME) {
0559 unsigned char c = yp->rx_crcl;
0560 yp->rx_crcl = (chktabl[c] ^ yp->rx_crch);
0561 yp->rx_crch = (chktabh[c] ^ rxb);
0562 yp->rx_buf[yp->rx_len++] = rxb;
0563 }
0564 }
0565
0566
0567
0568
0569
0570 static void ptt_on(struct net_device *dev)
0571 {
0572 outb(PTT_ON, MCR(dev->base_addr));
0573 }
0574
0575 static void ptt_off(struct net_device *dev)
0576 {
0577 outb(PTT_OFF, MCR(dev->base_addr));
0578 }
0579
0580 static netdev_tx_t yam_send_packet(struct sk_buff *skb,
0581 struct net_device *dev)
0582 {
0583 struct yam_port *yp = netdev_priv(dev);
0584
0585 if (skb->protocol == htons(ETH_P_IP))
0586 return ax25_ip_xmit(skb);
0587
0588 skb_queue_tail(&yp->send_queue, skb);
0589 netif_trans_update(dev);
0590 return NETDEV_TX_OK;
0591 }
0592
0593 static void yam_start_tx(struct net_device *dev, struct yam_port *yp)
0594 {
0595 if ((yp->tx_state == TX_TAIL) || (yp->txd == 0))
0596 yp->tx_count = 1;
0597 else
0598 yp->tx_count = (yp->bitrate * yp->txd) / 8000;
0599 yp->tx_state = TX_HEAD;
0600 ptt_on(dev);
0601 }
0602
0603 static void yam_arbitrate(struct net_device *dev)
0604 {
0605 struct yam_port *yp = netdev_priv(dev);
0606
0607 if (yp->magic != YAM_MAGIC || yp->tx_state != TX_OFF ||
0608 skb_queue_empty(&yp->send_queue))
0609 return;
0610
0611
0612 if (yp->dupmode) {
0613
0614 yam_start_tx(dev, yp);
0615 return;
0616 }
0617 if (yp->dcd) {
0618
0619 yp->slotcnt = yp->slot / 10;
0620 return;
0621 }
0622
0623 if ((--yp->slotcnt) > 0)
0624 return;
0625
0626 yp->slotcnt = yp->slot / 10;
0627
0628
0629 if ((prandom_u32() % 256) > yp->pers)
0630 return;
0631
0632 yam_start_tx(dev, yp);
0633 }
0634
0635 static void yam_dotimer(struct timer_list *unused)
0636 {
0637 int i;
0638
0639 for (i = 0; i < NR_PORTS; i++) {
0640 struct net_device *dev = yam_devs[i];
0641 if (dev && netif_running(dev))
0642 yam_arbitrate(dev);
0643 }
0644 yam_timer.expires = jiffies + HZ / 100;
0645 add_timer(&yam_timer);
0646 }
0647
0648 static void yam_tx_byte(struct net_device *dev, struct yam_port *yp)
0649 {
0650 struct sk_buff *skb;
0651 unsigned char b, temp;
0652
0653 switch (yp->tx_state) {
0654 case TX_OFF:
0655 break;
0656 case TX_HEAD:
0657 if (--yp->tx_count <= 0) {
0658 if (!(skb = skb_dequeue(&yp->send_queue))) {
0659 ptt_off(dev);
0660 yp->tx_state = TX_OFF;
0661 break;
0662 }
0663 yp->tx_state = TX_DATA;
0664 if (skb->data[0] != 0) {
0665
0666 dev_kfree_skb_any(skb);
0667 break;
0668 }
0669 yp->tx_len = skb->len - 1;
0670 if (yp->tx_len >= YAM_MAX_FRAME || yp->tx_len < 2) {
0671 dev_kfree_skb_any(skb);
0672 break;
0673 }
0674 skb_copy_from_linear_data_offset(skb, 1,
0675 yp->tx_buf,
0676 yp->tx_len);
0677 dev_kfree_skb_any(skb);
0678 yp->tx_count = 0;
0679 yp->tx_crcl = 0x21;
0680 yp->tx_crch = 0xf3;
0681 yp->tx_state = TX_DATA;
0682 }
0683 break;
0684 case TX_DATA:
0685 b = yp->tx_buf[yp->tx_count++];
0686 outb(b, THR(dev->base_addr));
0687 temp = yp->tx_crcl;
0688 yp->tx_crcl = chktabl[temp] ^ yp->tx_crch;
0689 yp->tx_crch = chktabh[temp] ^ b;
0690 if (yp->tx_count >= yp->tx_len) {
0691 yp->tx_state = TX_CRC1;
0692 }
0693 break;
0694 case TX_CRC1:
0695 yp->tx_crch = chktabl[yp->tx_crcl] ^ yp->tx_crch;
0696 yp->tx_crcl = chktabh[yp->tx_crcl] ^ chktabl[yp->tx_crch] ^ 0xff;
0697 outb(yp->tx_crcl, THR(dev->base_addr));
0698 yp->tx_state = TX_CRC2;
0699 break;
0700 case TX_CRC2:
0701 outb(chktabh[yp->tx_crch] ^ 0xFF, THR(dev->base_addr));
0702 if (skb_queue_empty(&yp->send_queue)) {
0703 yp->tx_count = (yp->bitrate * yp->txtail) / 8000;
0704 if (yp->dupmode == 2)
0705 yp->tx_count += (yp->bitrate * yp->holdd) / 8;
0706 if (yp->tx_count == 0)
0707 yp->tx_count = 1;
0708 yp->tx_state = TX_TAIL;
0709 } else {
0710 yp->tx_count = 1;
0711 yp->tx_state = TX_HEAD;
0712 }
0713 ++dev->stats.tx_packets;
0714 break;
0715 case TX_TAIL:
0716 if (--yp->tx_count <= 0) {
0717 yp->tx_state = TX_OFF;
0718 ptt_off(dev);
0719 }
0720 break;
0721 }
0722 }
0723
0724
0725
0726
0727
0728 static irqreturn_t yam_interrupt(int irq, void *dev_id)
0729 {
0730 struct net_device *dev;
0731 struct yam_port *yp;
0732 unsigned char iir;
0733 int counter = 100;
0734 int i;
0735 int handled = 0;
0736
0737 for (i = 0; i < NR_PORTS; i++) {
0738 dev = yam_devs[i];
0739 yp = netdev_priv(dev);
0740
0741 if (!netif_running(dev))
0742 continue;
0743
0744 while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) {
0745 unsigned char msr = inb(MSR(dev->base_addr));
0746 unsigned char lsr = inb(LSR(dev->base_addr));
0747 unsigned char rxb;
0748
0749 handled = 1;
0750
0751 if (lsr & LSR_OE)
0752 ++dev->stats.rx_fifo_errors;
0753
0754 yp->dcd = (msr & RX_DCD) ? 1 : 0;
0755
0756 if (--counter <= 0) {
0757 printk(KERN_ERR "%s: too many irq iir=%d\n",
0758 dev->name, iir);
0759 goto out;
0760 }
0761 if (msr & TX_RDY) {
0762 ++yp->nb_mdint;
0763 yam_tx_byte(dev, yp);
0764 }
0765 if (lsr & LSR_RXC) {
0766 ++yp->nb_rxint;
0767 rxb = inb(RBR(dev->base_addr));
0768 if (msr & RX_FLAG)
0769 yam_rx_flag(dev, yp);
0770 else
0771 yam_rx_byte(dev, yp, rxb);
0772 }
0773 }
0774 }
0775 out:
0776 return IRQ_RETVAL(handled);
0777 }
0778
0779 #ifdef CONFIG_PROC_FS
0780
0781 static void *yam_seq_start(struct seq_file *seq, loff_t *pos)
0782 {
0783 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
0784 }
0785
0786 static void *yam_seq_next(struct seq_file *seq, void *v, loff_t *pos)
0787 {
0788 ++*pos;
0789 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
0790 }
0791
0792 static void yam_seq_stop(struct seq_file *seq, void *v)
0793 {
0794 }
0795
0796 static int yam_seq_show(struct seq_file *seq, void *v)
0797 {
0798 struct net_device *dev = v;
0799 const struct yam_port *yp = netdev_priv(dev);
0800
0801 seq_printf(seq, "Device %s\n", dev->name);
0802 seq_printf(seq, " Up %d\n", netif_running(dev));
0803 seq_printf(seq, " Speed %u\n", yp->bitrate);
0804 seq_printf(seq, " IoBase 0x%x\n", yp->iobase);
0805 seq_printf(seq, " BaudRate %u\n", yp->baudrate);
0806 seq_printf(seq, " IRQ %u\n", yp->irq);
0807 seq_printf(seq, " TxState %u\n", yp->tx_state);
0808 seq_printf(seq, " Duplex %u\n", yp->dupmode);
0809 seq_printf(seq, " HoldDly %u\n", yp->holdd);
0810 seq_printf(seq, " TxDelay %u\n", yp->txd);
0811 seq_printf(seq, " TxTail %u\n", yp->txtail);
0812 seq_printf(seq, " SlotTime %u\n", yp->slot);
0813 seq_printf(seq, " Persist %u\n", yp->pers);
0814 seq_printf(seq, " TxFrames %lu\n", dev->stats.tx_packets);
0815 seq_printf(seq, " RxFrames %lu\n", dev->stats.rx_packets);
0816 seq_printf(seq, " TxInt %u\n", yp->nb_mdint);
0817 seq_printf(seq, " RxInt %u\n", yp->nb_rxint);
0818 seq_printf(seq, " RxOver %lu\n", dev->stats.rx_fifo_errors);
0819 seq_printf(seq, "\n");
0820 return 0;
0821 }
0822
0823 static const struct seq_operations yam_seqops = {
0824 .start = yam_seq_start,
0825 .next = yam_seq_next,
0826 .stop = yam_seq_stop,
0827 .show = yam_seq_show,
0828 };
0829 #endif
0830
0831
0832
0833
0834 static int yam_open(struct net_device *dev)
0835 {
0836 struct yam_port *yp = netdev_priv(dev);
0837 enum uart u;
0838 int i;
0839 int ret=0;
0840
0841 printk(KERN_INFO "Trying %s at iobase 0x%lx irq %u\n", dev->name, dev->base_addr, dev->irq);
0842
0843 if (!yp->bitrate)
0844 return -ENXIO;
0845 if (!dev->base_addr || dev->base_addr > 0x1000 - YAM_EXTENT ||
0846 dev->irq < 2 || dev->irq > 15) {
0847 return -ENXIO;
0848 }
0849 if (!request_region(dev->base_addr, YAM_EXTENT, dev->name))
0850 {
0851 printk(KERN_ERR "%s: cannot 0x%lx busy\n", dev->name, dev->base_addr);
0852 return -EACCES;
0853 }
0854 if ((u = yam_check_uart(dev->base_addr)) == c_uart_unknown) {
0855 printk(KERN_ERR "%s: cannot find uart type\n", dev->name);
0856 ret = -EIO;
0857 goto out_release_base;
0858 }
0859 if (fpga_download(dev->base_addr, yp->bitrate)) {
0860 printk(KERN_ERR "%s: cannot init FPGA\n", dev->name);
0861 ret = -EIO;
0862 goto out_release_base;
0863 }
0864 outb(0, IER(dev->base_addr));
0865 if (request_irq(dev->irq, yam_interrupt, IRQF_SHARED, dev->name, dev)) {
0866 printk(KERN_ERR "%s: irq %d busy\n", dev->name, dev->irq);
0867 ret = -EBUSY;
0868 goto out_release_base;
0869 }
0870
0871 yam_set_uart(dev);
0872
0873 netif_start_queue(dev);
0874
0875 yp->slotcnt = yp->slot / 10;
0876
0877
0878 for (i = 0; i < NR_PORTS; i++) {
0879 struct net_device *yam_dev = yam_devs[i];
0880
0881 inb(LSR(yam_dev->base_addr));
0882 yam_dev->stats.rx_fifo_errors = 0;
0883 }
0884
0885 printk(KERN_INFO "%s at iobase 0x%lx irq %u uart %s\n", dev->name, dev->base_addr, dev->irq,
0886 uart_str[u]);
0887 return 0;
0888
0889 out_release_base:
0890 release_region(dev->base_addr, YAM_EXTENT);
0891 return ret;
0892 }
0893
0894
0895
0896 static int yam_close(struct net_device *dev)
0897 {
0898 struct sk_buff *skb;
0899 struct yam_port *yp = netdev_priv(dev);
0900
0901 if (!dev)
0902 return -EINVAL;
0903
0904
0905
0906
0907 outb(0, IER(dev->base_addr));
0908 outb(1, MCR(dev->base_addr));
0909
0910 free_irq(dev->irq,dev);
0911 release_region(dev->base_addr, YAM_EXTENT);
0912 netif_stop_queue(dev);
0913 while ((skb = skb_dequeue(&yp->send_queue)))
0914 dev_kfree_skb(skb);
0915
0916 printk(KERN_INFO "%s: close yam at iobase 0x%lx irq %u\n",
0917 yam_drvname, dev->base_addr, dev->irq);
0918 return 0;
0919 }
0920
0921
0922
0923 static int yam_siocdevprivate(struct net_device *dev, struct ifreq *ifr, void __user *data, int cmd)
0924 {
0925 struct yam_port *yp = netdev_priv(dev);
0926 struct yamdrv_ioctl_cfg yi;
0927 struct yamdrv_ioctl_mcs *ym;
0928 int ioctl_cmd;
0929
0930 if (copy_from_user(&ioctl_cmd, data, sizeof(int)))
0931 return -EFAULT;
0932
0933 if (yp->magic != YAM_MAGIC)
0934 return -EINVAL;
0935
0936 if (!capable(CAP_NET_ADMIN))
0937 return -EPERM;
0938
0939 if (cmd != SIOCDEVPRIVATE)
0940 return -EINVAL;
0941
0942 switch (ioctl_cmd) {
0943
0944 case SIOCYAMRESERVED:
0945 return -EINVAL;
0946
0947 case SIOCYAMSMCS:
0948 if (netif_running(dev))
0949 return -EINVAL;
0950 ym = memdup_user(data, sizeof(struct yamdrv_ioctl_mcs));
0951 if (IS_ERR(ym))
0952 return PTR_ERR(ym);
0953 if (ym->cmd != SIOCYAMSMCS || ym->bitrate > YAM_MAXBITRATE) {
0954 kfree(ym);
0955 return -EINVAL;
0956 }
0957
0958 add_mcs(ym->bits, ym->bitrate, 0);
0959 kfree(ym);
0960 break;
0961
0962 case SIOCYAMSCFG:
0963 if (!capable(CAP_SYS_RAWIO))
0964 return -EPERM;
0965 if (copy_from_user(&yi, data, sizeof(struct yamdrv_ioctl_cfg)))
0966 return -EFAULT;
0967
0968 if (yi.cmd != SIOCYAMSCFG)
0969 return -EINVAL;
0970 if ((yi.cfg.mask & YAM_IOBASE) && netif_running(dev))
0971 return -EINVAL;
0972 if ((yi.cfg.mask & YAM_IRQ) && netif_running(dev))
0973 return -EINVAL;
0974 if ((yi.cfg.mask & YAM_BITRATE) && netif_running(dev))
0975 return -EINVAL;
0976 if ((yi.cfg.mask & YAM_BAUDRATE) && netif_running(dev))
0977 return -EINVAL;
0978
0979 if (yi.cfg.mask & YAM_IOBASE) {
0980 yp->iobase = yi.cfg.iobase;
0981 dev->base_addr = yi.cfg.iobase;
0982 }
0983 if (yi.cfg.mask & YAM_IRQ) {
0984 if (yi.cfg.irq > 15)
0985 return -EINVAL;
0986 yp->irq = yi.cfg.irq;
0987 dev->irq = yi.cfg.irq;
0988 }
0989 if (yi.cfg.mask & YAM_BITRATE) {
0990 if (yi.cfg.bitrate > YAM_MAXBITRATE)
0991 return -EINVAL;
0992 yp->bitrate = yi.cfg.bitrate;
0993 }
0994 if (yi.cfg.mask & YAM_BAUDRATE) {
0995 if (yi.cfg.baudrate > YAM_MAXBAUDRATE)
0996 return -EINVAL;
0997 yp->baudrate = yi.cfg.baudrate;
0998 }
0999 if (yi.cfg.mask & YAM_MODE) {
1000 if (yi.cfg.mode > YAM_MAXMODE)
1001 return -EINVAL;
1002 yp->dupmode = yi.cfg.mode;
1003 }
1004 if (yi.cfg.mask & YAM_HOLDDLY) {
1005 if (yi.cfg.holddly > YAM_MAXHOLDDLY)
1006 return -EINVAL;
1007 yp->holdd = yi.cfg.holddly;
1008 }
1009 if (yi.cfg.mask & YAM_TXDELAY) {
1010 if (yi.cfg.txdelay > YAM_MAXTXDELAY)
1011 return -EINVAL;
1012 yp->txd = yi.cfg.txdelay;
1013 }
1014 if (yi.cfg.mask & YAM_TXTAIL) {
1015 if (yi.cfg.txtail > YAM_MAXTXTAIL)
1016 return -EINVAL;
1017 yp->txtail = yi.cfg.txtail;
1018 }
1019 if (yi.cfg.mask & YAM_PERSIST) {
1020 if (yi.cfg.persist > YAM_MAXPERSIST)
1021 return -EINVAL;
1022 yp->pers = yi.cfg.persist;
1023 }
1024 if (yi.cfg.mask & YAM_SLOTTIME) {
1025 if (yi.cfg.slottime > YAM_MAXSLOTTIME)
1026 return -EINVAL;
1027 yp->slot = yi.cfg.slottime;
1028 yp->slotcnt = yp->slot / 10;
1029 }
1030 break;
1031
1032 case SIOCYAMGCFG:
1033 memset(&yi, 0, sizeof(yi));
1034 yi.cfg.mask = 0xffffffff;
1035 yi.cfg.iobase = yp->iobase;
1036 yi.cfg.irq = yp->irq;
1037 yi.cfg.bitrate = yp->bitrate;
1038 yi.cfg.baudrate = yp->baudrate;
1039 yi.cfg.mode = yp->dupmode;
1040 yi.cfg.txdelay = yp->txd;
1041 yi.cfg.holddly = yp->holdd;
1042 yi.cfg.txtail = yp->txtail;
1043 yi.cfg.persist = yp->pers;
1044 yi.cfg.slottime = yp->slot;
1045 if (copy_to_user(data, &yi, sizeof(struct yamdrv_ioctl_cfg)))
1046 return -EFAULT;
1047 break;
1048
1049 default:
1050 return -EINVAL;
1051
1052 }
1053
1054 return 0;
1055 }
1056
1057
1058
1059 static int yam_set_mac_address(struct net_device *dev, void *addr)
1060 {
1061 struct sockaddr *sa = (struct sockaddr *) addr;
1062
1063
1064 dev_addr_set(dev, sa->sa_data);
1065 return 0;
1066 }
1067
1068
1069
1070 static const struct net_device_ops yam_netdev_ops = {
1071 .ndo_open = yam_open,
1072 .ndo_stop = yam_close,
1073 .ndo_start_xmit = yam_send_packet,
1074 .ndo_siocdevprivate = yam_siocdevprivate,
1075 .ndo_set_mac_address = yam_set_mac_address,
1076 };
1077
1078 static void yam_setup(struct net_device *dev)
1079 {
1080 struct yam_port *yp = netdev_priv(dev);
1081
1082 yp->magic = YAM_MAGIC;
1083 yp->bitrate = DEFAULT_BITRATE;
1084 yp->baudrate = DEFAULT_BITRATE * 2;
1085 yp->iobase = 0;
1086 yp->irq = 0;
1087 yp->dupmode = 0;
1088 yp->holdd = DEFAULT_HOLDD;
1089 yp->txd = DEFAULT_TXD;
1090 yp->txtail = DEFAULT_TXTAIL;
1091 yp->slot = DEFAULT_SLOT;
1092 yp->pers = DEFAULT_PERS;
1093 yp->dev = dev;
1094
1095 dev->base_addr = yp->iobase;
1096 dev->irq = yp->irq;
1097
1098 skb_queue_head_init(&yp->send_queue);
1099
1100 dev->netdev_ops = &yam_netdev_ops;
1101 dev->header_ops = &ax25_header_ops;
1102
1103 dev->type = ARPHRD_AX25;
1104 dev->hard_header_len = AX25_MAX_HEADER_LEN;
1105 dev->mtu = AX25_MTU;
1106 dev->addr_len = AX25_ADDR_LEN;
1107 memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
1108 dev_addr_set(dev, (u8 *)&ax25_defaddr);
1109 }
1110
1111 static int __init yam_init_driver(void)
1112 {
1113 struct net_device *dev;
1114 int i, err;
1115 char name[IFNAMSIZ];
1116
1117 printk(yam_drvinfo);
1118
1119 for (i = 0; i < NR_PORTS; i++) {
1120 sprintf(name, "yam%d", i);
1121
1122 dev = alloc_netdev(sizeof(struct yam_port), name,
1123 NET_NAME_UNKNOWN, yam_setup);
1124 if (!dev) {
1125 pr_err("yam: cannot allocate net device\n");
1126 err = -ENOMEM;
1127 goto error;
1128 }
1129
1130 err = register_netdev(dev);
1131 if (err) {
1132 printk(KERN_WARNING "yam: cannot register net device %s\n", dev->name);
1133 free_netdev(dev);
1134 goto error;
1135 }
1136 yam_devs[i] = dev;
1137
1138 }
1139
1140 timer_setup(&yam_timer, yam_dotimer, 0);
1141 yam_timer.expires = jiffies + HZ / 100;
1142 add_timer(&yam_timer);
1143
1144 proc_create_seq("yam", 0444, init_net.proc_net, &yam_seqops);
1145 return 0;
1146 error:
1147 while (--i >= 0) {
1148 unregister_netdev(yam_devs[i]);
1149 free_netdev(yam_devs[i]);
1150 }
1151 return err;
1152 }
1153
1154
1155
1156 static void __exit yam_cleanup_driver(void)
1157 {
1158 struct yam_mcs *p;
1159 int i;
1160
1161 del_timer_sync(&yam_timer);
1162 for (i = 0; i < NR_PORTS; i++) {
1163 struct net_device *dev = yam_devs[i];
1164 if (dev) {
1165 unregister_netdev(dev);
1166 free_netdev(dev);
1167 }
1168 }
1169
1170 while (yam_data) {
1171 p = yam_data;
1172 yam_data = yam_data->next;
1173 kfree(p);
1174 }
1175
1176 remove_proc_entry("yam", init_net.proc_net);
1177 }
1178
1179
1180
1181 MODULE_AUTHOR("Frederic Rible F1OAT frible@teaser.fr");
1182 MODULE_DESCRIPTION("Yam amateur radio modem driver");
1183 MODULE_LICENSE("GPL");
1184 MODULE_FIRMWARE(FIRMWARE_1200);
1185 MODULE_FIRMWARE(FIRMWARE_9600);
1186
1187 module_init(yam_init_driver);
1188 module_exit(yam_cleanup_driver);
1189
1190
1191