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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Ethernet driver for the WIZnet W5300 chip.
0004  *
0005  * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
0006  * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
0007  * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
0008  */
0009 
0010 #include <linux/kernel.h>
0011 #include <linux/module.h>
0012 #include <linux/netdevice.h>
0013 #include <linux/etherdevice.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/platform_data/wiznet.h>
0016 #include <linux/ethtool.h>
0017 #include <linux/skbuff.h>
0018 #include <linux/types.h>
0019 #include <linux/errno.h>
0020 #include <linux/delay.h>
0021 #include <linux/slab.h>
0022 #include <linux/spinlock.h>
0023 #include <linux/io.h>
0024 #include <linux/ioport.h>
0025 #include <linux/interrupt.h>
0026 #include <linux/irq.h>
0027 #include <linux/gpio.h>
0028 
0029 #define DRV_NAME    "w5300"
0030 #define DRV_VERSION "2012-04-04"
0031 
0032 MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION);
0033 MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
0034 MODULE_ALIAS("platform:"DRV_NAME);
0035 MODULE_LICENSE("GPL");
0036 
0037 /*
0038  * Registers
0039  */
0040 #define W5300_MR        0x0000  /* Mode Register */
0041 #define   MR_DBW          (1 << 15) /* Data bus width */
0042 #define   MR_MPF          (1 << 14) /* Mac layer pause frame */
0043 #define   MR_WDF(n)       (((n)&7)<<11) /* Write data fetch time */
0044 #define   MR_RDH          (1 << 10) /* Read data hold time */
0045 #define   MR_FS           (1 << 8)  /* FIFO swap */
0046 #define   MR_RST          (1 << 7)  /* S/W reset */
0047 #define   MR_PB           (1 << 4)  /* Ping block */
0048 #define   MR_DBS          (1 << 2)  /* Data bus swap */
0049 #define   MR_IND          (1 << 0)  /* Indirect mode */
0050 #define W5300_IR        0x0002  /* Interrupt Register */
0051 #define W5300_IMR       0x0004  /* Interrupt Mask Register */
0052 #define   IR_S0           0x0001  /* S0 interrupt */
0053 #define W5300_SHARL     0x0008  /* Source MAC address (0123) */
0054 #define W5300_SHARH     0x000c  /* Source MAC address (45) */
0055 #define W5300_TMSRL     0x0020  /* Transmit Memory Size (0123) */
0056 #define W5300_TMSRH     0x0024  /* Transmit Memory Size (4567) */
0057 #define W5300_RMSRL     0x0028  /* Receive Memory Size (0123) */
0058 #define W5300_RMSRH     0x002c  /* Receive Memory Size (4567) */
0059 #define W5300_MTYPE     0x0030  /* Memory Type */
0060 #define W5300_IDR       0x00fe  /* Chip ID register */
0061 #define   IDR_W5300       0x5300  /* =0x5300 for WIZnet W5300 */
0062 #define W5300_S0_MR     0x0200  /* S0 Mode Register */
0063 #define   S0_MR_CLOSED        0x0000  /* Close mode */
0064 #define   S0_MR_MACRAW        0x0004  /* MAC RAW mode (promiscuous) */
0065 #define   S0_MR_MACRAW_MF     0x0044  /* MAC RAW mode (filtered) */
0066 #define W5300_S0_CR     0x0202  /* S0 Command Register */
0067 #define   S0_CR_OPEN          0x0001  /* OPEN command */
0068 #define   S0_CR_CLOSE         0x0010  /* CLOSE command */
0069 #define   S0_CR_SEND          0x0020  /* SEND command */
0070 #define   S0_CR_RECV          0x0040  /* RECV command */
0071 #define W5300_S0_IMR        0x0204  /* S0 Interrupt Mask Register */
0072 #define W5300_S0_IR     0x0206  /* S0 Interrupt Register */
0073 #define   S0_IR_RECV          0x0004  /* Receive interrupt */
0074 #define   S0_IR_SENDOK        0x0010  /* Send OK interrupt */
0075 #define W5300_S0_SSR        0x0208  /* S0 Socket Status Register */
0076 #define W5300_S0_TX_WRSR    0x0220  /* S0 TX Write Size Register */
0077 #define W5300_S0_TX_FSR     0x0224  /* S0 TX Free Size Register */
0078 #define W5300_S0_RX_RSR     0x0228  /* S0 Received data Size */
0079 #define W5300_S0_TX_FIFO    0x022e  /* S0 Transmit FIFO */
0080 #define W5300_S0_RX_FIFO    0x0230  /* S0 Receive FIFO */
0081 #define W5300_REGS_LEN      0x0400
0082 
0083 /*
0084  * Device driver private data structure
0085  */
0086 struct w5300_priv {
0087     void __iomem *base;
0088     spinlock_t reg_lock;
0089     bool indirect;
0090     u16  (*read) (struct w5300_priv *priv, u16 addr);
0091     void (*write)(struct w5300_priv *priv, u16 addr, u16 data);
0092     int irq;
0093     int link_irq;
0094     int link_gpio;
0095 
0096     struct napi_struct napi;
0097     struct net_device *ndev;
0098     bool promisc;
0099     u32 msg_enable;
0100 };
0101 
0102 /************************************************************************
0103  *
0104  *  Lowlevel I/O functions
0105  *
0106  ***********************************************************************/
0107 
0108 /*
0109  * In direct address mode host system can directly access W5300 registers
0110  * after mapping to Memory-Mapped I/O space.
0111  *
0112  * 0x400 bytes are required for memory space.
0113  */
0114 static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr)
0115 {
0116     return ioread16(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
0117 }
0118 
0119 static inline void w5300_write_direct(struct w5300_priv *priv,
0120                       u16 addr, u16 data)
0121 {
0122     iowrite16(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
0123 }
0124 
0125 /*
0126  * In indirect address mode host system indirectly accesses registers by
0127  * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
0128  * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
0129  * Mode Register (MR) is directly accessible.
0130  *
0131  * Only 0x06 bytes are required for memory space.
0132  */
0133 #define W5300_IDM_AR        0x0002   /* Indirect Mode Address */
0134 #define W5300_IDM_DR        0x0004   /* Indirect Mode Data */
0135 
0136 static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr)
0137 {
0138     unsigned long flags;
0139     u16 data;
0140 
0141     spin_lock_irqsave(&priv->reg_lock, flags);
0142     w5300_write_direct(priv, W5300_IDM_AR, addr);
0143     data = w5300_read_direct(priv, W5300_IDM_DR);
0144     spin_unlock_irqrestore(&priv->reg_lock, flags);
0145 
0146     return data;
0147 }
0148 
0149 static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data)
0150 {
0151     unsigned long flags;
0152 
0153     spin_lock_irqsave(&priv->reg_lock, flags);
0154     w5300_write_direct(priv, W5300_IDM_AR, addr);
0155     w5300_write_direct(priv, W5300_IDM_DR, data);
0156     spin_unlock_irqrestore(&priv->reg_lock, flags);
0157 }
0158 
0159 #if defined(CONFIG_WIZNET_BUS_DIRECT)
0160 #define w5300_read  w5300_read_direct
0161 #define w5300_write w5300_write_direct
0162 
0163 #elif defined(CONFIG_WIZNET_BUS_INDIRECT)
0164 #define w5300_read  w5300_read_indirect
0165 #define w5300_write w5300_write_indirect
0166 
0167 #else /* CONFIG_WIZNET_BUS_ANY */
0168 #define w5300_read  priv->read
0169 #define w5300_write priv->write
0170 #endif
0171 
0172 static u32 w5300_read32(struct w5300_priv *priv, u16 addr)
0173 {
0174     u32 data;
0175     data  = w5300_read(priv, addr) << 16;
0176     data |= w5300_read(priv, addr + 2);
0177     return data;
0178 }
0179 
0180 static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data)
0181 {
0182     w5300_write(priv, addr, data >> 16);
0183     w5300_write(priv, addr + 2, data);
0184 }
0185 
0186 static int w5300_command(struct w5300_priv *priv, u16 cmd)
0187 {
0188     unsigned long timeout = jiffies + msecs_to_jiffies(100);
0189 
0190     w5300_write(priv, W5300_S0_CR, cmd);
0191 
0192     while (w5300_read(priv, W5300_S0_CR) != 0) {
0193         if (time_after(jiffies, timeout))
0194             return -EIO;
0195         cpu_relax();
0196     }
0197 
0198     return 0;
0199 }
0200 
0201 static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len)
0202 {
0203     u16 fifo;
0204     int i;
0205 
0206     for (i = 0; i < len; i += 2) {
0207         fifo = w5300_read(priv, W5300_S0_RX_FIFO);
0208         *buf++ = fifo >> 8;
0209         *buf++ = fifo;
0210     }
0211     fifo = w5300_read(priv, W5300_S0_RX_FIFO);
0212     fifo = w5300_read(priv, W5300_S0_RX_FIFO);
0213 }
0214 
0215 static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len)
0216 {
0217     u16 fifo;
0218     int i;
0219 
0220     for (i = 0; i < len; i += 2) {
0221         fifo  = *buf++ << 8;
0222         fifo |= *buf++;
0223         w5300_write(priv, W5300_S0_TX_FIFO, fifo);
0224     }
0225     w5300_write32(priv, W5300_S0_TX_WRSR, len);
0226 }
0227 
0228 static void w5300_write_macaddr(struct w5300_priv *priv)
0229 {
0230     struct net_device *ndev = priv->ndev;
0231     w5300_write32(priv, W5300_SHARL,
0232               ndev->dev_addr[0] << 24 |
0233               ndev->dev_addr[1] << 16 |
0234               ndev->dev_addr[2] << 8 |
0235               ndev->dev_addr[3]);
0236     w5300_write(priv, W5300_SHARH,
0237               ndev->dev_addr[4] << 8 |
0238               ndev->dev_addr[5]);
0239 }
0240 
0241 static void w5300_hw_reset(struct w5300_priv *priv)
0242 {
0243     w5300_write_direct(priv, W5300_MR, MR_RST);
0244     mdelay(5);
0245     w5300_write_direct(priv, W5300_MR, priv->indirect ?
0246                  MR_WDF(7) | MR_PB | MR_IND :
0247                  MR_WDF(7) | MR_PB);
0248     w5300_write(priv, W5300_IMR, 0);
0249     w5300_write_macaddr(priv);
0250 
0251     /* Configure 128K of internal memory
0252      * as 64K RX fifo and 64K TX fifo
0253      */
0254     w5300_write32(priv, W5300_RMSRL, 64 << 24);
0255     w5300_write32(priv, W5300_RMSRH, 0);
0256     w5300_write32(priv, W5300_TMSRL, 64 << 24);
0257     w5300_write32(priv, W5300_TMSRH, 0);
0258     w5300_write(priv, W5300_MTYPE, 0x00ff);
0259 }
0260 
0261 static void w5300_hw_start(struct w5300_priv *priv)
0262 {
0263     w5300_write(priv, W5300_S0_MR, priv->promisc ?
0264               S0_MR_MACRAW : S0_MR_MACRAW_MF);
0265     w5300_command(priv, S0_CR_OPEN);
0266     w5300_write(priv, W5300_S0_IMR, S0_IR_RECV | S0_IR_SENDOK);
0267     w5300_write(priv, W5300_IMR, IR_S0);
0268 }
0269 
0270 static void w5300_hw_close(struct w5300_priv *priv)
0271 {
0272     w5300_write(priv, W5300_IMR, 0);
0273     w5300_command(priv, S0_CR_CLOSE);
0274 }
0275 
0276 /***********************************************************************
0277  *
0278  *   Device driver functions / callbacks
0279  *
0280  ***********************************************************************/
0281 
0282 static void w5300_get_drvinfo(struct net_device *ndev,
0283                   struct ethtool_drvinfo *info)
0284 {
0285     strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
0286     strlcpy(info->version, DRV_VERSION, sizeof(info->version));
0287     strlcpy(info->bus_info, dev_name(ndev->dev.parent),
0288         sizeof(info->bus_info));
0289 }
0290 
0291 static u32 w5300_get_link(struct net_device *ndev)
0292 {
0293     struct w5300_priv *priv = netdev_priv(ndev);
0294 
0295     if (gpio_is_valid(priv->link_gpio))
0296         return !!gpio_get_value(priv->link_gpio);
0297 
0298     return 1;
0299 }
0300 
0301 static u32 w5300_get_msglevel(struct net_device *ndev)
0302 {
0303     struct w5300_priv *priv = netdev_priv(ndev);
0304 
0305     return priv->msg_enable;
0306 }
0307 
0308 static void w5300_set_msglevel(struct net_device *ndev, u32 value)
0309 {
0310     struct w5300_priv *priv = netdev_priv(ndev);
0311 
0312     priv->msg_enable = value;
0313 }
0314 
0315 static int w5300_get_regs_len(struct net_device *ndev)
0316 {
0317     return W5300_REGS_LEN;
0318 }
0319 
0320 static void w5300_get_regs(struct net_device *ndev,
0321                struct ethtool_regs *regs, void *_buf)
0322 {
0323     struct w5300_priv *priv = netdev_priv(ndev);
0324     u8 *buf = _buf;
0325     u16 addr;
0326     u16 data;
0327 
0328     regs->version = 1;
0329     for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
0330         switch (addr & 0x23f) {
0331         case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */
0332         case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */
0333             data = 0xffff;
0334             break;
0335         default:
0336             data = w5300_read(priv, addr);
0337             break;
0338         }
0339         *buf++ = data >> 8;
0340         *buf++ = data;
0341     }
0342 }
0343 
0344 static void w5300_tx_timeout(struct net_device *ndev, unsigned int txqueue)
0345 {
0346     struct w5300_priv *priv = netdev_priv(ndev);
0347 
0348     netif_stop_queue(ndev);
0349     w5300_hw_reset(priv);
0350     w5300_hw_start(priv);
0351     ndev->stats.tx_errors++;
0352     netif_trans_update(ndev);
0353     netif_wake_queue(ndev);
0354 }
0355 
0356 static netdev_tx_t w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
0357 {
0358     struct w5300_priv *priv = netdev_priv(ndev);
0359 
0360     netif_stop_queue(ndev);
0361 
0362     w5300_write_frame(priv, skb->data, skb->len);
0363     ndev->stats.tx_packets++;
0364     ndev->stats.tx_bytes += skb->len;
0365     dev_kfree_skb(skb);
0366     netif_dbg(priv, tx_queued, ndev, "tx queued\n");
0367 
0368     w5300_command(priv, S0_CR_SEND);
0369 
0370     return NETDEV_TX_OK;
0371 }
0372 
0373 static int w5300_napi_poll(struct napi_struct *napi, int budget)
0374 {
0375     struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi);
0376     struct net_device *ndev = priv->ndev;
0377     struct sk_buff *skb;
0378     int rx_count;
0379     u16 rx_len;
0380 
0381     for (rx_count = 0; rx_count < budget; rx_count++) {
0382         u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR);
0383         if (rx_fifo_len == 0)
0384             break;
0385 
0386         rx_len = w5300_read(priv, W5300_S0_RX_FIFO);
0387 
0388         skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2));
0389         if (unlikely(!skb)) {
0390             u32 i;
0391             for (i = 0; i < rx_fifo_len; i += 2)
0392                 w5300_read(priv, W5300_S0_RX_FIFO);
0393             ndev->stats.rx_dropped++;
0394             return -ENOMEM;
0395         }
0396 
0397         skb_put(skb, rx_len);
0398         w5300_read_frame(priv, skb->data, rx_len);
0399         skb->protocol = eth_type_trans(skb, ndev);
0400 
0401         netif_receive_skb(skb);
0402         ndev->stats.rx_packets++;
0403         ndev->stats.rx_bytes += rx_len;
0404     }
0405 
0406     if (rx_count < budget) {
0407         napi_complete_done(napi, rx_count);
0408         w5300_write(priv, W5300_IMR, IR_S0);
0409     }
0410 
0411     return rx_count;
0412 }
0413 
0414 static irqreturn_t w5300_interrupt(int irq, void *ndev_instance)
0415 {
0416     struct net_device *ndev = ndev_instance;
0417     struct w5300_priv *priv = netdev_priv(ndev);
0418 
0419     int ir = w5300_read(priv, W5300_S0_IR);
0420     if (!ir)
0421         return IRQ_NONE;
0422     w5300_write(priv, W5300_S0_IR, ir);
0423 
0424     if (ir & S0_IR_SENDOK) {
0425         netif_dbg(priv, tx_done, ndev, "tx done\n");
0426         netif_wake_queue(ndev);
0427     }
0428 
0429     if (ir & S0_IR_RECV) {
0430         if (napi_schedule_prep(&priv->napi)) {
0431             w5300_write(priv, W5300_IMR, 0);
0432             __napi_schedule(&priv->napi);
0433         }
0434     }
0435 
0436     return IRQ_HANDLED;
0437 }
0438 
0439 static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
0440 {
0441     struct net_device *ndev = ndev_instance;
0442     struct w5300_priv *priv = netdev_priv(ndev);
0443 
0444     if (netif_running(ndev)) {
0445         if (gpio_get_value(priv->link_gpio) != 0) {
0446             netif_info(priv, link, ndev, "link is up\n");
0447             netif_carrier_on(ndev);
0448         } else {
0449             netif_info(priv, link, ndev, "link is down\n");
0450             netif_carrier_off(ndev);
0451         }
0452     }
0453 
0454     return IRQ_HANDLED;
0455 }
0456 
0457 static void w5300_set_rx_mode(struct net_device *ndev)
0458 {
0459     struct w5300_priv *priv = netdev_priv(ndev);
0460     bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
0461 
0462     if (priv->promisc != set_promisc) {
0463         priv->promisc = set_promisc;
0464         w5300_hw_start(priv);
0465     }
0466 }
0467 
0468 static int w5300_set_macaddr(struct net_device *ndev, void *addr)
0469 {
0470     struct w5300_priv *priv = netdev_priv(ndev);
0471     struct sockaddr *sock_addr = addr;
0472 
0473     if (!is_valid_ether_addr(sock_addr->sa_data))
0474         return -EADDRNOTAVAIL;
0475     eth_hw_addr_set(ndev, sock_addr->sa_data);
0476     w5300_write_macaddr(priv);
0477     return 0;
0478 }
0479 
0480 static int w5300_open(struct net_device *ndev)
0481 {
0482     struct w5300_priv *priv = netdev_priv(ndev);
0483 
0484     netif_info(priv, ifup, ndev, "enabling\n");
0485     w5300_hw_start(priv);
0486     napi_enable(&priv->napi);
0487     netif_start_queue(ndev);
0488     if (!gpio_is_valid(priv->link_gpio) ||
0489         gpio_get_value(priv->link_gpio) != 0)
0490         netif_carrier_on(ndev);
0491     return 0;
0492 }
0493 
0494 static int w5300_stop(struct net_device *ndev)
0495 {
0496     struct w5300_priv *priv = netdev_priv(ndev);
0497 
0498     netif_info(priv, ifdown, ndev, "shutting down\n");
0499     w5300_hw_close(priv);
0500     netif_carrier_off(ndev);
0501     netif_stop_queue(ndev);
0502     napi_disable(&priv->napi);
0503     return 0;
0504 }
0505 
0506 static const struct ethtool_ops w5300_ethtool_ops = {
0507     .get_drvinfo        = w5300_get_drvinfo,
0508     .get_msglevel       = w5300_get_msglevel,
0509     .set_msglevel       = w5300_set_msglevel,
0510     .get_link       = w5300_get_link,
0511     .get_regs_len       = w5300_get_regs_len,
0512     .get_regs       = w5300_get_regs,
0513 };
0514 
0515 static const struct net_device_ops w5300_netdev_ops = {
0516     .ndo_open       = w5300_open,
0517     .ndo_stop       = w5300_stop,
0518     .ndo_start_xmit     = w5300_start_tx,
0519     .ndo_tx_timeout     = w5300_tx_timeout,
0520     .ndo_set_rx_mode    = w5300_set_rx_mode,
0521     .ndo_set_mac_address    = w5300_set_macaddr,
0522     .ndo_validate_addr  = eth_validate_addr,
0523 };
0524 
0525 static int w5300_hw_probe(struct platform_device *pdev)
0526 {
0527     struct wiznet_platform_data *data = dev_get_platdata(&pdev->dev);
0528     struct net_device *ndev = platform_get_drvdata(pdev);
0529     struct w5300_priv *priv = netdev_priv(ndev);
0530     const char *name = netdev_name(ndev);
0531     struct resource *mem;
0532     int mem_size;
0533     int irq;
0534     int ret;
0535 
0536     if (data && is_valid_ether_addr(data->mac_addr)) {
0537         eth_hw_addr_set(ndev, data->mac_addr);
0538     } else {
0539         eth_hw_addr_random(ndev);
0540     }
0541 
0542     mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0543     priv->base = devm_ioremap_resource(&pdev->dev, mem);
0544     if (IS_ERR(priv->base))
0545         return PTR_ERR(priv->base);
0546 
0547     mem_size = resource_size(mem);
0548 
0549     spin_lock_init(&priv->reg_lock);
0550     priv->indirect = mem_size < W5300_BUS_DIRECT_SIZE;
0551     if (priv->indirect) {
0552         priv->read  = w5300_read_indirect;
0553         priv->write = w5300_write_indirect;
0554     } else {
0555         priv->read  = w5300_read_direct;
0556         priv->write = w5300_write_direct;
0557     }
0558 
0559     w5300_hw_reset(priv);
0560     if (w5300_read(priv, W5300_IDR) != IDR_W5300)
0561         return -ENODEV;
0562 
0563     irq = platform_get_irq(pdev, 0);
0564     if (irq < 0)
0565         return irq;
0566     ret = request_irq(irq, w5300_interrupt,
0567               IRQ_TYPE_LEVEL_LOW, name, ndev);
0568     if (ret < 0)
0569         return ret;
0570     priv->irq = irq;
0571 
0572     priv->link_gpio = data ? data->link_gpio : -EINVAL;
0573     if (gpio_is_valid(priv->link_gpio)) {
0574         char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
0575         if (!link_name)
0576             return -ENOMEM;
0577         snprintf(link_name, 16, "%s-link", name);
0578         priv->link_irq = gpio_to_irq(priv->link_gpio);
0579         if (request_any_context_irq(priv->link_irq, w5300_detect_link,
0580                 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
0581                 link_name, priv->ndev) < 0)
0582             priv->link_gpio = -EINVAL;
0583     }
0584 
0585     netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
0586     return 0;
0587 }
0588 
0589 static int w5300_probe(struct platform_device *pdev)
0590 {
0591     struct w5300_priv *priv;
0592     struct net_device *ndev;
0593     int err;
0594 
0595     ndev = alloc_etherdev(sizeof(*priv));
0596     if (!ndev)
0597         return -ENOMEM;
0598     SET_NETDEV_DEV(ndev, &pdev->dev);
0599     platform_set_drvdata(pdev, ndev);
0600     priv = netdev_priv(ndev);
0601     priv->ndev = ndev;
0602 
0603     ndev->netdev_ops = &w5300_netdev_ops;
0604     ndev->ethtool_ops = &w5300_ethtool_ops;
0605     ndev->watchdog_timeo = HZ;
0606     netif_napi_add_weight(ndev, &priv->napi, w5300_napi_poll, 16);
0607 
0608     /* This chip doesn't support VLAN packets with normal MTU,
0609      * so disable VLAN for this device.
0610      */
0611     ndev->features |= NETIF_F_VLAN_CHALLENGED;
0612 
0613     err = register_netdev(ndev);
0614     if (err < 0)
0615         goto err_register;
0616 
0617     err = w5300_hw_probe(pdev);
0618     if (err < 0)
0619         goto err_hw_probe;
0620 
0621     return 0;
0622 
0623 err_hw_probe:
0624     unregister_netdev(ndev);
0625 err_register:
0626     free_netdev(ndev);
0627     return err;
0628 }
0629 
0630 static int w5300_remove(struct platform_device *pdev)
0631 {
0632     struct net_device *ndev = platform_get_drvdata(pdev);
0633     struct w5300_priv *priv = netdev_priv(ndev);
0634 
0635     w5300_hw_reset(priv);
0636     free_irq(priv->irq, ndev);
0637     if (gpio_is_valid(priv->link_gpio))
0638         free_irq(priv->link_irq, ndev);
0639 
0640     unregister_netdev(ndev);
0641     free_netdev(ndev);
0642     return 0;
0643 }
0644 
0645 #ifdef CONFIG_PM_SLEEP
0646 static int w5300_suspend(struct device *dev)
0647 {
0648     struct net_device *ndev = dev_get_drvdata(dev);
0649     struct w5300_priv *priv = netdev_priv(ndev);
0650 
0651     if (netif_running(ndev)) {
0652         netif_carrier_off(ndev);
0653         netif_device_detach(ndev);
0654 
0655         w5300_hw_close(priv);
0656     }
0657     return 0;
0658 }
0659 
0660 static int w5300_resume(struct device *dev)
0661 {
0662     struct net_device *ndev = dev_get_drvdata(dev);
0663     struct w5300_priv *priv = netdev_priv(ndev);
0664 
0665     if (!netif_running(ndev)) {
0666         w5300_hw_reset(priv);
0667         w5300_hw_start(priv);
0668 
0669         netif_device_attach(ndev);
0670         if (!gpio_is_valid(priv->link_gpio) ||
0671             gpio_get_value(priv->link_gpio) != 0)
0672             netif_carrier_on(ndev);
0673     }
0674     return 0;
0675 }
0676 #endif /* CONFIG_PM_SLEEP */
0677 
0678 static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);
0679 
0680 static struct platform_driver w5300_driver = {
0681     .driver     = {
0682         .name   = DRV_NAME,
0683         .pm = &w5300_pm_ops,
0684     },
0685     .probe      = w5300_probe,
0686     .remove     = w5300_remove,
0687 };
0688 
0689 module_platform_driver(w5300_driver);
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