stmicro/stmmac/stmmac_pcs.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * stmmac_pcs.h: Physical Coding Sublayer Header File
0004  *
0005  * Copyright (C) 2016 STMicroelectronics (R&D) Limited
0006  * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
0007  */
0008
0009 #ifndef __STMMAC_PCS_H__
0010 #define __STMMAC_PCS_H__
0011
0012 #include <linux/slab.h>
0013 #include <linux/io.h>
0014 #include "common.h"
0015
0016 /* PCS registers (AN/TBI/SGMII/RGMII) offsets */
0017 #define GMAC_AN_CTRL(x)     (x)     /* AN control */
0018 #define GMAC_AN_STATUS(x)   (x + 0x4)   /* AN status */
0019 #define GMAC_ANE_ADV(x)     (x + 0x8)   /* ANE Advertisement */
0020 #define GMAC_ANE_LPA(x)     (x + 0xc)   /* ANE link partener ability */
0021 #define GMAC_ANE_EXP(x)     (x + 0x10)  /* ANE expansion */
0022 #define GMAC_TBI(x)     (x + 0x14)  /* TBI extend status */
0023
0024 /* AN Configuration defines */
0025 #define GMAC_AN_CTRL_RAN    BIT(9)  /* Restart Auto-Negotiation */
0026 #define GMAC_AN_CTRL_ANE    BIT(12) /* Auto-Negotiation Enable */
0027 #define GMAC_AN_CTRL_ELE    BIT(14) /* External Loopback Enable */
0028 #define GMAC_AN_CTRL_ECD    BIT(16) /* Enable Comma Detect */
0029 #define GMAC_AN_CTRL_LR     BIT(17) /* Lock to Reference */
0030 #define GMAC_AN_CTRL_SGMRAL BIT(18) /* SGMII RAL Control */
0031
0032 /* AN Status defines */
0033 #define GMAC_AN_STATUS_LS   BIT(2)  /* Link Status 0:down 1:up */
0034 #define GMAC_AN_STATUS_ANA  BIT(3)  /* Auto-Negotiation Ability */
0035 #define GMAC_AN_STATUS_ANC  BIT(5)  /* Auto-Negotiation Complete */
0036 #define GMAC_AN_STATUS_ES   BIT(8)  /* Extended Status */
0037
0038 /* ADV and LPA defines */
0039 #define GMAC_ANE_FD     BIT(5)
0040 #define GMAC_ANE_HD     BIT(6)
0041 #define GMAC_ANE_PSE        GENMASK(8, 7)
0042 #define GMAC_ANE_PSE_SHIFT  7
0043 #define GMAC_ANE_RFE        GENMASK(13, 12)
0044 #define GMAC_ANE_RFE_SHIFT  12
0045 #define GMAC_ANE_ACK        BIT(14)
0046
0047 /**
0048  * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
0049  * @ioaddr: IO registers pointer
0050  * @reg: Base address of the AN Control Register.
0051  * @intr_status: GMAC core interrupt status
0052  * @x: pointer to log these events as stats
0053  * Description: it is the ISR for PCS events: Auto-Negotiation Completed and
0054  * Link status.
0055  */
0056 static inline void dwmac_pcs_isr(void __iomem *ioaddr, u32 reg,
0057                  unsigned int intr_status,
0058                  struct stmmac_extra_stats *x)
0059 {
0060     u32 val = readl(ioaddr + GMAC_AN_STATUS(reg));
0061
0062     if (intr_status & PCS_ANE_IRQ) {
0063         x->irq_pcs_ane_n++;
0064         if (val & GMAC_AN_STATUS_ANC)
0065             pr_info("stmmac_pcs: ANE process completed\n");
0066     }
0067
0068     if (intr_status & PCS_LINK_IRQ) {
0069         x->irq_pcs_link_n++;
0070         if (val & GMAC_AN_STATUS_LS)
0071             pr_info("stmmac_pcs: Link Up\n");
0072         else
0073             pr_info("stmmac_pcs: Link Down\n");
0074     }
0075 }
0076
0077 /**
0078  * dwmac_rane - To restart ANE
0079  * @ioaddr: IO registers pointer
0080  * @reg: Base address of the AN Control Register.
0081  * @restart: to restart ANE
0082  * Description: this is to just restart the Auto-Negotiation.
0083  */
0084 static inline void dwmac_rane(void __iomem *ioaddr, u32 reg, bool restart)
0085 {
0086     u32 value = readl(ioaddr + GMAC_AN_CTRL(reg));
0087
0088     if (restart)
0089         value |= GMAC_AN_CTRL_RAN;
0090
0091     writel(value, ioaddr + GMAC_AN_CTRL(reg));
0092 }
0093
0094 /**
0095  * dwmac_ctrl_ane - To program the AN Control Register.
0096  * @ioaddr: IO registers pointer
0097  * @reg: Base address of the AN Control Register.
0098  * @ane: to enable the auto-negotiation
0099  * @srgmi_ral: to manage MAC-2-MAC SGMII connections.
0100  * @loopback: to cause the PHY to loopback tx data into rx path.
0101  * Description: this is the main function to configure the AN control register
0102  * and init the ANE, select loopback (usually for debugging purpose) and
0103  * configure SGMII RAL.
0104  */
0105 static inline void dwmac_ctrl_ane(void __iomem *ioaddr, u32 reg, bool ane,
0106                   bool srgmi_ral, bool loopback)
0107 {
0108     u32 value = readl(ioaddr + GMAC_AN_CTRL(reg));
0109
0110     /* Enable and restart the Auto-Negotiation */
0111     if (ane)
0112         value |= GMAC_AN_CTRL_ANE | GMAC_AN_CTRL_RAN;
0113
0114     /* In case of MAC-2-MAC connection, block is configured to operate
0115      * according to MAC conf register.
0116      */
0117     if (srgmi_ral)
0118         value |= GMAC_AN_CTRL_SGMRAL;
0119
0120     if (loopback)
0121         value |= GMAC_AN_CTRL_ELE;
0122
0123     writel(value, ioaddr + GMAC_AN_CTRL(reg));
0124 }
0125
0126 /**
0127  * dwmac_get_adv_lp - Get ADV and LP cap
0128  * @ioaddr: IO registers pointer
0129  * @reg: Base address of the AN Control Register.
0130  * @adv_lp: structure to store the adv,lp status
0131  * Description: this is to expose the ANE advertisement and Link partner ability
0132  * status to ethtool support.
0133  */
0134 static inline void dwmac_get_adv_lp(void __iomem *ioaddr, u32 reg,
0135                     struct rgmii_adv *adv_lp)
0136 {
0137     u32 value = readl(ioaddr + GMAC_ANE_ADV(reg));
0138
0139     if (value & GMAC_ANE_FD)
0140         adv_lp->duplex = DUPLEX_FULL;
0141     if (value & GMAC_ANE_HD)
0142         adv_lp->duplex |= DUPLEX_HALF;
0143
0144     adv_lp->pause = (value & GMAC_ANE_PSE) >> GMAC_ANE_PSE_SHIFT;
0145
0146     value = readl(ioaddr + GMAC_ANE_LPA(reg));
0147
0148     if (value & GMAC_ANE_FD)
0149         adv_lp->lp_duplex = DUPLEX_FULL;
0150     if (value & GMAC_ANE_HD)
0151         adv_lp->lp_duplex = DUPLEX_HALF;
0152
0153     adv_lp->lp_pause = (value & GMAC_ANE_PSE) >> GMAC_ANE_PSE_SHIFT;
0154 }
0155 #endif /* __STMMAC_PCS_H__ */