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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*******************************************************************************
0003   STMMAC Ethtool support
0004 
0005   Copyright (C) 2007-2009  STMicroelectronics Ltd
0006 
0007 
0008   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
0009 *******************************************************************************/
0010 
0011 #include <linux/etherdevice.h>
0012 #include <linux/ethtool.h>
0013 #include <linux/interrupt.h>
0014 #include <linux/mii.h>
0015 #include <linux/phylink.h>
0016 #include <linux/net_tstamp.h>
0017 #include <asm/io.h>
0018 
0019 #include "stmmac.h"
0020 #include "dwmac_dma.h"
0021 #include "dwxgmac2.h"
0022 
0023 #define REG_SPACE_SIZE  0x1060
0024 #define GMAC4_REG_SPACE_SIZE    0x116C
0025 #define MAC100_ETHTOOL_NAME "st_mac100"
0026 #define GMAC_ETHTOOL_NAME   "st_gmac"
0027 #define XGMAC_ETHTOOL_NAME  "st_xgmac"
0028 
0029 /* Same as DMA_CHAN_BASE_ADDR defined in dwmac4_dma.h
0030  *
0031  * It is here because dwmac_dma.h and dwmac4_dam.h can not be included at the
0032  * same time due to the conflicting macro names.
0033  */
0034 #define GMAC4_DMA_CHAN_BASE_ADDR  0x00001100
0035 
0036 #define ETHTOOL_DMA_OFFSET  55
0037 
0038 struct stmmac_stats {
0039     char stat_string[ETH_GSTRING_LEN];
0040     int sizeof_stat;
0041     int stat_offset;
0042 };
0043 
0044 #define STMMAC_STAT(m)  \
0045     { #m, sizeof_field(struct stmmac_extra_stats, m),   \
0046     offsetof(struct stmmac_priv, xstats.m)}
0047 
0048 static const struct stmmac_stats stmmac_gstrings_stats[] = {
0049     /* Transmit errors */
0050     STMMAC_STAT(tx_underflow),
0051     STMMAC_STAT(tx_carrier),
0052     STMMAC_STAT(tx_losscarrier),
0053     STMMAC_STAT(vlan_tag),
0054     STMMAC_STAT(tx_deferred),
0055     STMMAC_STAT(tx_vlan),
0056     STMMAC_STAT(tx_jabber),
0057     STMMAC_STAT(tx_frame_flushed),
0058     STMMAC_STAT(tx_payload_error),
0059     STMMAC_STAT(tx_ip_header_error),
0060     /* Receive errors */
0061     STMMAC_STAT(rx_desc),
0062     STMMAC_STAT(sa_filter_fail),
0063     STMMAC_STAT(overflow_error),
0064     STMMAC_STAT(ipc_csum_error),
0065     STMMAC_STAT(rx_collision),
0066     STMMAC_STAT(rx_crc_errors),
0067     STMMAC_STAT(dribbling_bit),
0068     STMMAC_STAT(rx_length),
0069     STMMAC_STAT(rx_mii),
0070     STMMAC_STAT(rx_multicast),
0071     STMMAC_STAT(rx_gmac_overflow),
0072     STMMAC_STAT(rx_watchdog),
0073     STMMAC_STAT(da_rx_filter_fail),
0074     STMMAC_STAT(sa_rx_filter_fail),
0075     STMMAC_STAT(rx_missed_cntr),
0076     STMMAC_STAT(rx_overflow_cntr),
0077     STMMAC_STAT(rx_vlan),
0078     STMMAC_STAT(rx_split_hdr_pkt_n),
0079     /* Tx/Rx IRQ error info */
0080     STMMAC_STAT(tx_undeflow_irq),
0081     STMMAC_STAT(tx_process_stopped_irq),
0082     STMMAC_STAT(tx_jabber_irq),
0083     STMMAC_STAT(rx_overflow_irq),
0084     STMMAC_STAT(rx_buf_unav_irq),
0085     STMMAC_STAT(rx_process_stopped_irq),
0086     STMMAC_STAT(rx_watchdog_irq),
0087     STMMAC_STAT(tx_early_irq),
0088     STMMAC_STAT(fatal_bus_error_irq),
0089     /* Tx/Rx IRQ Events */
0090     STMMAC_STAT(rx_early_irq),
0091     STMMAC_STAT(threshold),
0092     STMMAC_STAT(tx_pkt_n),
0093     STMMAC_STAT(rx_pkt_n),
0094     STMMAC_STAT(normal_irq_n),
0095     STMMAC_STAT(rx_normal_irq_n),
0096     STMMAC_STAT(napi_poll),
0097     STMMAC_STAT(tx_normal_irq_n),
0098     STMMAC_STAT(tx_clean),
0099     STMMAC_STAT(tx_set_ic_bit),
0100     STMMAC_STAT(irq_receive_pmt_irq_n),
0101     /* MMC info */
0102     STMMAC_STAT(mmc_tx_irq_n),
0103     STMMAC_STAT(mmc_rx_irq_n),
0104     STMMAC_STAT(mmc_rx_csum_offload_irq_n),
0105     /* EEE */
0106     STMMAC_STAT(irq_tx_path_in_lpi_mode_n),
0107     STMMAC_STAT(irq_tx_path_exit_lpi_mode_n),
0108     STMMAC_STAT(irq_rx_path_in_lpi_mode_n),
0109     STMMAC_STAT(irq_rx_path_exit_lpi_mode_n),
0110     STMMAC_STAT(phy_eee_wakeup_error_n),
0111     /* Extended RDES status */
0112     STMMAC_STAT(ip_hdr_err),
0113     STMMAC_STAT(ip_payload_err),
0114     STMMAC_STAT(ip_csum_bypassed),
0115     STMMAC_STAT(ipv4_pkt_rcvd),
0116     STMMAC_STAT(ipv6_pkt_rcvd),
0117     STMMAC_STAT(no_ptp_rx_msg_type_ext),
0118     STMMAC_STAT(ptp_rx_msg_type_sync),
0119     STMMAC_STAT(ptp_rx_msg_type_follow_up),
0120     STMMAC_STAT(ptp_rx_msg_type_delay_req),
0121     STMMAC_STAT(ptp_rx_msg_type_delay_resp),
0122     STMMAC_STAT(ptp_rx_msg_type_pdelay_req),
0123     STMMAC_STAT(ptp_rx_msg_type_pdelay_resp),
0124     STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up),
0125     STMMAC_STAT(ptp_rx_msg_type_announce),
0126     STMMAC_STAT(ptp_rx_msg_type_management),
0127     STMMAC_STAT(ptp_rx_msg_pkt_reserved_type),
0128     STMMAC_STAT(ptp_frame_type),
0129     STMMAC_STAT(ptp_ver),
0130     STMMAC_STAT(timestamp_dropped),
0131     STMMAC_STAT(av_pkt_rcvd),
0132     STMMAC_STAT(av_tagged_pkt_rcvd),
0133     STMMAC_STAT(vlan_tag_priority_val),
0134     STMMAC_STAT(l3_filter_match),
0135     STMMAC_STAT(l4_filter_match),
0136     STMMAC_STAT(l3_l4_filter_no_match),
0137     /* PCS */
0138     STMMAC_STAT(irq_pcs_ane_n),
0139     STMMAC_STAT(irq_pcs_link_n),
0140     STMMAC_STAT(irq_rgmii_n),
0141     /* DEBUG */
0142     STMMAC_STAT(mtl_tx_status_fifo_full),
0143     STMMAC_STAT(mtl_tx_fifo_not_empty),
0144     STMMAC_STAT(mmtl_fifo_ctrl),
0145     STMMAC_STAT(mtl_tx_fifo_read_ctrl_write),
0146     STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait),
0147     STMMAC_STAT(mtl_tx_fifo_read_ctrl_read),
0148     STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle),
0149     STMMAC_STAT(mac_tx_in_pause),
0150     STMMAC_STAT(mac_tx_frame_ctrl_xfer),
0151     STMMAC_STAT(mac_tx_frame_ctrl_idle),
0152     STMMAC_STAT(mac_tx_frame_ctrl_wait),
0153     STMMAC_STAT(mac_tx_frame_ctrl_pause),
0154     STMMAC_STAT(mac_gmii_tx_proto_engine),
0155     STMMAC_STAT(mtl_rx_fifo_fill_level_full),
0156     STMMAC_STAT(mtl_rx_fifo_fill_above_thresh),
0157     STMMAC_STAT(mtl_rx_fifo_fill_below_thresh),
0158     STMMAC_STAT(mtl_rx_fifo_fill_level_empty),
0159     STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush),
0160     STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data),
0161     STMMAC_STAT(mtl_rx_fifo_read_ctrl_status),
0162     STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle),
0163     STMMAC_STAT(mtl_rx_fifo_ctrl_active),
0164     STMMAC_STAT(mac_rx_frame_ctrl_fifo),
0165     STMMAC_STAT(mac_gmii_rx_proto_engine),
0166     /* TSO */
0167     STMMAC_STAT(tx_tso_frames),
0168     STMMAC_STAT(tx_tso_nfrags),
0169     /* EST */
0170     STMMAC_STAT(mtl_est_cgce),
0171     STMMAC_STAT(mtl_est_hlbs),
0172     STMMAC_STAT(mtl_est_hlbf),
0173     STMMAC_STAT(mtl_est_btre),
0174     STMMAC_STAT(mtl_est_btrlm),
0175 };
0176 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
0177 
0178 /* HW MAC Management counters (if supported) */
0179 #define STMMAC_MMC_STAT(m)  \
0180     { #m, sizeof_field(struct stmmac_counters, m),  \
0181     offsetof(struct stmmac_priv, mmc.m)}
0182 
0183 static const struct stmmac_stats stmmac_mmc[] = {
0184     STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
0185     STMMAC_MMC_STAT(mmc_tx_framecount_gb),
0186     STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
0187     STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
0188     STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
0189     STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
0190     STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
0191     STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
0192     STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
0193     STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
0194     STMMAC_MMC_STAT(mmc_tx_unicast_gb),
0195     STMMAC_MMC_STAT(mmc_tx_multicast_gb),
0196     STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
0197     STMMAC_MMC_STAT(mmc_tx_underflow_error),
0198     STMMAC_MMC_STAT(mmc_tx_singlecol_g),
0199     STMMAC_MMC_STAT(mmc_tx_multicol_g),
0200     STMMAC_MMC_STAT(mmc_tx_deferred),
0201     STMMAC_MMC_STAT(mmc_tx_latecol),
0202     STMMAC_MMC_STAT(mmc_tx_exesscol),
0203     STMMAC_MMC_STAT(mmc_tx_carrier_error),
0204     STMMAC_MMC_STAT(mmc_tx_octetcount_g),
0205     STMMAC_MMC_STAT(mmc_tx_framecount_g),
0206     STMMAC_MMC_STAT(mmc_tx_excessdef),
0207     STMMAC_MMC_STAT(mmc_tx_pause_frame),
0208     STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
0209     STMMAC_MMC_STAT(mmc_rx_framecount_gb),
0210     STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
0211     STMMAC_MMC_STAT(mmc_rx_octetcount_g),
0212     STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
0213     STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
0214     STMMAC_MMC_STAT(mmc_rx_crc_error),
0215     STMMAC_MMC_STAT(mmc_rx_align_error),
0216     STMMAC_MMC_STAT(mmc_rx_run_error),
0217     STMMAC_MMC_STAT(mmc_rx_jabber_error),
0218     STMMAC_MMC_STAT(mmc_rx_undersize_g),
0219     STMMAC_MMC_STAT(mmc_rx_oversize_g),
0220     STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
0221     STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
0222     STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
0223     STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
0224     STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
0225     STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
0226     STMMAC_MMC_STAT(mmc_rx_unicast_g),
0227     STMMAC_MMC_STAT(mmc_rx_length_error),
0228     STMMAC_MMC_STAT(mmc_rx_autofrangetype),
0229     STMMAC_MMC_STAT(mmc_rx_pause_frames),
0230     STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
0231     STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
0232     STMMAC_MMC_STAT(mmc_rx_watchdog_error),
0233     STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
0234     STMMAC_MMC_STAT(mmc_rx_ipc_intr),
0235     STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
0236     STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
0237     STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
0238     STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
0239     STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
0240     STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
0241     STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
0242     STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
0243     STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
0244     STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
0245     STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
0246     STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
0247     STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
0248     STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
0249     STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
0250     STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
0251     STMMAC_MMC_STAT(mmc_rx_udp_gd),
0252     STMMAC_MMC_STAT(mmc_rx_udp_err),
0253     STMMAC_MMC_STAT(mmc_rx_tcp_gd),
0254     STMMAC_MMC_STAT(mmc_rx_tcp_err),
0255     STMMAC_MMC_STAT(mmc_rx_icmp_gd),
0256     STMMAC_MMC_STAT(mmc_rx_icmp_err),
0257     STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
0258     STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
0259     STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
0260     STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
0261     STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
0262     STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
0263     STMMAC_MMC_STAT(mmc_tx_fpe_fragment_cntr),
0264     STMMAC_MMC_STAT(mmc_tx_hold_req_cntr),
0265     STMMAC_MMC_STAT(mmc_rx_packet_assembly_err_cntr),
0266     STMMAC_MMC_STAT(mmc_rx_packet_smd_err_cntr),
0267     STMMAC_MMC_STAT(mmc_rx_packet_assembly_ok_cntr),
0268     STMMAC_MMC_STAT(mmc_rx_fpe_fragment_cntr),
0269 };
0270 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
0271 
0272 static const char stmmac_qstats_tx_string[][ETH_GSTRING_LEN] = {
0273     "tx_pkt_n",
0274     "tx_irq_n",
0275 #define STMMAC_TXQ_STATS ARRAY_SIZE(stmmac_qstats_tx_string)
0276 };
0277 
0278 static const char stmmac_qstats_rx_string[][ETH_GSTRING_LEN] = {
0279     "rx_pkt_n",
0280     "rx_irq_n",
0281 #define STMMAC_RXQ_STATS ARRAY_SIZE(stmmac_qstats_rx_string)
0282 };
0283 
0284 static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
0285                       struct ethtool_drvinfo *info)
0286 {
0287     struct stmmac_priv *priv = netdev_priv(dev);
0288 
0289     if (priv->plat->has_gmac || priv->plat->has_gmac4)
0290         strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
0291     else if (priv->plat->has_xgmac)
0292         strlcpy(info->driver, XGMAC_ETHTOOL_NAME, sizeof(info->driver));
0293     else
0294         strlcpy(info->driver, MAC100_ETHTOOL_NAME,
0295             sizeof(info->driver));
0296 
0297     if (priv->plat->pdev) {
0298         strlcpy(info->bus_info, pci_name(priv->plat->pdev),
0299             sizeof(info->bus_info));
0300     }
0301 }
0302 
0303 static int stmmac_ethtool_get_link_ksettings(struct net_device *dev,
0304                          struct ethtool_link_ksettings *cmd)
0305 {
0306     struct stmmac_priv *priv = netdev_priv(dev);
0307 
0308     if (priv->hw->pcs & STMMAC_PCS_RGMII ||
0309         priv->hw->pcs & STMMAC_PCS_SGMII) {
0310         struct rgmii_adv adv;
0311         u32 supported, advertising, lp_advertising;
0312 
0313         if (!priv->xstats.pcs_link) {
0314             cmd->base.speed = SPEED_UNKNOWN;
0315             cmd->base.duplex = DUPLEX_UNKNOWN;
0316             return 0;
0317         }
0318         cmd->base.duplex = priv->xstats.pcs_duplex;
0319 
0320         cmd->base.speed = priv->xstats.pcs_speed;
0321 
0322         /* Get and convert ADV/LP_ADV from the HW AN registers */
0323         if (stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv))
0324             return -EOPNOTSUPP; /* should never happen indeed */
0325 
0326         /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */
0327 
0328         ethtool_convert_link_mode_to_legacy_u32(
0329             &supported, cmd->link_modes.supported);
0330         ethtool_convert_link_mode_to_legacy_u32(
0331             &advertising, cmd->link_modes.advertising);
0332         ethtool_convert_link_mode_to_legacy_u32(
0333             &lp_advertising, cmd->link_modes.lp_advertising);
0334 
0335         if (adv.pause & STMMAC_PCS_PAUSE)
0336             advertising |= ADVERTISED_Pause;
0337         if (adv.pause & STMMAC_PCS_ASYM_PAUSE)
0338             advertising |= ADVERTISED_Asym_Pause;
0339         if (adv.lp_pause & STMMAC_PCS_PAUSE)
0340             lp_advertising |= ADVERTISED_Pause;
0341         if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE)
0342             lp_advertising |= ADVERTISED_Asym_Pause;
0343 
0344         /* Reg49[3] always set because ANE is always supported */
0345         cmd->base.autoneg = ADVERTISED_Autoneg;
0346         supported |= SUPPORTED_Autoneg;
0347         advertising |= ADVERTISED_Autoneg;
0348         lp_advertising |= ADVERTISED_Autoneg;
0349 
0350         if (adv.duplex) {
0351             supported |= (SUPPORTED_1000baseT_Full |
0352                       SUPPORTED_100baseT_Full |
0353                       SUPPORTED_10baseT_Full);
0354             advertising |= (ADVERTISED_1000baseT_Full |
0355                     ADVERTISED_100baseT_Full |
0356                     ADVERTISED_10baseT_Full);
0357         } else {
0358             supported |= (SUPPORTED_1000baseT_Half |
0359                       SUPPORTED_100baseT_Half |
0360                       SUPPORTED_10baseT_Half);
0361             advertising |= (ADVERTISED_1000baseT_Half |
0362                     ADVERTISED_100baseT_Half |
0363                     ADVERTISED_10baseT_Half);
0364         }
0365         if (adv.lp_duplex)
0366             lp_advertising |= (ADVERTISED_1000baseT_Full |
0367                        ADVERTISED_100baseT_Full |
0368                        ADVERTISED_10baseT_Full);
0369         else
0370             lp_advertising |= (ADVERTISED_1000baseT_Half |
0371                        ADVERTISED_100baseT_Half |
0372                        ADVERTISED_10baseT_Half);
0373         cmd->base.port = PORT_OTHER;
0374 
0375         ethtool_convert_legacy_u32_to_link_mode(
0376             cmd->link_modes.supported, supported);
0377         ethtool_convert_legacy_u32_to_link_mode(
0378             cmd->link_modes.advertising, advertising);
0379         ethtool_convert_legacy_u32_to_link_mode(
0380             cmd->link_modes.lp_advertising, lp_advertising);
0381 
0382         return 0;
0383     }
0384 
0385     return phylink_ethtool_ksettings_get(priv->phylink, cmd);
0386 }
0387 
0388 static int
0389 stmmac_ethtool_set_link_ksettings(struct net_device *dev,
0390                   const struct ethtool_link_ksettings *cmd)
0391 {
0392     struct stmmac_priv *priv = netdev_priv(dev);
0393 
0394     if (priv->hw->pcs & STMMAC_PCS_RGMII ||
0395         priv->hw->pcs & STMMAC_PCS_SGMII) {
0396         u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause;
0397 
0398         /* Only support ANE */
0399         if (cmd->base.autoneg != AUTONEG_ENABLE)
0400             return -EINVAL;
0401 
0402         mask &= (ADVERTISED_1000baseT_Half |
0403             ADVERTISED_1000baseT_Full |
0404             ADVERTISED_100baseT_Half |
0405             ADVERTISED_100baseT_Full |
0406             ADVERTISED_10baseT_Half |
0407             ADVERTISED_10baseT_Full);
0408 
0409         mutex_lock(&priv->lock);
0410         stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, priv->hw->ps, 0);
0411         mutex_unlock(&priv->lock);
0412 
0413         return 0;
0414     }
0415 
0416     return phylink_ethtool_ksettings_set(priv->phylink, cmd);
0417 }
0418 
0419 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
0420 {
0421     struct stmmac_priv *priv = netdev_priv(dev);
0422     return priv->msg_enable;
0423 }
0424 
0425 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
0426 {
0427     struct stmmac_priv *priv = netdev_priv(dev);
0428     priv->msg_enable = level;
0429 
0430 }
0431 
0432 static int stmmac_check_if_running(struct net_device *dev)
0433 {
0434     if (!netif_running(dev))
0435         return -EBUSY;
0436     return 0;
0437 }
0438 
0439 static int stmmac_ethtool_get_regs_len(struct net_device *dev)
0440 {
0441     struct stmmac_priv *priv = netdev_priv(dev);
0442 
0443     if (priv->plat->has_xgmac)
0444         return XGMAC_REGSIZE * 4;
0445     else if (priv->plat->has_gmac4)
0446         return GMAC4_REG_SPACE_SIZE;
0447     return REG_SPACE_SIZE;
0448 }
0449 
0450 static void stmmac_ethtool_gregs(struct net_device *dev,
0451               struct ethtool_regs *regs, void *space)
0452 {
0453     struct stmmac_priv *priv = netdev_priv(dev);
0454     u32 *reg_space = (u32 *) space;
0455 
0456     stmmac_dump_mac_regs(priv, priv->hw, reg_space);
0457     stmmac_dump_dma_regs(priv, priv->ioaddr, reg_space);
0458 
0459     /* Copy DMA registers to where ethtool expects them */
0460     if (priv->plat->has_gmac4) {
0461         /* GMAC4 dumps its DMA registers at its DMA_CHAN_BASE_ADDR */
0462         memcpy(&reg_space[ETHTOOL_DMA_OFFSET],
0463                &reg_space[GMAC4_DMA_CHAN_BASE_ADDR / 4],
0464                NUM_DWMAC4_DMA_REGS * 4);
0465     } else if (!priv->plat->has_xgmac) {
0466         memcpy(&reg_space[ETHTOOL_DMA_OFFSET],
0467                &reg_space[DMA_BUS_MODE / 4],
0468                NUM_DWMAC1000_DMA_REGS * 4);
0469     }
0470 }
0471 
0472 static int stmmac_nway_reset(struct net_device *dev)
0473 {
0474     struct stmmac_priv *priv = netdev_priv(dev);
0475 
0476     return phylink_ethtool_nway_reset(priv->phylink);
0477 }
0478 
0479 static void stmmac_get_ringparam(struct net_device *netdev,
0480                  struct ethtool_ringparam *ring,
0481                  struct kernel_ethtool_ringparam *kernel_ring,
0482                  struct netlink_ext_ack *extack)
0483 {
0484     struct stmmac_priv *priv = netdev_priv(netdev);
0485 
0486     ring->rx_max_pending = DMA_MAX_RX_SIZE;
0487     ring->tx_max_pending = DMA_MAX_TX_SIZE;
0488     ring->rx_pending = priv->dma_conf.dma_rx_size;
0489     ring->tx_pending = priv->dma_conf.dma_tx_size;
0490 }
0491 
0492 static int stmmac_set_ringparam(struct net_device *netdev,
0493                 struct ethtool_ringparam *ring,
0494                 struct kernel_ethtool_ringparam *kernel_ring,
0495                 struct netlink_ext_ack *extack)
0496 {
0497     if (ring->rx_mini_pending || ring->rx_jumbo_pending ||
0498         ring->rx_pending < DMA_MIN_RX_SIZE ||
0499         ring->rx_pending > DMA_MAX_RX_SIZE ||
0500         !is_power_of_2(ring->rx_pending) ||
0501         ring->tx_pending < DMA_MIN_TX_SIZE ||
0502         ring->tx_pending > DMA_MAX_TX_SIZE ||
0503         !is_power_of_2(ring->tx_pending))
0504         return -EINVAL;
0505 
0506     return stmmac_reinit_ringparam(netdev, ring->rx_pending,
0507                        ring->tx_pending);
0508 }
0509 
0510 static void
0511 stmmac_get_pauseparam(struct net_device *netdev,
0512               struct ethtool_pauseparam *pause)
0513 {
0514     struct stmmac_priv *priv = netdev_priv(netdev);
0515     struct rgmii_adv adv_lp;
0516 
0517     if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
0518         pause->autoneg = 1;
0519         if (!adv_lp.pause)
0520             return;
0521     } else {
0522         phylink_ethtool_get_pauseparam(priv->phylink, pause);
0523     }
0524 }
0525 
0526 static int
0527 stmmac_set_pauseparam(struct net_device *netdev,
0528               struct ethtool_pauseparam *pause)
0529 {
0530     struct stmmac_priv *priv = netdev_priv(netdev);
0531     struct rgmii_adv adv_lp;
0532 
0533     if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
0534         pause->autoneg = 1;
0535         if (!adv_lp.pause)
0536             return -EOPNOTSUPP;
0537         return 0;
0538     } else {
0539         return phylink_ethtool_set_pauseparam(priv->phylink, pause);
0540     }
0541 }
0542 
0543 static void stmmac_get_per_qstats(struct stmmac_priv *priv, u64 *data)
0544 {
0545     u32 tx_cnt = priv->plat->tx_queues_to_use;
0546     u32 rx_cnt = priv->plat->rx_queues_to_use;
0547     int q, stat;
0548     char *p;
0549 
0550     for (q = 0; q < tx_cnt; q++) {
0551         p = (char *)priv + offsetof(struct stmmac_priv,
0552                         xstats.txq_stats[q].tx_pkt_n);
0553         for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {
0554             *data++ = (*(u64 *)p);
0555             p += sizeof(u64 *);
0556         }
0557     }
0558     for (q = 0; q < rx_cnt; q++) {
0559         p = (char *)priv + offsetof(struct stmmac_priv,
0560                         xstats.rxq_stats[q].rx_pkt_n);
0561         for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {
0562             *data++ = (*(u64 *)p);
0563             p += sizeof(u64 *);
0564         }
0565     }
0566 }
0567 
0568 static void stmmac_get_ethtool_stats(struct net_device *dev,
0569                  struct ethtool_stats *dummy, u64 *data)
0570 {
0571     struct stmmac_priv *priv = netdev_priv(dev);
0572     u32 rx_queues_count = priv->plat->rx_queues_to_use;
0573     u32 tx_queues_count = priv->plat->tx_queues_to_use;
0574     unsigned long count;
0575     int i, j = 0, ret;
0576 
0577     if (priv->dma_cap.asp) {
0578         for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
0579             if (!stmmac_safety_feat_dump(priv, &priv->sstats, i,
0580                         &count, NULL))
0581                 data[j++] = count;
0582         }
0583     }
0584 
0585     /* Update the DMA HW counters for dwmac10/100 */
0586     ret = stmmac_dma_diagnostic_fr(priv, &dev->stats, (void *) &priv->xstats,
0587             priv->ioaddr);
0588     if (ret) {
0589         /* If supported, for new GMAC chips expose the MMC counters */
0590         if (priv->dma_cap.rmon) {
0591             stmmac_mmc_read(priv, priv->mmcaddr, &priv->mmc);
0592 
0593             for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
0594                 char *p;
0595                 p = (char *)priv + stmmac_mmc[i].stat_offset;
0596 
0597                 data[j++] = (stmmac_mmc[i].sizeof_stat ==
0598                          sizeof(u64)) ? (*(u64 *)p) :
0599                          (*(u32 *)p);
0600             }
0601         }
0602         if (priv->eee_enabled) {
0603             int val = phylink_get_eee_err(priv->phylink);
0604             if (val)
0605                 priv->xstats.phy_eee_wakeup_error_n = val;
0606         }
0607 
0608         if (priv->synopsys_id >= DWMAC_CORE_3_50)
0609             stmmac_mac_debug(priv, priv->ioaddr,
0610                     (void *)&priv->xstats,
0611                     rx_queues_count, tx_queues_count);
0612     }
0613     for (i = 0; i < STMMAC_STATS_LEN; i++) {
0614         char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
0615         data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
0616                  sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
0617     }
0618     stmmac_get_per_qstats(priv, &data[j]);
0619 }
0620 
0621 static int stmmac_get_sset_count(struct net_device *netdev, int sset)
0622 {
0623     struct stmmac_priv *priv = netdev_priv(netdev);
0624     u32 tx_cnt = priv->plat->tx_queues_to_use;
0625     u32 rx_cnt = priv->plat->rx_queues_to_use;
0626     int i, len, safety_len = 0;
0627 
0628     switch (sset) {
0629     case ETH_SS_STATS:
0630         len = STMMAC_STATS_LEN +
0631               STMMAC_TXQ_STATS * tx_cnt +
0632               STMMAC_RXQ_STATS * rx_cnt;
0633 
0634         if (priv->dma_cap.rmon)
0635             len += STMMAC_MMC_STATS_LEN;
0636         if (priv->dma_cap.asp) {
0637             for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
0638                 if (!stmmac_safety_feat_dump(priv,
0639                             &priv->sstats, i,
0640                             NULL, NULL))
0641                     safety_len++;
0642             }
0643 
0644             len += safety_len;
0645         }
0646 
0647         return len;
0648     case ETH_SS_TEST:
0649         return stmmac_selftest_get_count(priv);
0650     default:
0651         return -EOPNOTSUPP;
0652     }
0653 }
0654 
0655 static void stmmac_get_qstats_string(struct stmmac_priv *priv, u8 *data)
0656 {
0657     u32 tx_cnt = priv->plat->tx_queues_to_use;
0658     u32 rx_cnt = priv->plat->rx_queues_to_use;
0659     int q, stat;
0660 
0661     for (q = 0; q < tx_cnt; q++) {
0662         for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {
0663             snprintf(data, ETH_GSTRING_LEN, "q%d_%s", q,
0664                  stmmac_qstats_tx_string[stat]);
0665             data += ETH_GSTRING_LEN;
0666         }
0667     }
0668     for (q = 0; q < rx_cnt; q++) {
0669         for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {
0670             snprintf(data, ETH_GSTRING_LEN, "q%d_%s", q,
0671                  stmmac_qstats_rx_string[stat]);
0672             data += ETH_GSTRING_LEN;
0673         }
0674     }
0675 }
0676 
0677 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
0678 {
0679     int i;
0680     u8 *p = data;
0681     struct stmmac_priv *priv = netdev_priv(dev);
0682 
0683     switch (stringset) {
0684     case ETH_SS_STATS:
0685         if (priv->dma_cap.asp) {
0686             for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
0687                 const char *desc;
0688                 if (!stmmac_safety_feat_dump(priv,
0689                             &priv->sstats, i,
0690                             NULL, &desc)) {
0691                     memcpy(p, desc, ETH_GSTRING_LEN);
0692                     p += ETH_GSTRING_LEN;
0693                 }
0694             }
0695         }
0696         if (priv->dma_cap.rmon)
0697             for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
0698                 memcpy(p, stmmac_mmc[i].stat_string,
0699                        ETH_GSTRING_LEN);
0700                 p += ETH_GSTRING_LEN;
0701             }
0702         for (i = 0; i < STMMAC_STATS_LEN; i++) {
0703             memcpy(p, stmmac_gstrings_stats[i].stat_string,
0704                 ETH_GSTRING_LEN);
0705             p += ETH_GSTRING_LEN;
0706         }
0707         stmmac_get_qstats_string(priv, p);
0708         break;
0709     case ETH_SS_TEST:
0710         stmmac_selftest_get_strings(priv, p);
0711         break;
0712     default:
0713         WARN_ON(1);
0714         break;
0715     }
0716 }
0717 
0718 /* Currently only support WOL through Magic packet. */
0719 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
0720 {
0721     struct stmmac_priv *priv = netdev_priv(dev);
0722 
0723     if (!priv->plat->pmt)
0724         return phylink_ethtool_get_wol(priv->phylink, wol);
0725 
0726     mutex_lock(&priv->lock);
0727     if (device_can_wakeup(priv->device)) {
0728         wol->supported = WAKE_MAGIC | WAKE_UCAST;
0729         if (priv->hw_cap_support && !priv->dma_cap.pmt_magic_frame)
0730             wol->supported &= ~WAKE_MAGIC;
0731         wol->wolopts = priv->wolopts;
0732     }
0733     mutex_unlock(&priv->lock);
0734 }
0735 
0736 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
0737 {
0738     struct stmmac_priv *priv = netdev_priv(dev);
0739     u32 support = WAKE_MAGIC | WAKE_UCAST;
0740 
0741     if (!device_can_wakeup(priv->device))
0742         return -EOPNOTSUPP;
0743 
0744     if (!priv->plat->pmt) {
0745         int ret = phylink_ethtool_set_wol(priv->phylink, wol);
0746 
0747         if (!ret)
0748             device_set_wakeup_enable(priv->device, !!wol->wolopts);
0749         return ret;
0750     }
0751 
0752     /* By default almost all GMAC devices support the WoL via
0753      * magic frame but we can disable it if the HW capability
0754      * register shows no support for pmt_magic_frame. */
0755     if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
0756         wol->wolopts &= ~WAKE_MAGIC;
0757 
0758     if (wol->wolopts & ~support)
0759         return -EINVAL;
0760 
0761     if (wol->wolopts) {
0762         pr_info("stmmac: wakeup enable\n");
0763         device_set_wakeup_enable(priv->device, 1);
0764         enable_irq_wake(priv->wol_irq);
0765     } else {
0766         device_set_wakeup_enable(priv->device, 0);
0767         disable_irq_wake(priv->wol_irq);
0768     }
0769 
0770     mutex_lock(&priv->lock);
0771     priv->wolopts = wol->wolopts;
0772     mutex_unlock(&priv->lock);
0773 
0774     return 0;
0775 }
0776 
0777 static int stmmac_ethtool_op_get_eee(struct net_device *dev,
0778                      struct ethtool_eee *edata)
0779 {
0780     struct stmmac_priv *priv = netdev_priv(dev);
0781 
0782     if (!priv->dma_cap.eee)
0783         return -EOPNOTSUPP;
0784 
0785     edata->eee_enabled = priv->eee_enabled;
0786     edata->eee_active = priv->eee_active;
0787     edata->tx_lpi_timer = priv->tx_lpi_timer;
0788     edata->tx_lpi_enabled = priv->tx_lpi_enabled;
0789 
0790     return phylink_ethtool_get_eee(priv->phylink, edata);
0791 }
0792 
0793 static int stmmac_ethtool_op_set_eee(struct net_device *dev,
0794                      struct ethtool_eee *edata)
0795 {
0796     struct stmmac_priv *priv = netdev_priv(dev);
0797     int ret;
0798 
0799     if (!priv->dma_cap.eee)
0800         return -EOPNOTSUPP;
0801 
0802     if (priv->tx_lpi_enabled != edata->tx_lpi_enabled)
0803         netdev_warn(priv->dev,
0804                 "Setting EEE tx-lpi is not supported\n");
0805 
0806     if (!edata->eee_enabled)
0807         stmmac_disable_eee_mode(priv);
0808 
0809     ret = phylink_ethtool_set_eee(priv->phylink, edata);
0810     if (ret)
0811         return ret;
0812 
0813     if (edata->eee_enabled &&
0814         priv->tx_lpi_timer != edata->tx_lpi_timer) {
0815         priv->tx_lpi_timer = edata->tx_lpi_timer;
0816         stmmac_eee_init(priv);
0817     }
0818 
0819     return 0;
0820 }
0821 
0822 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
0823 {
0824     unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
0825 
0826     if (!clk) {
0827         clk = priv->plat->clk_ref_rate;
0828         if (!clk)
0829             return 0;
0830     }
0831 
0832     return (usec * (clk / 1000000)) / 256;
0833 }
0834 
0835 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
0836 {
0837     unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
0838 
0839     if (!clk) {
0840         clk = priv->plat->clk_ref_rate;
0841         if (!clk)
0842             return 0;
0843     }
0844 
0845     return (riwt * 256) / (clk / 1000000);
0846 }
0847 
0848 static int __stmmac_get_coalesce(struct net_device *dev,
0849                  struct ethtool_coalesce *ec,
0850                  int queue)
0851 {
0852     struct stmmac_priv *priv = netdev_priv(dev);
0853     u32 max_cnt;
0854     u32 rx_cnt;
0855     u32 tx_cnt;
0856 
0857     rx_cnt = priv->plat->rx_queues_to_use;
0858     tx_cnt = priv->plat->tx_queues_to_use;
0859     max_cnt = max(rx_cnt, tx_cnt);
0860 
0861     if (queue < 0)
0862         queue = 0;
0863     else if (queue >= max_cnt)
0864         return -EINVAL;
0865 
0866     if (queue < tx_cnt) {
0867         ec->tx_coalesce_usecs = priv->tx_coal_timer[queue];
0868         ec->tx_max_coalesced_frames = priv->tx_coal_frames[queue];
0869     } else {
0870         ec->tx_coalesce_usecs = 0;
0871         ec->tx_max_coalesced_frames = 0;
0872     }
0873 
0874     if (priv->use_riwt && queue < rx_cnt) {
0875         ec->rx_max_coalesced_frames = priv->rx_coal_frames[queue];
0876         ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt[queue],
0877                              priv);
0878     } else {
0879         ec->rx_max_coalesced_frames = 0;
0880         ec->rx_coalesce_usecs = 0;
0881     }
0882 
0883     return 0;
0884 }
0885 
0886 static int stmmac_get_coalesce(struct net_device *dev,
0887                    struct ethtool_coalesce *ec,
0888                    struct kernel_ethtool_coalesce *kernel_coal,
0889                    struct netlink_ext_ack *extack)
0890 {
0891     return __stmmac_get_coalesce(dev, ec, -1);
0892 }
0893 
0894 static int stmmac_get_per_queue_coalesce(struct net_device *dev, u32 queue,
0895                      struct ethtool_coalesce *ec)
0896 {
0897     return __stmmac_get_coalesce(dev, ec, queue);
0898 }
0899 
0900 static int __stmmac_set_coalesce(struct net_device *dev,
0901                  struct ethtool_coalesce *ec,
0902                  int queue)
0903 {
0904     struct stmmac_priv *priv = netdev_priv(dev);
0905     bool all_queues = false;
0906     unsigned int rx_riwt;
0907     u32 max_cnt;
0908     u32 rx_cnt;
0909     u32 tx_cnt;
0910 
0911     rx_cnt = priv->plat->rx_queues_to_use;
0912     tx_cnt = priv->plat->tx_queues_to_use;
0913     max_cnt = max(rx_cnt, tx_cnt);
0914 
0915     if (queue < 0)
0916         all_queues = true;
0917     else if (queue >= max_cnt)
0918         return -EINVAL;
0919 
0920     if (priv->use_riwt && (ec->rx_coalesce_usecs > 0)) {
0921         rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv);
0922 
0923         if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT))
0924             return -EINVAL;
0925 
0926         if (all_queues) {
0927             int i;
0928 
0929             for (i = 0; i < rx_cnt; i++) {
0930                 priv->rx_riwt[i] = rx_riwt;
0931                 stmmac_rx_watchdog(priv, priv->ioaddr,
0932                            rx_riwt, i);
0933                 priv->rx_coal_frames[i] =
0934                     ec->rx_max_coalesced_frames;
0935             }
0936         } else if (queue < rx_cnt) {
0937             priv->rx_riwt[queue] = rx_riwt;
0938             stmmac_rx_watchdog(priv, priv->ioaddr,
0939                        rx_riwt, queue);
0940             priv->rx_coal_frames[queue] =
0941                 ec->rx_max_coalesced_frames;
0942         }
0943     }
0944 
0945     if ((ec->tx_coalesce_usecs == 0) &&
0946         (ec->tx_max_coalesced_frames == 0))
0947         return -EINVAL;
0948 
0949     if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) ||
0950         (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
0951         return -EINVAL;
0952 
0953     if (all_queues) {
0954         int i;
0955 
0956         for (i = 0; i < tx_cnt; i++) {
0957             priv->tx_coal_frames[i] =
0958                 ec->tx_max_coalesced_frames;
0959             priv->tx_coal_timer[i] =
0960                 ec->tx_coalesce_usecs;
0961         }
0962     } else if (queue < tx_cnt) {
0963         priv->tx_coal_frames[queue] =
0964             ec->tx_max_coalesced_frames;
0965         priv->tx_coal_timer[queue] =
0966             ec->tx_coalesce_usecs;
0967     }
0968 
0969     return 0;
0970 }
0971 
0972 static int stmmac_set_coalesce(struct net_device *dev,
0973                    struct ethtool_coalesce *ec,
0974                    struct kernel_ethtool_coalesce *kernel_coal,
0975                    struct netlink_ext_ack *extack)
0976 {
0977     return __stmmac_set_coalesce(dev, ec, -1);
0978 }
0979 
0980 static int stmmac_set_per_queue_coalesce(struct net_device *dev, u32 queue,
0981                      struct ethtool_coalesce *ec)
0982 {
0983     return __stmmac_set_coalesce(dev, ec, queue);
0984 }
0985 
0986 static int stmmac_get_rxnfc(struct net_device *dev,
0987                 struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
0988 {
0989     struct stmmac_priv *priv = netdev_priv(dev);
0990 
0991     switch (rxnfc->cmd) {
0992     case ETHTOOL_GRXRINGS:
0993         rxnfc->data = priv->plat->rx_queues_to_use;
0994         break;
0995     default:
0996         return -EOPNOTSUPP;
0997     }
0998 
0999     return 0;
1000 }
1001 
1002 static u32 stmmac_get_rxfh_key_size(struct net_device *dev)
1003 {
1004     struct stmmac_priv *priv = netdev_priv(dev);
1005 
1006     return sizeof(priv->rss.key);
1007 }
1008 
1009 static u32 stmmac_get_rxfh_indir_size(struct net_device *dev)
1010 {
1011     struct stmmac_priv *priv = netdev_priv(dev);
1012 
1013     return ARRAY_SIZE(priv->rss.table);
1014 }
1015 
1016 static int stmmac_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
1017                u8 *hfunc)
1018 {
1019     struct stmmac_priv *priv = netdev_priv(dev);
1020     int i;
1021 
1022     if (indir) {
1023         for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
1024             indir[i] = priv->rss.table[i];
1025     }
1026 
1027     if (key)
1028         memcpy(key, priv->rss.key, sizeof(priv->rss.key));
1029     if (hfunc)
1030         *hfunc = ETH_RSS_HASH_TOP;
1031 
1032     return 0;
1033 }
1034 
1035 static int stmmac_set_rxfh(struct net_device *dev, const u32 *indir,
1036                const u8 *key, const u8 hfunc)
1037 {
1038     struct stmmac_priv *priv = netdev_priv(dev);
1039     int i;
1040 
1041     if ((hfunc != ETH_RSS_HASH_NO_CHANGE) && (hfunc != ETH_RSS_HASH_TOP))
1042         return -EOPNOTSUPP;
1043 
1044     if (indir) {
1045         for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
1046             priv->rss.table[i] = indir[i];
1047     }
1048 
1049     if (key)
1050         memcpy(priv->rss.key, key, sizeof(priv->rss.key));
1051 
1052     return stmmac_rss_configure(priv, priv->hw, &priv->rss,
1053                     priv->plat->rx_queues_to_use);
1054 }
1055 
1056 static void stmmac_get_channels(struct net_device *dev,
1057                 struct ethtool_channels *chan)
1058 {
1059     struct stmmac_priv *priv = netdev_priv(dev);
1060 
1061     chan->rx_count = priv->plat->rx_queues_to_use;
1062     chan->tx_count = priv->plat->tx_queues_to_use;
1063     chan->max_rx = priv->dma_cap.number_rx_queues;
1064     chan->max_tx = priv->dma_cap.number_tx_queues;
1065 }
1066 
1067 static int stmmac_set_channels(struct net_device *dev,
1068                    struct ethtool_channels *chan)
1069 {
1070     struct stmmac_priv *priv = netdev_priv(dev);
1071 
1072     if (chan->rx_count > priv->dma_cap.number_rx_queues ||
1073         chan->tx_count > priv->dma_cap.number_tx_queues ||
1074         !chan->rx_count || !chan->tx_count)
1075         return -EINVAL;
1076 
1077     return stmmac_reinit_queues(dev, chan->rx_count, chan->tx_count);
1078 }
1079 
1080 static int stmmac_get_ts_info(struct net_device *dev,
1081                   struct ethtool_ts_info *info)
1082 {
1083     struct stmmac_priv *priv = netdev_priv(dev);
1084 
1085     if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) {
1086 
1087         info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1088                     SOF_TIMESTAMPING_TX_HARDWARE |
1089                     SOF_TIMESTAMPING_RX_SOFTWARE |
1090                     SOF_TIMESTAMPING_RX_HARDWARE |
1091                     SOF_TIMESTAMPING_SOFTWARE |
1092                     SOF_TIMESTAMPING_RAW_HARDWARE;
1093 
1094         if (priv->ptp_clock)
1095             info->phc_index = ptp_clock_index(priv->ptp_clock);
1096 
1097         info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
1098 
1099         info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
1100                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
1101                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1102                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1103                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1104                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1105                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
1106                     (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
1107                     (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
1108                     (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
1109                     (1 << HWTSTAMP_FILTER_ALL));
1110         return 0;
1111     } else
1112         return ethtool_op_get_ts_info(dev, info);
1113 }
1114 
1115 static int stmmac_get_tunable(struct net_device *dev,
1116                   const struct ethtool_tunable *tuna, void *data)
1117 {
1118     struct stmmac_priv *priv = netdev_priv(dev);
1119     int ret = 0;
1120 
1121     switch (tuna->id) {
1122     case ETHTOOL_RX_COPYBREAK:
1123         *(u32 *)data = priv->rx_copybreak;
1124         break;
1125     default:
1126         ret = -EINVAL;
1127         break;
1128     }
1129 
1130     return ret;
1131 }
1132 
1133 static int stmmac_set_tunable(struct net_device *dev,
1134                   const struct ethtool_tunable *tuna,
1135                   const void *data)
1136 {
1137     struct stmmac_priv *priv = netdev_priv(dev);
1138     int ret = 0;
1139 
1140     switch (tuna->id) {
1141     case ETHTOOL_RX_COPYBREAK:
1142         priv->rx_copybreak = *(u32 *)data;
1143         break;
1144     default:
1145         ret = -EINVAL;
1146         break;
1147     }
1148 
1149     return ret;
1150 }
1151 
1152 static const struct ethtool_ops stmmac_ethtool_ops = {
1153     .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1154                      ETHTOOL_COALESCE_MAX_FRAMES,
1155     .begin = stmmac_check_if_running,
1156     .get_drvinfo = stmmac_ethtool_getdrvinfo,
1157     .get_msglevel = stmmac_ethtool_getmsglevel,
1158     .set_msglevel = stmmac_ethtool_setmsglevel,
1159     .get_regs = stmmac_ethtool_gregs,
1160     .get_regs_len = stmmac_ethtool_get_regs_len,
1161     .get_link = ethtool_op_get_link,
1162     .nway_reset = stmmac_nway_reset,
1163     .get_ringparam = stmmac_get_ringparam,
1164     .set_ringparam = stmmac_set_ringparam,
1165     .get_pauseparam = stmmac_get_pauseparam,
1166     .set_pauseparam = stmmac_set_pauseparam,
1167     .self_test = stmmac_selftest_run,
1168     .get_ethtool_stats = stmmac_get_ethtool_stats,
1169     .get_strings = stmmac_get_strings,
1170     .get_wol = stmmac_get_wol,
1171     .set_wol = stmmac_set_wol,
1172     .get_eee = stmmac_ethtool_op_get_eee,
1173     .set_eee = stmmac_ethtool_op_set_eee,
1174     .get_sset_count = stmmac_get_sset_count,
1175     .get_rxnfc = stmmac_get_rxnfc,
1176     .get_rxfh_key_size = stmmac_get_rxfh_key_size,
1177     .get_rxfh_indir_size = stmmac_get_rxfh_indir_size,
1178     .get_rxfh = stmmac_get_rxfh,
1179     .set_rxfh = stmmac_set_rxfh,
1180     .get_ts_info = stmmac_get_ts_info,
1181     .get_coalesce = stmmac_get_coalesce,
1182     .set_coalesce = stmmac_set_coalesce,
1183     .get_per_queue_coalesce = stmmac_get_per_queue_coalesce,
1184     .set_per_queue_coalesce = stmmac_set_per_queue_coalesce,
1185     .get_channels = stmmac_get_channels,
1186     .set_channels = stmmac_set_channels,
1187     .get_tunable = stmmac_get_tunable,
1188     .set_tunable = stmmac_set_tunable,
1189     .get_link_ksettings = stmmac_ethtool_get_link_ksettings,
1190     .set_link_ksettings = stmmac_ethtool_set_link_ksettings,
1191 };
1192 
1193 void stmmac_set_ethtool_ops(struct net_device *netdev)
1194 {
1195     netdev->ethtool_ops = &stmmac_ethtool_ops;
1196 }
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