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0007 #include "common.h"
0008 #include "stmmac.h"
0009 #include "stmmac_ptp.h"
0010
0011 static u32 stmmac_get_id(struct stmmac_priv *priv, u32 id_reg)
0012 {
0013 u32 reg = readl(priv->ioaddr + id_reg);
0014
0015 if (!reg) {
0016 dev_info(priv->device, "Version ID not available\n");
0017 return 0x0;
0018 }
0019
0020 dev_info(priv->device, "User ID: 0x%x, Synopsys ID: 0x%x\n",
0021 (unsigned int)(reg & GENMASK(15, 8)) >> 8,
0022 (unsigned int)(reg & GENMASK(7, 0)));
0023 return reg & GENMASK(7, 0);
0024 }
0025
0026 static u32 stmmac_get_dev_id(struct stmmac_priv *priv, u32 id_reg)
0027 {
0028 u32 reg = readl(priv->ioaddr + id_reg);
0029
0030 if (!reg) {
0031 dev_info(priv->device, "Version ID not available\n");
0032 return 0x0;
0033 }
0034
0035 return (reg & GENMASK(15, 8)) >> 8;
0036 }
0037
0038 static void stmmac_dwmac_mode_quirk(struct stmmac_priv *priv)
0039 {
0040 struct mac_device_info *mac = priv->hw;
0041
0042 if (priv->chain_mode) {
0043 dev_info(priv->device, "Chain mode enabled\n");
0044 priv->mode = STMMAC_CHAIN_MODE;
0045 mac->mode = &chain_mode_ops;
0046 } else {
0047 dev_info(priv->device, "Ring mode enabled\n");
0048 priv->mode = STMMAC_RING_MODE;
0049 mac->mode = &ring_mode_ops;
0050 }
0051 }
0052
0053 static int stmmac_dwmac1_quirks(struct stmmac_priv *priv)
0054 {
0055 struct mac_device_info *mac = priv->hw;
0056
0057 if (priv->plat->enh_desc) {
0058 dev_info(priv->device, "Enhanced/Alternate descriptors\n");
0059
0060
0061 if (priv->synopsys_id >= DWMAC_CORE_3_50) {
0062 dev_info(priv->device, "Enabled extended descriptors\n");
0063 priv->extend_desc = 1;
0064 } else {
0065 dev_warn(priv->device, "Extended descriptors not supported\n");
0066 }
0067
0068 mac->desc = &enh_desc_ops;
0069 } else {
0070 dev_info(priv->device, "Normal descriptors\n");
0071 mac->desc = &ndesc_ops;
0072 }
0073
0074 stmmac_dwmac_mode_quirk(priv);
0075 return 0;
0076 }
0077
0078 static int stmmac_dwmac4_quirks(struct stmmac_priv *priv)
0079 {
0080 stmmac_dwmac_mode_quirk(priv);
0081 return 0;
0082 }
0083
0084 static int stmmac_dwxlgmac_quirks(struct stmmac_priv *priv)
0085 {
0086 priv->hw->xlgmac = true;
0087 return 0;
0088 }
0089
0090 static const struct stmmac_hwif_entry {
0091 bool gmac;
0092 bool gmac4;
0093 bool xgmac;
0094 u32 min_id;
0095 u32 dev_id;
0096 const struct stmmac_regs_off regs;
0097 const void *desc;
0098 const void *dma;
0099 const void *mac;
0100 const void *hwtimestamp;
0101 const void *mode;
0102 const void *tc;
0103 const void *mmc;
0104 int (*setup)(struct stmmac_priv *priv);
0105 int (*quirks)(struct stmmac_priv *priv);
0106 } stmmac_hw[] = {
0107
0108 {
0109 .gmac = false,
0110 .gmac4 = false,
0111 .xgmac = false,
0112 .min_id = 0,
0113 .regs = {
0114 .ptp_off = PTP_GMAC3_X_OFFSET,
0115 .mmc_off = MMC_GMAC3_X_OFFSET,
0116 },
0117 .desc = NULL,
0118 .dma = &dwmac100_dma_ops,
0119 .mac = &dwmac100_ops,
0120 .hwtimestamp = &stmmac_ptp,
0121 .mode = NULL,
0122 .tc = NULL,
0123 .mmc = &dwmac_mmc_ops,
0124 .setup = dwmac100_setup,
0125 .quirks = stmmac_dwmac1_quirks,
0126 }, {
0127 .gmac = true,
0128 .gmac4 = false,
0129 .xgmac = false,
0130 .min_id = 0,
0131 .regs = {
0132 .ptp_off = PTP_GMAC3_X_OFFSET,
0133 .mmc_off = MMC_GMAC3_X_OFFSET,
0134 },
0135 .desc = NULL,
0136 .dma = &dwmac1000_dma_ops,
0137 .mac = &dwmac1000_ops,
0138 .hwtimestamp = &stmmac_ptp,
0139 .mode = NULL,
0140 .tc = NULL,
0141 .mmc = &dwmac_mmc_ops,
0142 .setup = dwmac1000_setup,
0143 .quirks = stmmac_dwmac1_quirks,
0144 }, {
0145 .gmac = false,
0146 .gmac4 = true,
0147 .xgmac = false,
0148 .min_id = 0,
0149 .regs = {
0150 .ptp_off = PTP_GMAC4_OFFSET,
0151 .mmc_off = MMC_GMAC4_OFFSET,
0152 },
0153 .desc = &dwmac4_desc_ops,
0154 .dma = &dwmac4_dma_ops,
0155 .mac = &dwmac4_ops,
0156 .hwtimestamp = &stmmac_ptp,
0157 .mode = NULL,
0158 .tc = &dwmac510_tc_ops,
0159 .mmc = &dwmac_mmc_ops,
0160 .setup = dwmac4_setup,
0161 .quirks = stmmac_dwmac4_quirks,
0162 }, {
0163 .gmac = false,
0164 .gmac4 = true,
0165 .xgmac = false,
0166 .min_id = DWMAC_CORE_4_00,
0167 .regs = {
0168 .ptp_off = PTP_GMAC4_OFFSET,
0169 .mmc_off = MMC_GMAC4_OFFSET,
0170 },
0171 .desc = &dwmac4_desc_ops,
0172 .dma = &dwmac4_dma_ops,
0173 .mac = &dwmac410_ops,
0174 .hwtimestamp = &stmmac_ptp,
0175 .mode = &dwmac4_ring_mode_ops,
0176 .tc = &dwmac510_tc_ops,
0177 .mmc = &dwmac_mmc_ops,
0178 .setup = dwmac4_setup,
0179 .quirks = NULL,
0180 }, {
0181 .gmac = false,
0182 .gmac4 = true,
0183 .xgmac = false,
0184 .min_id = DWMAC_CORE_4_10,
0185 .regs = {
0186 .ptp_off = PTP_GMAC4_OFFSET,
0187 .mmc_off = MMC_GMAC4_OFFSET,
0188 },
0189 .desc = &dwmac4_desc_ops,
0190 .dma = &dwmac410_dma_ops,
0191 .mac = &dwmac410_ops,
0192 .hwtimestamp = &stmmac_ptp,
0193 .mode = &dwmac4_ring_mode_ops,
0194 .tc = &dwmac510_tc_ops,
0195 .mmc = &dwmac_mmc_ops,
0196 .setup = dwmac4_setup,
0197 .quirks = NULL,
0198 }, {
0199 .gmac = false,
0200 .gmac4 = true,
0201 .xgmac = false,
0202 .min_id = DWMAC_CORE_5_10,
0203 .regs = {
0204 .ptp_off = PTP_GMAC4_OFFSET,
0205 .mmc_off = MMC_GMAC4_OFFSET,
0206 },
0207 .desc = &dwmac4_desc_ops,
0208 .dma = &dwmac410_dma_ops,
0209 .mac = &dwmac510_ops,
0210 .hwtimestamp = &stmmac_ptp,
0211 .mode = &dwmac4_ring_mode_ops,
0212 .tc = &dwmac510_tc_ops,
0213 .mmc = &dwmac_mmc_ops,
0214 .setup = dwmac4_setup,
0215 .quirks = NULL,
0216 }, {
0217 .gmac = false,
0218 .gmac4 = false,
0219 .xgmac = true,
0220 .min_id = DWXGMAC_CORE_2_10,
0221 .dev_id = DWXGMAC_ID,
0222 .regs = {
0223 .ptp_off = PTP_XGMAC_OFFSET,
0224 .mmc_off = MMC_XGMAC_OFFSET,
0225 },
0226 .desc = &dwxgmac210_desc_ops,
0227 .dma = &dwxgmac210_dma_ops,
0228 .mac = &dwxgmac210_ops,
0229 .hwtimestamp = &stmmac_ptp,
0230 .mode = NULL,
0231 .tc = &dwmac510_tc_ops,
0232 .mmc = &dwxgmac_mmc_ops,
0233 .setup = dwxgmac2_setup,
0234 .quirks = NULL,
0235 }, {
0236 .gmac = false,
0237 .gmac4 = false,
0238 .xgmac = true,
0239 .min_id = DWXLGMAC_CORE_2_00,
0240 .dev_id = DWXLGMAC_ID,
0241 .regs = {
0242 .ptp_off = PTP_XGMAC_OFFSET,
0243 .mmc_off = MMC_XGMAC_OFFSET,
0244 },
0245 .desc = &dwxgmac210_desc_ops,
0246 .dma = &dwxgmac210_dma_ops,
0247 .mac = &dwxlgmac2_ops,
0248 .hwtimestamp = &stmmac_ptp,
0249 .mode = NULL,
0250 .tc = &dwmac510_tc_ops,
0251 .mmc = &dwxgmac_mmc_ops,
0252 .setup = dwxlgmac2_setup,
0253 .quirks = stmmac_dwxlgmac_quirks,
0254 },
0255 };
0256
0257 int stmmac_hwif_init(struct stmmac_priv *priv)
0258 {
0259 bool needs_xgmac = priv->plat->has_xgmac;
0260 bool needs_gmac4 = priv->plat->has_gmac4;
0261 bool needs_gmac = priv->plat->has_gmac;
0262 const struct stmmac_hwif_entry *entry;
0263 struct mac_device_info *mac;
0264 bool needs_setup = true;
0265 u32 id, dev_id = 0;
0266 int i, ret;
0267
0268 if (needs_gmac) {
0269 id = stmmac_get_id(priv, GMAC_VERSION);
0270 } else if (needs_gmac4 || needs_xgmac) {
0271 id = stmmac_get_id(priv, GMAC4_VERSION);
0272 if (needs_xgmac)
0273 dev_id = stmmac_get_dev_id(priv, GMAC4_VERSION);
0274 } else {
0275 id = 0;
0276 }
0277
0278
0279 priv->synopsys_id = id;
0280
0281
0282 priv->ptpaddr = priv->ioaddr +
0283 (needs_gmac4 ? PTP_GMAC4_OFFSET : PTP_GMAC3_X_OFFSET);
0284 priv->mmcaddr = priv->ioaddr +
0285 (needs_gmac4 ? MMC_GMAC4_OFFSET : MMC_GMAC3_X_OFFSET);
0286
0287
0288 if (priv->plat->setup) {
0289 mac = priv->plat->setup(priv);
0290 needs_setup = false;
0291 } else {
0292 mac = devm_kzalloc(priv->device, sizeof(*mac), GFP_KERNEL);
0293 }
0294
0295 if (!mac)
0296 return -ENOMEM;
0297
0298
0299 for (i = ARRAY_SIZE(stmmac_hw) - 1; i >= 0; i--) {
0300 entry = &stmmac_hw[i];
0301
0302 if (needs_gmac ^ entry->gmac)
0303 continue;
0304 if (needs_gmac4 ^ entry->gmac4)
0305 continue;
0306 if (needs_xgmac ^ entry->xgmac)
0307 continue;
0308
0309 if (priv->synopsys_id < entry->min_id)
0310 continue;
0311 if (needs_xgmac && (dev_id ^ entry->dev_id))
0312 continue;
0313
0314
0315 mac->desc = mac->desc ? : entry->desc;
0316 mac->dma = mac->dma ? : entry->dma;
0317 mac->mac = mac->mac ? : entry->mac;
0318 mac->ptp = mac->ptp ? : entry->hwtimestamp;
0319 mac->mode = mac->mode ? : entry->mode;
0320 mac->tc = mac->tc ? : entry->tc;
0321 mac->mmc = mac->mmc ? : entry->mmc;
0322
0323 priv->hw = mac;
0324 priv->ptpaddr = priv->ioaddr + entry->regs.ptp_off;
0325 priv->mmcaddr = priv->ioaddr + entry->regs.mmc_off;
0326
0327
0328 if (needs_setup) {
0329 ret = entry->setup(priv);
0330 if (ret)
0331 return ret;
0332 }
0333
0334
0335 priv->hwif_quirks = entry->quirks;
0336 return 0;
0337 }
0338
0339 dev_err(priv->device, "Failed to find HW IF (id=0x%x, gmac=%d/%d)\n",
0340 id, needs_gmac, needs_gmac4);
0341 return -EINVAL;
0342 }