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0001 // SPDX-License-Identifier: GPL-2.0
0002 /* Intel DWMAC platform driver
0003  *
0004  * Copyright(C) 2020 Intel Corporation
0005  */
0006 
0007 #include <linux/ethtool.h>
0008 #include <linux/module.h>
0009 #include <linux/of.h>
0010 #include <linux/of_device.h>
0011 #include <linux/platform_device.h>
0012 #include <linux/stmmac.h>
0013 
0014 #include "dwmac4.h"
0015 #include "stmmac.h"
0016 #include "stmmac_platform.h"
0017 
0018 struct intel_dwmac {
0019     struct device *dev;
0020     struct clk *tx_clk;
0021     const struct intel_dwmac_data *data;
0022 };
0023 
0024 struct intel_dwmac_data {
0025     void (*fix_mac_speed)(void *priv, unsigned int speed);
0026     unsigned long ptp_ref_clk_rate;
0027     unsigned long tx_clk_rate;
0028     bool tx_clk_en;
0029 };
0030 
0031 static void kmb_eth_fix_mac_speed(void *priv, unsigned int speed)
0032 {
0033     struct intel_dwmac *dwmac = priv;
0034     unsigned long rate;
0035     int ret;
0036 
0037     rate = clk_get_rate(dwmac->tx_clk);
0038 
0039     switch (speed) {
0040     case SPEED_1000:
0041         rate = 125000000;
0042         break;
0043 
0044     case SPEED_100:
0045         rate = 25000000;
0046         break;
0047 
0048     case SPEED_10:
0049         rate = 2500000;
0050         break;
0051 
0052     default:
0053         dev_err(dwmac->dev, "Invalid speed\n");
0054         break;
0055     }
0056 
0057     ret = clk_set_rate(dwmac->tx_clk, rate);
0058     if (ret)
0059         dev_err(dwmac->dev, "Failed to configure tx clock rate\n");
0060 }
0061 
0062 static const struct intel_dwmac_data kmb_data = {
0063     .fix_mac_speed = kmb_eth_fix_mac_speed,
0064     .ptp_ref_clk_rate = 200000000,
0065     .tx_clk_rate = 125000000,
0066     .tx_clk_en = true,
0067 };
0068 
0069 static const struct of_device_id intel_eth_plat_match[] = {
0070     { .compatible = "intel,keembay-dwmac", .data = &kmb_data },
0071     { }
0072 };
0073 MODULE_DEVICE_TABLE(of, intel_eth_plat_match);
0074 
0075 static int intel_eth_plat_probe(struct platform_device *pdev)
0076 {
0077     struct plat_stmmacenet_data *plat_dat;
0078     struct stmmac_resources stmmac_res;
0079     const struct of_device_id *match;
0080     struct intel_dwmac *dwmac;
0081     unsigned long rate;
0082     int ret;
0083 
0084     ret = stmmac_get_platform_resources(pdev, &stmmac_res);
0085     if (ret)
0086         return ret;
0087 
0088     plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
0089     if (IS_ERR(plat_dat)) {
0090         dev_err(&pdev->dev, "dt configuration failed\n");
0091         return PTR_ERR(plat_dat);
0092     }
0093 
0094     dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
0095     if (!dwmac) {
0096         ret = -ENOMEM;
0097         goto err_remove_config_dt;
0098     }
0099 
0100     dwmac->dev = &pdev->dev;
0101     dwmac->tx_clk = NULL;
0102 
0103     match = of_match_device(intel_eth_plat_match, &pdev->dev);
0104     if (match && match->data) {
0105         dwmac->data = (const struct intel_dwmac_data *)match->data;
0106 
0107         if (dwmac->data->fix_mac_speed)
0108             plat_dat->fix_mac_speed = dwmac->data->fix_mac_speed;
0109 
0110         /* Enable TX clock */
0111         if (dwmac->data->tx_clk_en) {
0112             dwmac->tx_clk = devm_clk_get(&pdev->dev, "tx_clk");
0113             if (IS_ERR(dwmac->tx_clk)) {
0114                 ret = PTR_ERR(dwmac->tx_clk);
0115                 goto err_remove_config_dt;
0116             }
0117 
0118             clk_prepare_enable(dwmac->tx_clk);
0119 
0120             /* Check and configure TX clock rate */
0121             rate = clk_get_rate(dwmac->tx_clk);
0122             if (dwmac->data->tx_clk_rate &&
0123                 rate != dwmac->data->tx_clk_rate) {
0124                 rate = dwmac->data->tx_clk_rate;
0125                 ret = clk_set_rate(dwmac->tx_clk, rate);
0126                 if (ret) {
0127                     dev_err(&pdev->dev,
0128                         "Failed to set tx_clk\n");
0129                     goto err_remove_config_dt;
0130                 }
0131             }
0132         }
0133 
0134         /* Check and configure PTP ref clock rate */
0135         rate = clk_get_rate(plat_dat->clk_ptp_ref);
0136         if (dwmac->data->ptp_ref_clk_rate &&
0137             rate != dwmac->data->ptp_ref_clk_rate) {
0138             rate = dwmac->data->ptp_ref_clk_rate;
0139             ret = clk_set_rate(plat_dat->clk_ptp_ref, rate);
0140             if (ret) {
0141                 dev_err(&pdev->dev,
0142                     "Failed to set clk_ptp_ref\n");
0143                 goto err_remove_config_dt;
0144             }
0145         }
0146     }
0147 
0148     plat_dat->bsp_priv = dwmac;
0149     plat_dat->eee_usecs_rate = plat_dat->clk_ptp_rate;
0150 
0151     if (plat_dat->eee_usecs_rate > 0) {
0152         u32 tx_lpi_usec;
0153 
0154         tx_lpi_usec = (plat_dat->eee_usecs_rate / 1000000) - 1;
0155         writel(tx_lpi_usec, stmmac_res.addr + GMAC_1US_TIC_COUNTER);
0156     }
0157 
0158     ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
0159     if (ret) {
0160         clk_disable_unprepare(dwmac->tx_clk);
0161         goto err_remove_config_dt;
0162     }
0163 
0164     return 0;
0165 
0166 err_remove_config_dt:
0167     stmmac_remove_config_dt(pdev, plat_dat);
0168 
0169     return ret;
0170 }
0171 
0172 static int intel_eth_plat_remove(struct platform_device *pdev)
0173 {
0174     struct intel_dwmac *dwmac = get_stmmac_bsp_priv(&pdev->dev);
0175     int ret;
0176 
0177     ret = stmmac_pltfr_remove(pdev);
0178     clk_disable_unprepare(dwmac->tx_clk);
0179 
0180     return ret;
0181 }
0182 
0183 static struct platform_driver intel_eth_plat_driver = {
0184     .probe  = intel_eth_plat_probe,
0185     .remove = intel_eth_plat_remove,
0186     .driver = {
0187         .name       = "intel-eth-plat",
0188         .pm     = &stmmac_pltfr_pm_ops,
0189         .of_match_table = intel_eth_plat_match,
0190     },
0191 };
0192 module_platform_driver(intel_eth_plat_driver);
0193 
0194 MODULE_LICENSE("GPL v2");
0195 MODULE_DESCRIPTION("Intel DWMAC platform driver");