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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /****************************************************************************
0003  * Driver for Solarflare network controllers and boards
0004  * Copyright 2005-2006 Fen Systems Ltd.
0005  * Copyright 2005-2013 Solarflare Communications Inc.
0006  */
0007 
0008 #include <linux/pci.h>
0009 #include <linux/tcp.h>
0010 #include <linux/ip.h>
0011 #include <linux/in.h>
0012 #include <linux/ipv6.h>
0013 #include <linux/slab.h>
0014 #include <net/ipv6.h>
0015 #include <linux/if_ether.h>
0016 #include <linux/highmem.h>
0017 #include <linux/cache.h>
0018 #include "net_driver.h"
0019 #include "efx.h"
0020 #include "io.h"
0021 #include "nic.h"
0022 #include "tx.h"
0023 #include "tx_common.h"
0024 #include "workarounds.h"
0025 
0026 static inline u8 *efx_tx_get_copy_buffer(struct efx_tx_queue *tx_queue,
0027                      struct efx_tx_buffer *buffer)
0028 {
0029     unsigned int index = efx_tx_queue_get_insert_index(tx_queue);
0030     struct efx_buffer *page_buf =
0031         &tx_queue->cb_page[index >> (PAGE_SHIFT - EFX_TX_CB_ORDER)];
0032     unsigned int offset =
0033         ((index << EFX_TX_CB_ORDER) + NET_IP_ALIGN) & (PAGE_SIZE - 1);
0034 
0035     if (unlikely(!page_buf->addr) &&
0036         efx_siena_alloc_buffer(tx_queue->efx, page_buf, PAGE_SIZE,
0037                    GFP_ATOMIC))
0038         return NULL;
0039     buffer->dma_addr = page_buf->dma_addr + offset;
0040     buffer->unmap_len = 0;
0041     return (u8 *)page_buf->addr + offset;
0042 }
0043 
0044 static void efx_tx_maybe_stop_queue(struct efx_tx_queue *txq1)
0045 {
0046     /* We need to consider all queues that the net core sees as one */
0047     struct efx_nic *efx = txq1->efx;
0048     struct efx_tx_queue *txq2;
0049     unsigned int fill_level;
0050 
0051     fill_level = efx_channel_tx_old_fill_level(txq1->channel);
0052     if (likely(fill_level < efx->txq_stop_thresh))
0053         return;
0054 
0055     /* We used the stale old_read_count above, which gives us a
0056      * pessimistic estimate of the fill level (which may even
0057      * validly be >= efx->txq_entries).  Now try again using
0058      * read_count (more likely to be a cache miss).
0059      *
0060      * If we read read_count and then conditionally stop the
0061      * queue, it is possible for the completion path to race with
0062      * us and complete all outstanding descriptors in the middle,
0063      * after which there will be no more completions to wake it.
0064      * Therefore we stop the queue first, then read read_count
0065      * (with a memory barrier to ensure the ordering), then
0066      * restart the queue if the fill level turns out to be low
0067      * enough.
0068      */
0069     netif_tx_stop_queue(txq1->core_txq);
0070     smp_mb();
0071     efx_for_each_channel_tx_queue(txq2, txq1->channel)
0072         txq2->old_read_count = READ_ONCE(txq2->read_count);
0073 
0074     fill_level = efx_channel_tx_old_fill_level(txq1->channel);
0075     EFX_WARN_ON_ONCE_PARANOID(fill_level >= efx->txq_entries);
0076     if (likely(fill_level < efx->txq_stop_thresh)) {
0077         smp_mb();
0078         if (likely(!efx->loopback_selftest))
0079             netif_tx_start_queue(txq1->core_txq);
0080     }
0081 }
0082 
0083 static int efx_enqueue_skb_copy(struct efx_tx_queue *tx_queue,
0084                 struct sk_buff *skb)
0085 {
0086     unsigned int copy_len = skb->len;
0087     struct efx_tx_buffer *buffer;
0088     u8 *copy_buffer;
0089     int rc;
0090 
0091     EFX_WARN_ON_ONCE_PARANOID(copy_len > EFX_TX_CB_SIZE);
0092 
0093     buffer = efx_tx_queue_get_insert_buffer(tx_queue);
0094 
0095     copy_buffer = efx_tx_get_copy_buffer(tx_queue, buffer);
0096     if (unlikely(!copy_buffer))
0097         return -ENOMEM;
0098 
0099     rc = skb_copy_bits(skb, 0, copy_buffer, copy_len);
0100     EFX_WARN_ON_PARANOID(rc);
0101     buffer->len = copy_len;
0102 
0103     buffer->skb = skb;
0104     buffer->flags = EFX_TX_BUF_SKB;
0105 
0106     ++tx_queue->insert_count;
0107     return rc;
0108 }
0109 
0110 /* Send any pending traffic for a channel. xmit_more is shared across all
0111  * queues for a channel, so we must check all of them.
0112  */
0113 static void efx_tx_send_pending(struct efx_channel *channel)
0114 {
0115     struct efx_tx_queue *q;
0116 
0117     efx_for_each_channel_tx_queue(q, channel) {
0118         if (q->xmit_pending)
0119             efx_nic_push_buffers(q);
0120     }
0121 }
0122 
0123 /*
0124  * Add a socket buffer to a TX queue
0125  *
0126  * This maps all fragments of a socket buffer for DMA and adds them to
0127  * the TX queue.  The queue's insert pointer will be incremented by
0128  * the number of fragments in the socket buffer.
0129  *
0130  * If any DMA mapping fails, any mapped fragments will be unmapped,
0131  * the queue's insert pointer will be restored to its original value.
0132  *
0133  * This function is split out from efx_siena_hard_start_xmit to allow the
0134  * loopback test to direct packets via specific TX queues.
0135  *
0136  * Returns NETDEV_TX_OK.
0137  * You must hold netif_tx_lock() to call this function.
0138  */
0139 netdev_tx_t __efx_siena_enqueue_skb(struct efx_tx_queue *tx_queue,
0140                     struct sk_buff *skb)
0141 {
0142     unsigned int old_insert_count = tx_queue->insert_count;
0143     bool xmit_more = netdev_xmit_more();
0144     bool data_mapped = false;
0145     unsigned int segments;
0146     unsigned int skb_len;
0147     int rc;
0148 
0149     skb_len = skb->len;
0150     segments = skb_is_gso(skb) ? skb_shinfo(skb)->gso_segs : 0;
0151     if (segments == 1)
0152         segments = 0; /* Don't use TSO for a single segment. */
0153 
0154     /* Handle TSO first - it's *possible* (although unlikely) that we might
0155      * be passed a packet to segment that's smaller than the copybreak/PIO
0156      * size limit.
0157      */
0158     if (segments) {
0159         rc = efx_siena_tx_tso_fallback(tx_queue, skb);
0160         tx_queue->tso_fallbacks++;
0161         if (rc == 0)
0162             return 0;
0163         goto err;
0164     } else if (skb->data_len && skb_len <= EFX_TX_CB_SIZE) {
0165         /* Pad short packets or coalesce short fragmented packets. */
0166         if (efx_enqueue_skb_copy(tx_queue, skb))
0167             goto err;
0168         tx_queue->cb_packets++;
0169         data_mapped = true;
0170     }
0171 
0172     /* Map for DMA and create descriptors if we haven't done so already. */
0173     if (!data_mapped && (efx_siena_tx_map_data(tx_queue, skb, segments)))
0174         goto err;
0175 
0176     efx_tx_maybe_stop_queue(tx_queue);
0177 
0178     tx_queue->xmit_pending = true;
0179 
0180     /* Pass off to hardware */
0181     if (__netdev_tx_sent_queue(tx_queue->core_txq, skb_len, xmit_more))
0182         efx_tx_send_pending(tx_queue->channel);
0183 
0184     tx_queue->tx_packets++;
0185     return NETDEV_TX_OK;
0186 
0187 
0188 err:
0189     efx_siena_enqueue_unwind(tx_queue, old_insert_count);
0190     dev_kfree_skb_any(skb);
0191 
0192     /* If we're not expecting another transmit and we had something to push
0193      * on this queue or a partner queue then we need to push here to get the
0194      * previous packets out.
0195      */
0196     if (!xmit_more)
0197         efx_tx_send_pending(tx_queue->channel);
0198 
0199     return NETDEV_TX_OK;
0200 }
0201 
0202 /* Transmit a packet from an XDP buffer
0203  *
0204  * Returns number of packets sent on success, error code otherwise.
0205  * Runs in NAPI context, either in our poll (for XDP TX) or a different NIC
0206  * (for XDP redirect).
0207  */
0208 int efx_siena_xdp_tx_buffers(struct efx_nic *efx, int n, struct xdp_frame **xdpfs,
0209                  bool flush)
0210 {
0211     struct efx_tx_buffer *tx_buffer;
0212     struct efx_tx_queue *tx_queue;
0213     struct xdp_frame *xdpf;
0214     dma_addr_t dma_addr;
0215     unsigned int len;
0216     int space;
0217     int cpu;
0218     int i = 0;
0219 
0220     if (unlikely(n && !xdpfs))
0221         return -EINVAL;
0222     if (unlikely(!n))
0223         return 0;
0224 
0225     cpu = raw_smp_processor_id();
0226     if (unlikely(cpu >= efx->xdp_tx_queue_count))
0227         return -EINVAL;
0228 
0229     tx_queue = efx->xdp_tx_queues[cpu];
0230     if (unlikely(!tx_queue))
0231         return -EINVAL;
0232 
0233     if (!tx_queue->initialised)
0234         return -EINVAL;
0235 
0236     if (efx->xdp_txq_queues_mode != EFX_XDP_TX_QUEUES_DEDICATED)
0237         HARD_TX_LOCK(efx->net_dev, tx_queue->core_txq, cpu);
0238 
0239     /* If we're borrowing net stack queues we have to handle stop-restart
0240      * or we might block the queue and it will be considered as frozen
0241      */
0242     if (efx->xdp_txq_queues_mode == EFX_XDP_TX_QUEUES_BORROWED) {
0243         if (netif_tx_queue_stopped(tx_queue->core_txq))
0244             goto unlock;
0245         efx_tx_maybe_stop_queue(tx_queue);
0246     }
0247 
0248     /* Check for available space. We should never need multiple
0249      * descriptors per frame.
0250      */
0251     space = efx->txq_entries +
0252         tx_queue->read_count - tx_queue->insert_count;
0253 
0254     for (i = 0; i < n; i++) {
0255         xdpf = xdpfs[i];
0256 
0257         if (i >= space)
0258             break;
0259 
0260         /* We'll want a descriptor for this tx. */
0261         prefetchw(__efx_tx_queue_get_insert_buffer(tx_queue));
0262 
0263         len = xdpf->len;
0264 
0265         /* Map for DMA. */
0266         dma_addr = dma_map_single(&efx->pci_dev->dev,
0267                       xdpf->data, len,
0268                       DMA_TO_DEVICE);
0269         if (dma_mapping_error(&efx->pci_dev->dev, dma_addr))
0270             break;
0271 
0272         /*  Create descriptor and set up for unmapping DMA. */
0273         tx_buffer = efx_siena_tx_map_chunk(tx_queue, dma_addr, len);
0274         tx_buffer->xdpf = xdpf;
0275         tx_buffer->flags = EFX_TX_BUF_XDP |
0276                    EFX_TX_BUF_MAP_SINGLE;
0277         tx_buffer->dma_offset = 0;
0278         tx_buffer->unmap_len = len;
0279         tx_queue->tx_packets++;
0280     }
0281 
0282     /* Pass mapped frames to hardware. */
0283     if (flush && i > 0)
0284         efx_nic_push_buffers(tx_queue);
0285 
0286 unlock:
0287     if (efx->xdp_txq_queues_mode != EFX_XDP_TX_QUEUES_DEDICATED)
0288         HARD_TX_UNLOCK(efx->net_dev, tx_queue->core_txq);
0289 
0290     return i == 0 ? -EIO : i;
0291 }
0292 
0293 /* Initiate a packet transmission.  We use one channel per CPU
0294  * (sharing when we have more CPUs than channels).
0295  *
0296  * Context: non-blocking.
0297  * Should always return NETDEV_TX_OK and consume the skb.
0298  */
0299 netdev_tx_t efx_siena_hard_start_xmit(struct sk_buff *skb,
0300                       struct net_device *net_dev)
0301 {
0302     struct efx_nic *efx = netdev_priv(net_dev);
0303     struct efx_tx_queue *tx_queue;
0304     unsigned index, type;
0305 
0306     EFX_WARN_ON_PARANOID(!netif_device_present(net_dev));
0307 
0308     index = skb_get_queue_mapping(skb);
0309     type = efx_tx_csum_type_skb(skb);
0310     if (index >= efx->n_tx_channels) {
0311         index -= efx->n_tx_channels;
0312         type |= EFX_TXQ_TYPE_HIGHPRI;
0313     }
0314 
0315     /* PTP "event" packet */
0316     if (unlikely(efx_xmit_with_hwtstamp(skb)) &&
0317         ((efx_siena_ptp_use_mac_tx_timestamps(efx) && efx->ptp_data) ||
0318          unlikely(efx_siena_ptp_is_ptp_tx(efx, skb)))) {
0319         /* There may be existing transmits on the channel that are
0320          * waiting for this packet to trigger the doorbell write.
0321          * We need to send the packets at this point.
0322          */
0323         efx_tx_send_pending(efx_get_tx_channel(efx, index));
0324         return efx_siena_ptp_tx(efx, skb);
0325     }
0326 
0327     tx_queue = efx_get_tx_queue(efx, index, type);
0328     if (WARN_ON_ONCE(!tx_queue)) {
0329         /* We don't have a TXQ of the right type.
0330          * This should never happen, as we don't advertise offload
0331          * features unless we can support them.
0332          */
0333         dev_kfree_skb_any(skb);
0334         /* If we're not expecting another transmit and we had something to push
0335          * on this queue or a partner queue then we need to push here to get the
0336          * previous packets out.
0337          */
0338         if (!netdev_xmit_more())
0339             efx_tx_send_pending(efx_get_tx_channel(efx, index));
0340         return NETDEV_TX_OK;
0341     }
0342 
0343     return __efx_siena_enqueue_skb(tx_queue, skb);
0344 }
0345 
0346 void efx_siena_init_tx_queue_core_txq(struct efx_tx_queue *tx_queue)
0347 {
0348     struct efx_nic *efx = tx_queue->efx;
0349 
0350     /* Must be inverse of queue lookup in efx_siena_hard_start_xmit() */
0351     tx_queue->core_txq =
0352         netdev_get_tx_queue(efx->net_dev,
0353                     tx_queue->channel->channel +
0354                     ((tx_queue->type & EFX_TXQ_TYPE_HIGHPRI) ?
0355                      efx->n_tx_channels : 0));
0356 }
0357 
0358 int efx_siena_setup_tc(struct net_device *net_dev, enum tc_setup_type type,
0359                void *type_data)
0360 {
0361     struct efx_nic *efx = netdev_priv(net_dev);
0362     struct tc_mqprio_qopt *mqprio = type_data;
0363     unsigned tc, num_tc;
0364 
0365     if (type != TC_SETUP_QDISC_MQPRIO)
0366         return -EOPNOTSUPP;
0367 
0368     /* Only Siena supported highpri queues */
0369     if (efx_nic_rev(efx) > EFX_REV_SIENA_A0)
0370         return -EOPNOTSUPP;
0371 
0372     num_tc = mqprio->num_tc;
0373 
0374     if (num_tc > EFX_MAX_TX_TC)
0375         return -EINVAL;
0376 
0377     mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
0378 
0379     if (num_tc == net_dev->num_tc)
0380         return 0;
0381 
0382     for (tc = 0; tc < num_tc; tc++) {
0383         net_dev->tc_to_txq[tc].offset = tc * efx->n_tx_channels;
0384         net_dev->tc_to_txq[tc].count = efx->n_tx_channels;
0385     }
0386 
0387     net_dev->num_tc = num_tc;
0388 
0389     return netif_set_real_num_tx_queues(net_dev,
0390                         max_t(int, num_tc, 1) *
0391                         efx->n_tx_channels);
0392 }