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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /****************************************************************************
0003  * Driver for Solarflare network controllers and boards
0004  * Copyright 2015 Solarflare Communications Inc.
0005  */
0006 
0007 #ifndef SIENA_SRIOV_H
0008 #define SIENA_SRIOV_H
0009 
0010 #include "net_driver.h"
0011 
0012 /* On the SFC9000 family each port is associated with 1 PCI physical
0013  * function (PF) handled by sfc and a configurable number of virtual
0014  * functions (VFs) that may be handled by some other driver, often in
0015  * a VM guest.  The queue pointer registers are mapped in both PF and
0016  * VF BARs such that an 8K region provides access to a single RX, TX
0017  * and event queue (collectively a Virtual Interface, VI or VNIC).
0018  *
0019  * The PF has access to all 1024 VIs while VFs are mapped to VIs
0020  * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
0021  * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
0022  * The number of VIs and the VI_SCALE value are configurable but must
0023  * be established at boot time by firmware.
0024  */
0025 
0026 /* Maximum VI_SCALE parameter supported by Siena */
0027 #define EFX_VI_SCALE_MAX 6
0028 /* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
0029  * so this is the smallest allowed value.
0030  */
0031 #define EFX_VI_BASE 128U
0032 /* Maximum number of VFs allowed */
0033 #define EFX_VF_COUNT_MAX 127
0034 /* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
0035 #define EFX_MAX_VF_EVQ_SIZE 8192UL
0036 /* The number of buffer table entries reserved for each VI on a VF */
0037 #define EFX_VF_BUFTBL_PER_VI                    \
0038     ((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) *    \
0039      sizeof(efx_qword_t) / EFX_BUF_SIZE)
0040 
0041 int efx_siena_sriov_configure(struct efx_nic *efx, int num_vfs);
0042 int efx_siena_sriov_init(struct efx_nic *efx);
0043 void efx_siena_sriov_fini(struct efx_nic *efx);
0044 int efx_siena_sriov_mac_address_changed(struct efx_nic *efx);
0045 bool efx_siena_sriov_wanted(struct efx_nic *efx);
0046 void efx_siena_sriov_reset(struct efx_nic *efx);
0047 void efx_siena_sriov_flr(struct efx_nic *efx, unsigned flr);
0048 
0049 int efx_siena_sriov_set_vf_mac(struct efx_nic *efx, int vf, const u8 *mac);
0050 int efx_siena_sriov_set_vf_vlan(struct efx_nic *efx, int vf,
0051                 u16 vlan, u8 qos);
0052 int efx_siena_sriov_set_vf_spoofchk(struct efx_nic *efx, int vf,
0053                     bool spoofchk);
0054 int efx_siena_sriov_get_vf_config(struct efx_nic *efx, int vf,
0055                   struct ifla_vf_info *ivf);
0056 
0057 #ifdef CONFIG_SFC_SIENA_SRIOV
0058 
0059 static inline bool efx_siena_sriov_enabled(struct efx_nic *efx)
0060 {
0061     return efx->vf_init_count != 0;
0062 }
0063 
0064 int efx_init_sriov(void);
0065 void efx_fini_sriov(void);
0066 #else /* !CONFIG_SFC_SIENA_SRIOV */
0067 static inline bool efx_siena_sriov_enabled(struct efx_nic *efx)
0068 {
0069     return false;
0070 }
0071 #endif /* CONFIG_SFC_SIENA_SRIOV */
0072 
0073 void efx_siena_sriov_probe(struct efx_nic *efx);
0074 void efx_siena_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
0075 void efx_siena_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
0076 void efx_siena_sriov_event(struct efx_channel *channel, efx_qword_t *event);
0077 void efx_siena_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
0078 
0079 #endif /* SIENA_SRIOV_H */