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0008 #ifndef EFX_NIC_H
0009 #define EFX_NIC_H
0010
0011 #include "nic_common.h"
0012 #include "efx.h"
0013
0014 u32 efx_farch_fpga_ver(struct efx_nic *efx);
0015
0016 enum {
0017 PHY_TYPE_NONE = 0,
0018 PHY_TYPE_TXC43128 = 1,
0019 PHY_TYPE_88E1111 = 2,
0020 PHY_TYPE_SFX7101 = 3,
0021 PHY_TYPE_QT2022C2 = 4,
0022 PHY_TYPE_PM8358 = 6,
0023 PHY_TYPE_SFT9001A = 8,
0024 PHY_TYPE_QT2025C = 9,
0025 PHY_TYPE_SFT9001B = 10,
0026 };
0027
0028 enum {
0029 SIENA_STAT_tx_bytes = GENERIC_STAT_COUNT,
0030 SIENA_STAT_tx_good_bytes,
0031 SIENA_STAT_tx_bad_bytes,
0032 SIENA_STAT_tx_packets,
0033 SIENA_STAT_tx_bad,
0034 SIENA_STAT_tx_pause,
0035 SIENA_STAT_tx_control,
0036 SIENA_STAT_tx_unicast,
0037 SIENA_STAT_tx_multicast,
0038 SIENA_STAT_tx_broadcast,
0039 SIENA_STAT_tx_lt64,
0040 SIENA_STAT_tx_64,
0041 SIENA_STAT_tx_65_to_127,
0042 SIENA_STAT_tx_128_to_255,
0043 SIENA_STAT_tx_256_to_511,
0044 SIENA_STAT_tx_512_to_1023,
0045 SIENA_STAT_tx_1024_to_15xx,
0046 SIENA_STAT_tx_15xx_to_jumbo,
0047 SIENA_STAT_tx_gtjumbo,
0048 SIENA_STAT_tx_collision,
0049 SIENA_STAT_tx_single_collision,
0050 SIENA_STAT_tx_multiple_collision,
0051 SIENA_STAT_tx_excessive_collision,
0052 SIENA_STAT_tx_deferred,
0053 SIENA_STAT_tx_late_collision,
0054 SIENA_STAT_tx_excessive_deferred,
0055 SIENA_STAT_tx_non_tcpudp,
0056 SIENA_STAT_tx_mac_src_error,
0057 SIENA_STAT_tx_ip_src_error,
0058 SIENA_STAT_rx_bytes,
0059 SIENA_STAT_rx_good_bytes,
0060 SIENA_STAT_rx_bad_bytes,
0061 SIENA_STAT_rx_packets,
0062 SIENA_STAT_rx_good,
0063 SIENA_STAT_rx_bad,
0064 SIENA_STAT_rx_pause,
0065 SIENA_STAT_rx_control,
0066 SIENA_STAT_rx_unicast,
0067 SIENA_STAT_rx_multicast,
0068 SIENA_STAT_rx_broadcast,
0069 SIENA_STAT_rx_lt64,
0070 SIENA_STAT_rx_64,
0071 SIENA_STAT_rx_65_to_127,
0072 SIENA_STAT_rx_128_to_255,
0073 SIENA_STAT_rx_256_to_511,
0074 SIENA_STAT_rx_512_to_1023,
0075 SIENA_STAT_rx_1024_to_15xx,
0076 SIENA_STAT_rx_15xx_to_jumbo,
0077 SIENA_STAT_rx_gtjumbo,
0078 SIENA_STAT_rx_bad_gtjumbo,
0079 SIENA_STAT_rx_overflow,
0080 SIENA_STAT_rx_false_carrier,
0081 SIENA_STAT_rx_symbol_error,
0082 SIENA_STAT_rx_align_error,
0083 SIENA_STAT_rx_length_error,
0084 SIENA_STAT_rx_internal_error,
0085 SIENA_STAT_rx_nodesc_drop_cnt,
0086 SIENA_STAT_COUNT
0087 };
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0102
0103 struct siena_nic_data {
0104 struct efx_nic *efx;
0105 int wol_filter_id;
0106 u64 stats[SIENA_STAT_COUNT];
0107 #ifdef CONFIG_SFC_SIENA_SRIOV
0108 struct siena_vf *vf;
0109 struct efx_channel *vfdi_channel;
0110 unsigned vf_buftbl_base;
0111 struct efx_buffer vfdi_status;
0112 struct list_head local_addr_list;
0113 struct list_head local_page_list;
0114 struct mutex local_lock;
0115 struct work_struct peer_work;
0116 #endif
0117 };
0118
0119 extern const struct efx_nic_type siena_a0_nic_type;
0120
0121 int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
0122
0123
0124 int efx_farch_tx_probe(struct efx_tx_queue *tx_queue);
0125 void efx_farch_tx_init(struct efx_tx_queue *tx_queue);
0126 void efx_farch_tx_fini(struct efx_tx_queue *tx_queue);
0127 void efx_farch_tx_remove(struct efx_tx_queue *tx_queue);
0128 void efx_farch_tx_write(struct efx_tx_queue *tx_queue);
0129 unsigned int efx_farch_tx_limit_len(struct efx_tx_queue *tx_queue,
0130 dma_addr_t dma_addr, unsigned int len);
0131 int efx_farch_rx_probe(struct efx_rx_queue *rx_queue);
0132 void efx_farch_rx_init(struct efx_rx_queue *rx_queue);
0133 void efx_farch_rx_fini(struct efx_rx_queue *rx_queue);
0134 void efx_farch_rx_remove(struct efx_rx_queue *rx_queue);
0135 void efx_farch_rx_write(struct efx_rx_queue *rx_queue);
0136 void efx_farch_rx_defer_refill(struct efx_rx_queue *rx_queue);
0137 int efx_farch_ev_probe(struct efx_channel *channel);
0138 int efx_farch_ev_init(struct efx_channel *channel);
0139 void efx_farch_ev_fini(struct efx_channel *channel);
0140 void efx_farch_ev_remove(struct efx_channel *channel);
0141 int efx_farch_ev_process(struct efx_channel *channel, int quota);
0142 void efx_farch_ev_read_ack(struct efx_channel *channel);
0143 void efx_farch_ev_test_generate(struct efx_channel *channel);
0144
0145
0146 int efx_farch_filter_table_probe(struct efx_nic *efx);
0147 void efx_farch_filter_table_restore(struct efx_nic *efx);
0148 void efx_farch_filter_table_remove(struct efx_nic *efx);
0149 void efx_farch_filter_update_rx_scatter(struct efx_nic *efx);
0150 s32 efx_farch_filter_insert(struct efx_nic *efx, struct efx_filter_spec *spec,
0151 bool replace);
0152 int efx_farch_filter_remove_safe(struct efx_nic *efx,
0153 enum efx_filter_priority priority,
0154 u32 filter_id);
0155 int efx_farch_filter_get_safe(struct efx_nic *efx,
0156 enum efx_filter_priority priority, u32 filter_id,
0157 struct efx_filter_spec *);
0158 int efx_farch_filter_clear_rx(struct efx_nic *efx,
0159 enum efx_filter_priority priority);
0160 u32 efx_farch_filter_count_rx_used(struct efx_nic *efx,
0161 enum efx_filter_priority priority);
0162 u32 efx_farch_filter_get_rx_id_limit(struct efx_nic *efx);
0163 s32 efx_farch_filter_get_rx_ids(struct efx_nic *efx,
0164 enum efx_filter_priority priority, u32 *buf,
0165 u32 size);
0166 #ifdef CONFIG_RFS_ACCEL
0167 bool efx_farch_filter_rfs_expire_one(struct efx_nic *efx, u32 flow_id,
0168 unsigned int index);
0169 #endif
0170 void efx_farch_filter_sync_rx_mode(struct efx_nic *efx);
0171
0172
0173 void efx_farch_irq_enable_master(struct efx_nic *efx);
0174 int efx_farch_irq_test_generate(struct efx_nic *efx);
0175 void efx_farch_irq_disable_master(struct efx_nic *efx);
0176 irqreturn_t efx_farch_msi_interrupt(int irq, void *dev_id);
0177 irqreturn_t efx_farch_legacy_interrupt(int irq, void *dev_id);
0178 irqreturn_t efx_farch_fatal_interrupt(struct efx_nic *efx);
0179
0180
0181 void efx_siena_prepare_flush(struct efx_nic *efx);
0182 int efx_farch_fini_dmaq(struct efx_nic *efx);
0183 void efx_farch_finish_flr(struct efx_nic *efx);
0184 void siena_finish_flush(struct efx_nic *efx);
0185 void falcon_start_nic_stats(struct efx_nic *efx);
0186 void falcon_stop_nic_stats(struct efx_nic *efx);
0187 int falcon_reset_xaui(struct efx_nic *efx);
0188 void efx_farch_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
0189 void efx_farch_init_common(struct efx_nic *efx);
0190 void efx_farch_rx_push_indir_table(struct efx_nic *efx);
0191 void efx_farch_rx_pull_indir_table(struct efx_nic *efx);
0192
0193
0194 struct efx_farch_register_test {
0195 unsigned address;
0196 efx_oword_t mask;
0197 };
0198
0199 int efx_farch_test_registers(struct efx_nic *efx,
0200 const struct efx_farch_register_test *regs,
0201 size_t n_regs);
0202
0203 void efx_farch_generate_event(struct efx_nic *efx, unsigned int evq,
0204 efx_qword_t *event);
0205
0206 #endif