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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /****************************************************************************
0003  * Driver for Solarflare network controllers and boards
0004  * Copyright 2008-2013 Solarflare Communications Inc.
0005  */
0006 
0007 #include <linux/delay.h>
0008 #include <linux/moduleparam.h>
0009 #include <linux/atomic.h>
0010 #include "net_driver.h"
0011 #include "nic.h"
0012 #include "io.h"
0013 #include "farch_regs.h"
0014 #include "mcdi_pcol.h"
0015 
0016 /**************************************************************************
0017  *
0018  * Management-Controller-to-Driver Interface
0019  *
0020  **************************************************************************
0021  */
0022 
0023 #define MCDI_RPC_TIMEOUT       (10 * HZ)
0024 
0025 /* A reboot/assertion causes the MCDI status word to be set after the
0026  * command word is set or a REBOOT event is sent. If we notice a reboot
0027  * via these mechanisms then wait 250ms for the status word to be set.
0028  */
0029 #define MCDI_STATUS_DELAY_US        100
0030 #define MCDI_STATUS_DELAY_COUNT     2500
0031 #define MCDI_STATUS_SLEEP_MS                        \
0032     (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
0033 
0034 #define SEQ_MASK                            \
0035     EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
0036 
0037 struct efx_mcdi_async_param {
0038     struct list_head list;
0039     unsigned int cmd;
0040     size_t inlen;
0041     size_t outlen;
0042     bool quiet;
0043     efx_mcdi_async_completer *complete;
0044     unsigned long cookie;
0045     /* followed by request/response buffer */
0046 };
0047 
0048 static void efx_mcdi_timeout_async(struct timer_list *t);
0049 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
0050                    bool *was_attached_out);
0051 static bool efx_mcdi_poll_once(struct efx_nic *efx);
0052 static void efx_mcdi_abandon(struct efx_nic *efx);
0053 
0054 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING
0055 static bool efx_siena_mcdi_logging_default;
0056 module_param_named(mcdi_logging_default, efx_siena_mcdi_logging_default,
0057            bool, 0644);
0058 MODULE_PARM_DESC(mcdi_logging_default,
0059          "Enable MCDI logging on newly-probed functions");
0060 #endif
0061 
0062 int efx_siena_mcdi_init(struct efx_nic *efx)
0063 {
0064     struct efx_mcdi_iface *mcdi;
0065     bool already_attached;
0066     int rc = -ENOMEM;
0067 
0068     efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
0069     if (!efx->mcdi)
0070         goto fail;
0071 
0072     mcdi = efx_mcdi(efx);
0073     mcdi->efx = efx;
0074 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING
0075     /* consuming code assumes buffer is page-sized */
0076     mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL);
0077     if (!mcdi->logging_buffer)
0078         goto fail1;
0079     mcdi->logging_enabled = efx_siena_mcdi_logging_default;
0080 #endif
0081     init_waitqueue_head(&mcdi->wq);
0082     init_waitqueue_head(&mcdi->proxy_rx_wq);
0083     spin_lock_init(&mcdi->iface_lock);
0084     mcdi->state = MCDI_STATE_QUIESCENT;
0085     mcdi->mode = MCDI_MODE_POLL;
0086     spin_lock_init(&mcdi->async_lock);
0087     INIT_LIST_HEAD(&mcdi->async_list);
0088     timer_setup(&mcdi->async_timer, efx_mcdi_timeout_async, 0);
0089 
0090     (void)efx_siena_mcdi_poll_reboot(efx);
0091     mcdi->new_epoch = true;
0092 
0093     /* Recover from a failed assertion before probing */
0094     rc = efx_siena_mcdi_handle_assertion(efx);
0095     if (rc)
0096         goto fail2;
0097 
0098     /* Let the MC (and BMC, if this is a LOM) know that the driver
0099      * is loaded. We should do this before we reset the NIC.
0100      */
0101     rc = efx_mcdi_drv_attach(efx, true, &already_attached);
0102     if (rc) {
0103         netif_err(efx, probe, efx->net_dev,
0104               "Unable to register driver with MCPU\n");
0105         goto fail2;
0106     }
0107     if (already_attached)
0108         /* Not a fatal error */
0109         netif_err(efx, probe, efx->net_dev,
0110               "Host already registered with MCPU\n");
0111 
0112     if (efx->mcdi->fn_flags &
0113         (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
0114         efx->primary = efx;
0115 
0116     return 0;
0117 fail2:
0118 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING
0119     free_page((unsigned long)mcdi->logging_buffer);
0120 fail1:
0121 #endif
0122     kfree(efx->mcdi);
0123     efx->mcdi = NULL;
0124 fail:
0125     return rc;
0126 }
0127 
0128 void efx_siena_mcdi_detach(struct efx_nic *efx)
0129 {
0130     if (!efx->mcdi)
0131         return;
0132 
0133     BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
0134 
0135     /* Relinquish the device (back to the BMC, if this is a LOM) */
0136     efx_mcdi_drv_attach(efx, false, NULL);
0137 }
0138 
0139 void efx_siena_mcdi_fini(struct efx_nic *efx)
0140 {
0141     if (!efx->mcdi)
0142         return;
0143 
0144 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING
0145     free_page((unsigned long)efx->mcdi->iface.logging_buffer);
0146 #endif
0147 
0148     kfree(efx->mcdi);
0149 }
0150 
0151 static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
0152                   const efx_dword_t *inbuf, size_t inlen)
0153 {
0154     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0155 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING
0156     char *buf = mcdi->logging_buffer; /* page-sized */
0157 #endif
0158     efx_dword_t hdr[2];
0159     size_t hdr_len;
0160     u32 xflags, seqno;
0161 
0162     BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
0163 
0164     /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
0165     spin_lock_bh(&mcdi->iface_lock);
0166     ++mcdi->seqno;
0167     seqno = mcdi->seqno & SEQ_MASK;
0168     spin_unlock_bh(&mcdi->iface_lock);
0169 
0170     xflags = 0;
0171     if (mcdi->mode == MCDI_MODE_EVENTS)
0172         xflags |= MCDI_HEADER_XFLAGS_EVREQ;
0173 
0174     if (efx->type->mcdi_max_ver == 1) {
0175         /* MCDI v1 */
0176         EFX_POPULATE_DWORD_7(hdr[0],
0177                      MCDI_HEADER_RESPONSE, 0,
0178                      MCDI_HEADER_RESYNC, 1,
0179                      MCDI_HEADER_CODE, cmd,
0180                      MCDI_HEADER_DATALEN, inlen,
0181                      MCDI_HEADER_SEQ, seqno,
0182                      MCDI_HEADER_XFLAGS, xflags,
0183                      MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
0184         hdr_len = 4;
0185     } else {
0186         /* MCDI v2 */
0187         BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
0188         EFX_POPULATE_DWORD_7(hdr[0],
0189                      MCDI_HEADER_RESPONSE, 0,
0190                      MCDI_HEADER_RESYNC, 1,
0191                      MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
0192                      MCDI_HEADER_DATALEN, 0,
0193                      MCDI_HEADER_SEQ, seqno,
0194                      MCDI_HEADER_XFLAGS, xflags,
0195                      MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
0196         EFX_POPULATE_DWORD_2(hdr[1],
0197                      MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
0198                      MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
0199         hdr_len = 8;
0200     }
0201 
0202 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING
0203     if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
0204         int bytes = 0;
0205         int i;
0206         /* Lengths should always be a whole number of dwords, so scream
0207          * if they're not.
0208          */
0209         WARN_ON_ONCE(hdr_len % 4);
0210         WARN_ON_ONCE(inlen % 4);
0211 
0212         /* We own the logging buffer, as only one MCDI can be in
0213          * progress on a NIC at any one time.  So no need for locking.
0214          */
0215         for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++)
0216             bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
0217                        " %08x",
0218                        le32_to_cpu(hdr[i].u32[0]));
0219 
0220         for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++)
0221             bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
0222                        " %08x",
0223                        le32_to_cpu(inbuf[i].u32[0]));
0224 
0225         netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf);
0226     }
0227 #endif
0228 
0229     efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
0230 
0231     mcdi->new_epoch = false;
0232 }
0233 
0234 static int efx_mcdi_errno(unsigned int mcdi_err)
0235 {
0236     switch (mcdi_err) {
0237     case 0:
0238         return 0;
0239 #define TRANSLATE_ERROR(name)                   \
0240     case MC_CMD_ERR_ ## name:               \
0241         return -name;
0242     TRANSLATE_ERROR(EPERM);
0243     TRANSLATE_ERROR(ENOENT);
0244     TRANSLATE_ERROR(EINTR);
0245     TRANSLATE_ERROR(EAGAIN);
0246     TRANSLATE_ERROR(EACCES);
0247     TRANSLATE_ERROR(EBUSY);
0248     TRANSLATE_ERROR(EINVAL);
0249     TRANSLATE_ERROR(EDEADLK);
0250     TRANSLATE_ERROR(ENOSYS);
0251     TRANSLATE_ERROR(ETIME);
0252     TRANSLATE_ERROR(EALREADY);
0253     TRANSLATE_ERROR(ENOSPC);
0254 #undef TRANSLATE_ERROR
0255     case MC_CMD_ERR_ENOTSUP:
0256         return -EOPNOTSUPP;
0257     case MC_CMD_ERR_ALLOC_FAIL:
0258         return -ENOBUFS;
0259     case MC_CMD_ERR_MAC_EXIST:
0260         return -EADDRINUSE;
0261     default:
0262         return -EPROTO;
0263     }
0264 }
0265 
0266 static void efx_mcdi_read_response_header(struct efx_nic *efx)
0267 {
0268     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0269     unsigned int respseq, respcmd, error;
0270 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING
0271     char *buf = mcdi->logging_buffer; /* page-sized */
0272 #endif
0273     efx_dword_t hdr;
0274 
0275     efx->type->mcdi_read_response(efx, &hdr, 0, 4);
0276     respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
0277     respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
0278     error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
0279 
0280     if (respcmd != MC_CMD_V2_EXTN) {
0281         mcdi->resp_hdr_len = 4;
0282         mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
0283     } else {
0284         efx->type->mcdi_read_response(efx, &hdr, 4, 4);
0285         mcdi->resp_hdr_len = 8;
0286         mcdi->resp_data_len =
0287             EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
0288     }
0289 
0290 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING
0291     if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
0292         size_t hdr_len, data_len;
0293         int bytes = 0;
0294         int i;
0295 
0296         WARN_ON_ONCE(mcdi->resp_hdr_len % 4);
0297         hdr_len = mcdi->resp_hdr_len / 4;
0298         /* MCDI_DECLARE_BUF ensures that underlying buffer is padded
0299          * to dword size, and the MCDI buffer is always dword size
0300          */
0301         data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4);
0302 
0303         /* We own the logging buffer, as only one MCDI can be in
0304          * progress on a NIC at any one time.  So no need for locking.
0305          */
0306         for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) {
0307             efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4);
0308             bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
0309                        " %08x", le32_to_cpu(hdr.u32[0]));
0310         }
0311 
0312         for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) {
0313             efx->type->mcdi_read_response(efx, &hdr,
0314                     mcdi->resp_hdr_len + (i * 4), 4);
0315             bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
0316                        " %08x", le32_to_cpu(hdr.u32[0]));
0317         }
0318 
0319         netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf);
0320     }
0321 #endif
0322 
0323     mcdi->resprc_raw = 0;
0324     if (error && mcdi->resp_data_len == 0) {
0325         netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
0326         mcdi->resprc = -EIO;
0327     } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
0328         netif_err(efx, hw, efx->net_dev,
0329               "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
0330               respseq, mcdi->seqno);
0331         mcdi->resprc = -EIO;
0332     } else if (error) {
0333         efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
0334         mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0);
0335         mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw);
0336     } else {
0337         mcdi->resprc = 0;
0338     }
0339 }
0340 
0341 static bool efx_mcdi_poll_once(struct efx_nic *efx)
0342 {
0343     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0344 
0345     rmb();
0346     if (!efx->type->mcdi_poll_response(efx))
0347         return false;
0348 
0349     spin_lock_bh(&mcdi->iface_lock);
0350     efx_mcdi_read_response_header(efx);
0351     spin_unlock_bh(&mcdi->iface_lock);
0352 
0353     return true;
0354 }
0355 
0356 static int efx_mcdi_poll(struct efx_nic *efx)
0357 {
0358     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0359     unsigned long time, finish;
0360     unsigned int spins;
0361     int rc;
0362 
0363     /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
0364     rc = efx_siena_mcdi_poll_reboot(efx);
0365     if (rc) {
0366         spin_lock_bh(&mcdi->iface_lock);
0367         mcdi->resprc = rc;
0368         mcdi->resp_hdr_len = 0;
0369         mcdi->resp_data_len = 0;
0370         spin_unlock_bh(&mcdi->iface_lock);
0371         return 0;
0372     }
0373 
0374     /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
0375      * because generally mcdi responses are fast. After that, back off
0376      * and poll once a jiffy (approximately)
0377      */
0378     spins = USER_TICK_USEC;
0379     finish = jiffies + MCDI_RPC_TIMEOUT;
0380 
0381     while (1) {
0382         if (spins != 0) {
0383             --spins;
0384             udelay(1);
0385         } else {
0386             schedule_timeout_uninterruptible(1);
0387         }
0388 
0389         time = jiffies;
0390 
0391         if (efx_mcdi_poll_once(efx))
0392             break;
0393 
0394         if (time_after(time, finish))
0395             return -ETIMEDOUT;
0396     }
0397 
0398     /* Return rc=0 like wait_event_timeout() */
0399     return 0;
0400 }
0401 
0402 /* Test and clear MC-rebooted flag for this port/function; reset
0403  * software state as necessary.
0404  */
0405 int efx_siena_mcdi_poll_reboot(struct efx_nic *efx)
0406 {
0407     if (!efx->mcdi)
0408         return 0;
0409 
0410     return efx->type->mcdi_poll_reboot(efx);
0411 }
0412 
0413 static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
0414 {
0415     return cmpxchg(&mcdi->state,
0416                MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
0417         MCDI_STATE_QUIESCENT;
0418 }
0419 
0420 static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
0421 {
0422     /* Wait until the interface becomes QUIESCENT and we win the race
0423      * to mark it RUNNING_SYNC.
0424      */
0425     wait_event(mcdi->wq,
0426            cmpxchg(&mcdi->state,
0427                MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
0428            MCDI_STATE_QUIESCENT);
0429 }
0430 
0431 static int efx_mcdi_await_completion(struct efx_nic *efx)
0432 {
0433     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0434 
0435     if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
0436                    MCDI_RPC_TIMEOUT) == 0)
0437         return -ETIMEDOUT;
0438 
0439     /* Check if efx_mcdi_set_mode() switched us back to polled completions.
0440      * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
0441      * completed the request first, then we'll just end up completing the
0442      * request again, which is safe.
0443      *
0444      * We need an smp_rmb() to synchronise with efx_siena_mcdi_mode_poll(), which
0445      * wait_event_timeout() implicitly provides.
0446      */
0447     if (mcdi->mode == MCDI_MODE_POLL)
0448         return efx_mcdi_poll(efx);
0449 
0450     return 0;
0451 }
0452 
0453 /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
0454  * requester.  Return whether this was done.  Does not take any locks.
0455  */
0456 static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
0457 {
0458     if (cmpxchg(&mcdi->state,
0459             MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
0460         MCDI_STATE_RUNNING_SYNC) {
0461         wake_up(&mcdi->wq);
0462         return true;
0463     }
0464 
0465     return false;
0466 }
0467 
0468 static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
0469 {
0470     if (mcdi->mode == MCDI_MODE_EVENTS) {
0471         struct efx_mcdi_async_param *async;
0472         struct efx_nic *efx = mcdi->efx;
0473 
0474         /* Process the asynchronous request queue */
0475         spin_lock_bh(&mcdi->async_lock);
0476         async = list_first_entry_or_null(
0477             &mcdi->async_list, struct efx_mcdi_async_param, list);
0478         if (async) {
0479             mcdi->state = MCDI_STATE_RUNNING_ASYNC;
0480             efx_mcdi_send_request(efx, async->cmd,
0481                           (const efx_dword_t *)(async + 1),
0482                           async->inlen);
0483             mod_timer(&mcdi->async_timer,
0484                   jiffies + MCDI_RPC_TIMEOUT);
0485         }
0486         spin_unlock_bh(&mcdi->async_lock);
0487 
0488         if (async)
0489             return;
0490     }
0491 
0492     mcdi->state = MCDI_STATE_QUIESCENT;
0493     wake_up(&mcdi->wq);
0494 }
0495 
0496 /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
0497  * asynchronous completion function, and release the interface.
0498  * Return whether this was done.  Must be called in bh-disabled
0499  * context.  Will take iface_lock and async_lock.
0500  */
0501 static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
0502 {
0503     struct efx_nic *efx = mcdi->efx;
0504     struct efx_mcdi_async_param *async;
0505     size_t hdr_len, data_len, err_len;
0506     efx_dword_t *outbuf;
0507     MCDI_DECLARE_BUF_ERR(errbuf);
0508     int rc;
0509 
0510     if (cmpxchg(&mcdi->state,
0511             MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
0512         MCDI_STATE_RUNNING_ASYNC)
0513         return false;
0514 
0515     spin_lock(&mcdi->iface_lock);
0516     if (timeout) {
0517         /* Ensure that if the completion event arrives later,
0518          * the seqno check in efx_mcdi_ev_cpl() will fail
0519          */
0520         ++mcdi->seqno;
0521         ++mcdi->credits;
0522         rc = -ETIMEDOUT;
0523         hdr_len = 0;
0524         data_len = 0;
0525     } else {
0526         rc = mcdi->resprc;
0527         hdr_len = mcdi->resp_hdr_len;
0528         data_len = mcdi->resp_data_len;
0529     }
0530     spin_unlock(&mcdi->iface_lock);
0531 
0532     /* Stop the timer.  In case the timer function is running, we
0533      * must wait for it to return so that there is no possibility
0534      * of it aborting the next request.
0535      */
0536     if (!timeout)
0537         del_timer_sync(&mcdi->async_timer);
0538 
0539     spin_lock(&mcdi->async_lock);
0540     async = list_first_entry(&mcdi->async_list,
0541                  struct efx_mcdi_async_param, list);
0542     list_del(&async->list);
0543     spin_unlock(&mcdi->async_lock);
0544 
0545     outbuf = (efx_dword_t *)(async + 1);
0546     efx->type->mcdi_read_response(efx, outbuf, hdr_len,
0547                       min(async->outlen, data_len));
0548     if (!timeout && rc && !async->quiet) {
0549         err_len = min(sizeof(errbuf), data_len);
0550         efx->type->mcdi_read_response(efx, errbuf, hdr_len,
0551                           sizeof(errbuf));
0552         efx_siena_mcdi_display_error(efx, async->cmd, async->inlen,
0553                          errbuf, err_len, rc);
0554     }
0555 
0556     if (async->complete)
0557         async->complete(efx, async->cookie, rc, outbuf,
0558                 min(async->outlen, data_len));
0559     kfree(async);
0560 
0561     efx_mcdi_release(mcdi);
0562 
0563     return true;
0564 }
0565 
0566 static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
0567                 unsigned int datalen, unsigned int mcdi_err)
0568 {
0569     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0570     bool wake = false;
0571 
0572     spin_lock(&mcdi->iface_lock);
0573 
0574     if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
0575         if (mcdi->credits)
0576             /* The request has been cancelled */
0577             --mcdi->credits;
0578         else
0579             netif_err(efx, hw, efx->net_dev,
0580                   "MC response mismatch tx seq 0x%x rx "
0581                   "seq 0x%x\n", seqno, mcdi->seqno);
0582     } else {
0583         if (efx->type->mcdi_max_ver >= 2) {
0584             /* MCDI v2 responses don't fit in an event */
0585             efx_mcdi_read_response_header(efx);
0586         } else {
0587             mcdi->resprc = efx_mcdi_errno(mcdi_err);
0588             mcdi->resp_hdr_len = 4;
0589             mcdi->resp_data_len = datalen;
0590         }
0591 
0592         wake = true;
0593     }
0594 
0595     spin_unlock(&mcdi->iface_lock);
0596 
0597     if (wake) {
0598         if (!efx_mcdi_complete_async(mcdi, false))
0599             (void) efx_mcdi_complete_sync(mcdi);
0600 
0601         /* If the interface isn't RUNNING_ASYNC or
0602          * RUNNING_SYNC then we've received a duplicate
0603          * completion after we've already transitioned back to
0604          * QUIESCENT. [A subsequent invocation would increment
0605          * seqno, so would have failed the seqno check].
0606          */
0607     }
0608 }
0609 
0610 static void efx_mcdi_timeout_async(struct timer_list *t)
0611 {
0612     struct efx_mcdi_iface *mcdi = from_timer(mcdi, t, async_timer);
0613 
0614     efx_mcdi_complete_async(mcdi, true);
0615 }
0616 
0617 static int
0618 efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
0619 {
0620     if (efx->type->mcdi_max_ver < 0 ||
0621          (efx->type->mcdi_max_ver < 2 &&
0622           cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
0623         return -EINVAL;
0624 
0625     if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
0626         (efx->type->mcdi_max_ver < 2 &&
0627          inlen > MCDI_CTL_SDU_LEN_MAX_V1))
0628         return -EMSGSIZE;
0629 
0630     return 0;
0631 }
0632 
0633 static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx,
0634                       size_t hdr_len, size_t data_len,
0635                       u32 *proxy_handle)
0636 {
0637     MCDI_DECLARE_BUF_ERR(testbuf);
0638     const size_t buflen = sizeof(testbuf);
0639 
0640     if (!proxy_handle || data_len < buflen)
0641         return false;
0642 
0643     efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen);
0644     if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) {
0645         *proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE);
0646         return true;
0647     }
0648 
0649     return false;
0650 }
0651 
0652 static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd,
0653                 size_t inlen,
0654                 efx_dword_t *outbuf, size_t outlen,
0655                 size_t *outlen_actual, bool quiet,
0656                 u32 *proxy_handle, int *raw_rc)
0657 {
0658     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0659     MCDI_DECLARE_BUF_ERR(errbuf);
0660     int rc;
0661 
0662     if (mcdi->mode == MCDI_MODE_POLL)
0663         rc = efx_mcdi_poll(efx);
0664     else
0665         rc = efx_mcdi_await_completion(efx);
0666 
0667     if (rc != 0) {
0668         netif_err(efx, hw, efx->net_dev,
0669               "MC command 0x%x inlen %d mode %d timed out\n",
0670               cmd, (int)inlen, mcdi->mode);
0671 
0672         if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
0673             netif_err(efx, hw, efx->net_dev,
0674                   "MCDI request was completed without an event\n");
0675             rc = 0;
0676         }
0677 
0678         efx_mcdi_abandon(efx);
0679 
0680         /* Close the race with efx_mcdi_ev_cpl() executing just too late
0681          * and completing a request we've just cancelled, by ensuring
0682          * that the seqno check therein fails.
0683          */
0684         spin_lock_bh(&mcdi->iface_lock);
0685         ++mcdi->seqno;
0686         ++mcdi->credits;
0687         spin_unlock_bh(&mcdi->iface_lock);
0688     }
0689 
0690     if (proxy_handle)
0691         *proxy_handle = 0;
0692 
0693     if (rc != 0) {
0694         if (outlen_actual)
0695             *outlen_actual = 0;
0696     } else {
0697         size_t hdr_len, data_len, err_len;
0698 
0699         /* At the very least we need a memory barrier here to ensure
0700          * we pick up changes from efx_mcdi_ev_cpl(). Protect against
0701          * a spurious efx_mcdi_ev_cpl() running concurrently by
0702          * acquiring the iface_lock. */
0703         spin_lock_bh(&mcdi->iface_lock);
0704         rc = mcdi->resprc;
0705         if (raw_rc)
0706             *raw_rc = mcdi->resprc_raw;
0707         hdr_len = mcdi->resp_hdr_len;
0708         data_len = mcdi->resp_data_len;
0709         err_len = min(sizeof(errbuf), data_len);
0710         spin_unlock_bh(&mcdi->iface_lock);
0711 
0712         BUG_ON(rc > 0);
0713 
0714         efx->type->mcdi_read_response(efx, outbuf, hdr_len,
0715                           min(outlen, data_len));
0716         if (outlen_actual)
0717             *outlen_actual = data_len;
0718 
0719         efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
0720 
0721         if (cmd == MC_CMD_REBOOT && rc == -EIO) {
0722             /* Don't reset if MC_CMD_REBOOT returns EIO */
0723         } else if (rc == -EIO || rc == -EINTR) {
0724             netif_err(efx, hw, efx->net_dev, "MC reboot detected\n");
0725             netif_dbg(efx, hw, efx->net_dev, "MC rebooted during command %d rc %d\n",
0726                   cmd, -rc);
0727             if (efx->type->mcdi_reboot_detected)
0728                 efx->type->mcdi_reboot_detected(efx);
0729             efx_siena_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
0730         } else if (proxy_handle && (rc == -EPROTO) &&
0731                efx_mcdi_get_proxy_handle(efx, hdr_len, data_len,
0732                              proxy_handle)) {
0733             mcdi->proxy_rx_status = 0;
0734             mcdi->proxy_rx_handle = 0;
0735             mcdi->state = MCDI_STATE_PROXY_WAIT;
0736         } else if (rc && !quiet) {
0737             efx_siena_mcdi_display_error(efx, cmd, inlen, errbuf,
0738                              err_len, rc);
0739         }
0740 
0741         if (rc == -EIO || rc == -EINTR) {
0742             msleep(MCDI_STATUS_SLEEP_MS);
0743             efx_siena_mcdi_poll_reboot(efx);
0744             mcdi->new_epoch = true;
0745         }
0746     }
0747 
0748     if (!proxy_handle || !*proxy_handle)
0749         efx_mcdi_release(mcdi);
0750     return rc;
0751 }
0752 
0753 static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi)
0754 {
0755     if (mcdi->state == MCDI_STATE_PROXY_WAIT) {
0756         /* Interrupt the proxy wait. */
0757         mcdi->proxy_rx_status = -EINTR;
0758         wake_up(&mcdi->proxy_rx_wq);
0759     }
0760 }
0761 
0762 static void efx_mcdi_ev_proxy_response(struct efx_nic *efx,
0763                        u32 handle, int status)
0764 {
0765     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0766 
0767     WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT);
0768 
0769     mcdi->proxy_rx_status = efx_mcdi_errno(status);
0770     /* Ensure the status is written before we update the handle, since the
0771      * latter is used to check if we've finished.
0772      */
0773     wmb();
0774     mcdi->proxy_rx_handle = handle;
0775     wake_up(&mcdi->proxy_rx_wq);
0776 }
0777 
0778 static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet)
0779 {
0780     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0781     int rc;
0782 
0783     /* Wait for a proxy event, or timeout. */
0784     rc = wait_event_timeout(mcdi->proxy_rx_wq,
0785                 mcdi->proxy_rx_handle != 0 ||
0786                 mcdi->proxy_rx_status == -EINTR,
0787                 MCDI_RPC_TIMEOUT);
0788 
0789     if (rc <= 0) {
0790         netif_dbg(efx, hw, efx->net_dev,
0791               "MCDI proxy timeout %d\n", handle);
0792         return -ETIMEDOUT;
0793     } else if (mcdi->proxy_rx_handle != handle) {
0794         netif_warn(efx, hw, efx->net_dev,
0795                "MCDI proxy unexpected handle %d (expected %d)\n",
0796                mcdi->proxy_rx_handle, handle);
0797         return -EINVAL;
0798     }
0799 
0800     return mcdi->proxy_rx_status;
0801 }
0802 
0803 static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd,
0804              const efx_dword_t *inbuf, size_t inlen,
0805              efx_dword_t *outbuf, size_t outlen,
0806              size_t *outlen_actual, bool quiet, int *raw_rc)
0807 {
0808     u32 proxy_handle = 0; /* Zero is an invalid proxy handle. */
0809     int rc;
0810 
0811     if (inbuf && inlen && (inbuf == outbuf)) {
0812         /* The input buffer can't be aliased with the output. */
0813         WARN_ON(1);
0814         return -EINVAL;
0815     }
0816 
0817     rc = efx_siena_mcdi_rpc_start(efx, cmd, inbuf, inlen);
0818     if (rc)
0819         return rc;
0820 
0821     rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
0822                   outlen_actual, quiet, &proxy_handle, raw_rc);
0823 
0824     if (proxy_handle) {
0825         /* Handle proxy authorisation. This allows approval of MCDI
0826          * operations to be delegated to the admin function, allowing
0827          * fine control over (eg) multicast subscriptions.
0828          */
0829         struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0830 
0831         netif_dbg(efx, hw, efx->net_dev,
0832               "MCDI waiting for proxy auth %d\n",
0833               proxy_handle);
0834         rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet);
0835 
0836         if (rc == 0) {
0837             netif_dbg(efx, hw, efx->net_dev,
0838                   "MCDI proxy retry %d\n", proxy_handle);
0839 
0840             /* We now retry the original request. */
0841             mcdi->state = MCDI_STATE_RUNNING_SYNC;
0842             efx_mcdi_send_request(efx, cmd, inbuf, inlen);
0843 
0844             rc = _efx_mcdi_rpc_finish(efx, cmd, inlen,
0845                           outbuf, outlen, outlen_actual,
0846                           quiet, NULL, raw_rc);
0847         } else {
0848             netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err,
0849                        "MC command 0x%x failed after proxy auth rc=%d\n",
0850                        cmd, rc);
0851 
0852             if (rc == -EINTR || rc == -EIO)
0853                 efx_siena_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
0854             efx_mcdi_release(mcdi);
0855         }
0856     }
0857 
0858     return rc;
0859 }
0860 
0861 static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd,
0862                    const efx_dword_t *inbuf, size_t inlen,
0863                    efx_dword_t *outbuf, size_t outlen,
0864                    size_t *outlen_actual, bool quiet)
0865 {
0866     int raw_rc = 0;
0867     int rc;
0868 
0869     rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
0870                outbuf, outlen, outlen_actual, true, &raw_rc);
0871 
0872     if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
0873         efx->type->is_vf) {
0874         /* If the EVB port isn't available within a VF this may
0875          * mean the PF is still bringing the switch up. We should
0876          * retry our request shortly.
0877          */
0878         unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT;
0879         unsigned int delay_us = 10000;
0880 
0881         netif_dbg(efx, hw, efx->net_dev,
0882               "%s: NO_EVB_PORT; will retry request\n",
0883               __func__);
0884 
0885         do {
0886             usleep_range(delay_us, delay_us + 10000);
0887             rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
0888                        outbuf, outlen, outlen_actual,
0889                        true, &raw_rc);
0890             if (delay_us < 100000)
0891                 delay_us <<= 1;
0892         } while ((rc == -EPROTO) &&
0893              (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
0894              time_before(jiffies, abort_time));
0895     }
0896 
0897     if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO))
0898         efx_siena_mcdi_display_error(efx, cmd, inlen,
0899                          outbuf, outlen, rc);
0900 
0901     return rc;
0902 }
0903 
0904 /**
0905  * efx_siena_mcdi_rpc - Issue an MCDI command and wait for completion
0906  * @efx: NIC through which to issue the command
0907  * @cmd: Command type number
0908  * @inbuf: Command parameters
0909  * @inlen: Length of command parameters, in bytes.  Must be a multiple
0910  *  of 4 and no greater than %MCDI_CTL_SDU_LEN_MAX_V1.
0911  * @outbuf: Response buffer.  May be %NULL if @outlen is 0.
0912  * @outlen: Length of response buffer, in bytes.  If the actual
0913  *  response is longer than @outlen & ~3, it will be truncated
0914  *  to that length.
0915  * @outlen_actual: Pointer through which to return the actual response
0916  *  length.  May be %NULL if this is not needed.
0917  *
0918  * This function may sleep and therefore must be called in an appropriate
0919  * context.
0920  *
0921  * Return: A negative error code, or zero if successful.  The error
0922  *  code may come from the MCDI response or may indicate a failure
0923  *  to communicate with the MC.  In the former case, the response
0924  *  will still be copied to @outbuf and *@outlen_actual will be
0925  *  set accordingly.  In the latter case, *@outlen_actual will be
0926  *  set to zero.
0927  */
0928 int efx_siena_mcdi_rpc(struct efx_nic *efx, unsigned int cmd,
0929                const efx_dword_t *inbuf, size_t inlen,
0930                efx_dword_t *outbuf, size_t outlen,
0931                size_t *outlen_actual)
0932 {
0933     return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
0934                        outlen_actual, false);
0935 }
0936 
0937 /* Normally, on receiving an error code in the MCDI response,
0938  * efx_siena_mcdi_rpc will log an error message containing (among other
0939  * things) the raw error code, by means of efx_siena_mcdi_display_error.
0940  * This _quiet version suppresses that; if the caller wishes to log
0941  * the error conditionally on the return code, it should call this
0942  * function and is then responsible for calling efx_siena_mcdi_display_error
0943  * as needed.
0944  */
0945 int efx_siena_mcdi_rpc_quiet(struct efx_nic *efx, unsigned int cmd,
0946                  const efx_dword_t *inbuf, size_t inlen,
0947                  efx_dword_t *outbuf, size_t outlen,
0948                  size_t *outlen_actual)
0949 {
0950     return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
0951                        outlen_actual, true);
0952 }
0953 
0954 int efx_siena_mcdi_rpc_start(struct efx_nic *efx, unsigned int cmd,
0955                  const efx_dword_t *inbuf, size_t inlen)
0956 {
0957     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0958     int rc;
0959 
0960     rc = efx_mcdi_check_supported(efx, cmd, inlen);
0961     if (rc)
0962         return rc;
0963 
0964     if (efx->mc_bist_for_other_fn)
0965         return -ENETDOWN;
0966 
0967     if (mcdi->mode == MCDI_MODE_FAIL)
0968         return -ENETDOWN;
0969 
0970     efx_mcdi_acquire_sync(mcdi);
0971     efx_mcdi_send_request(efx, cmd, inbuf, inlen);
0972     return 0;
0973 }
0974 
0975 static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
0976                    const efx_dword_t *inbuf, size_t inlen,
0977                    size_t outlen,
0978                    efx_mcdi_async_completer *complete,
0979                    unsigned long cookie, bool quiet)
0980 {
0981     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0982     struct efx_mcdi_async_param *async;
0983     int rc;
0984 
0985     rc = efx_mcdi_check_supported(efx, cmd, inlen);
0986     if (rc)
0987         return rc;
0988 
0989     if (efx->mc_bist_for_other_fn)
0990         return -ENETDOWN;
0991 
0992     async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
0993             GFP_ATOMIC);
0994     if (!async)
0995         return -ENOMEM;
0996 
0997     async->cmd = cmd;
0998     async->inlen = inlen;
0999     async->outlen = outlen;
1000     async->quiet = quiet;
1001     async->complete = complete;
1002     async->cookie = cookie;
1003     memcpy(async + 1, inbuf, inlen);
1004 
1005     spin_lock_bh(&mcdi->async_lock);
1006 
1007     if (mcdi->mode == MCDI_MODE_EVENTS) {
1008         list_add_tail(&async->list, &mcdi->async_list);
1009 
1010         /* If this is at the front of the queue, try to start it
1011          * immediately
1012          */
1013         if (mcdi->async_list.next == &async->list &&
1014             efx_mcdi_acquire_async(mcdi)) {
1015             efx_mcdi_send_request(efx, cmd, inbuf, inlen);
1016             mod_timer(&mcdi->async_timer,
1017                   jiffies + MCDI_RPC_TIMEOUT);
1018         }
1019     } else {
1020         kfree(async);
1021         rc = -ENETDOWN;
1022     }
1023 
1024     spin_unlock_bh(&mcdi->async_lock);
1025 
1026     return rc;
1027 }
1028 
1029 /**
1030  * efx_siena_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
1031  * @efx: NIC through which to issue the command
1032  * @cmd: Command type number
1033  * @inbuf: Command parameters
1034  * @inlen: Length of command parameters, in bytes
1035  * @outlen: Length to allocate for response buffer, in bytes
1036  * @complete: Function to be called on completion or cancellation.
1037  * @cookie: Arbitrary value to be passed to @complete.
1038  *
1039  * This function does not sleep and therefore may be called in atomic
1040  * context.  It will fail if event queues are disabled or if MCDI
1041  * event completions have been disabled due to an error.
1042  *
1043  * If it succeeds, the @complete function will be called exactly once
1044  * in atomic context, when one of the following occurs:
1045  * (a) the completion event is received (in NAPI context)
1046  * (b) event queues are disabled (in the process that disables them)
1047  * (c) the request times-out (in timer context)
1048  */
1049 int
1050 efx_siena_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
1051              const efx_dword_t *inbuf, size_t inlen, size_t outlen,
1052              efx_mcdi_async_completer *complete,
1053              unsigned long cookie)
1054 {
1055     return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
1056                    cookie, false);
1057 }
1058 
1059 int efx_siena_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
1060                    const efx_dword_t *inbuf, size_t inlen,
1061                    size_t outlen,
1062                    efx_mcdi_async_completer *complete,
1063                    unsigned long cookie)
1064 {
1065     return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
1066                    cookie, true);
1067 }
1068 
1069 int efx_siena_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd,
1070                   size_t inlen, efx_dword_t *outbuf, size_t outlen,
1071                   size_t *outlen_actual)
1072 {
1073     return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
1074                     outlen_actual, false, NULL, NULL);
1075 }
1076 
1077 int efx_siena_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned int cmd,
1078                     size_t inlen, efx_dword_t *outbuf,
1079                     size_t outlen, size_t *outlen_actual)
1080 {
1081     return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
1082                     outlen_actual, true, NULL, NULL);
1083 }
1084 
1085 void efx_siena_mcdi_display_error(struct efx_nic *efx, unsigned int cmd,
1086                   size_t inlen, efx_dword_t *outbuf,
1087                   size_t outlen, int rc)
1088 {
1089     int code = 0, err_arg = 0;
1090 
1091     if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
1092         code = MCDI_DWORD(outbuf, ERR_CODE);
1093     if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
1094         err_arg = MCDI_DWORD(outbuf, ERR_ARG);
1095     netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err,
1096                "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n",
1097                cmd, inlen, rc, code, err_arg);
1098 }
1099 
1100 /* Switch to polled MCDI completions.  This can be called in various
1101  * error conditions with various locks held, so it must be lockless.
1102  * Caller is responsible for flushing asynchronous requests later.
1103  */
1104 void efx_siena_mcdi_mode_poll(struct efx_nic *efx)
1105 {
1106     struct efx_mcdi_iface *mcdi;
1107 
1108     if (!efx->mcdi)
1109         return;
1110 
1111     mcdi = efx_mcdi(efx);
1112     /* If already in polling mode, nothing to do.
1113      * If in fail-fast state, don't switch to polled completion.
1114      * FLR recovery will do that later.
1115      */
1116     if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
1117         return;
1118 
1119     /* We can switch from event completion to polled completion, because
1120      * mcdi requests are always completed in shared memory. We do this by
1121      * switching the mode to POLL'd then completing the request.
1122      * efx_mcdi_await_completion() will then call efx_mcdi_poll().
1123      *
1124      * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
1125      * which efx_mcdi_complete_sync() provides for us.
1126      */
1127     mcdi->mode = MCDI_MODE_POLL;
1128 
1129     efx_mcdi_complete_sync(mcdi);
1130 }
1131 
1132 /* Flush any running or queued asynchronous requests, after event processing
1133  * is stopped
1134  */
1135 void efx_siena_mcdi_flush_async(struct efx_nic *efx)
1136 {
1137     struct efx_mcdi_async_param *async, *next;
1138     struct efx_mcdi_iface *mcdi;
1139 
1140     if (!efx->mcdi)
1141         return;
1142 
1143     mcdi = efx_mcdi(efx);
1144 
1145     /* We must be in poll or fail mode so no more requests can be queued */
1146     BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
1147 
1148     del_timer_sync(&mcdi->async_timer);
1149 
1150     /* If a request is still running, make sure we give the MC
1151      * time to complete it so that the response won't overwrite our
1152      * next request.
1153      */
1154     if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
1155         efx_mcdi_poll(efx);
1156         mcdi->state = MCDI_STATE_QUIESCENT;
1157     }
1158 
1159     /* Nothing else will access the async list now, so it is safe
1160      * to walk it without holding async_lock.  If we hold it while
1161      * calling a completer then lockdep may warn that we have
1162      * acquired locks in the wrong order.
1163      */
1164     list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
1165         if (async->complete)
1166             async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
1167         list_del(&async->list);
1168         kfree(async);
1169     }
1170 }
1171 
1172 void efx_siena_mcdi_mode_event(struct efx_nic *efx)
1173 {
1174     struct efx_mcdi_iface *mcdi;
1175 
1176     if (!efx->mcdi)
1177         return;
1178 
1179     mcdi = efx_mcdi(efx);
1180     /* If already in event completion mode, nothing to do.
1181      * If in fail-fast state, don't switch to event completion.  FLR
1182      * recovery will do that later.
1183      */
1184     if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
1185         return;
1186 
1187     /* We can't switch from polled to event completion in the middle of a
1188      * request, because the completion method is specified in the request.
1189      * So acquire the interface to serialise the requestors. We don't need
1190      * to acquire the iface_lock to change the mode here, but we do need a
1191      * write memory barrier ensure that efx_siena_mcdi_rpc() sees it, which
1192      * efx_mcdi_acquire() provides.
1193      */
1194     efx_mcdi_acquire_sync(mcdi);
1195     mcdi->mode = MCDI_MODE_EVENTS;
1196     efx_mcdi_release(mcdi);
1197 }
1198 
1199 static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
1200 {
1201     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1202 
1203     /* If there is an outstanding MCDI request, it has been terminated
1204      * either by a BADASSERT or REBOOT event. If the mcdi interface is
1205      * in polled mode, then do nothing because the MC reboot handler will
1206      * set the header correctly. However, if the mcdi interface is waiting
1207      * for a CMDDONE event it won't receive it [and since all MCDI events
1208      * are sent to the same queue, we can't be racing with
1209      * efx_mcdi_ev_cpl()]
1210      *
1211      * If there is an outstanding asynchronous request, we can't
1212      * complete it now (efx_mcdi_complete() would deadlock).  The
1213      * reset process will take care of this.
1214      *
1215      * There's a race here with efx_mcdi_send_request(), because
1216      * we might receive a REBOOT event *before* the request has
1217      * been copied out. In polled mode (during startup) this is
1218      * irrelevant, because efx_mcdi_complete_sync() is ignored. In
1219      * event mode, this condition is just an edge-case of
1220      * receiving a REBOOT event after posting the MCDI
1221      * request. Did the mc reboot before or after the copyout? The
1222      * best we can do always is just return failure.
1223      *
1224      * If there is an outstanding proxy response expected it is not going
1225      * to arrive. We should thus abort it.
1226      */
1227     spin_lock(&mcdi->iface_lock);
1228     efx_mcdi_proxy_abort(mcdi);
1229 
1230     if (efx_mcdi_complete_sync(mcdi)) {
1231         if (mcdi->mode == MCDI_MODE_EVENTS) {
1232             mcdi->resprc = rc;
1233             mcdi->resp_hdr_len = 0;
1234             mcdi->resp_data_len = 0;
1235             ++mcdi->credits;
1236         }
1237     } else {
1238         int count;
1239 
1240         /* Consume the status word since efx_siena_mcdi_rpc_finish() won't */
1241         for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
1242             rc = efx_siena_mcdi_poll_reboot(efx);
1243             if (rc)
1244                 break;
1245             udelay(MCDI_STATUS_DELAY_US);
1246         }
1247 
1248         /* On EF10, a CODE_MC_REBOOT event can be received without the
1249          * reboot detection in efx_siena_mcdi_poll_reboot() being triggered.
1250          * If zero was returned from the final call to
1251          * efx_siena_mcdi_poll_reboot(), the MC reboot wasn't noticed but the
1252          * MC has definitely rebooted so prepare for the reset.
1253          */
1254         if (!rc && efx->type->mcdi_reboot_detected)
1255             efx->type->mcdi_reboot_detected(efx);
1256 
1257         mcdi->new_epoch = true;
1258 
1259         /* Nobody was waiting for an MCDI request, so trigger a reset */
1260         efx_siena_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
1261     }
1262 
1263     spin_unlock(&mcdi->iface_lock);
1264 }
1265 
1266 /* The MC is going down in to BIST mode. set the BIST flag to block
1267  * new MCDI, cancel any outstanding MCDI and schedule a BIST-type reset
1268  * (which doesn't actually execute a reset, it waits for the controlling
1269  * function to reset it).
1270  */
1271 static void efx_mcdi_ev_bist(struct efx_nic *efx)
1272 {
1273     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1274 
1275     spin_lock(&mcdi->iface_lock);
1276     efx->mc_bist_for_other_fn = true;
1277     efx_mcdi_proxy_abort(mcdi);
1278 
1279     if (efx_mcdi_complete_sync(mcdi)) {
1280         if (mcdi->mode == MCDI_MODE_EVENTS) {
1281             mcdi->resprc = -EIO;
1282             mcdi->resp_hdr_len = 0;
1283             mcdi->resp_data_len = 0;
1284             ++mcdi->credits;
1285         }
1286     }
1287     mcdi->new_epoch = true;
1288     efx_siena_schedule_reset(efx, RESET_TYPE_MC_BIST);
1289     spin_unlock(&mcdi->iface_lock);
1290 }
1291 
1292 /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
1293  * to recover.
1294  */
1295 static void efx_mcdi_abandon(struct efx_nic *efx)
1296 {
1297     struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1298 
1299     if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
1300         return; /* it had already been done */
1301     netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
1302     efx_siena_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
1303 }
1304 
1305 static void efx_handle_drain_event(struct efx_nic *efx)
1306 {
1307     if (atomic_dec_and_test(&efx->active_queues))
1308         wake_up(&efx->flush_wq);
1309 
1310     WARN_ON(atomic_read(&efx->active_queues) < 0);
1311 }
1312 
1313 /* Called from efx_farch_ev_process and efx_ef10_ev_process for MCDI events */
1314 void efx_siena_mcdi_process_event(struct efx_channel *channel,
1315                   efx_qword_t *event)
1316 {
1317     struct efx_nic *efx = channel->efx;
1318     int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
1319     u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
1320 
1321     switch (code) {
1322     case MCDI_EVENT_CODE_BADSSERT:
1323         netif_err(efx, hw, efx->net_dev,
1324               "MC watchdog or assertion failure at 0x%x\n", data);
1325         efx_mcdi_ev_death(efx, -EINTR);
1326         break;
1327 
1328     case MCDI_EVENT_CODE_PMNOTICE:
1329         netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
1330         break;
1331 
1332     case MCDI_EVENT_CODE_CMDDONE:
1333         efx_mcdi_ev_cpl(efx,
1334                 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
1335                 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
1336                 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
1337         break;
1338 
1339     case MCDI_EVENT_CODE_LINKCHANGE:
1340         efx_siena_mcdi_process_link_change(efx, event);
1341         break;
1342     case MCDI_EVENT_CODE_SENSOREVT:
1343         efx_sensor_event(efx, event);
1344         break;
1345     case MCDI_EVENT_CODE_SCHEDERR:
1346         netif_dbg(efx, hw, efx->net_dev,
1347               "MC Scheduler alert (0x%x)\n", data);
1348         break;
1349     case MCDI_EVENT_CODE_REBOOT:
1350     case MCDI_EVENT_CODE_MC_REBOOT:
1351         netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
1352         efx_mcdi_ev_death(efx, -EIO);
1353         break;
1354     case MCDI_EVENT_CODE_MC_BIST:
1355         netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
1356         efx_mcdi_ev_bist(efx);
1357         break;
1358     case MCDI_EVENT_CODE_MAC_STATS_DMA:
1359         /* MAC stats are gather lazily.  We can ignore this. */
1360         break;
1361     case MCDI_EVENT_CODE_FLR:
1362         if (efx->type->sriov_flr)
1363             efx->type->sriov_flr(efx,
1364                          MCDI_EVENT_FIELD(*event, FLR_VF));
1365         break;
1366     case MCDI_EVENT_CODE_PTP_RX:
1367     case MCDI_EVENT_CODE_PTP_FAULT:
1368     case MCDI_EVENT_CODE_PTP_PPS:
1369         efx_siena_ptp_event(efx, event);
1370         break;
1371     case MCDI_EVENT_CODE_PTP_TIME:
1372         efx_siena_time_sync_event(channel, event);
1373         break;
1374     case MCDI_EVENT_CODE_TX_FLUSH:
1375     case MCDI_EVENT_CODE_RX_FLUSH:
1376         /* Two flush events will be sent: one to the same event
1377          * queue as completions, and one to event queue 0.
1378          * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
1379          * flag will be set, and we should ignore the event
1380          * because we want to wait for all completions.
1381          */
1382         BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
1383                  MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
1384         if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
1385             efx_handle_drain_event(efx);
1386         break;
1387     case MCDI_EVENT_CODE_TX_ERR:
1388     case MCDI_EVENT_CODE_RX_ERR:
1389         netif_err(efx, hw, efx->net_dev,
1390               "%s DMA error (event: "EFX_QWORD_FMT")\n",
1391               code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
1392               EFX_QWORD_VAL(*event));
1393         efx_siena_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
1394         break;
1395     case MCDI_EVENT_CODE_PROXY_RESPONSE:
1396         efx_mcdi_ev_proxy_response(efx,
1397                 MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE),
1398                 MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC));
1399         break;
1400     default:
1401         netif_err(efx, hw, efx->net_dev,
1402               "Unknown MCDI event " EFX_QWORD_FMT "\n",
1403               EFX_QWORD_VAL(*event));
1404     }
1405 }
1406 
1407 /**************************************************************************
1408  *
1409  * Specific request functions
1410  *
1411  **************************************************************************
1412  */
1413 
1414 void efx_siena_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
1415 {
1416     MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
1417     size_t outlength;
1418     const __le16 *ver_words;
1419     size_t offset;
1420     int rc;
1421 
1422     BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
1423     rc = efx_siena_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
1424                 outbuf, sizeof(outbuf), &outlength);
1425     if (rc)
1426         goto fail;
1427     if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
1428         rc = -EIO;
1429         goto fail;
1430     }
1431 
1432     ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
1433     offset = scnprintf(buf, len, "%u.%u.%u.%u",
1434                le16_to_cpu(ver_words[0]),
1435                le16_to_cpu(ver_words[1]),
1436                le16_to_cpu(ver_words[2]),
1437                le16_to_cpu(ver_words[3]));
1438 
1439     if (efx->type->print_additional_fwver)
1440         offset += efx->type->print_additional_fwver(efx, buf + offset,
1441                                 len - offset);
1442 
1443     /* It's theoretically possible for the string to exceed 31
1444      * characters, though in practice the first three version
1445      * components are short enough that this doesn't happen.
1446      */
1447     if (WARN_ON(offset >= len))
1448         buf[0] = 0;
1449 
1450     return;
1451 
1452 fail:
1453     netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1454     buf[0] = 0;
1455 }
1456 
1457 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
1458                    bool *was_attached)
1459 {
1460     MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
1461     MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
1462     size_t outlen;
1463     int rc;
1464 
1465     MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
1466                driver_operating ? 1 : 0);
1467     MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
1468     MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
1469 
1470     rc = efx_siena_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf,
1471                       sizeof(inbuf), outbuf, sizeof(outbuf),
1472                       &outlen);
1473     /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID
1474      * specified will fail with EPERM, and we have to tell the MC we don't
1475      * care what firmware we get.
1476      */
1477     if (rc == -EPERM) {
1478         netif_dbg(efx, probe, efx->net_dev,
1479               "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n");
1480         MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID,
1481                    MC_CMD_FW_DONT_CARE);
1482         rc = efx_siena_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf,
1483                           sizeof(inbuf), outbuf,
1484                           sizeof(outbuf), &outlen);
1485     }
1486     if (rc) {
1487         efx_siena_mcdi_display_error(efx, MC_CMD_DRV_ATTACH,
1488                          sizeof(inbuf), outbuf, outlen, rc);
1489         goto fail;
1490     }
1491     if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
1492         rc = -EIO;
1493         goto fail;
1494     }
1495 
1496     if (driver_operating) {
1497         if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
1498             efx->mcdi->fn_flags =
1499                 MCDI_DWORD(outbuf,
1500                        DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
1501         } else {
1502             /* Synthesise flags for Siena */
1503             efx->mcdi->fn_flags =
1504                 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1505                 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
1506                 (efx_port_num(efx) == 0) <<
1507                 MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
1508         }
1509     }
1510 
1511     /* We currently assume we have control of the external link
1512      * and are completely trusted by firmware.  Abort probing
1513      * if that's not true for this function.
1514      */
1515 
1516     if (was_attached != NULL)
1517         *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
1518     return 0;
1519 
1520 fail:
1521     netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1522     return rc;
1523 }
1524 
1525 int efx_siena_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
1526                  u16 *fw_subtype_list, u32 *capabilities)
1527 {
1528     MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
1529     size_t outlen, i;
1530     int port_num = efx_port_num(efx);
1531     int rc;
1532 
1533     BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
1534     /* we need __aligned(2) for ether_addr_copy */
1535     BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
1536     BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
1537 
1538     rc = efx_siena_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
1539                 outbuf, sizeof(outbuf), &outlen);
1540     if (rc)
1541         goto fail;
1542 
1543     if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1544         rc = -EIO;
1545         goto fail;
1546     }
1547 
1548     if (mac_address)
1549         ether_addr_copy(mac_address,
1550                 port_num ?
1551                 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
1552                 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
1553     if (fw_subtype_list) {
1554         for (i = 0;
1555              i < MCDI_VAR_ARRAY_LEN(outlen,
1556                         GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
1557              i++)
1558             fw_subtype_list[i] = MCDI_ARRAY_WORD(
1559                 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
1560         for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
1561             fw_subtype_list[i] = 0;
1562     }
1563     if (capabilities) {
1564         if (port_num)
1565             *capabilities = MCDI_DWORD(outbuf,
1566                     GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1567         else
1568             *capabilities = MCDI_DWORD(outbuf,
1569                     GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1570     }
1571 
1572     return 0;
1573 
1574 fail:
1575     netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
1576           __func__, rc, (int)outlen);
1577 
1578     return rc;
1579 }
1580 
1581 int efx_siena_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart,
1582                 u32 dest_evq)
1583 {
1584     MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
1585     u32 dest = 0;
1586     int rc;
1587 
1588     if (uart)
1589         dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
1590     if (evq)
1591         dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
1592 
1593     MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
1594     MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
1595 
1596     BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
1597 
1598     rc = efx_siena_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
1599                 NULL, 0, NULL);
1600     return rc;
1601 }
1602 
1603 int efx_siena_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
1604 {
1605     MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
1606     size_t outlen;
1607     int rc;
1608 
1609     BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
1610 
1611     rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
1612                 outbuf, sizeof(outbuf), &outlen);
1613     if (rc)
1614         goto fail;
1615     if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
1616         rc = -EIO;
1617         goto fail;
1618     }
1619 
1620     *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
1621     return 0;
1622 
1623 fail:
1624     netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1625           __func__, rc);
1626     return rc;
1627 }
1628 
1629 int efx_siena_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
1630                   size_t *size_out, size_t *erase_size_out,
1631                   bool *protected_out)
1632 {
1633     MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
1634     MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
1635     size_t outlen;
1636     int rc;
1637 
1638     MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
1639 
1640     rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
1641                 outbuf, sizeof(outbuf), &outlen);
1642     if (rc)
1643         goto fail;
1644     if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
1645         rc = -EIO;
1646         goto fail;
1647     }
1648 
1649     *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
1650     *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
1651     *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
1652                 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
1653     return 0;
1654 
1655 fail:
1656     netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1657     return rc;
1658 }
1659 
1660 static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
1661 {
1662     MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
1663     MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
1664     int rc;
1665 
1666     MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
1667 
1668     rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
1669                 outbuf, sizeof(outbuf), NULL);
1670     if (rc)
1671         return rc;
1672 
1673     switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
1674     case MC_CMD_NVRAM_TEST_PASS:
1675     case MC_CMD_NVRAM_TEST_NOTSUPP:
1676         return 0;
1677     default:
1678         return -EIO;
1679     }
1680 }
1681 
1682 int efx_siena_mcdi_nvram_test_all(struct efx_nic *efx)
1683 {
1684     u32 nvram_types;
1685     unsigned int type;
1686     int rc;
1687 
1688     rc = efx_siena_mcdi_nvram_types(efx, &nvram_types);
1689     if (rc)
1690         goto fail1;
1691 
1692     type = 0;
1693     while (nvram_types != 0) {
1694         if (nvram_types & 1) {
1695             rc = efx_mcdi_nvram_test(efx, type);
1696             if (rc)
1697                 goto fail2;
1698         }
1699         type++;
1700         nvram_types >>= 1;
1701     }
1702 
1703     return 0;
1704 
1705 fail2:
1706     netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
1707           __func__, type);
1708 fail1:
1709     netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1710     return rc;
1711 }
1712 
1713 /* Returns 1 if an assertion was read, 0 if no assertion had fired,
1714  * negative on error.
1715  */
1716 static int efx_mcdi_read_assertion(struct efx_nic *efx)
1717 {
1718     MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
1719     MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
1720     unsigned int flags, index;
1721     const char *reason;
1722     size_t outlen;
1723     int retry;
1724     int rc;
1725 
1726     /* Attempt to read any stored assertion state before we reboot
1727      * the mcfw out of the assertion handler. Retry twice, once
1728      * because a boot-time assertion might cause this command to fail
1729      * with EINTR. And once again because GET_ASSERTS can race with
1730      * MC_CMD_REBOOT running on the other port. */
1731     retry = 2;
1732     do {
1733         MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
1734         rc = efx_siena_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
1735                           inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
1736                           outbuf, sizeof(outbuf), &outlen);
1737         if (rc == -EPERM)
1738             return 0;
1739     } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
1740 
1741     if (rc) {
1742         efx_siena_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
1743                          MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
1744                          outlen, rc);
1745         return rc;
1746     }
1747     if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
1748         return -EIO;
1749 
1750     /* Print out any recorded assertion state */
1751     flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1752     if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1753         return 0;
1754 
1755     reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1756         ? "system-level assertion"
1757         : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1758         ? "thread-level assertion"
1759         : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1760         ? "watchdog reset"
1761         : "unknown assertion";
1762     netif_err(efx, hw, efx->net_dev,
1763           "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1764           MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1765           MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
1766 
1767     /* Print out the registers */
1768     for (index = 0;
1769          index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1770          index++)
1771         netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
1772               1 + index,
1773               MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
1774                        index));
1775 
1776     return 1;
1777 }
1778 
1779 static int efx_mcdi_exit_assertion(struct efx_nic *efx)
1780 {
1781     MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1782     int rc;
1783 
1784     /* If the MC is running debug firmware, it might now be
1785      * waiting for a debugger to attach, but we just want it to
1786      * reboot.  We set a flag that makes the command a no-op if it
1787      * has already done so.
1788      * The MCDI will thus return either 0 or -EIO.
1789      */
1790     BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1791     MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1792                MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
1793     rc = efx_siena_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf,
1794                       MC_CMD_REBOOT_IN_LEN, NULL, 0, NULL);
1795     if (rc == -EIO)
1796         rc = 0;
1797     if (rc)
1798         efx_siena_mcdi_display_error(efx, MC_CMD_REBOOT,
1799                          MC_CMD_REBOOT_IN_LEN, NULL, 0, rc);
1800     return rc;
1801 }
1802 
1803 int efx_siena_mcdi_handle_assertion(struct efx_nic *efx)
1804 {
1805     int rc;
1806 
1807     rc = efx_mcdi_read_assertion(efx);
1808     if (rc <= 0)
1809         return rc;
1810 
1811     return efx_mcdi_exit_assertion(efx);
1812 }
1813 
1814 int efx_siena_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1815 {
1816     MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
1817 
1818     BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1819     BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1820     BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1821 
1822     BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1823 
1824     MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1825 
1826     return efx_siena_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1827                   NULL, 0, NULL);
1828 }
1829 
1830 static int efx_mcdi_reset_func(struct efx_nic *efx)
1831 {
1832     MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
1833     int rc;
1834 
1835     BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
1836     MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
1837                   ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
1838     rc = efx_siena_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
1839                 NULL, 0, NULL);
1840     return rc;
1841 }
1842 
1843 static int efx_mcdi_reset_mc(struct efx_nic *efx)
1844 {
1845     MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1846     int rc;
1847 
1848     BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1849     MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1850     rc = efx_siena_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1851                 NULL, 0, NULL);
1852     /* White is black, and up is down */
1853     if (rc == -EIO)
1854         return 0;
1855     if (rc == 0)
1856         rc = -EIO;
1857     return rc;
1858 }
1859 
1860 enum reset_type efx_siena_mcdi_map_reset_reason(enum reset_type reason)
1861 {
1862     return RESET_TYPE_RECOVER_OR_ALL;
1863 }
1864 
1865 int efx_siena_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1866 {
1867     int rc;
1868 
1869     /* If MCDI is down, we can't handle_assertion */
1870     if (method == RESET_TYPE_MCDI_TIMEOUT) {
1871         rc = pci_reset_function(efx->pci_dev);
1872         if (rc)
1873             return rc;
1874         /* Re-enable polled MCDI completion */
1875         if (efx->mcdi) {
1876             struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1877             mcdi->mode = MCDI_MODE_POLL;
1878         }
1879         return 0;
1880     }
1881 
1882     /* Recover from a failed assertion pre-reset */
1883     rc = efx_siena_mcdi_handle_assertion(efx);
1884     if (rc)
1885         return rc;
1886 
1887     if (method == RESET_TYPE_DATAPATH)
1888         return 0;
1889     else if (method == RESET_TYPE_WORLD)
1890         return efx_mcdi_reset_mc(efx);
1891     else
1892         return efx_mcdi_reset_func(efx);
1893 }
1894 
1895 static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1896                    const u8 *mac, int *id_out)
1897 {
1898     MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1899     MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
1900     size_t outlen;
1901     int rc;
1902 
1903     MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1904     MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1905                MC_CMD_FILTER_MODE_SIMPLE);
1906     ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
1907 
1908     rc = efx_siena_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf,
1909                 sizeof(inbuf), outbuf, sizeof(outbuf), &outlen);
1910     if (rc)
1911         goto fail;
1912 
1913     if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
1914         rc = -EIO;
1915         goto fail;
1916     }
1917 
1918     *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1919 
1920     return 0;
1921 
1922 fail:
1923     *id_out = -1;
1924     netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1925     return rc;
1926 
1927 }
1928 
1929 
1930 int efx_siena_mcdi_wol_filter_set_magic(struct efx_nic *efx,  const u8 *mac,
1931                     int *id_out)
1932 {
1933     return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1934 }
1935 
1936 
1937 int efx_siena_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1938 {
1939     MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
1940     size_t outlen;
1941     int rc;
1942 
1943     rc = efx_siena_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1944                 outbuf, sizeof(outbuf), &outlen);
1945     if (rc)
1946         goto fail;
1947 
1948     if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
1949         rc = -EIO;
1950         goto fail;
1951     }
1952 
1953     *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1954 
1955     return 0;
1956 
1957 fail:
1958     *id_out = -1;
1959     netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1960     return rc;
1961 }
1962 
1963 
1964 int efx_siena_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1965 {
1966     MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
1967     int rc;
1968 
1969     MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1970 
1971     rc = efx_siena_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf,
1972                 sizeof(inbuf), NULL, 0, NULL);
1973     return rc;
1974 }
1975 
1976 int efx_siena_mcdi_flush_rxqs(struct efx_nic *efx)
1977 {
1978     struct efx_channel *channel;
1979     struct efx_rx_queue *rx_queue;
1980     MCDI_DECLARE_BUF(inbuf,
1981              MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
1982     int rc, count;
1983 
1984     BUILD_BUG_ON(EFX_MAX_CHANNELS >
1985              MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
1986 
1987     count = 0;
1988     efx_for_each_channel(channel, efx) {
1989         efx_for_each_channel_rx_queue(rx_queue, channel) {
1990             if (rx_queue->flush_pending) {
1991                 rx_queue->flush_pending = false;
1992                 atomic_dec(&efx->rxq_flush_pending);
1993                 MCDI_SET_ARRAY_DWORD(
1994                     inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
1995                     count, efx_rx_queue_index(rx_queue));
1996                 count++;
1997             }
1998         }
1999     }
2000 
2001     rc = efx_siena_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
2002                 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count),
2003                 NULL, 0, NULL);
2004     WARN_ON(rc < 0);
2005 
2006     return rc;
2007 }
2008 
2009 int efx_siena_mcdi_wol_filter_reset(struct efx_nic *efx)
2010 {
2011     int rc;
2012 
2013     rc = efx_siena_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0,
2014                 NULL, 0, NULL);
2015     return rc;
2016 }
2017 
2018 #ifdef CONFIG_SFC_SIENA_MTD
2019 
2020 #define EFX_MCDI_NVRAM_LEN_MAX 128
2021 
2022 static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
2023 {
2024     MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_V2_IN_LEN);
2025     int rc;
2026 
2027     MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
2028     MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_START_V2_IN_FLAGS,
2029                   NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT,
2030                   1);
2031 
2032     BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
2033 
2034     rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf,
2035                 sizeof(inbuf), NULL, 0, NULL);
2036 
2037     return rc;
2038 }
2039 
2040 static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
2041                    loff_t offset, u8 *buffer, size_t length)
2042 {
2043     MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_V2_LEN);
2044     MCDI_DECLARE_BUF(outbuf,
2045              MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
2046     size_t outlen;
2047     int rc;
2048 
2049     MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
2050     MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
2051     MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
2052     MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_V2_MODE,
2053                MC_CMD_NVRAM_READ_IN_V2_DEFAULT);
2054 
2055     rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
2056                 outbuf, sizeof(outbuf), &outlen);
2057     if (rc)
2058         return rc;
2059 
2060     memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
2061     return 0;
2062 }
2063 
2064 static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
2065                 loff_t offset, const u8 *buffer, size_t length)
2066 {
2067     MCDI_DECLARE_BUF(inbuf,
2068              MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
2069     int rc;
2070 
2071     MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
2072     MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
2073     MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
2074     memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
2075 
2076     BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
2077 
2078     rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
2079                 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
2080                 NULL, 0, NULL);
2081     return rc;
2082 }
2083 
2084 static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
2085                 loff_t offset, size_t length)
2086 {
2087     MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
2088     int rc;
2089 
2090     MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
2091     MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
2092     MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
2093 
2094     BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
2095 
2096     rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
2097                 NULL, 0, NULL);
2098     return rc;
2099 }
2100 
2101 static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
2102 {
2103     MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN);
2104     MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN);
2105     size_t outlen;
2106     int rc, rc2;
2107 
2108     MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
2109     /* Always set this flag. Old firmware ignores it */
2110     MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_FINISH_V2_IN_FLAGS,
2111                   NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT,
2112                   1);
2113 
2114     rc = efx_siena_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf,
2115                 sizeof(inbuf), outbuf, sizeof(outbuf), &outlen);
2116     if (!rc && outlen >= MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) {
2117         rc2 = MCDI_DWORD(outbuf, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE);
2118         if (rc2 != MC_CMD_NVRAM_VERIFY_RC_SUCCESS)
2119             netif_err(efx, drv, efx->net_dev,
2120                   "NVRAM update failed verification with code 0x%x\n",
2121                   rc2);
2122         switch (rc2) {
2123         case MC_CMD_NVRAM_VERIFY_RC_SUCCESS:
2124             break;
2125         case MC_CMD_NVRAM_VERIFY_RC_CMS_CHECK_FAILED:
2126         case MC_CMD_NVRAM_VERIFY_RC_MESSAGE_DIGEST_CHECK_FAILED:
2127         case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHECK_FAILED:
2128         case MC_CMD_NVRAM_VERIFY_RC_TRUSTED_APPROVERS_CHECK_FAILED:
2129         case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHAIN_CHECK_FAILED:
2130             rc = -EIO;
2131             break;
2132         case MC_CMD_NVRAM_VERIFY_RC_INVALID_CMS_FORMAT:
2133         case MC_CMD_NVRAM_VERIFY_RC_BAD_MESSAGE_DIGEST:
2134             rc = -EINVAL;
2135             break;
2136         case MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES:
2137         case MC_CMD_NVRAM_VERIFY_RC_NO_TRUSTED_APPROVERS:
2138         case MC_CMD_NVRAM_VERIFY_RC_NO_SIGNATURE_MATCH:
2139             rc = -EPERM;
2140             break;
2141         default:
2142             netif_err(efx, drv, efx->net_dev,
2143                   "Unknown response to NVRAM_UPDATE_FINISH\n");
2144             rc = -EIO;
2145         }
2146     }
2147 
2148     return rc;
2149 }
2150 
2151 int efx_siena_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
2152                 size_t len, size_t *retlen, u8 *buffer)
2153 {
2154     struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2155     struct efx_nic *efx = mtd->priv;
2156     loff_t offset = start;
2157     loff_t end = min_t(loff_t, start + len, mtd->size);
2158     size_t chunk;
2159     int rc = 0;
2160 
2161     while (offset < end) {
2162         chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
2163         rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
2164                      buffer, chunk);
2165         if (rc)
2166             goto out;
2167         offset += chunk;
2168         buffer += chunk;
2169     }
2170 out:
2171     *retlen = offset - start;
2172     return rc;
2173 }
2174 
2175 int efx_siena_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
2176 {
2177     struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2178     struct efx_nic *efx = mtd->priv;
2179     loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
2180     loff_t end = min_t(loff_t, start + len, mtd->size);
2181     size_t chunk = part->common.mtd.erasesize;
2182     int rc = 0;
2183 
2184     if (!part->updating) {
2185         rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
2186         if (rc)
2187             goto out;
2188         part->updating = true;
2189     }
2190 
2191     /* The MCDI interface can in fact do multiple erase blocks at once;
2192      * but erasing may be slow, so we make multiple calls here to avoid
2193      * tripping the MCDI RPC timeout. */
2194     while (offset < end) {
2195         rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
2196                       chunk);
2197         if (rc)
2198             goto out;
2199         offset += chunk;
2200     }
2201 out:
2202     return rc;
2203 }
2204 
2205 int efx_siena_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
2206                  size_t len, size_t *retlen, const u8 *buffer)
2207 {
2208     struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2209     struct efx_nic *efx = mtd->priv;
2210     loff_t offset = start;
2211     loff_t end = min_t(loff_t, start + len, mtd->size);
2212     size_t chunk;
2213     int rc = 0;
2214 
2215     if (!part->updating) {
2216         rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
2217         if (rc)
2218             goto out;
2219         part->updating = true;
2220     }
2221 
2222     while (offset < end) {
2223         chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
2224         rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
2225                       buffer, chunk);
2226         if (rc)
2227             goto out;
2228         offset += chunk;
2229         buffer += chunk;
2230     }
2231 out:
2232     *retlen = offset - start;
2233     return rc;
2234 }
2235 
2236 int efx_siena_mcdi_mtd_sync(struct mtd_info *mtd)
2237 {
2238     struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2239     struct efx_nic *efx = mtd->priv;
2240     int rc = 0;
2241 
2242     if (part->updating) {
2243         part->updating = false;
2244         rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
2245     }
2246 
2247     return rc;
2248 }
2249 
2250 void efx_siena_mcdi_mtd_rename(struct efx_mtd_partition *part)
2251 {
2252     struct efx_mcdi_mtd_partition *mcdi_part =
2253         container_of(part, struct efx_mcdi_mtd_partition, common);
2254     struct efx_nic *efx = part->mtd.priv;
2255 
2256     snprintf(part->name, sizeof(part->name), "%s %s:%02x",
2257          efx->name, part->type_name, mcdi_part->fw_subtype);
2258 }
2259 
2260 #endif /* CONFIG_SFC_SIENA_MTD */
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