0001
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0007 #include <linux/delay.h>
0008 #include <linux/moduleparam.h>
0009 #include <linux/atomic.h>
0010 #include "net_driver.h"
0011 #include "nic.h"
0012 #include "io.h"
0013 #include "farch_regs.h"
0014 #include "mcdi_pcol.h"
0015
0016
0017
0018
0019
0020
0021
0022
0023 #define MCDI_RPC_TIMEOUT (10 * HZ)
0024
0025
0026
0027
0028
0029 #define MCDI_STATUS_DELAY_US 100
0030 #define MCDI_STATUS_DELAY_COUNT 2500
0031 #define MCDI_STATUS_SLEEP_MS \
0032 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
0033
0034 #define SEQ_MASK \
0035 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
0036
0037 struct efx_mcdi_async_param {
0038 struct list_head list;
0039 unsigned int cmd;
0040 size_t inlen;
0041 size_t outlen;
0042 bool quiet;
0043 efx_mcdi_async_completer *complete;
0044 unsigned long cookie;
0045
0046 };
0047
0048 static void efx_mcdi_timeout_async(struct timer_list *t);
0049 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
0050 bool *was_attached_out);
0051 static bool efx_mcdi_poll_once(struct efx_nic *efx);
0052 static void efx_mcdi_abandon(struct efx_nic *efx);
0053
0054 #ifdef CONFIG_SFC_MCDI_LOGGING
0055 static bool mcdi_logging_default;
0056 module_param(mcdi_logging_default, bool, 0644);
0057 MODULE_PARM_DESC(mcdi_logging_default,
0058 "Enable MCDI logging on newly-probed functions");
0059 #endif
0060
0061 int efx_mcdi_init(struct efx_nic *efx)
0062 {
0063 struct efx_mcdi_iface *mcdi;
0064 bool already_attached;
0065 int rc = -ENOMEM;
0066
0067 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
0068 if (!efx->mcdi)
0069 goto fail;
0070
0071 mcdi = efx_mcdi(efx);
0072 mcdi->efx = efx;
0073 #ifdef CONFIG_SFC_MCDI_LOGGING
0074
0075 mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL);
0076 if (!mcdi->logging_buffer)
0077 goto fail1;
0078 mcdi->logging_enabled = mcdi_logging_default;
0079 #endif
0080 init_waitqueue_head(&mcdi->wq);
0081 init_waitqueue_head(&mcdi->proxy_rx_wq);
0082 spin_lock_init(&mcdi->iface_lock);
0083 mcdi->state = MCDI_STATE_QUIESCENT;
0084 mcdi->mode = MCDI_MODE_POLL;
0085 spin_lock_init(&mcdi->async_lock);
0086 INIT_LIST_HEAD(&mcdi->async_list);
0087 timer_setup(&mcdi->async_timer, efx_mcdi_timeout_async, 0);
0088
0089 (void) efx_mcdi_poll_reboot(efx);
0090 mcdi->new_epoch = true;
0091
0092
0093 rc = efx_mcdi_handle_assertion(efx);
0094 if (rc)
0095 goto fail2;
0096
0097
0098
0099
0100 rc = efx_mcdi_drv_attach(efx, true, &already_attached);
0101 if (rc) {
0102 pci_err(efx->pci_dev, "Unable to register driver with MCPU\n");
0103 goto fail2;
0104 }
0105 if (already_attached)
0106
0107 pci_err(efx->pci_dev, "Host already registered with MCPU\n");
0108
0109 if (efx->mcdi->fn_flags &
0110 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
0111 efx->primary = efx;
0112
0113 return 0;
0114 fail2:
0115 #ifdef CONFIG_SFC_MCDI_LOGGING
0116 free_page((unsigned long)mcdi->logging_buffer);
0117 fail1:
0118 #endif
0119 kfree(efx->mcdi);
0120 efx->mcdi = NULL;
0121 fail:
0122 return rc;
0123 }
0124
0125 void efx_mcdi_detach(struct efx_nic *efx)
0126 {
0127 if (!efx->mcdi)
0128 return;
0129
0130 BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
0131
0132
0133 efx_mcdi_drv_attach(efx, false, NULL);
0134 }
0135
0136 void efx_mcdi_fini(struct efx_nic *efx)
0137 {
0138 if (!efx->mcdi)
0139 return;
0140
0141 #ifdef CONFIG_SFC_MCDI_LOGGING
0142 free_page((unsigned long)efx->mcdi->iface.logging_buffer);
0143 #endif
0144
0145 kfree(efx->mcdi);
0146 }
0147
0148 static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
0149 const efx_dword_t *inbuf, size_t inlen)
0150 {
0151 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0152 #ifdef CONFIG_SFC_MCDI_LOGGING
0153 char *buf = mcdi->logging_buffer;
0154 #endif
0155 efx_dword_t hdr[2];
0156 size_t hdr_len;
0157 u32 xflags, seqno;
0158
0159 BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
0160
0161
0162 spin_lock_bh(&mcdi->iface_lock);
0163 ++mcdi->seqno;
0164 seqno = mcdi->seqno & SEQ_MASK;
0165 spin_unlock_bh(&mcdi->iface_lock);
0166
0167 xflags = 0;
0168 if (mcdi->mode == MCDI_MODE_EVENTS)
0169 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
0170
0171 if (efx->type->mcdi_max_ver == 1) {
0172
0173 EFX_POPULATE_DWORD_7(hdr[0],
0174 MCDI_HEADER_RESPONSE, 0,
0175 MCDI_HEADER_RESYNC, 1,
0176 MCDI_HEADER_CODE, cmd,
0177 MCDI_HEADER_DATALEN, inlen,
0178 MCDI_HEADER_SEQ, seqno,
0179 MCDI_HEADER_XFLAGS, xflags,
0180 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
0181 hdr_len = 4;
0182 } else {
0183
0184 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
0185 EFX_POPULATE_DWORD_7(hdr[0],
0186 MCDI_HEADER_RESPONSE, 0,
0187 MCDI_HEADER_RESYNC, 1,
0188 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
0189 MCDI_HEADER_DATALEN, 0,
0190 MCDI_HEADER_SEQ, seqno,
0191 MCDI_HEADER_XFLAGS, xflags,
0192 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
0193 EFX_POPULATE_DWORD_2(hdr[1],
0194 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
0195 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
0196 hdr_len = 8;
0197 }
0198
0199 #ifdef CONFIG_SFC_MCDI_LOGGING
0200 if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
0201 int bytes = 0;
0202 int i;
0203
0204
0205
0206 WARN_ON_ONCE(hdr_len % 4);
0207 WARN_ON_ONCE(inlen % 4);
0208
0209
0210
0211
0212 for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++)
0213 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
0214 " %08x",
0215 le32_to_cpu(hdr[i].u32[0]));
0216
0217 for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++)
0218 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
0219 " %08x",
0220 le32_to_cpu(inbuf[i].u32[0]));
0221
0222 netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf);
0223 }
0224 #endif
0225
0226 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
0227
0228 mcdi->new_epoch = false;
0229 }
0230
0231 static int efx_mcdi_errno(unsigned int mcdi_err)
0232 {
0233 switch (mcdi_err) {
0234 case 0:
0235 return 0;
0236 #define TRANSLATE_ERROR(name) \
0237 case MC_CMD_ERR_ ## name: \
0238 return -name;
0239 TRANSLATE_ERROR(EPERM);
0240 TRANSLATE_ERROR(ENOENT);
0241 TRANSLATE_ERROR(EINTR);
0242 TRANSLATE_ERROR(EAGAIN);
0243 TRANSLATE_ERROR(EACCES);
0244 TRANSLATE_ERROR(EBUSY);
0245 TRANSLATE_ERROR(EINVAL);
0246 TRANSLATE_ERROR(EDEADLK);
0247 TRANSLATE_ERROR(ENOSYS);
0248 TRANSLATE_ERROR(ETIME);
0249 TRANSLATE_ERROR(EALREADY);
0250 TRANSLATE_ERROR(ENOSPC);
0251 #undef TRANSLATE_ERROR
0252 case MC_CMD_ERR_ENOTSUP:
0253 return -EOPNOTSUPP;
0254 case MC_CMD_ERR_ALLOC_FAIL:
0255 return -ENOBUFS;
0256 case MC_CMD_ERR_MAC_EXIST:
0257 return -EADDRINUSE;
0258 default:
0259 return -EPROTO;
0260 }
0261 }
0262
0263 static void efx_mcdi_read_response_header(struct efx_nic *efx)
0264 {
0265 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0266 unsigned int respseq, respcmd, error;
0267 #ifdef CONFIG_SFC_MCDI_LOGGING
0268 char *buf = mcdi->logging_buffer;
0269 #endif
0270 efx_dword_t hdr;
0271
0272 efx->type->mcdi_read_response(efx, &hdr, 0, 4);
0273 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
0274 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
0275 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
0276
0277 if (respcmd != MC_CMD_V2_EXTN) {
0278 mcdi->resp_hdr_len = 4;
0279 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
0280 } else {
0281 efx->type->mcdi_read_response(efx, &hdr, 4, 4);
0282 mcdi->resp_hdr_len = 8;
0283 mcdi->resp_data_len =
0284 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
0285 }
0286
0287 #ifdef CONFIG_SFC_MCDI_LOGGING
0288 if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
0289 size_t hdr_len, data_len;
0290 int bytes = 0;
0291 int i;
0292
0293 WARN_ON_ONCE(mcdi->resp_hdr_len % 4);
0294 hdr_len = mcdi->resp_hdr_len / 4;
0295
0296
0297
0298 data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4);
0299
0300
0301
0302
0303 for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) {
0304 efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4);
0305 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
0306 " %08x", le32_to_cpu(hdr.u32[0]));
0307 }
0308
0309 for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) {
0310 efx->type->mcdi_read_response(efx, &hdr,
0311 mcdi->resp_hdr_len + (i * 4), 4);
0312 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
0313 " %08x", le32_to_cpu(hdr.u32[0]));
0314 }
0315
0316 netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf);
0317 }
0318 #endif
0319
0320 mcdi->resprc_raw = 0;
0321 if (error && mcdi->resp_data_len == 0) {
0322 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
0323 mcdi->resprc = -EIO;
0324 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
0325 netif_err(efx, hw, efx->net_dev,
0326 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
0327 respseq, mcdi->seqno);
0328 mcdi->resprc = -EIO;
0329 } else if (error) {
0330 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
0331 mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0);
0332 mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw);
0333 } else {
0334 mcdi->resprc = 0;
0335 }
0336 }
0337
0338 static bool efx_mcdi_poll_once(struct efx_nic *efx)
0339 {
0340 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0341
0342 rmb();
0343 if (!efx->type->mcdi_poll_response(efx))
0344 return false;
0345
0346 spin_lock_bh(&mcdi->iface_lock);
0347 efx_mcdi_read_response_header(efx);
0348 spin_unlock_bh(&mcdi->iface_lock);
0349
0350 return true;
0351 }
0352
0353 static int efx_mcdi_poll(struct efx_nic *efx)
0354 {
0355 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0356 unsigned long time, finish;
0357 unsigned int spins;
0358 int rc;
0359
0360
0361 rc = efx_mcdi_poll_reboot(efx);
0362 if (rc) {
0363 spin_lock_bh(&mcdi->iface_lock);
0364 mcdi->resprc = rc;
0365 mcdi->resp_hdr_len = 0;
0366 mcdi->resp_data_len = 0;
0367 spin_unlock_bh(&mcdi->iface_lock);
0368 return 0;
0369 }
0370
0371
0372
0373
0374
0375 spins = USER_TICK_USEC;
0376 finish = jiffies + MCDI_RPC_TIMEOUT;
0377
0378 while (1) {
0379 if (spins != 0) {
0380 --spins;
0381 udelay(1);
0382 } else {
0383 schedule_timeout_uninterruptible(1);
0384 }
0385
0386 time = jiffies;
0387
0388 if (efx_mcdi_poll_once(efx))
0389 break;
0390
0391 if (time_after(time, finish))
0392 return -ETIMEDOUT;
0393 }
0394
0395
0396 return 0;
0397 }
0398
0399
0400
0401
0402 int efx_mcdi_poll_reboot(struct efx_nic *efx)
0403 {
0404 if (!efx->mcdi)
0405 return 0;
0406
0407 return efx->type->mcdi_poll_reboot(efx);
0408 }
0409
0410 static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
0411 {
0412 return cmpxchg(&mcdi->state,
0413 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
0414 MCDI_STATE_QUIESCENT;
0415 }
0416
0417 static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
0418 {
0419
0420
0421
0422 wait_event(mcdi->wq,
0423 cmpxchg(&mcdi->state,
0424 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
0425 MCDI_STATE_QUIESCENT);
0426 }
0427
0428 static int efx_mcdi_await_completion(struct efx_nic *efx)
0429 {
0430 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0431
0432 if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
0433 MCDI_RPC_TIMEOUT) == 0)
0434 return -ETIMEDOUT;
0435
0436
0437
0438
0439
0440
0441
0442
0443
0444 if (mcdi->mode == MCDI_MODE_POLL)
0445 return efx_mcdi_poll(efx);
0446
0447 return 0;
0448 }
0449
0450
0451
0452
0453 static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
0454 {
0455 if (cmpxchg(&mcdi->state,
0456 MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
0457 MCDI_STATE_RUNNING_SYNC) {
0458 wake_up(&mcdi->wq);
0459 return true;
0460 }
0461
0462 return false;
0463 }
0464
0465 static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
0466 {
0467 if (mcdi->mode == MCDI_MODE_EVENTS) {
0468 struct efx_mcdi_async_param *async;
0469 struct efx_nic *efx = mcdi->efx;
0470
0471
0472 spin_lock_bh(&mcdi->async_lock);
0473 async = list_first_entry_or_null(
0474 &mcdi->async_list, struct efx_mcdi_async_param, list);
0475 if (async) {
0476 mcdi->state = MCDI_STATE_RUNNING_ASYNC;
0477 efx_mcdi_send_request(efx, async->cmd,
0478 (const efx_dword_t *)(async + 1),
0479 async->inlen);
0480 mod_timer(&mcdi->async_timer,
0481 jiffies + MCDI_RPC_TIMEOUT);
0482 }
0483 spin_unlock_bh(&mcdi->async_lock);
0484
0485 if (async)
0486 return;
0487 }
0488
0489 mcdi->state = MCDI_STATE_QUIESCENT;
0490 wake_up(&mcdi->wq);
0491 }
0492
0493
0494
0495
0496
0497
0498 static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
0499 {
0500 struct efx_nic *efx = mcdi->efx;
0501 struct efx_mcdi_async_param *async;
0502 size_t hdr_len, data_len, err_len;
0503 efx_dword_t *outbuf;
0504 MCDI_DECLARE_BUF_ERR(errbuf);
0505 int rc;
0506
0507 if (cmpxchg(&mcdi->state,
0508 MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
0509 MCDI_STATE_RUNNING_ASYNC)
0510 return false;
0511
0512 spin_lock(&mcdi->iface_lock);
0513 if (timeout) {
0514
0515
0516
0517 ++mcdi->seqno;
0518 ++mcdi->credits;
0519 rc = -ETIMEDOUT;
0520 hdr_len = 0;
0521 data_len = 0;
0522 } else {
0523 rc = mcdi->resprc;
0524 hdr_len = mcdi->resp_hdr_len;
0525 data_len = mcdi->resp_data_len;
0526 }
0527 spin_unlock(&mcdi->iface_lock);
0528
0529
0530
0531
0532
0533 if (!timeout)
0534 del_timer_sync(&mcdi->async_timer);
0535
0536 spin_lock(&mcdi->async_lock);
0537 async = list_first_entry(&mcdi->async_list,
0538 struct efx_mcdi_async_param, list);
0539 list_del(&async->list);
0540 spin_unlock(&mcdi->async_lock);
0541
0542 outbuf = (efx_dword_t *)(async + 1);
0543 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
0544 min(async->outlen, data_len));
0545 if (!timeout && rc && !async->quiet) {
0546 err_len = min(sizeof(errbuf), data_len);
0547 efx->type->mcdi_read_response(efx, errbuf, hdr_len,
0548 sizeof(errbuf));
0549 efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
0550 err_len, rc);
0551 }
0552
0553 if (async->complete)
0554 async->complete(efx, async->cookie, rc, outbuf,
0555 min(async->outlen, data_len));
0556 kfree(async);
0557
0558 efx_mcdi_release(mcdi);
0559
0560 return true;
0561 }
0562
0563 static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
0564 unsigned int datalen, unsigned int mcdi_err)
0565 {
0566 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0567 bool wake = false;
0568
0569 spin_lock(&mcdi->iface_lock);
0570
0571 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
0572 if (mcdi->credits)
0573
0574 --mcdi->credits;
0575 else
0576 netif_err(efx, hw, efx->net_dev,
0577 "MC response mismatch tx seq 0x%x rx "
0578 "seq 0x%x\n", seqno, mcdi->seqno);
0579 } else {
0580 if (efx->type->mcdi_max_ver >= 2) {
0581
0582 efx_mcdi_read_response_header(efx);
0583 } else {
0584 mcdi->resprc = efx_mcdi_errno(mcdi_err);
0585 mcdi->resp_hdr_len = 4;
0586 mcdi->resp_data_len = datalen;
0587 }
0588
0589 wake = true;
0590 }
0591
0592 spin_unlock(&mcdi->iface_lock);
0593
0594 if (wake) {
0595 if (!efx_mcdi_complete_async(mcdi, false))
0596 (void) efx_mcdi_complete_sync(mcdi);
0597
0598
0599
0600
0601
0602
0603
0604 }
0605 }
0606
0607 static void efx_mcdi_timeout_async(struct timer_list *t)
0608 {
0609 struct efx_mcdi_iface *mcdi = from_timer(mcdi, t, async_timer);
0610
0611 efx_mcdi_complete_async(mcdi, true);
0612 }
0613
0614 static int
0615 efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
0616 {
0617 if (efx->type->mcdi_max_ver < 0 ||
0618 (efx->type->mcdi_max_ver < 2 &&
0619 cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
0620 return -EINVAL;
0621
0622 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
0623 (efx->type->mcdi_max_ver < 2 &&
0624 inlen > MCDI_CTL_SDU_LEN_MAX_V1))
0625 return -EMSGSIZE;
0626
0627 return 0;
0628 }
0629
0630 static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx,
0631 size_t hdr_len, size_t data_len,
0632 u32 *proxy_handle)
0633 {
0634 MCDI_DECLARE_BUF_ERR(testbuf);
0635 const size_t buflen = sizeof(testbuf);
0636
0637 if (!proxy_handle || data_len < buflen)
0638 return false;
0639
0640 efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen);
0641 if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) {
0642 *proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE);
0643 return true;
0644 }
0645
0646 return false;
0647 }
0648
0649 static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd,
0650 size_t inlen,
0651 efx_dword_t *outbuf, size_t outlen,
0652 size_t *outlen_actual, bool quiet,
0653 u32 *proxy_handle, int *raw_rc)
0654 {
0655 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0656 MCDI_DECLARE_BUF_ERR(errbuf);
0657 int rc;
0658
0659 if (mcdi->mode == MCDI_MODE_POLL)
0660 rc = efx_mcdi_poll(efx);
0661 else
0662 rc = efx_mcdi_await_completion(efx);
0663
0664 if (rc != 0) {
0665 netif_err(efx, hw, efx->net_dev,
0666 "MC command 0x%x inlen %d mode %d timed out\n",
0667 cmd, (int)inlen, mcdi->mode);
0668
0669 if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
0670 netif_err(efx, hw, efx->net_dev,
0671 "MCDI request was completed without an event\n");
0672 rc = 0;
0673 }
0674
0675 efx_mcdi_abandon(efx);
0676
0677
0678
0679
0680
0681 spin_lock_bh(&mcdi->iface_lock);
0682 ++mcdi->seqno;
0683 ++mcdi->credits;
0684 spin_unlock_bh(&mcdi->iface_lock);
0685 }
0686
0687 if (proxy_handle)
0688 *proxy_handle = 0;
0689
0690 if (rc != 0) {
0691 if (outlen_actual)
0692 *outlen_actual = 0;
0693 } else {
0694 size_t hdr_len, data_len, err_len;
0695
0696
0697
0698
0699
0700 spin_lock_bh(&mcdi->iface_lock);
0701 rc = mcdi->resprc;
0702 if (raw_rc)
0703 *raw_rc = mcdi->resprc_raw;
0704 hdr_len = mcdi->resp_hdr_len;
0705 data_len = mcdi->resp_data_len;
0706 err_len = min(sizeof(errbuf), data_len);
0707 spin_unlock_bh(&mcdi->iface_lock);
0708
0709 BUG_ON(rc > 0);
0710
0711 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
0712 min(outlen, data_len));
0713 if (outlen_actual)
0714 *outlen_actual = data_len;
0715
0716 efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
0717
0718 if (cmd == MC_CMD_REBOOT && rc == -EIO) {
0719
0720 } else if (rc == -EIO || rc == -EINTR) {
0721 netif_err(efx, hw, efx->net_dev, "MC reboot detected\n");
0722 netif_dbg(efx, hw, efx->net_dev, "MC rebooted during command %d rc %d\n",
0723 cmd, -rc);
0724 if (efx->type->mcdi_reboot_detected)
0725 efx->type->mcdi_reboot_detected(efx);
0726 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
0727 } else if (proxy_handle && (rc == -EPROTO) &&
0728 efx_mcdi_get_proxy_handle(efx, hdr_len, data_len,
0729 proxy_handle)) {
0730 mcdi->proxy_rx_status = 0;
0731 mcdi->proxy_rx_handle = 0;
0732 mcdi->state = MCDI_STATE_PROXY_WAIT;
0733 } else if (rc && !quiet) {
0734 efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
0735 rc);
0736 }
0737
0738 if (rc == -EIO || rc == -EINTR) {
0739 msleep(MCDI_STATUS_SLEEP_MS);
0740 efx_mcdi_poll_reboot(efx);
0741 mcdi->new_epoch = true;
0742 }
0743 }
0744
0745 if (!proxy_handle || !*proxy_handle)
0746 efx_mcdi_release(mcdi);
0747 return rc;
0748 }
0749
0750 static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi)
0751 {
0752 if (mcdi->state == MCDI_STATE_PROXY_WAIT) {
0753
0754 mcdi->proxy_rx_status = -EINTR;
0755 wake_up(&mcdi->proxy_rx_wq);
0756 }
0757 }
0758
0759 static void efx_mcdi_ev_proxy_response(struct efx_nic *efx,
0760 u32 handle, int status)
0761 {
0762 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0763
0764 WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT);
0765
0766 mcdi->proxy_rx_status = efx_mcdi_errno(status);
0767
0768
0769
0770 wmb();
0771 mcdi->proxy_rx_handle = handle;
0772 wake_up(&mcdi->proxy_rx_wq);
0773 }
0774
0775 static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet)
0776 {
0777 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0778 int rc;
0779
0780
0781 rc = wait_event_timeout(mcdi->proxy_rx_wq,
0782 mcdi->proxy_rx_handle != 0 ||
0783 mcdi->proxy_rx_status == -EINTR,
0784 MCDI_RPC_TIMEOUT);
0785
0786 if (rc <= 0) {
0787 netif_dbg(efx, hw, efx->net_dev,
0788 "MCDI proxy timeout %d\n", handle);
0789 return -ETIMEDOUT;
0790 } else if (mcdi->proxy_rx_handle != handle) {
0791 netif_warn(efx, hw, efx->net_dev,
0792 "MCDI proxy unexpected handle %d (expected %d)\n",
0793 mcdi->proxy_rx_handle, handle);
0794 return -EINVAL;
0795 }
0796
0797 return mcdi->proxy_rx_status;
0798 }
0799
0800 static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd,
0801 const efx_dword_t *inbuf, size_t inlen,
0802 efx_dword_t *outbuf, size_t outlen,
0803 size_t *outlen_actual, bool quiet, int *raw_rc)
0804 {
0805 u32 proxy_handle = 0;
0806 int rc;
0807
0808 if (inbuf && inlen && (inbuf == outbuf)) {
0809
0810 WARN_ON(1);
0811 return -EINVAL;
0812 }
0813
0814 rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
0815 if (rc)
0816 return rc;
0817
0818 rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
0819 outlen_actual, quiet, &proxy_handle, raw_rc);
0820
0821 if (proxy_handle) {
0822
0823
0824
0825
0826 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0827
0828 netif_dbg(efx, hw, efx->net_dev,
0829 "MCDI waiting for proxy auth %d\n",
0830 proxy_handle);
0831 rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet);
0832
0833 if (rc == 0) {
0834 netif_dbg(efx, hw, efx->net_dev,
0835 "MCDI proxy retry %d\n", proxy_handle);
0836
0837
0838 mcdi->state = MCDI_STATE_RUNNING_SYNC;
0839 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
0840
0841 rc = _efx_mcdi_rpc_finish(efx, cmd, inlen,
0842 outbuf, outlen, outlen_actual,
0843 quiet, NULL, raw_rc);
0844 } else {
0845 netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err,
0846 "MC command 0x%x failed after proxy auth rc=%d\n",
0847 cmd, rc);
0848
0849 if (rc == -EINTR || rc == -EIO)
0850 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
0851 efx_mcdi_release(mcdi);
0852 }
0853 }
0854
0855 return rc;
0856 }
0857
0858 static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd,
0859 const efx_dword_t *inbuf, size_t inlen,
0860 efx_dword_t *outbuf, size_t outlen,
0861 size_t *outlen_actual, bool quiet)
0862 {
0863 int raw_rc = 0;
0864 int rc;
0865
0866 rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
0867 outbuf, outlen, outlen_actual, true, &raw_rc);
0868
0869 if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
0870 efx->type->is_vf) {
0871
0872
0873
0874
0875 unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT;
0876 unsigned int delay_us = 10000;
0877
0878 netif_dbg(efx, hw, efx->net_dev,
0879 "%s: NO_EVB_PORT; will retry request\n",
0880 __func__);
0881
0882 do {
0883 usleep_range(delay_us, delay_us + 10000);
0884 rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
0885 outbuf, outlen, outlen_actual,
0886 true, &raw_rc);
0887 if (delay_us < 100000)
0888 delay_us <<= 1;
0889 } while ((rc == -EPROTO) &&
0890 (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
0891 time_before(jiffies, abort_time));
0892 }
0893
0894 if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO))
0895 efx_mcdi_display_error(efx, cmd, inlen,
0896 outbuf, outlen, rc);
0897
0898 return rc;
0899 }
0900
0901
0902
0903
0904
0905
0906
0907
0908
0909
0910
0911
0912
0913
0914
0915
0916
0917
0918
0919
0920
0921
0922
0923
0924
0925 int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
0926 const efx_dword_t *inbuf, size_t inlen,
0927 efx_dword_t *outbuf, size_t outlen,
0928 size_t *outlen_actual)
0929 {
0930 return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
0931 outlen_actual, false);
0932 }
0933
0934
0935
0936
0937
0938
0939
0940
0941
0942 int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
0943 const efx_dword_t *inbuf, size_t inlen,
0944 efx_dword_t *outbuf, size_t outlen,
0945 size_t *outlen_actual)
0946 {
0947 return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
0948 outlen_actual, true);
0949 }
0950
0951 int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
0952 const efx_dword_t *inbuf, size_t inlen)
0953 {
0954 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0955 int rc;
0956
0957 rc = efx_mcdi_check_supported(efx, cmd, inlen);
0958 if (rc)
0959 return rc;
0960
0961 if (efx->mc_bist_for_other_fn)
0962 return -ENETDOWN;
0963
0964 if (mcdi->mode == MCDI_MODE_FAIL)
0965 return -ENETDOWN;
0966
0967 efx_mcdi_acquire_sync(mcdi);
0968 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
0969 return 0;
0970 }
0971
0972 static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
0973 const efx_dword_t *inbuf, size_t inlen,
0974 size_t outlen,
0975 efx_mcdi_async_completer *complete,
0976 unsigned long cookie, bool quiet)
0977 {
0978 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
0979 struct efx_mcdi_async_param *async;
0980 int rc;
0981
0982 rc = efx_mcdi_check_supported(efx, cmd, inlen);
0983 if (rc)
0984 return rc;
0985
0986 if (efx->mc_bist_for_other_fn)
0987 return -ENETDOWN;
0988
0989 async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
0990 GFP_ATOMIC);
0991 if (!async)
0992 return -ENOMEM;
0993
0994 async->cmd = cmd;
0995 async->inlen = inlen;
0996 async->outlen = outlen;
0997 async->quiet = quiet;
0998 async->complete = complete;
0999 async->cookie = cookie;
1000 memcpy(async + 1, inbuf, inlen);
1001
1002 spin_lock_bh(&mcdi->async_lock);
1003
1004 if (mcdi->mode == MCDI_MODE_EVENTS) {
1005 list_add_tail(&async->list, &mcdi->async_list);
1006
1007
1008
1009
1010 if (mcdi->async_list.next == &async->list &&
1011 efx_mcdi_acquire_async(mcdi)) {
1012 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
1013 mod_timer(&mcdi->async_timer,
1014 jiffies + MCDI_RPC_TIMEOUT);
1015 }
1016 } else {
1017 kfree(async);
1018 rc = -ENETDOWN;
1019 }
1020
1021 spin_unlock_bh(&mcdi->async_lock);
1022
1023 return rc;
1024 }
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046 int
1047 efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
1048 const efx_dword_t *inbuf, size_t inlen, size_t outlen,
1049 efx_mcdi_async_completer *complete, unsigned long cookie)
1050 {
1051 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
1052 cookie, false);
1053 }
1054
1055 int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
1056 const efx_dword_t *inbuf, size_t inlen,
1057 size_t outlen, efx_mcdi_async_completer *complete,
1058 unsigned long cookie)
1059 {
1060 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
1061 cookie, true);
1062 }
1063
1064 int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
1065 efx_dword_t *outbuf, size_t outlen,
1066 size_t *outlen_actual)
1067 {
1068 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
1069 outlen_actual, false, NULL, NULL);
1070 }
1071
1072 int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
1073 efx_dword_t *outbuf, size_t outlen,
1074 size_t *outlen_actual)
1075 {
1076 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
1077 outlen_actual, true, NULL, NULL);
1078 }
1079
1080 void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
1081 size_t inlen, efx_dword_t *outbuf,
1082 size_t outlen, int rc)
1083 {
1084 int code = 0, err_arg = 0;
1085
1086 if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
1087 code = MCDI_DWORD(outbuf, ERR_CODE);
1088 if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
1089 err_arg = MCDI_DWORD(outbuf, ERR_ARG);
1090 netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err,
1091 "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n",
1092 cmd, inlen, rc, code, err_arg);
1093 }
1094
1095
1096
1097
1098
1099 void efx_mcdi_mode_poll(struct efx_nic *efx)
1100 {
1101 struct efx_mcdi_iface *mcdi;
1102
1103 if (!efx->mcdi)
1104 return;
1105
1106 mcdi = efx_mcdi(efx);
1107
1108
1109
1110
1111 if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
1112 return;
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122 mcdi->mode = MCDI_MODE_POLL;
1123
1124 efx_mcdi_complete_sync(mcdi);
1125 }
1126
1127
1128
1129
1130 void efx_mcdi_flush_async(struct efx_nic *efx)
1131 {
1132 struct efx_mcdi_async_param *async, *next;
1133 struct efx_mcdi_iface *mcdi;
1134
1135 if (!efx->mcdi)
1136 return;
1137
1138 mcdi = efx_mcdi(efx);
1139
1140
1141 BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
1142
1143 del_timer_sync(&mcdi->async_timer);
1144
1145
1146
1147
1148
1149 if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
1150 efx_mcdi_poll(efx);
1151 mcdi->state = MCDI_STATE_QUIESCENT;
1152 }
1153
1154
1155
1156
1157
1158
1159 list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
1160 if (async->complete)
1161 async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
1162 list_del(&async->list);
1163 kfree(async);
1164 }
1165 }
1166
1167 void efx_mcdi_mode_event(struct efx_nic *efx)
1168 {
1169 struct efx_mcdi_iface *mcdi;
1170
1171 if (!efx->mcdi)
1172 return;
1173
1174 mcdi = efx_mcdi(efx);
1175
1176
1177
1178
1179 if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
1180 return;
1181
1182
1183
1184
1185
1186
1187
1188
1189 efx_mcdi_acquire_sync(mcdi);
1190 mcdi->mode = MCDI_MODE_EVENTS;
1191 efx_mcdi_release(mcdi);
1192 }
1193
1194 static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
1195 {
1196 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222 spin_lock(&mcdi->iface_lock);
1223 efx_mcdi_proxy_abort(mcdi);
1224
1225 if (efx_mcdi_complete_sync(mcdi)) {
1226 if (mcdi->mode == MCDI_MODE_EVENTS) {
1227 mcdi->resprc = rc;
1228 mcdi->resp_hdr_len = 0;
1229 mcdi->resp_data_len = 0;
1230 ++mcdi->credits;
1231 }
1232 } else {
1233 int count;
1234
1235
1236 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
1237 rc = efx_mcdi_poll_reboot(efx);
1238 if (rc)
1239 break;
1240 udelay(MCDI_STATUS_DELAY_US);
1241 }
1242
1243
1244
1245
1246
1247
1248
1249 if (!rc && efx->type->mcdi_reboot_detected)
1250 efx->type->mcdi_reboot_detected(efx);
1251
1252 mcdi->new_epoch = true;
1253
1254
1255 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
1256 }
1257
1258 spin_unlock(&mcdi->iface_lock);
1259 }
1260
1261
1262
1263
1264
1265
1266 static void efx_mcdi_ev_bist(struct efx_nic *efx)
1267 {
1268 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1269
1270 spin_lock(&mcdi->iface_lock);
1271 efx->mc_bist_for_other_fn = true;
1272 efx_mcdi_proxy_abort(mcdi);
1273
1274 if (efx_mcdi_complete_sync(mcdi)) {
1275 if (mcdi->mode == MCDI_MODE_EVENTS) {
1276 mcdi->resprc = -EIO;
1277 mcdi->resp_hdr_len = 0;
1278 mcdi->resp_data_len = 0;
1279 ++mcdi->credits;
1280 }
1281 }
1282 mcdi->new_epoch = true;
1283 efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
1284 spin_unlock(&mcdi->iface_lock);
1285 }
1286
1287
1288
1289
1290 static void efx_mcdi_abandon(struct efx_nic *efx)
1291 {
1292 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1293
1294 if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
1295 return;
1296 netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
1297 efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
1298 }
1299
1300 static void efx_handle_drain_event(struct efx_nic *efx)
1301 {
1302 if (atomic_dec_and_test(&efx->active_queues))
1303 wake_up(&efx->flush_wq);
1304
1305 WARN_ON(atomic_read(&efx->active_queues) < 0);
1306 }
1307
1308
1309 void efx_mcdi_process_event(struct efx_channel *channel,
1310 efx_qword_t *event)
1311 {
1312 struct efx_nic *efx = channel->efx;
1313 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
1314 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
1315
1316 switch (code) {
1317 case MCDI_EVENT_CODE_BADSSERT:
1318 netif_err(efx, hw, efx->net_dev,
1319 "MC watchdog or assertion failure at 0x%x\n", data);
1320 efx_mcdi_ev_death(efx, -EINTR);
1321 break;
1322
1323 case MCDI_EVENT_CODE_PMNOTICE:
1324 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
1325 break;
1326
1327 case MCDI_EVENT_CODE_CMDDONE:
1328 efx_mcdi_ev_cpl(efx,
1329 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
1330 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
1331 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
1332 break;
1333
1334 case MCDI_EVENT_CODE_LINKCHANGE:
1335 efx_mcdi_process_link_change(efx, event);
1336 break;
1337 case MCDI_EVENT_CODE_SENSOREVT:
1338 efx_sensor_event(efx, event);
1339 break;
1340 case MCDI_EVENT_CODE_SCHEDERR:
1341 netif_dbg(efx, hw, efx->net_dev,
1342 "MC Scheduler alert (0x%x)\n", data);
1343 break;
1344 case MCDI_EVENT_CODE_REBOOT:
1345 case MCDI_EVENT_CODE_MC_REBOOT:
1346 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
1347 efx_mcdi_ev_death(efx, -EIO);
1348 break;
1349 case MCDI_EVENT_CODE_MC_BIST:
1350 netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
1351 efx_mcdi_ev_bist(efx);
1352 break;
1353 case MCDI_EVENT_CODE_MAC_STATS_DMA:
1354
1355 break;
1356 case MCDI_EVENT_CODE_FLR:
1357 if (efx->type->sriov_flr)
1358 efx->type->sriov_flr(efx,
1359 MCDI_EVENT_FIELD(*event, FLR_VF));
1360 break;
1361 case MCDI_EVENT_CODE_PTP_RX:
1362 case MCDI_EVENT_CODE_PTP_FAULT:
1363 case MCDI_EVENT_CODE_PTP_PPS:
1364 efx_ptp_event(efx, event);
1365 break;
1366 case MCDI_EVENT_CODE_PTP_TIME:
1367 efx_time_sync_event(channel, event);
1368 break;
1369 case MCDI_EVENT_CODE_TX_FLUSH:
1370 case MCDI_EVENT_CODE_RX_FLUSH:
1371
1372
1373
1374
1375
1376
1377 BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
1378 MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
1379 if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
1380 efx_handle_drain_event(efx);
1381 break;
1382 case MCDI_EVENT_CODE_TX_ERR:
1383 case MCDI_EVENT_CODE_RX_ERR:
1384 netif_err(efx, hw, efx->net_dev,
1385 "%s DMA error (event: "EFX_QWORD_FMT")\n",
1386 code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
1387 EFX_QWORD_VAL(*event));
1388 efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
1389 break;
1390 case MCDI_EVENT_CODE_PROXY_RESPONSE:
1391 efx_mcdi_ev_proxy_response(efx,
1392 MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE),
1393 MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC));
1394 break;
1395 default:
1396 netif_err(efx, hw, efx->net_dev,
1397 "Unknown MCDI event " EFX_QWORD_FMT "\n",
1398 EFX_QWORD_VAL(*event));
1399 }
1400 }
1401
1402
1403
1404
1405
1406
1407
1408
1409 void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
1410 {
1411 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
1412 size_t outlength;
1413 const __le16 *ver_words;
1414 size_t offset;
1415 int rc;
1416
1417 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
1418 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
1419 outbuf, sizeof(outbuf), &outlength);
1420 if (rc)
1421 goto fail;
1422 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
1423 rc = -EIO;
1424 goto fail;
1425 }
1426
1427 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
1428 offset = scnprintf(buf, len, "%u.%u.%u.%u",
1429 le16_to_cpu(ver_words[0]),
1430 le16_to_cpu(ver_words[1]),
1431 le16_to_cpu(ver_words[2]),
1432 le16_to_cpu(ver_words[3]));
1433
1434 if (efx->type->print_additional_fwver)
1435 offset += efx->type->print_additional_fwver(efx, buf + offset,
1436 len - offset);
1437
1438
1439
1440
1441
1442 if (WARN_ON(offset >= len))
1443 buf[0] = 0;
1444
1445 return;
1446
1447 fail:
1448 pci_err(efx->pci_dev, "%s: failed rc=%d\n", __func__, rc);
1449 buf[0] = 0;
1450 }
1451
1452 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
1453 bool *was_attached)
1454 {
1455 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
1456 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
1457 size_t outlen;
1458 int rc;
1459
1460 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
1461 driver_operating ? 1 : 0);
1462 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
1463 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
1464
1465 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
1466 outbuf, sizeof(outbuf), &outlen);
1467
1468
1469
1470
1471 if (rc == -EPERM) {
1472 pci_dbg(efx->pci_dev,
1473 "%s with fw-variant setting failed EPERM, trying without it\n",
1474 __func__);
1475 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID,
1476 MC_CMD_FW_DONT_CARE);
1477 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf,
1478 sizeof(inbuf), outbuf, sizeof(outbuf),
1479 &outlen);
1480 }
1481 if (rc) {
1482 efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf),
1483 outbuf, outlen, rc);
1484 goto fail;
1485 }
1486 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
1487 rc = -EIO;
1488 goto fail;
1489 }
1490
1491 if (driver_operating) {
1492 if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
1493 efx->mcdi->fn_flags =
1494 MCDI_DWORD(outbuf,
1495 DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
1496 } else {
1497
1498 efx->mcdi->fn_flags =
1499 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1500 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
1501 (efx_port_num(efx) == 0) <<
1502 MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
1503 }
1504 }
1505
1506
1507
1508
1509
1510
1511 if (was_attached != NULL)
1512 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
1513 return 0;
1514
1515 fail:
1516 pci_err(efx->pci_dev, "%s: failed rc=%d\n", __func__, rc);
1517 return rc;
1518 }
1519
1520 int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
1521 u16 *fw_subtype_list, u32 *capabilities)
1522 {
1523 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
1524 size_t outlen, i;
1525 int port_num = efx_port_num(efx);
1526 int rc;
1527
1528 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
1529
1530 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
1531 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
1532
1533 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
1534 outbuf, sizeof(outbuf), &outlen);
1535 if (rc)
1536 goto fail;
1537
1538 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1539 rc = -EIO;
1540 goto fail;
1541 }
1542
1543 if (mac_address)
1544 ether_addr_copy(mac_address,
1545 port_num ?
1546 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
1547 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
1548 if (fw_subtype_list) {
1549 for (i = 0;
1550 i < MCDI_VAR_ARRAY_LEN(outlen,
1551 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
1552 i++)
1553 fw_subtype_list[i] = MCDI_ARRAY_WORD(
1554 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
1555 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
1556 fw_subtype_list[i] = 0;
1557 }
1558 if (capabilities) {
1559 if (port_num)
1560 *capabilities = MCDI_DWORD(outbuf,
1561 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1562 else
1563 *capabilities = MCDI_DWORD(outbuf,
1564 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1565 }
1566
1567 return 0;
1568
1569 fail:
1570 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
1571 __func__, rc, (int)outlen);
1572
1573 return rc;
1574 }
1575
1576 int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
1577 {
1578 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
1579 u32 dest = 0;
1580 int rc;
1581
1582 if (uart)
1583 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
1584 if (evq)
1585 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
1586
1587 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
1588 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
1589
1590 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
1591
1592 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
1593 NULL, 0, NULL);
1594 return rc;
1595 }
1596
1597 int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
1598 {
1599 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
1600 size_t outlen;
1601 int rc;
1602
1603 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
1604
1605 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
1606 outbuf, sizeof(outbuf), &outlen);
1607 if (rc)
1608 goto fail;
1609 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
1610 rc = -EIO;
1611 goto fail;
1612 }
1613
1614 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
1615 return 0;
1616
1617 fail:
1618 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1619 __func__, rc);
1620 return rc;
1621 }
1622
1623
1624 static int efx_new_mcdi_nvram_types(struct efx_nic *efx, u32 *number,
1625 u32 *nvram_types)
1626 {
1627 efx_dword_t *outbuf = kzalloc(MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2,
1628 GFP_KERNEL);
1629 size_t outlen;
1630 int rc;
1631
1632 if (!outbuf)
1633 return -ENOMEM;
1634
1635 BUILD_BUG_ON(MC_CMD_NVRAM_PARTITIONS_IN_LEN != 0);
1636
1637 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_PARTITIONS, NULL, 0,
1638 outbuf, MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2, &outlen);
1639 if (rc)
1640 goto fail;
1641
1642 *number = MCDI_DWORD(outbuf, NVRAM_PARTITIONS_OUT_NUM_PARTITIONS);
1643
1644 memcpy(nvram_types, MCDI_PTR(outbuf, NVRAM_PARTITIONS_OUT_TYPE_ID),
1645 *number * sizeof(u32));
1646
1647 fail:
1648 kfree(outbuf);
1649 return rc;
1650 }
1651
1652 int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
1653 size_t *size_out, size_t *erase_size_out,
1654 bool *protected_out)
1655 {
1656 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
1657 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
1658 size_t outlen;
1659 int rc;
1660
1661 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
1662
1663 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
1664 outbuf, sizeof(outbuf), &outlen);
1665 if (rc)
1666 goto fail;
1667 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
1668 rc = -EIO;
1669 goto fail;
1670 }
1671
1672 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
1673 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
1674 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
1675 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
1676 return 0;
1677
1678 fail:
1679 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1680 return rc;
1681 }
1682
1683 static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
1684 {
1685 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
1686 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
1687 int rc;
1688
1689 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
1690
1691 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
1692 outbuf, sizeof(outbuf), NULL);
1693 if (rc)
1694 return rc;
1695
1696 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
1697 case MC_CMD_NVRAM_TEST_PASS:
1698 case MC_CMD_NVRAM_TEST_NOTSUPP:
1699 return 0;
1700 default:
1701 return -EIO;
1702 }
1703 }
1704
1705
1706 int efx_new_mcdi_nvram_test_all(struct efx_nic *efx)
1707 {
1708 u32 *nvram_types = kzalloc(MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2,
1709 GFP_KERNEL);
1710 unsigned int number;
1711 int rc, i;
1712
1713 if (!nvram_types)
1714 return -ENOMEM;
1715
1716 rc = efx_new_mcdi_nvram_types(efx, &number, nvram_types);
1717 if (rc)
1718 goto fail;
1719
1720
1721 rc = -EAGAIN;
1722
1723 for (i = 0; i < number; i++) {
1724 if (nvram_types[i] == NVRAM_PARTITION_TYPE_PARTITION_MAP ||
1725 nvram_types[i] == NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG)
1726 continue;
1727
1728 rc = efx_mcdi_nvram_test(efx, nvram_types[i]);
1729 if (rc)
1730 goto fail;
1731 }
1732
1733 fail:
1734 kfree(nvram_types);
1735 return rc;
1736 }
1737
1738 int efx_mcdi_nvram_test_all(struct efx_nic *efx)
1739 {
1740 u32 nvram_types;
1741 unsigned int type;
1742 int rc;
1743
1744 rc = efx_mcdi_nvram_types(efx, &nvram_types);
1745 if (rc)
1746 goto fail1;
1747
1748 type = 0;
1749 while (nvram_types != 0) {
1750 if (nvram_types & 1) {
1751 rc = efx_mcdi_nvram_test(efx, type);
1752 if (rc)
1753 goto fail2;
1754 }
1755 type++;
1756 nvram_types >>= 1;
1757 }
1758
1759 return 0;
1760
1761 fail2:
1762 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
1763 __func__, type);
1764 fail1:
1765 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1766 return rc;
1767 }
1768
1769
1770
1771
1772 static int efx_mcdi_read_assertion(struct efx_nic *efx)
1773 {
1774 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
1775 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
1776 unsigned int flags, index;
1777 const char *reason;
1778 size_t outlen;
1779 int retry;
1780 int rc;
1781
1782
1783
1784
1785
1786
1787 retry = 2;
1788 do {
1789 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
1790 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
1791 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
1792 outbuf, sizeof(outbuf), &outlen);
1793 if (rc == -EPERM)
1794 return 0;
1795 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
1796
1797 if (rc) {
1798 efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
1799 MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
1800 outlen, rc);
1801 return rc;
1802 }
1803 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
1804 return -EIO;
1805
1806
1807 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1808 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1809 return 0;
1810
1811 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1812 ? "system-level assertion"
1813 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1814 ? "thread-level assertion"
1815 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1816 ? "watchdog reset"
1817 : "unknown assertion";
1818 netif_err(efx, hw, efx->net_dev,
1819 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1820 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1821 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
1822
1823
1824 for (index = 0;
1825 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1826 index++)
1827 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
1828 1 + index,
1829 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
1830 index));
1831
1832 return 1;
1833 }
1834
1835 static int efx_mcdi_exit_assertion(struct efx_nic *efx)
1836 {
1837 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1838 int rc;
1839
1840
1841
1842
1843
1844
1845
1846 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1847 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1848 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
1849 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1850 NULL, 0, NULL);
1851 if (rc == -EIO)
1852 rc = 0;
1853 if (rc)
1854 efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN,
1855 NULL, 0, rc);
1856 return rc;
1857 }
1858
1859 int efx_mcdi_handle_assertion(struct efx_nic *efx)
1860 {
1861 int rc;
1862
1863 rc = efx_mcdi_read_assertion(efx);
1864 if (rc <= 0)
1865 return rc;
1866
1867 return efx_mcdi_exit_assertion(efx);
1868 }
1869
1870 int efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1871 {
1872 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
1873
1874 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1875 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1876 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1877
1878 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1879
1880 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1881
1882 return efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), NULL, 0, NULL);
1883 }
1884
1885 static int efx_mcdi_reset_func(struct efx_nic *efx)
1886 {
1887 MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
1888 int rc;
1889
1890 BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
1891 MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
1892 ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
1893 rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
1894 NULL, 0, NULL);
1895 return rc;
1896 }
1897
1898 static int efx_mcdi_reset_mc(struct efx_nic *efx)
1899 {
1900 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1901 int rc;
1902
1903 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1904 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1905 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1906 NULL, 0, NULL);
1907
1908 if (rc == -EIO)
1909 return 0;
1910 if (rc == 0)
1911 rc = -EIO;
1912 return rc;
1913 }
1914
1915 enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
1916 {
1917 return RESET_TYPE_RECOVER_OR_ALL;
1918 }
1919
1920 int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1921 {
1922 int rc;
1923
1924
1925 if (method == RESET_TYPE_MCDI_TIMEOUT) {
1926 rc = pci_reset_function(efx->pci_dev);
1927 if (rc)
1928 return rc;
1929
1930 if (efx->mcdi) {
1931 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1932 mcdi->mode = MCDI_MODE_POLL;
1933 }
1934 return 0;
1935 }
1936
1937
1938 rc = efx_mcdi_handle_assertion(efx);
1939 if (rc)
1940 return rc;
1941
1942 if (method == RESET_TYPE_DATAPATH)
1943 return 0;
1944 else if (method == RESET_TYPE_WORLD)
1945 return efx_mcdi_reset_mc(efx);
1946 else
1947 return efx_mcdi_reset_func(efx);
1948 }
1949
1950 static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1951 const u8 *mac, int *id_out)
1952 {
1953 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1954 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
1955 size_t outlen;
1956 int rc;
1957
1958 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1959 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1960 MC_CMD_FILTER_MODE_SIMPLE);
1961 ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
1962
1963 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1964 outbuf, sizeof(outbuf), &outlen);
1965 if (rc)
1966 goto fail;
1967
1968 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
1969 rc = -EIO;
1970 goto fail;
1971 }
1972
1973 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1974
1975 return 0;
1976
1977 fail:
1978 *id_out = -1;
1979 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1980 return rc;
1981
1982 }
1983
1984
1985 int
1986 efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1987 {
1988 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1989 }
1990
1991
1992 int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1993 {
1994 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
1995 size_t outlen;
1996 int rc;
1997
1998 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1999 outbuf, sizeof(outbuf), &outlen);
2000 if (rc)
2001 goto fail;
2002
2003 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
2004 rc = -EIO;
2005 goto fail;
2006 }
2007
2008 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
2009
2010 return 0;
2011
2012 fail:
2013 *id_out = -1;
2014 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
2015 return rc;
2016 }
2017
2018
2019 int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
2020 {
2021 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
2022 int rc;
2023
2024 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
2025
2026 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
2027 NULL, 0, NULL);
2028 return rc;
2029 }
2030
2031 int efx_mcdi_flush_rxqs(struct efx_nic *efx)
2032 {
2033 struct efx_channel *channel;
2034 struct efx_rx_queue *rx_queue;
2035 MCDI_DECLARE_BUF(inbuf,
2036 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
2037 int rc, count;
2038
2039 BUILD_BUG_ON(EFX_MAX_CHANNELS >
2040 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
2041
2042 count = 0;
2043 efx_for_each_channel(channel, efx) {
2044 efx_for_each_channel_rx_queue(rx_queue, channel) {
2045 if (rx_queue->flush_pending) {
2046 rx_queue->flush_pending = false;
2047 atomic_dec(&efx->rxq_flush_pending);
2048 MCDI_SET_ARRAY_DWORD(
2049 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
2050 count, efx_rx_queue_index(rx_queue));
2051 count++;
2052 }
2053 }
2054 }
2055
2056 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
2057 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
2058 WARN_ON(rc < 0);
2059
2060 return rc;
2061 }
2062
2063 int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
2064 {
2065 int rc;
2066
2067 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
2068 return rc;
2069 }
2070
2071 int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled,
2072 unsigned int *flags)
2073 {
2074 MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
2075 MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN);
2076 size_t outlen;
2077 int rc;
2078
2079 BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
2080 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
2081 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
2082 rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
2083 outbuf, sizeof(outbuf), &outlen);
2084 if (rc)
2085 return rc;
2086
2087 if (!flags)
2088 return 0;
2089
2090 if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
2091 *flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS);
2092 else
2093 *flags = 0;
2094
2095 return 0;
2096 }
2097
2098 int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out,
2099 unsigned int *enabled_out)
2100 {
2101 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN);
2102 size_t outlen;
2103 int rc;
2104
2105 rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0,
2106 outbuf, sizeof(outbuf), &outlen);
2107 if (rc)
2108 goto fail;
2109
2110 if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) {
2111 rc = -EIO;
2112 goto fail;
2113 }
2114
2115 if (impl_out)
2116 *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED);
2117
2118 if (enabled_out)
2119 *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED);
2120
2121 return 0;
2122
2123 fail:
2124
2125
2126
2127 netif_cond_dbg(efx, hw, efx->net_dev, rc == -ENOSYS, err,
2128 "%s: failed rc=%d\n", __func__, rc);
2129 return rc;
2130 }
2131
2132
2133
2134
2135
2136 int efx_mcdi_get_privilege_mask(struct efx_nic *efx, u32 *mask)
2137 {
2138 MCDI_DECLARE_BUF(fi_outbuf, MC_CMD_GET_FUNCTION_INFO_OUT_LEN);
2139 MCDI_DECLARE_BUF(pm_inbuf, MC_CMD_PRIVILEGE_MASK_IN_LEN);
2140 MCDI_DECLARE_BUF(pm_outbuf, MC_CMD_PRIVILEGE_MASK_OUT_LEN);
2141 size_t outlen;
2142 u16 pf, vf;
2143 int rc;
2144
2145 if (!efx || !mask)
2146 return -EINVAL;
2147
2148
2149 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_FUNCTION_INFO, NULL, 0,
2150 fi_outbuf, MC_CMD_GET_FUNCTION_INFO_OUT_LEN,
2151 &outlen);
2152 if (rc != 0)
2153 return rc;
2154 if (outlen < MC_CMD_GET_FUNCTION_INFO_OUT_LEN)
2155 return -EIO;
2156
2157 pf = MCDI_DWORD(fi_outbuf, GET_FUNCTION_INFO_OUT_PF);
2158 vf = MCDI_DWORD(fi_outbuf, GET_FUNCTION_INFO_OUT_VF);
2159
2160 MCDI_POPULATE_DWORD_2(pm_inbuf, PRIVILEGE_MASK_IN_FUNCTION,
2161 PRIVILEGE_MASK_IN_FUNCTION_PF, pf,
2162 PRIVILEGE_MASK_IN_FUNCTION_VF, vf);
2163
2164 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_PRIVILEGE_MASK,
2165 pm_inbuf, sizeof(pm_inbuf),
2166 pm_outbuf, sizeof(pm_outbuf), &outlen);
2167
2168 if (rc != 0)
2169 return rc;
2170 if (outlen < MC_CMD_PRIVILEGE_MASK_OUT_LEN)
2171 return -EIO;
2172
2173 *mask = MCDI_DWORD(pm_outbuf, PRIVILEGE_MASK_OUT_OLD_MASK);
2174
2175 return 0;
2176 }
2177
2178 #ifdef CONFIG_SFC_MTD
2179
2180 #define EFX_MCDI_NVRAM_LEN_MAX 128
2181
2182 static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
2183 {
2184 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_V2_IN_LEN);
2185 int rc;
2186
2187 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
2188 MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_START_V2_IN_FLAGS,
2189 NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT,
2190 1);
2191
2192 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
2193
2194 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
2195 NULL, 0, NULL);
2196
2197 return rc;
2198 }
2199
2200 static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
2201 loff_t offset, u8 *buffer, size_t length)
2202 {
2203 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_V2_LEN);
2204 MCDI_DECLARE_BUF(outbuf,
2205 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
2206 size_t outlen;
2207 int rc;
2208
2209 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
2210 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
2211 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
2212 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_V2_MODE,
2213 MC_CMD_NVRAM_READ_IN_V2_DEFAULT);
2214
2215 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
2216 outbuf, sizeof(outbuf), &outlen);
2217 if (rc)
2218 return rc;
2219
2220 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
2221 return 0;
2222 }
2223
2224 static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
2225 loff_t offset, const u8 *buffer, size_t length)
2226 {
2227 MCDI_DECLARE_BUF(inbuf,
2228 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
2229 int rc;
2230
2231 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
2232 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
2233 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
2234 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
2235
2236 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
2237
2238 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
2239 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
2240 NULL, 0, NULL);
2241 return rc;
2242 }
2243
2244 static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
2245 loff_t offset, size_t length)
2246 {
2247 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
2248 int rc;
2249
2250 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
2251 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
2252 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
2253
2254 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
2255
2256 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
2257 NULL, 0, NULL);
2258 return rc;
2259 }
2260
2261 static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
2262 {
2263 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN);
2264 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN);
2265 size_t outlen;
2266 int rc, rc2;
2267
2268 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
2269
2270 MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_FINISH_V2_IN_FLAGS,
2271 NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT,
2272 1);
2273
2274 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
2275 outbuf, sizeof(outbuf), &outlen);
2276 if (!rc && outlen >= MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) {
2277 rc2 = MCDI_DWORD(outbuf, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE);
2278 if (rc2 != MC_CMD_NVRAM_VERIFY_RC_SUCCESS)
2279 netif_err(efx, drv, efx->net_dev,
2280 "NVRAM update failed verification with code 0x%x\n",
2281 rc2);
2282 switch (rc2) {
2283 case MC_CMD_NVRAM_VERIFY_RC_SUCCESS:
2284 break;
2285 case MC_CMD_NVRAM_VERIFY_RC_CMS_CHECK_FAILED:
2286 case MC_CMD_NVRAM_VERIFY_RC_MESSAGE_DIGEST_CHECK_FAILED:
2287 case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHECK_FAILED:
2288 case MC_CMD_NVRAM_VERIFY_RC_TRUSTED_APPROVERS_CHECK_FAILED:
2289 case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHAIN_CHECK_FAILED:
2290 rc = -EIO;
2291 break;
2292 case MC_CMD_NVRAM_VERIFY_RC_INVALID_CMS_FORMAT:
2293 case MC_CMD_NVRAM_VERIFY_RC_BAD_MESSAGE_DIGEST:
2294 rc = -EINVAL;
2295 break;
2296 case MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES:
2297 case MC_CMD_NVRAM_VERIFY_RC_NO_TRUSTED_APPROVERS:
2298 case MC_CMD_NVRAM_VERIFY_RC_NO_SIGNATURE_MATCH:
2299 rc = -EPERM;
2300 break;
2301 default:
2302 netif_err(efx, drv, efx->net_dev,
2303 "Unknown response to NVRAM_UPDATE_FINISH\n");
2304 rc = -EIO;
2305 }
2306 }
2307
2308 return rc;
2309 }
2310
2311 int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
2312 size_t len, size_t *retlen, u8 *buffer)
2313 {
2314 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2315 struct efx_nic *efx = mtd->priv;
2316 loff_t offset = start;
2317 loff_t end = min_t(loff_t, start + len, mtd->size);
2318 size_t chunk;
2319 int rc = 0;
2320
2321 while (offset < end) {
2322 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
2323 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
2324 buffer, chunk);
2325 if (rc)
2326 goto out;
2327 offset += chunk;
2328 buffer += chunk;
2329 }
2330 out:
2331 *retlen = offset - start;
2332 return rc;
2333 }
2334
2335 int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
2336 {
2337 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2338 struct efx_nic *efx = mtd->priv;
2339 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
2340 loff_t end = min_t(loff_t, start + len, mtd->size);
2341 size_t chunk = part->common.mtd.erasesize;
2342 int rc = 0;
2343
2344 if (!part->updating) {
2345 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
2346 if (rc)
2347 goto out;
2348 part->updating = true;
2349 }
2350
2351
2352
2353
2354 while (offset < end) {
2355 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
2356 chunk);
2357 if (rc)
2358 goto out;
2359 offset += chunk;
2360 }
2361 out:
2362 return rc;
2363 }
2364
2365 int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
2366 size_t len, size_t *retlen, const u8 *buffer)
2367 {
2368 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2369 struct efx_nic *efx = mtd->priv;
2370 loff_t offset = start;
2371 loff_t end = min_t(loff_t, start + len, mtd->size);
2372 size_t chunk;
2373 int rc = 0;
2374
2375 if (!part->updating) {
2376 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
2377 if (rc)
2378 goto out;
2379 part->updating = true;
2380 }
2381
2382 while (offset < end) {
2383 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
2384 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
2385 buffer, chunk);
2386 if (rc)
2387 goto out;
2388 offset += chunk;
2389 buffer += chunk;
2390 }
2391 out:
2392 *retlen = offset - start;
2393 return rc;
2394 }
2395
2396 int efx_mcdi_mtd_sync(struct mtd_info *mtd)
2397 {
2398 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2399 struct efx_nic *efx = mtd->priv;
2400 int rc = 0;
2401
2402 if (part->updating) {
2403 part->updating = false;
2404 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
2405 }
2406
2407 return rc;
2408 }
2409
2410 void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
2411 {
2412 struct efx_mcdi_mtd_partition *mcdi_part =
2413 container_of(part, struct efx_mcdi_mtd_partition, common);
2414 struct efx_nic *efx = part->mtd.priv;
2415
2416 snprintf(part->name, sizeof(part->name), "%s %s:%02x",
2417 efx->name, part->type_name, mcdi_part->fw_subtype);
2418 }
2419
2420 #endif