sfc/falcon/mdio_10g.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /****************************************************************************
0003  * Driver for Solarflare network controllers and boards
0004  * Copyright 2006-2011 Solarflare Communications Inc.
0005  */
0006
0007 #ifndef EF4_MDIO_10G_H
0008 #define EF4_MDIO_10G_H
0009
0010 #include <linux/mdio.h>
0011
0012 /*
0013  * Helper functions for doing 10G MDIO as specified in IEEE 802.3 clause 45.
0014  */
0015
0016 #include "efx.h"
0017
0018 static inline unsigned ef4_mdio_id_rev(u32 id) { return id & 0xf; }
0019 static inline unsigned ef4_mdio_id_model(u32 id) { return (id >> 4) & 0x3f; }
0020 unsigned ef4_mdio_id_oui(u32 id);
0021
0022 static inline int ef4_mdio_read(struct ef4_nic *efx, int devad, int addr)
0023 {
0024     return efx->mdio.mdio_read(efx->net_dev, efx->mdio.prtad, devad, addr);
0025 }
0026
0027 static inline void
0028 ef4_mdio_write(struct ef4_nic *efx, int devad, int addr, int value)
0029 {
0030     efx->mdio.mdio_write(efx->net_dev, efx->mdio.prtad, devad, addr, value);
0031 }
0032
0033 static inline u32 ef4_mdio_read_id(struct ef4_nic *efx, int mmd)
0034 {
0035     u16 id_low = ef4_mdio_read(efx, mmd, MDIO_DEVID2);
0036     u16 id_hi = ef4_mdio_read(efx, mmd, MDIO_DEVID1);
0037     return (id_hi << 16) | (id_low);
0038 }
0039
0040 static inline bool ef4_mdio_phyxgxs_lane_sync(struct ef4_nic *efx)
0041 {
0042     int i, lane_status;
0043     bool sync;
0044
0045     for (i = 0; i < 2; ++i)
0046         lane_status = ef4_mdio_read(efx, MDIO_MMD_PHYXS,
0047                         MDIO_PHYXS_LNSTAT);
0048
0049     sync = !!(lane_status & MDIO_PHYXS_LNSTAT_ALIGN);
0050     if (!sync)
0051         netif_dbg(efx, hw, efx->net_dev, "XGXS lane status: %x\n",
0052               lane_status);
0053     return sync;
0054 }
0055
0056 const char *ef4_mdio_mmd_name(int mmd);
0057
0058 /*
0059  * Reset a specific MMD and wait for reset to clear.
0060  * Return number of spins left (>0) on success, -%ETIMEDOUT on failure.
0061  *
0062  * This function will sleep
0063  */
0064 int ef4_mdio_reset_mmd(struct ef4_nic *efx, int mmd, int spins, int spintime);
0065
0066 /* As ef4_mdio_check_mmd but for multiple MMDs */
0067 int ef4_mdio_check_mmds(struct ef4_nic *efx, unsigned int mmd_mask);
0068
0069 /* Check the link status of specified mmds in bit mask */
0070 bool ef4_mdio_links_ok(struct ef4_nic *efx, unsigned int mmd_mask);
0071
0072 /* Generic transmit disable support though PMAPMD */
0073 void ef4_mdio_transmit_disable(struct ef4_nic *efx);
0074
0075 /* Generic part of reconfigure: set/clear loopback bits */
0076 void ef4_mdio_phy_reconfigure(struct ef4_nic *efx);
0077
0078 /* Set the power state of the specified MMDs */
0079 void ef4_mdio_set_mmds_lpower(struct ef4_nic *efx, int low_power,
0080                   unsigned int mmd_mask);
0081
0082 /* Set (some of) the PHY settings over MDIO */
0083 int ef4_mdio_set_link_ksettings(struct ef4_nic *efx,
0084                 const struct ethtool_link_ksettings *cmd);
0085
0086 /* Push advertising flags and restart autonegotiation */
0087 void ef4_mdio_an_reconfigure(struct ef4_nic *efx);
0088
0089 /* Get pause parameters from AN if available (otherwise return
0090  * requested pause parameters)
0091  */
0092 u8 ef4_mdio_get_pause(struct ef4_nic *efx);
0093
0094 /* Wait for specified MMDs to exit reset within a timeout */
0095 int ef4_mdio_wait_reset_mmds(struct ef4_nic *efx, unsigned int mmd_mask);
0096
0097 /* Set or clear flag, debouncing */
0098 static inline void
0099 ef4_mdio_set_flag(struct ef4_nic *efx, int devad, int addr,
0100           int mask, bool state)
0101 {
0102     mdio_set_flag(&efx->mdio, efx->mdio.prtad, devad, addr, mask, state);
0103 }
0104
0105 /* Liveness self-test for MDIO PHYs */
0106 int ef4_mdio_test_alive(struct ef4_nic *efx);
0107
0108 #endif /* EF4_MDIO_10G_H */