sfc/falcon/mdio_10g.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /****************************************************************************
0003  * Driver for Solarflare network controllers and boards
0004  * Copyright 2006-2011 Solarflare Communications Inc.
0005  */
0006 /*
0007  * Useful functions for working with MDIO clause 45 PHYs
0008  */
0009 #include <linux/types.h>
0010 #include <linux/ethtool.h>
0011 #include <linux/delay.h>
0012 #include "net_driver.h"
0013 #include "mdio_10g.h"
0014 #include "workarounds.h"
0015
0016 unsigned ef4_mdio_id_oui(u32 id)
0017 {
0018     unsigned oui = 0;
0019     int i;
0020
0021     /* The bits of the OUI are designated a..x, with a=0 and b variable.
0022      * In the id register c is the MSB but the OUI is conventionally
0023      * written as bytes h..a, p..i, x..q.  Reorder the bits accordingly. */
0024     for (i = 0; i < 22; ++i)
0025         if (id & (1 << (i + 10)))
0026             oui |= 1 << (i ^ 7);
0027
0028     return oui;
0029 }
0030
0031 int ef4_mdio_reset_mmd(struct ef4_nic *port, int mmd,
0032                 int spins, int spintime)
0033 {
0034     u32 ctrl;
0035
0036     /* Catch callers passing values in the wrong units (or just silly) */
0037     EF4_BUG_ON_PARANOID(spins * spintime >= 5000);
0038
0039     ef4_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET);
0040     /* Wait for the reset bit to clear. */
0041     do {
0042         msleep(spintime);
0043         ctrl = ef4_mdio_read(port, mmd, MDIO_CTRL1);
0044         spins--;
0045
0046     } while (spins && (ctrl & MDIO_CTRL1_RESET));
0047
0048     return spins ? spins : -ETIMEDOUT;
0049 }
0050
0051 static int ef4_mdio_check_mmd(struct ef4_nic *efx, int mmd)
0052 {
0053     int status;
0054
0055     if (mmd != MDIO_MMD_AN) {
0056         /* Read MMD STATUS2 to check it is responding. */
0057         status = ef4_mdio_read(efx, mmd, MDIO_STAT2);
0058         if ((status & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL) {
0059             netif_err(efx, hw, efx->net_dev,
0060                   "PHY MMD %d not responding.\n", mmd);
0061             return -EIO;
0062         }
0063     }
0064
0065     return 0;
0066 }
0067
0068 /* This ought to be ridiculous overkill. We expect it to fail rarely */
0069 #define MDIO45_RESET_TIME   1000 /* ms */
0070 #define MDIO45_RESET_ITERS  100
0071
0072 int ef4_mdio_wait_reset_mmds(struct ef4_nic *efx, unsigned int mmd_mask)
0073 {
0074     const int spintime = MDIO45_RESET_TIME / MDIO45_RESET_ITERS;
0075     int tries = MDIO45_RESET_ITERS;
0076     int rc = 0;
0077     int in_reset;
0078
0079     while (tries) {
0080         int mask = mmd_mask;
0081         int mmd = 0;
0082         int stat;
0083         in_reset = 0;
0084         while (mask) {
0085             if (mask & 1) {
0086                 stat = ef4_mdio_read(efx, mmd, MDIO_CTRL1);
0087                 if (stat < 0) {
0088                     netif_err(efx, hw, efx->net_dev,
0089                           "failed to read status of"
0090                           " MMD %d\n", mmd);
0091                     return -EIO;
0092                 }
0093                 if (stat & MDIO_CTRL1_RESET)
0094                     in_reset |= (1 << mmd);
0095             }
0096             mask = mask >> 1;
0097             mmd++;
0098         }
0099         if (!in_reset)
0100             break;
0101         tries--;
0102         msleep(spintime);
0103     }
0104     if (in_reset != 0) {
0105         netif_err(efx, hw, efx->net_dev,
0106               "not all MMDs came out of reset in time."
0107               " MMDs still in reset: %x\n", in_reset);
0108         rc = -ETIMEDOUT;
0109     }
0110     return rc;
0111 }
0112
0113 int ef4_mdio_check_mmds(struct ef4_nic *efx, unsigned int mmd_mask)
0114 {
0115     int mmd = 0, probe_mmd, devs1, devs2;
0116     u32 devices;
0117
0118     /* Historically we have probed the PHYXS to find out what devices are
0119      * present,but that doesn't work so well if the PHYXS isn't expected
0120      * to exist, if so just find the first item in the list supplied. */
0121     probe_mmd = (mmd_mask & MDIO_DEVS_PHYXS) ? MDIO_MMD_PHYXS :
0122         __ffs(mmd_mask);
0123
0124     /* Check all the expected MMDs are present */
0125     devs1 = ef4_mdio_read(efx, probe_mmd, MDIO_DEVS1);
0126     devs2 = ef4_mdio_read(efx, probe_mmd, MDIO_DEVS2);
0127     if (devs1 < 0 || devs2 < 0) {
0128         netif_err(efx, hw, efx->net_dev,
0129               "failed to read devices present\n");
0130         return -EIO;
0131     }
0132     devices = devs1 | (devs2 << 16);
0133     if ((devices & mmd_mask) != mmd_mask) {
0134         netif_err(efx, hw, efx->net_dev,
0135               "required MMDs not present: got %x, wanted %x\n",
0136               devices, mmd_mask);
0137         return -ENODEV;
0138     }
0139     netif_vdbg(efx, hw, efx->net_dev, "Devices present: %x\n", devices);
0140
0141     /* Check all required MMDs are responding and happy. */
0142     while (mmd_mask) {
0143         if ((mmd_mask & 1) && ef4_mdio_check_mmd(efx, mmd))
0144             return -EIO;
0145         mmd_mask = mmd_mask >> 1;
0146         mmd++;
0147     }
0148
0149     return 0;
0150 }
0151
0152 bool ef4_mdio_links_ok(struct ef4_nic *efx, unsigned int mmd_mask)
0153 {
0154     /* If the port is in loopback, then we should only consider a subset
0155      * of mmd's */
0156     if (LOOPBACK_INTERNAL(efx))
0157         return true;
0158     else if (LOOPBACK_MASK(efx) & LOOPBACKS_WS)
0159         return false;
0160     else if (ef4_phy_mode_disabled(efx->phy_mode))
0161         return false;
0162     else if (efx->loopback_mode == LOOPBACK_PHYXS)
0163         mmd_mask &= ~(MDIO_DEVS_PHYXS |
0164                   MDIO_DEVS_PCS |
0165                   MDIO_DEVS_PMAPMD |
0166                   MDIO_DEVS_AN);
0167     else if (efx->loopback_mode == LOOPBACK_PCS)
0168         mmd_mask &= ~(MDIO_DEVS_PCS |
0169                   MDIO_DEVS_PMAPMD |
0170                   MDIO_DEVS_AN);
0171     else if (efx->loopback_mode == LOOPBACK_PMAPMD)
0172         mmd_mask &= ~(MDIO_DEVS_PMAPMD |
0173                   MDIO_DEVS_AN);
0174
0175     return mdio45_links_ok(&efx->mdio, mmd_mask);
0176 }
0177
0178 void ef4_mdio_transmit_disable(struct ef4_nic *efx)
0179 {
0180     ef4_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
0181               MDIO_PMA_TXDIS, MDIO_PMD_TXDIS_GLOBAL,
0182               efx->phy_mode & PHY_MODE_TX_DISABLED);
0183 }
0184
0185 void ef4_mdio_phy_reconfigure(struct ef4_nic *efx)
0186 {
0187     ef4_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
0188               MDIO_CTRL1, MDIO_PMA_CTRL1_LOOPBACK,
0189               efx->loopback_mode == LOOPBACK_PMAPMD);
0190     ef4_mdio_set_flag(efx, MDIO_MMD_PCS,
0191               MDIO_CTRL1, MDIO_PCS_CTRL1_LOOPBACK,
0192               efx->loopback_mode == LOOPBACK_PCS);
0193     ef4_mdio_set_flag(efx, MDIO_MMD_PHYXS,
0194               MDIO_CTRL1, MDIO_PHYXS_CTRL1_LOOPBACK,
0195               efx->loopback_mode == LOOPBACK_PHYXS_WS);
0196 }
0197
0198 static void ef4_mdio_set_mmd_lpower(struct ef4_nic *efx,
0199                     int lpower, int mmd)
0200 {
0201     int stat = ef4_mdio_read(efx, mmd, MDIO_STAT1);
0202
0203     netif_vdbg(efx, drv, efx->net_dev, "Setting low power mode for MMD %d to %d\n",
0204           mmd, lpower);
0205
0206     if (stat & MDIO_STAT1_LPOWERABLE) {
0207         ef4_mdio_set_flag(efx, mmd, MDIO_CTRL1,
0208                   MDIO_CTRL1_LPOWER, lpower);
0209     }
0210 }
0211
0212 void ef4_mdio_set_mmds_lpower(struct ef4_nic *efx,
0213                   int low_power, unsigned int mmd_mask)
0214 {
0215     int mmd = 0;
0216     mmd_mask &= ~MDIO_DEVS_AN;
0217     while (mmd_mask) {
0218         if (mmd_mask & 1)
0219             ef4_mdio_set_mmd_lpower(efx, low_power, mmd);
0220         mmd_mask = (mmd_mask >> 1);
0221         mmd++;
0222     }
0223 }
0224
0225 /**
0226  * ef4_mdio_set_link_ksettings - Set (some of) the PHY settings over MDIO.
0227  * @efx:        Efx NIC
0228  * @cmd:        New settings
0229  */
0230 int ef4_mdio_set_link_ksettings(struct ef4_nic *efx,
0231                 const struct ethtool_link_ksettings *cmd)
0232 {
0233     struct ethtool_link_ksettings prev = {
0234         .base.cmd = ETHTOOL_GLINKSETTINGS
0235     };
0236     u32 prev_advertising, advertising;
0237     u32 prev_supported;
0238
0239     efx->phy_op->get_link_ksettings(efx, &prev);
0240
0241     ethtool_convert_link_mode_to_legacy_u32(&advertising,
0242                         cmd->link_modes.advertising);
0243     ethtool_convert_link_mode_to_legacy_u32(&prev_advertising,
0244                         prev.link_modes.advertising);
0245     ethtool_convert_link_mode_to_legacy_u32(&prev_supported,
0246                         prev.link_modes.supported);
0247
0248     if (advertising == prev_advertising &&
0249         cmd->base.speed == prev.base.speed &&
0250         cmd->base.duplex == prev.base.duplex &&
0251         cmd->base.port == prev.base.port &&
0252         cmd->base.autoneg == prev.base.autoneg)
0253         return 0;
0254
0255     /* We can only change these settings for -T PHYs */
0256     if (prev.base.port != PORT_TP || cmd->base.port != PORT_TP)
0257         return -EINVAL;
0258
0259     /* Check that PHY supports these settings */
0260     if (!cmd->base.autoneg ||
0261         (advertising | SUPPORTED_Autoneg) & ~prev_supported)
0262         return -EINVAL;
0263
0264     ef4_link_set_advertising(efx, advertising | ADVERTISED_Autoneg);
0265     ef4_mdio_an_reconfigure(efx);
0266     return 0;
0267 }
0268
0269 /**
0270  * ef4_mdio_an_reconfigure - Push advertising flags and restart autonegotiation
0271  * @efx:        Efx NIC
0272  */
0273 void ef4_mdio_an_reconfigure(struct ef4_nic *efx)
0274 {
0275     int reg;
0276
0277     WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));
0278
0279     /* Set up the base page */
0280     reg = ADVERTISE_CSMA | ADVERTISE_RESV;
0281     if (efx->link_advertising & ADVERTISED_Pause)
0282         reg |= ADVERTISE_PAUSE_CAP;
0283     if (efx->link_advertising & ADVERTISED_Asym_Pause)
0284         reg |= ADVERTISE_PAUSE_ASYM;
0285     ef4_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);
0286
0287     /* Set up the (extended) next page */
0288     efx->phy_op->set_npage_adv(efx, efx->link_advertising);
0289
0290     /* Enable and restart AN */
0291     reg = ef4_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1);
0292     reg |= MDIO_AN_CTRL1_ENABLE | MDIO_AN_CTRL1_RESTART | MDIO_AN_CTRL1_XNP;
0293     ef4_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg);
0294 }
0295
0296 u8 ef4_mdio_get_pause(struct ef4_nic *efx)
0297 {
0298     BUILD_BUG_ON(EF4_FC_AUTO & (EF4_FC_RX | EF4_FC_TX));
0299
0300     if (!(efx->wanted_fc & EF4_FC_AUTO))
0301         return efx->wanted_fc;
0302
0303     WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));
0304
0305     return mii_resolve_flowctrl_fdx(
0306         mii_advertise_flowctrl(efx->wanted_fc),
0307         ef4_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA));
0308 }
0309
0310 int ef4_mdio_test_alive(struct ef4_nic *efx)
0311 {
0312     int rc;
0313     int devad = __ffs(efx->mdio.mmds);
0314     u16 physid1, physid2;
0315
0316     mutex_lock(&efx->mac_lock);
0317
0318     physid1 = ef4_mdio_read(efx, devad, MDIO_DEVID1);
0319     physid2 = ef4_mdio_read(efx, devad, MDIO_DEVID2);
0320
0321     if ((physid1 == 0x0000) || (physid1 == 0xffff) ||
0322         (physid2 == 0x0000) || (physid2 == 0xffff)) {
0323         netif_err(efx, hw, efx->net_dev,
0324               "no MDIO PHY present with ID %d\n", efx->mdio.prtad);
0325         rc = -EINVAL;
0326     } else {
0327         rc = ef4_mdio_check_mmds(efx, efx->mdio.mmds);
0328     }
0329
0330     mutex_unlock(&efx->mac_lock);
0331     return rc;
0332 }