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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /****************************************************************************
0003  * Driver for Solarflare network controllers and boards
0004  * Copyright 2007-2012 Solarflare Communications Inc.
0005  */
0006 
0007 #include <linux/rtnetlink.h>
0008 
0009 #include "net_driver.h"
0010 #include "phy.h"
0011 #include "efx.h"
0012 #include "nic.h"
0013 #include "workarounds.h"
0014 
0015 /* Macros for unpacking the board revision */
0016 /* The revision info is in host byte order. */
0017 #define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
0018 #define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
0019 #define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
0020 
0021 /* Board types */
0022 #define FALCON_BOARD_SFE4001 0x01
0023 #define FALCON_BOARD_SFE4002 0x02
0024 #define FALCON_BOARD_SFE4003 0x03
0025 #define FALCON_BOARD_SFN4112F 0x52
0026 
0027 /* Board temperature is about 15°C above ambient when air flow is
0028  * limited.  The maximum acceptable ambient temperature varies
0029  * depending on the PHY specifications but the critical temperature
0030  * above which we should shut down to avoid damage is 80°C. */
0031 #define FALCON_BOARD_TEMP_BIAS  15
0032 #define FALCON_BOARD_TEMP_CRIT  (80 + FALCON_BOARD_TEMP_BIAS)
0033 
0034 /* SFC4000 datasheet says: 'The maximum permitted junction temperature
0035  * is 125°C; the thermal design of the environment for the SFC4000
0036  * should aim to keep this well below 100°C.' */
0037 #define FALCON_JUNC_TEMP_MIN    0
0038 #define FALCON_JUNC_TEMP_MAX    90
0039 #define FALCON_JUNC_TEMP_CRIT   125
0040 
0041 /*****************************************************************************
0042  * Support for LM87 sensor chip used on several boards
0043  */
0044 #define LM87_REG_TEMP_HW_INT_LOCK   0x13
0045 #define LM87_REG_TEMP_HW_EXT_LOCK   0x14
0046 #define LM87_REG_TEMP_HW_INT        0x17
0047 #define LM87_REG_TEMP_HW_EXT        0x18
0048 #define LM87_REG_TEMP_EXT1      0x26
0049 #define LM87_REG_TEMP_INT       0x27
0050 #define LM87_REG_ALARMS1        0x41
0051 #define LM87_REG_ALARMS2        0x42
0052 #define LM87_IN_LIMITS(nr, _min, _max)          \
0053     0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
0054 #define LM87_AIN_LIMITS(nr, _min, _max)         \
0055     0x3B + (nr), _max, 0x1A + (nr), _min
0056 #define LM87_TEMP_INT_LIMITS(_min, _max)        \
0057     0x39, _max, 0x3A, _min
0058 #define LM87_TEMP_EXT1_LIMITS(_min, _max)       \
0059     0x37, _max, 0x38, _min
0060 
0061 #define LM87_ALARM_TEMP_INT     0x10
0062 #define LM87_ALARM_TEMP_EXT1        0x20
0063 
0064 #if IS_ENABLED(CONFIG_SENSORS_LM87)
0065 
0066 static int ef4_poke_lm87(struct i2c_client *client, const u8 *reg_values)
0067 {
0068     while (*reg_values) {
0069         u8 reg = *reg_values++;
0070         u8 value = *reg_values++;
0071         int rc = i2c_smbus_write_byte_data(client, reg, value);
0072         if (rc)
0073             return rc;
0074     }
0075     return 0;
0076 }
0077 
0078 static const u8 falcon_lm87_common_regs[] = {
0079     LM87_REG_TEMP_HW_INT_LOCK, FALCON_BOARD_TEMP_CRIT,
0080     LM87_REG_TEMP_HW_INT, FALCON_BOARD_TEMP_CRIT,
0081     LM87_TEMP_EXT1_LIMITS(FALCON_JUNC_TEMP_MIN, FALCON_JUNC_TEMP_MAX),
0082     LM87_REG_TEMP_HW_EXT_LOCK, FALCON_JUNC_TEMP_CRIT,
0083     LM87_REG_TEMP_HW_EXT, FALCON_JUNC_TEMP_CRIT,
0084     0
0085 };
0086 
0087 static int ef4_init_lm87(struct ef4_nic *efx, const struct i2c_board_info *info,
0088              const u8 *reg_values)
0089 {
0090     struct falcon_board *board = falcon_board(efx);
0091     struct i2c_client *client = i2c_new_client_device(&board->i2c_adap, info);
0092     int rc;
0093 
0094     if (IS_ERR(client))
0095         return PTR_ERR(client);
0096 
0097     /* Read-to-clear alarm/interrupt status */
0098     i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
0099     i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
0100 
0101     rc = ef4_poke_lm87(client, reg_values);
0102     if (rc)
0103         goto err;
0104     rc = ef4_poke_lm87(client, falcon_lm87_common_regs);
0105     if (rc)
0106         goto err;
0107 
0108     board->hwmon_client = client;
0109     return 0;
0110 
0111 err:
0112     i2c_unregister_device(client);
0113     return rc;
0114 }
0115 
0116 static void ef4_fini_lm87(struct ef4_nic *efx)
0117 {
0118     i2c_unregister_device(falcon_board(efx)->hwmon_client);
0119 }
0120 
0121 static int ef4_check_lm87(struct ef4_nic *efx, unsigned mask)
0122 {
0123     struct i2c_client *client = falcon_board(efx)->hwmon_client;
0124     bool temp_crit, elec_fault, is_failure;
0125     u16 alarms;
0126     s32 reg;
0127 
0128     /* If link is up then do not monitor temperature */
0129     if (EF4_WORKAROUND_7884(efx) && efx->link_state.up)
0130         return 0;
0131 
0132     reg = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
0133     if (reg < 0)
0134         return reg;
0135     alarms = reg;
0136     reg = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
0137     if (reg < 0)
0138         return reg;
0139     alarms |= reg << 8;
0140     alarms &= mask;
0141 
0142     temp_crit = false;
0143     if (alarms & LM87_ALARM_TEMP_INT) {
0144         reg = i2c_smbus_read_byte_data(client, LM87_REG_TEMP_INT);
0145         if (reg < 0)
0146             return reg;
0147         if (reg > FALCON_BOARD_TEMP_CRIT)
0148             temp_crit = true;
0149     }
0150     if (alarms & LM87_ALARM_TEMP_EXT1) {
0151         reg = i2c_smbus_read_byte_data(client, LM87_REG_TEMP_EXT1);
0152         if (reg < 0)
0153             return reg;
0154         if (reg > FALCON_JUNC_TEMP_CRIT)
0155             temp_crit = true;
0156     }
0157     elec_fault = alarms & ~(LM87_ALARM_TEMP_INT | LM87_ALARM_TEMP_EXT1);
0158     is_failure = temp_crit || elec_fault;
0159 
0160     if (alarms)
0161         netif_err(efx, hw, efx->net_dev,
0162               "LM87 detected a hardware %s (status %02x:%02x)"
0163               "%s%s%s%s\n",
0164               is_failure ? "failure" : "problem",
0165               alarms & 0xff, alarms >> 8,
0166               (alarms & LM87_ALARM_TEMP_INT) ?
0167               "; board is overheating" : "",
0168               (alarms & LM87_ALARM_TEMP_EXT1) ?
0169               "; controller is overheating" : "",
0170               temp_crit ? "; reached critical temperature" : "",
0171               elec_fault ? "; electrical fault" : "");
0172 
0173     return is_failure ? -ERANGE : 0;
0174 }
0175 
0176 #else /* !CONFIG_SENSORS_LM87 */
0177 
0178 static inline int
0179 ef4_init_lm87(struct ef4_nic *efx, const struct i2c_board_info *info,
0180           const u8 *reg_values)
0181 {
0182     return 0;
0183 }
0184 static inline void ef4_fini_lm87(struct ef4_nic *efx)
0185 {
0186 }
0187 static inline int ef4_check_lm87(struct ef4_nic *efx, unsigned mask)
0188 {
0189     return 0;
0190 }
0191 
0192 #endif /* CONFIG_SENSORS_LM87 */
0193 
0194 /*****************************************************************************
0195  * Support for the SFE4001 NIC.
0196  *
0197  * The SFE4001 does not power-up fully at reset due to its high power
0198  * consumption.  We control its power via a PCA9539 I/O expander.
0199  * It also has a MAX6647 temperature monitor which we expose to
0200  * the lm90 driver.
0201  *
0202  * This also provides minimal support for reflashing the PHY, which is
0203  * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
0204  * On SFE4001 rev A2 and later this is connected to the 3V3X output of
0205  * the IO-expander.
0206  * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
0207  * exclusive with the network device being open.
0208  */
0209 
0210 /**************************************************************************
0211  * Support for I2C IO Expander device on SFE4001
0212  */
0213 #define PCA9539 0x74
0214 
0215 #define P0_IN 0x00
0216 #define P0_OUT 0x02
0217 #define P0_INVERT 0x04
0218 #define P0_CONFIG 0x06
0219 
0220 #define P0_EN_1V0X_LBN 0
0221 #define P0_EN_1V0X_WIDTH 1
0222 #define P0_EN_1V2_LBN 1
0223 #define P0_EN_1V2_WIDTH 1
0224 #define P0_EN_2V5_LBN 2
0225 #define P0_EN_2V5_WIDTH 1
0226 #define P0_EN_3V3X_LBN 3
0227 #define P0_EN_3V3X_WIDTH 1
0228 #define P0_EN_5V_LBN 4
0229 #define P0_EN_5V_WIDTH 1
0230 #define P0_SHORTEN_JTAG_LBN 5
0231 #define P0_SHORTEN_JTAG_WIDTH 1
0232 #define P0_X_TRST_LBN 6
0233 #define P0_X_TRST_WIDTH 1
0234 #define P0_DSP_RESET_LBN 7
0235 #define P0_DSP_RESET_WIDTH 1
0236 
0237 #define P1_IN 0x01
0238 #define P1_OUT 0x03
0239 #define P1_INVERT 0x05
0240 #define P1_CONFIG 0x07
0241 
0242 #define P1_AFE_PWD_LBN 0
0243 #define P1_AFE_PWD_WIDTH 1
0244 #define P1_DSP_PWD25_LBN 1
0245 #define P1_DSP_PWD25_WIDTH 1
0246 #define P1_RESERVED_LBN 2
0247 #define P1_RESERVED_WIDTH 2
0248 #define P1_SPARE_LBN 4
0249 #define P1_SPARE_WIDTH 4
0250 
0251 /* Temperature Sensor */
0252 #define MAX664X_REG_RSL     0x02
0253 #define MAX664X_REG_WLHO    0x0B
0254 
0255 static void sfe4001_poweroff(struct ef4_nic *efx)
0256 {
0257     struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
0258     struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
0259 
0260     /* Turn off all power rails and disable outputs */
0261     i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
0262     i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
0263     i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
0264 
0265     /* Clear any over-temperature alert */
0266     i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
0267 }
0268 
0269 static int sfe4001_poweron(struct ef4_nic *efx)
0270 {
0271     struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
0272     struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
0273     unsigned int i, j;
0274     int rc;
0275     u8 out;
0276 
0277     /* Clear any previous over-temperature alert */
0278     rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
0279     if (rc < 0)
0280         return rc;
0281 
0282     /* Enable port 0 and port 1 outputs on IO expander */
0283     rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
0284     if (rc)
0285         return rc;
0286     rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
0287                        0xff & ~(1 << P1_SPARE_LBN));
0288     if (rc)
0289         goto fail_on;
0290 
0291     /* If PHY power is on, turn it all off and wait 1 second to
0292      * ensure a full reset.
0293      */
0294     rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
0295     if (rc < 0)
0296         goto fail_on;
0297     out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
0298                (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
0299                (0 << P0_EN_1V0X_LBN));
0300     if (rc != out) {
0301         netif_info(efx, hw, efx->net_dev, "power-cycling PHY\n");
0302         rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
0303         if (rc)
0304             goto fail_on;
0305         schedule_timeout_uninterruptible(HZ);
0306     }
0307 
0308     for (i = 0; i < 20; ++i) {
0309         /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
0310         out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
0311                    (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
0312                    (1 << P0_X_TRST_LBN));
0313         if (efx->phy_mode & PHY_MODE_SPECIAL)
0314             out |= 1 << P0_EN_3V3X_LBN;
0315 
0316         rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
0317         if (rc)
0318             goto fail_on;
0319         msleep(10);
0320 
0321         /* Turn on 1V power rail */
0322         out &= ~(1 << P0_EN_1V0X_LBN);
0323         rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
0324         if (rc)
0325             goto fail_on;
0326 
0327         netif_info(efx, hw, efx->net_dev,
0328                "waiting for DSP boot (attempt %d)...\n", i);
0329 
0330         /* In flash config mode, DSP does not turn on AFE, so
0331          * just wait 1 second.
0332          */
0333         if (efx->phy_mode & PHY_MODE_SPECIAL) {
0334             schedule_timeout_uninterruptible(HZ);
0335             return 0;
0336         }
0337 
0338         for (j = 0; j < 10; ++j) {
0339             msleep(100);
0340 
0341             /* Check DSP has asserted AFE power line */
0342             rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
0343             if (rc < 0)
0344                 goto fail_on;
0345             if (rc & (1 << P1_AFE_PWD_LBN))
0346                 return 0;
0347         }
0348     }
0349 
0350     netif_info(efx, hw, efx->net_dev, "timed out waiting for DSP boot\n");
0351     rc = -ETIMEDOUT;
0352 fail_on:
0353     sfe4001_poweroff(efx);
0354     return rc;
0355 }
0356 
0357 static ssize_t phy_flash_cfg_show(struct device *dev,
0358                   struct device_attribute *attr, char *buf)
0359 {
0360     struct ef4_nic *efx = dev_get_drvdata(dev);
0361     return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
0362 }
0363 
0364 static ssize_t phy_flash_cfg_store(struct device *dev,
0365                    struct device_attribute *attr,
0366                    const char *buf, size_t count)
0367 {
0368     struct ef4_nic *efx = dev_get_drvdata(dev);
0369     enum ef4_phy_mode old_mode, new_mode;
0370     int err;
0371 
0372     rtnl_lock();
0373     old_mode = efx->phy_mode;
0374     if (count == 0 || *buf == '0')
0375         new_mode = old_mode & ~PHY_MODE_SPECIAL;
0376     else
0377         new_mode = PHY_MODE_SPECIAL;
0378     if (!((old_mode ^ new_mode) & PHY_MODE_SPECIAL)) {
0379         err = 0;
0380     } else if (efx->state != STATE_READY || netif_running(efx->net_dev)) {
0381         err = -EBUSY;
0382     } else {
0383         /* Reset the PHY, reconfigure the MAC and enable/disable
0384          * MAC stats accordingly. */
0385         efx->phy_mode = new_mode;
0386         if (new_mode & PHY_MODE_SPECIAL)
0387             falcon_stop_nic_stats(efx);
0388         err = sfe4001_poweron(efx);
0389         if (!err)
0390             err = ef4_reconfigure_port(efx);
0391         if (!(new_mode & PHY_MODE_SPECIAL))
0392             falcon_start_nic_stats(efx);
0393     }
0394     rtnl_unlock();
0395 
0396     return err ? err : count;
0397 }
0398 
0399 static DEVICE_ATTR_RW(phy_flash_cfg);
0400 
0401 static void sfe4001_fini(struct ef4_nic *efx)
0402 {
0403     struct falcon_board *board = falcon_board(efx);
0404 
0405     netif_info(efx, drv, efx->net_dev, "%s\n", __func__);
0406 
0407     device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
0408     sfe4001_poweroff(efx);
0409     i2c_unregister_device(board->ioexp_client);
0410     i2c_unregister_device(board->hwmon_client);
0411 }
0412 
0413 static int sfe4001_check_hw(struct ef4_nic *efx)
0414 {
0415     struct falcon_nic_data *nic_data = efx->nic_data;
0416     s32 status;
0417 
0418     /* If XAUI link is up then do not monitor */
0419     if (EF4_WORKAROUND_7884(efx) && !nic_data->xmac_poll_required)
0420         return 0;
0421 
0422     /* Check the powered status of the PHY. Lack of power implies that
0423      * the MAX6647 has shut down power to it, probably due to a temp.
0424      * alarm. Reading the power status rather than the MAX6647 status
0425      * directly because the later is read-to-clear and would thus
0426      * start to power up the PHY again when polled, causing us to blip
0427      * the power undesirably.
0428      * We know we can read from the IO expander because we did
0429      * it during power-on. Assume failure now is bad news. */
0430     status = i2c_smbus_read_byte_data(falcon_board(efx)->ioexp_client, P1_IN);
0431     if (status >= 0 &&
0432         (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
0433         return 0;
0434 
0435     /* Use board power control, not PHY power control */
0436     sfe4001_poweroff(efx);
0437     efx->phy_mode = PHY_MODE_OFF;
0438 
0439     return (status < 0) ? -EIO : -ERANGE;
0440 }
0441 
0442 static const struct i2c_board_info sfe4001_hwmon_info = {
0443     I2C_BOARD_INFO("max6647", 0x4e),
0444 };
0445 
0446 /* This board uses an I2C expander to provider power to the PHY, which needs to
0447  * be turned on before the PHY can be used.
0448  * Context: Process context, rtnl lock held
0449  */
0450 static int sfe4001_init(struct ef4_nic *efx)
0451 {
0452     struct falcon_board *board = falcon_board(efx);
0453     int rc;
0454 
0455 #if IS_ENABLED(CONFIG_SENSORS_LM90)
0456     board->hwmon_client =
0457         i2c_new_client_device(&board->i2c_adap, &sfe4001_hwmon_info);
0458 #else
0459     board->hwmon_client =
0460         i2c_new_dummy_device(&board->i2c_adap, sfe4001_hwmon_info.addr);
0461 #endif
0462     if (IS_ERR(board->hwmon_client))
0463         return PTR_ERR(board->hwmon_client);
0464 
0465     /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
0466     rc = i2c_smbus_write_byte_data(board->hwmon_client,
0467                        MAX664X_REG_WLHO, 90);
0468     if (rc)
0469         goto fail_hwmon;
0470 
0471     board->ioexp_client = i2c_new_dummy_device(&board->i2c_adap, PCA9539);
0472     if (IS_ERR(board->ioexp_client)) {
0473         rc = PTR_ERR(board->ioexp_client);
0474         goto fail_hwmon;
0475     }
0476 
0477     if (efx->phy_mode & PHY_MODE_SPECIAL) {
0478         /* PHY won't generate a 156.25 MHz clock and MAC stats fetch
0479          * will fail. */
0480         falcon_stop_nic_stats(efx);
0481     }
0482     rc = sfe4001_poweron(efx);
0483     if (rc)
0484         goto fail_ioexp;
0485 
0486     rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
0487     if (rc)
0488         goto fail_on;
0489 
0490     netif_info(efx, hw, efx->net_dev, "PHY is powered on\n");
0491     return 0;
0492 
0493 fail_on:
0494     sfe4001_poweroff(efx);
0495 fail_ioexp:
0496     i2c_unregister_device(board->ioexp_client);
0497 fail_hwmon:
0498     i2c_unregister_device(board->hwmon_client);
0499     return rc;
0500 }
0501 
0502 /*****************************************************************************
0503  * Support for the SFE4002
0504  *
0505  */
0506 static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
0507 
0508 static const u8 sfe4002_lm87_regs[] = {
0509     LM87_IN_LIMITS(0, 0x7c, 0x99),      /* 2.5V:  1.8V +/- 10% */
0510     LM87_IN_LIMITS(1, 0x4c, 0x5e),      /* Vccp1: 1.2V +/- 10% */
0511     LM87_IN_LIMITS(2, 0xac, 0xd4),      /* 3.3V:  3.3V +/- 10% */
0512     LM87_IN_LIMITS(3, 0xac, 0xd4),      /* 5V:    5.0V +/- 10% */
0513     LM87_IN_LIMITS(4, 0xac, 0xe0),      /* 12V:   10.8-14V */
0514     LM87_IN_LIMITS(5, 0x3f, 0x4f),      /* Vccp2: 1.0V +/- 10% */
0515     LM87_AIN_LIMITS(0, 0x98, 0xbb),     /* AIN1:  1.66V +/- 10% */
0516     LM87_AIN_LIMITS(1, 0x8a, 0xa9),     /* AIN2:  1.5V +/- 10% */
0517     LM87_TEMP_INT_LIMITS(0, 80 + FALCON_BOARD_TEMP_BIAS),
0518     LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
0519     0
0520 };
0521 
0522 static const struct i2c_board_info sfe4002_hwmon_info = {
0523     I2C_BOARD_INFO("lm87", 0x2e),
0524     .platform_data  = &sfe4002_lm87_channel,
0525 };
0526 
0527 /****************************************************************************/
0528 /* LED allocations. Note that on rev A0 boards the schematic and the reality
0529  * differ: red and green are swapped. Below is the fixed (A1) layout (there
0530  * are only 3 A0 boards in existence, so no real reason to make this
0531  * conditional).
0532  */
0533 #define SFE4002_FAULT_LED (2)   /* Red */
0534 #define SFE4002_RX_LED    (0)   /* Green */
0535 #define SFE4002_TX_LED    (1)   /* Amber */
0536 
0537 static void sfe4002_init_phy(struct ef4_nic *efx)
0538 {
0539     /* Set the TX and RX LEDs to reflect status and activity, and the
0540      * fault LED off */
0541     falcon_qt202x_set_led(efx, SFE4002_TX_LED,
0542                   QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
0543     falcon_qt202x_set_led(efx, SFE4002_RX_LED,
0544                   QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
0545     falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
0546 }
0547 
0548 static void sfe4002_set_id_led(struct ef4_nic *efx, enum ef4_led_mode mode)
0549 {
0550     falcon_qt202x_set_led(
0551         efx, SFE4002_FAULT_LED,
0552         (mode == EF4_LED_ON) ? QUAKE_LED_ON : QUAKE_LED_OFF);
0553 }
0554 
0555 static int sfe4002_check_hw(struct ef4_nic *efx)
0556 {
0557     struct falcon_board *board = falcon_board(efx);
0558 
0559     /* A0 board rev. 4002s report a temperature fault the whole time
0560      * (bad sensor) so we mask it out. */
0561     unsigned alarm_mask =
0562         (board->major == 0 && board->minor == 0) ?
0563         ~LM87_ALARM_TEMP_EXT1 : ~0;
0564 
0565     return ef4_check_lm87(efx, alarm_mask);
0566 }
0567 
0568 static int sfe4002_init(struct ef4_nic *efx)
0569 {
0570     return ef4_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
0571 }
0572 
0573 /*****************************************************************************
0574  * Support for the SFN4112F
0575  *
0576  */
0577 static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
0578 
0579 static const u8 sfn4112f_lm87_regs[] = {
0580     LM87_IN_LIMITS(0, 0x7c, 0x99),      /* 2.5V:  1.8V +/- 10% */
0581     LM87_IN_LIMITS(1, 0x4c, 0x5e),      /* Vccp1: 1.2V +/- 10% */
0582     LM87_IN_LIMITS(2, 0xac, 0xd4),      /* 3.3V:  3.3V +/- 10% */
0583     LM87_IN_LIMITS(4, 0xac, 0xe0),      /* 12V:   10.8-14V */
0584     LM87_IN_LIMITS(5, 0x3f, 0x4f),      /* Vccp2: 1.0V +/- 10% */
0585     LM87_AIN_LIMITS(1, 0x8a, 0xa9),     /* AIN2:  1.5V +/- 10% */
0586     LM87_TEMP_INT_LIMITS(0, 60 + FALCON_BOARD_TEMP_BIAS),
0587     LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
0588     0
0589 };
0590 
0591 static const struct i2c_board_info sfn4112f_hwmon_info = {
0592     I2C_BOARD_INFO("lm87", 0x2e),
0593     .platform_data  = &sfn4112f_lm87_channel,
0594 };
0595 
0596 #define SFN4112F_ACT_LED    0
0597 #define SFN4112F_LINK_LED   1
0598 
0599 static void sfn4112f_init_phy(struct ef4_nic *efx)
0600 {
0601     falcon_qt202x_set_led(efx, SFN4112F_ACT_LED,
0602                   QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
0603     falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
0604                   QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
0605 }
0606 
0607 static void sfn4112f_set_id_led(struct ef4_nic *efx, enum ef4_led_mode mode)
0608 {
0609     int reg;
0610 
0611     switch (mode) {
0612     case EF4_LED_OFF:
0613         reg = QUAKE_LED_OFF;
0614         break;
0615     case EF4_LED_ON:
0616         reg = QUAKE_LED_ON;
0617         break;
0618     default:
0619         reg = QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT;
0620         break;
0621     }
0622 
0623     falcon_qt202x_set_led(efx, SFN4112F_LINK_LED, reg);
0624 }
0625 
0626 static int sfn4112f_check_hw(struct ef4_nic *efx)
0627 {
0628     /* Mask out unused sensors */
0629     return ef4_check_lm87(efx, ~0x48);
0630 }
0631 
0632 static int sfn4112f_init(struct ef4_nic *efx)
0633 {
0634     return ef4_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
0635 }
0636 
0637 /*****************************************************************************
0638  * Support for the SFE4003
0639  *
0640  */
0641 static u8 sfe4003_lm87_channel = 0x03; /* use AIN not FAN inputs */
0642 
0643 static const u8 sfe4003_lm87_regs[] = {
0644     LM87_IN_LIMITS(0, 0x67, 0x7f),      /* 2.5V:  1.5V +/- 10% */
0645     LM87_IN_LIMITS(1, 0x4c, 0x5e),      /* Vccp1: 1.2V +/- 10% */
0646     LM87_IN_LIMITS(2, 0xac, 0xd4),      /* 3.3V:  3.3V +/- 10% */
0647     LM87_IN_LIMITS(4, 0xac, 0xe0),      /* 12V:   10.8-14V */
0648     LM87_IN_LIMITS(5, 0x3f, 0x4f),      /* Vccp2: 1.0V +/- 10% */
0649     LM87_TEMP_INT_LIMITS(0, 70 + FALCON_BOARD_TEMP_BIAS),
0650     0
0651 };
0652 
0653 static const struct i2c_board_info sfe4003_hwmon_info = {
0654     I2C_BOARD_INFO("lm87", 0x2e),
0655     .platform_data  = &sfe4003_lm87_channel,
0656 };
0657 
0658 /* Board-specific LED info. */
0659 #define SFE4003_RED_LED_GPIO    11
0660 #define SFE4003_LED_ON      1
0661 #define SFE4003_LED_OFF     0
0662 
0663 static void sfe4003_set_id_led(struct ef4_nic *efx, enum ef4_led_mode mode)
0664 {
0665     struct falcon_board *board = falcon_board(efx);
0666 
0667     /* The LEDs were not wired to GPIOs before A3 */
0668     if (board->minor < 3 && board->major == 0)
0669         return;
0670 
0671     falcon_txc_set_gpio_val(
0672         efx, SFE4003_RED_LED_GPIO,
0673         (mode == EF4_LED_ON) ? SFE4003_LED_ON : SFE4003_LED_OFF);
0674 }
0675 
0676 static void sfe4003_init_phy(struct ef4_nic *efx)
0677 {
0678     struct falcon_board *board = falcon_board(efx);
0679 
0680     /* The LEDs were not wired to GPIOs before A3 */
0681     if (board->minor < 3 && board->major == 0)
0682         return;
0683 
0684     falcon_txc_set_gpio_dir(efx, SFE4003_RED_LED_GPIO, TXC_GPIO_DIR_OUTPUT);
0685     falcon_txc_set_gpio_val(efx, SFE4003_RED_LED_GPIO, SFE4003_LED_OFF);
0686 }
0687 
0688 static int sfe4003_check_hw(struct ef4_nic *efx)
0689 {
0690     struct falcon_board *board = falcon_board(efx);
0691 
0692     /* A0/A1/A2 board rev. 4003s  report a temperature fault the whole time
0693      * (bad sensor) so we mask it out. */
0694     unsigned alarm_mask =
0695         (board->major == 0 && board->minor <= 2) ?
0696         ~LM87_ALARM_TEMP_EXT1 : ~0;
0697 
0698     return ef4_check_lm87(efx, alarm_mask);
0699 }
0700 
0701 static int sfe4003_init(struct ef4_nic *efx)
0702 {
0703     return ef4_init_lm87(efx, &sfe4003_hwmon_info, sfe4003_lm87_regs);
0704 }
0705 
0706 static const struct falcon_board_type board_types[] = {
0707     {
0708         .id     = FALCON_BOARD_SFE4001,
0709         .init       = sfe4001_init,
0710         .init_phy   = ef4_port_dummy_op_void,
0711         .fini       = sfe4001_fini,
0712         .set_id_led = tenxpress_set_id_led,
0713         .monitor    = sfe4001_check_hw,
0714     },
0715     {
0716         .id     = FALCON_BOARD_SFE4002,
0717         .init       = sfe4002_init,
0718         .init_phy   = sfe4002_init_phy,
0719         .fini       = ef4_fini_lm87,
0720         .set_id_led = sfe4002_set_id_led,
0721         .monitor    = sfe4002_check_hw,
0722     },
0723     {
0724         .id     = FALCON_BOARD_SFE4003,
0725         .init       = sfe4003_init,
0726         .init_phy   = sfe4003_init_phy,
0727         .fini       = ef4_fini_lm87,
0728         .set_id_led = sfe4003_set_id_led,
0729         .monitor    = sfe4003_check_hw,
0730     },
0731     {
0732         .id     = FALCON_BOARD_SFN4112F,
0733         .init       = sfn4112f_init,
0734         .init_phy   = sfn4112f_init_phy,
0735         .fini       = ef4_fini_lm87,
0736         .set_id_led = sfn4112f_set_id_led,
0737         .monitor    = sfn4112f_check_hw,
0738     },
0739 };
0740 
0741 int falcon_probe_board(struct ef4_nic *efx, u16 revision_info)
0742 {
0743     struct falcon_board *board = falcon_board(efx);
0744     u8 type_id = FALCON_BOARD_TYPE(revision_info);
0745     int i;
0746 
0747     board->major = FALCON_BOARD_MAJOR(revision_info);
0748     board->minor = FALCON_BOARD_MINOR(revision_info);
0749 
0750     for (i = 0; i < ARRAY_SIZE(board_types); i++)
0751         if (board_types[i].id == type_id)
0752             board->type = &board_types[i];
0753 
0754     if (board->type) {
0755         return 0;
0756     } else {
0757         netif_err(efx, probe, efx->net_dev, "unknown board type %d\n",
0758               type_id);
0759         return -ENODEV;
0760     }
0761 }
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