ethernet/sfc/ef100_nic.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /****************************************************************************
0003  * Driver for Solarflare network controllers and boards
0004  * Copyright 2018 Solarflare Communications Inc.
0005  * Copyright 2019-2020 Xilinx Inc.
0006  *
0007  * This program is free software; you can redistribute it and/or modify it
0008  * under the terms of the GNU General Public License version 2 as published
0009  * by the Free Software Foundation, incorporated herein by reference.
0010  */
0011 #ifndef EFX_EF100_NIC_H
0012 #define EFX_EF100_NIC_H
0013
0014 #include "net_driver.h"
0015 #include "nic_common.h"
0016
0017 extern const struct efx_nic_type ef100_pf_nic_type;
0018 extern const struct efx_nic_type ef100_vf_nic_type;
0019
0020 int ef100_probe_netdev_pf(struct efx_nic *efx);
0021 int ef100_probe_vf(struct efx_nic *efx);
0022 void ef100_remove(struct efx_nic *efx);
0023
0024 enum {
0025     EF100_STAT_port_tx_bytes = GENERIC_STAT_COUNT,
0026     EF100_STAT_port_tx_packets,
0027     EF100_STAT_port_tx_pause,
0028     EF100_STAT_port_tx_unicast,
0029     EF100_STAT_port_tx_multicast,
0030     EF100_STAT_port_tx_broadcast,
0031     EF100_STAT_port_tx_lt64,
0032     EF100_STAT_port_tx_64,
0033     EF100_STAT_port_tx_65_to_127,
0034     EF100_STAT_port_tx_128_to_255,
0035     EF100_STAT_port_tx_256_to_511,
0036     EF100_STAT_port_tx_512_to_1023,
0037     EF100_STAT_port_tx_1024_to_15xx,
0038     EF100_STAT_port_tx_15xx_to_jumbo,
0039     EF100_STAT_port_rx_bytes,
0040     EF100_STAT_port_rx_packets,
0041     EF100_STAT_port_rx_good,
0042     EF100_STAT_port_rx_bad,
0043     EF100_STAT_port_rx_pause,
0044     EF100_STAT_port_rx_unicast,
0045     EF100_STAT_port_rx_multicast,
0046     EF100_STAT_port_rx_broadcast,
0047     EF100_STAT_port_rx_lt64,
0048     EF100_STAT_port_rx_64,
0049     EF100_STAT_port_rx_65_to_127,
0050     EF100_STAT_port_rx_128_to_255,
0051     EF100_STAT_port_rx_256_to_511,
0052     EF100_STAT_port_rx_512_to_1023,
0053     EF100_STAT_port_rx_1024_to_15xx,
0054     EF100_STAT_port_rx_15xx_to_jumbo,
0055     EF100_STAT_port_rx_gtjumbo,
0056     EF100_STAT_port_rx_bad_gtjumbo,
0057     EF100_STAT_port_rx_align_error,
0058     EF100_STAT_port_rx_length_error,
0059     EF100_STAT_port_rx_overflow,
0060     EF100_STAT_port_rx_nodesc_drops,
0061     EF100_STAT_COUNT
0062 };
0063
0064 struct ef100_nic_data {
0065     struct efx_nic *efx;
0066     struct efx_buffer mcdi_buf;
0067     u32 datapath_caps;
0068     u32 datapath_caps2;
0069     u32 datapath_caps3;
0070     unsigned int pf_index;
0071     u16 warm_boot_count;
0072     u8 port_id[ETH_ALEN];
0073     DECLARE_BITMAP(evq_phases, EFX_MAX_CHANNELS);
0074     u64 stats[EF100_STAT_COUNT];
0075     u32 base_mport;
0076     bool have_mport; /* base_mport was populated successfully */
0077     bool grp_mae; /* MAE Privilege */
0078     u16 tso_max_hdr_len;
0079     u16 tso_max_payload_num_segs;
0080     u16 tso_max_frames;
0081     unsigned int tso_max_payload_len;
0082 };
0083
0084 #define efx_ef100_has_cap(caps, flag) \
0085     (!!((caps) & BIT_ULL(MC_CMD_GET_CAPABILITIES_V4_OUT_ ## flag ## _LBN)))
0086
0087 int efx_ef100_init_datapath_caps(struct efx_nic *efx);
0088 int ef100_phy_probe(struct efx_nic *efx);
0089 int ef100_filter_table_probe(struct efx_nic *efx);
0090
0091 #endif  /* EFX_EF100_NIC_H */