ethernet/rocker/rocker_hw.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * drivers/net/ethernet/rocker/rocker_hw.h - Rocker switch device driver
0004  * Copyright (c) 2014-2016 Jiri Pirko <jiri@mellanox.com>
0005  * Copyright (c) 2014 Scott Feldman <sfeldma@gmail.com>
0006  */
0007
0008 #ifndef _ROCKER_HW_H
0009 #define _ROCKER_HW_H
0010
0011 #include <linux/types.h>
0012
0013 /* Return codes */
0014 enum {
0015     ROCKER_OK = 0,
0016     ROCKER_ENOENT = 2,
0017     ROCKER_ENXIO = 6,
0018     ROCKER_ENOMEM = 12,
0019     ROCKER_EEXIST = 17,
0020     ROCKER_EINVAL = 22,
0021     ROCKER_EMSGSIZE = 90,
0022     ROCKER_ENOTSUP = 95,
0023     ROCKER_ENOBUFS = 105,
0024 };
0025
0026 #define ROCKER_FP_PORTS_MAX 62
0027
0028 #define PCI_DEVICE_ID_REDHAT_ROCKER 0x0006
0029
0030 #define ROCKER_PCI_BAR0_SIZE        0x2000
0031
0032 /* MSI-X vectors */
0033 enum {
0034     ROCKER_MSIX_VEC_CMD,
0035     ROCKER_MSIX_VEC_EVENT,
0036     ROCKER_MSIX_VEC_TEST,
0037     ROCKER_MSIX_VEC_RESERVED0,
0038     __ROCKER_MSIX_VEC_TX,
0039     __ROCKER_MSIX_VEC_RX,
0040 #define ROCKER_MSIX_VEC_TX(port) \
0041     (__ROCKER_MSIX_VEC_TX + ((port) * 2))
0042 #define ROCKER_MSIX_VEC_RX(port) \
0043     (__ROCKER_MSIX_VEC_RX + ((port) * 2))
0044 #define ROCKER_MSIX_VEC_COUNT(portcnt) \
0045     (ROCKER_MSIX_VEC_RX((portcnt - 1)) + 1)
0046 };
0047
0048 /* Rocker bogus registers */
0049 #define ROCKER_BOGUS_REG0       0x0000
0050 #define ROCKER_BOGUS_REG1       0x0004
0051 #define ROCKER_BOGUS_REG2       0x0008
0052 #define ROCKER_BOGUS_REG3       0x000c
0053
0054 /* Rocker test registers */
0055 #define ROCKER_TEST_REG         0x0010
0056 #define ROCKER_TEST_REG64       0x0018  /* 8-byte */
0057 #define ROCKER_TEST_IRQ         0x0020
0058 #define ROCKER_TEST_DMA_ADDR        0x0028  /* 8-byte */
0059 #define ROCKER_TEST_DMA_SIZE        0x0030
0060 #define ROCKER_TEST_DMA_CTRL        0x0034
0061
0062 /* Rocker test register ctrl */
0063 #define ROCKER_TEST_DMA_CTRL_CLEAR  BIT(0)
0064 #define ROCKER_TEST_DMA_CTRL_FILL   BIT(1)
0065 #define ROCKER_TEST_DMA_CTRL_INVERT BIT(2)
0066
0067 /* Rocker DMA ring register offsets */
0068 #define ROCKER_DMA_DESC_ADDR(x)     (0x1000 + (x) * 32)  /* 8-byte */
0069 #define ROCKER_DMA_DESC_SIZE(x)     (0x1008 + (x) * 32)
0070 #define ROCKER_DMA_DESC_HEAD(x)     (0x100c + (x) * 32)
0071 #define ROCKER_DMA_DESC_TAIL(x)     (0x1010 + (x) * 32)
0072 #define ROCKER_DMA_DESC_CTRL(x)     (0x1014 + (x) * 32)
0073 #define ROCKER_DMA_DESC_CREDITS(x)  (0x1018 + (x) * 32)
0074 #define ROCKER_DMA_DESC_RES1(x)     (0x101c + (x) * 32)
0075
0076 /* Rocker dma ctrl register bits */
0077 #define ROCKER_DMA_DESC_CTRL_RESET  BIT(0)
0078
0079 /* Rocker DMA ring types */
0080 enum rocker_dma_type {
0081     ROCKER_DMA_CMD,
0082     ROCKER_DMA_EVENT,
0083     __ROCKER_DMA_TX,
0084     __ROCKER_DMA_RX,
0085 #define ROCKER_DMA_TX(port) (__ROCKER_DMA_TX + (port) * 2)
0086 #define ROCKER_DMA_RX(port) (__ROCKER_DMA_RX + (port) * 2)
0087 };
0088
0089 /* Rocker DMA ring size limits and default sizes */
0090 #define ROCKER_DMA_SIZE_MIN     2ul
0091 #define ROCKER_DMA_SIZE_MAX     65536ul
0092 #define ROCKER_DMA_CMD_DEFAULT_SIZE 32ul
0093 #define ROCKER_DMA_EVENT_DEFAULT_SIZE   32ul
0094 #define ROCKER_DMA_TX_DEFAULT_SIZE  64ul
0095 #define ROCKER_DMA_TX_DESC_SIZE     256
0096 #define ROCKER_DMA_RX_DEFAULT_SIZE  64ul
0097 #define ROCKER_DMA_RX_DESC_SIZE     256
0098
0099 /* Rocker DMA descriptor struct */
0100 struct rocker_desc {
0101     u64 buf_addr;
0102     u64 cookie;
0103     u16 buf_size;
0104     u16 tlv_size;
0105     u16 resv[5];
0106     u16 comp_err;
0107 };
0108
0109 #define ROCKER_DMA_DESC_COMP_ERR_GEN    BIT(15)
0110
0111 /* Rocker DMA TLV struct */
0112 struct rocker_tlv {
0113     u32 type;
0114     u16 len;
0115 };
0116
0117 /* TLVs */
0118 enum {
0119     ROCKER_TLV_CMD_UNSPEC,
0120     ROCKER_TLV_CMD_TYPE,    /* u16 */
0121     ROCKER_TLV_CMD_INFO,    /* nest */
0122
0123     __ROCKER_TLV_CMD_MAX,
0124     ROCKER_TLV_CMD_MAX = __ROCKER_TLV_CMD_MAX - 1,
0125 };
0126
0127 enum {
0128     ROCKER_TLV_CMD_TYPE_UNSPEC,
0129     ROCKER_TLV_CMD_TYPE_GET_PORT_SETTINGS,
0130     ROCKER_TLV_CMD_TYPE_SET_PORT_SETTINGS,
0131     ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_ADD,
0132     ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_MOD,
0133     ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_DEL,
0134     ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_GET_STATS,
0135     ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_ADD,
0136     ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_MOD,
0137     ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_DEL,
0138     ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_GET_STATS,
0139
0140     ROCKER_TLV_CMD_TYPE_CLEAR_PORT_STATS,
0141     ROCKER_TLV_CMD_TYPE_GET_PORT_STATS,
0142
0143     __ROCKER_TLV_CMD_TYPE_MAX,
0144     ROCKER_TLV_CMD_TYPE_MAX = __ROCKER_TLV_CMD_TYPE_MAX - 1,
0145 };
0146
0147 enum {
0148     ROCKER_TLV_CMD_PORT_SETTINGS_UNSPEC,
0149     ROCKER_TLV_CMD_PORT_SETTINGS_PPORT,     /* u32 */
0150     ROCKER_TLV_CMD_PORT_SETTINGS_SPEED,     /* u32 */
0151     ROCKER_TLV_CMD_PORT_SETTINGS_DUPLEX,        /* u8 */
0152     ROCKER_TLV_CMD_PORT_SETTINGS_AUTONEG,       /* u8 */
0153     ROCKER_TLV_CMD_PORT_SETTINGS_MACADDR,       /* binary */
0154     ROCKER_TLV_CMD_PORT_SETTINGS_MODE,      /* u8 */
0155     ROCKER_TLV_CMD_PORT_SETTINGS_LEARNING,      /* u8 */
0156     ROCKER_TLV_CMD_PORT_SETTINGS_PHYS_NAME,     /* binary */
0157     ROCKER_TLV_CMD_PORT_SETTINGS_MTU,       /* u16 */
0158
0159     __ROCKER_TLV_CMD_PORT_SETTINGS_MAX,
0160     ROCKER_TLV_CMD_PORT_SETTINGS_MAX =
0161             __ROCKER_TLV_CMD_PORT_SETTINGS_MAX - 1,
0162 };
0163
0164 enum {
0165     ROCKER_TLV_CMD_PORT_STATS_UNSPEC,
0166     ROCKER_TLV_CMD_PORT_STATS_PPORT,            /* u32 */
0167
0168     ROCKER_TLV_CMD_PORT_STATS_RX_PKTS,          /* u64 */
0169     ROCKER_TLV_CMD_PORT_STATS_RX_BYTES,         /* u64 */
0170     ROCKER_TLV_CMD_PORT_STATS_RX_DROPPED,       /* u64 */
0171     ROCKER_TLV_CMD_PORT_STATS_RX_ERRORS,        /* u64 */
0172
0173     ROCKER_TLV_CMD_PORT_STATS_TX_PKTS,          /* u64 */
0174     ROCKER_TLV_CMD_PORT_STATS_TX_BYTES,         /* u64 */
0175     ROCKER_TLV_CMD_PORT_STATS_TX_DROPPED,       /* u64 */
0176     ROCKER_TLV_CMD_PORT_STATS_TX_ERRORS,        /* u64 */
0177
0178     __ROCKER_TLV_CMD_PORT_STATS_MAX,
0179     ROCKER_TLV_CMD_PORT_STATS_MAX = __ROCKER_TLV_CMD_PORT_STATS_MAX - 1,
0180 };
0181
0182 enum rocker_port_mode {
0183     ROCKER_PORT_MODE_OF_DPA,
0184 };
0185
0186 enum {
0187     ROCKER_TLV_EVENT_UNSPEC,
0188     ROCKER_TLV_EVENT_TYPE,  /* u16 */
0189     ROCKER_TLV_EVENT_INFO,  /* nest */
0190
0191     __ROCKER_TLV_EVENT_MAX,
0192     ROCKER_TLV_EVENT_MAX = __ROCKER_TLV_EVENT_MAX - 1,
0193 };
0194
0195 enum {
0196     ROCKER_TLV_EVENT_TYPE_UNSPEC,
0197     ROCKER_TLV_EVENT_TYPE_LINK_CHANGED,
0198     ROCKER_TLV_EVENT_TYPE_MAC_VLAN_SEEN,
0199
0200     __ROCKER_TLV_EVENT_TYPE_MAX,
0201     ROCKER_TLV_EVENT_TYPE_MAX = __ROCKER_TLV_EVENT_TYPE_MAX - 1,
0202 };
0203
0204 enum {
0205     ROCKER_TLV_EVENT_LINK_CHANGED_UNSPEC,
0206     ROCKER_TLV_EVENT_LINK_CHANGED_PPORT,    /* u32 */
0207     ROCKER_TLV_EVENT_LINK_CHANGED_LINKUP,   /* u8 */
0208
0209     __ROCKER_TLV_EVENT_LINK_CHANGED_MAX,
0210     ROCKER_TLV_EVENT_LINK_CHANGED_MAX =
0211             __ROCKER_TLV_EVENT_LINK_CHANGED_MAX - 1,
0212 };
0213
0214 enum {
0215     ROCKER_TLV_EVENT_MAC_VLAN_UNSPEC,
0216     ROCKER_TLV_EVENT_MAC_VLAN_PPORT,    /* u32 */
0217     ROCKER_TLV_EVENT_MAC_VLAN_MAC,      /* binary */
0218     ROCKER_TLV_EVENT_MAC_VLAN_VLAN_ID,  /* __be16 */
0219
0220     __ROCKER_TLV_EVENT_MAC_VLAN_MAX,
0221     ROCKER_TLV_EVENT_MAC_VLAN_MAX = __ROCKER_TLV_EVENT_MAC_VLAN_MAX - 1,
0222 };
0223
0224 enum {
0225     ROCKER_TLV_RX_UNSPEC,
0226     ROCKER_TLV_RX_FLAGS,        /* u16, see ROCKER_RX_FLAGS_ */
0227     ROCKER_TLV_RX_CSUM,     /* u16 */
0228     ROCKER_TLV_RX_FRAG_ADDR,    /* u64 */
0229     ROCKER_TLV_RX_FRAG_MAX_LEN, /* u16 */
0230     ROCKER_TLV_RX_FRAG_LEN,     /* u16 */
0231
0232     __ROCKER_TLV_RX_MAX,
0233     ROCKER_TLV_RX_MAX = __ROCKER_TLV_RX_MAX - 1,
0234 };
0235
0236 #define ROCKER_RX_FLAGS_IPV4            BIT(0)
0237 #define ROCKER_RX_FLAGS_IPV6            BIT(1)
0238 #define ROCKER_RX_FLAGS_CSUM_CALC       BIT(2)
0239 #define ROCKER_RX_FLAGS_IPV4_CSUM_GOOD      BIT(3)
0240 #define ROCKER_RX_FLAGS_IP_FRAG         BIT(4)
0241 #define ROCKER_RX_FLAGS_TCP         BIT(5)
0242 #define ROCKER_RX_FLAGS_UDP         BIT(6)
0243 #define ROCKER_RX_FLAGS_TCP_UDP_CSUM_GOOD   BIT(7)
0244 #define ROCKER_RX_FLAGS_FWD_OFFLOAD     BIT(8)
0245
0246 enum {
0247     ROCKER_TLV_TX_UNSPEC,
0248     ROCKER_TLV_TX_OFFLOAD,      /* u8, see ROCKER_TX_OFFLOAD_ */
0249     ROCKER_TLV_TX_L3_CSUM_OFF,  /* u16 */
0250     ROCKER_TLV_TX_TSO_MSS,      /* u16 */
0251     ROCKER_TLV_TX_TSO_HDR_LEN,  /* u16 */
0252     ROCKER_TLV_TX_FRAGS,        /* array */
0253
0254     __ROCKER_TLV_TX_MAX,
0255     ROCKER_TLV_TX_MAX = __ROCKER_TLV_TX_MAX - 1,
0256 };
0257
0258 #define ROCKER_TX_OFFLOAD_NONE      0
0259 #define ROCKER_TX_OFFLOAD_IP_CSUM   1
0260 #define ROCKER_TX_OFFLOAD_TCP_UDP_CSUM  2
0261 #define ROCKER_TX_OFFLOAD_L3_CSUM   3
0262 #define ROCKER_TX_OFFLOAD_TSO       4
0263
0264 #define ROCKER_TX_FRAGS_MAX     16
0265
0266 enum {
0267     ROCKER_TLV_TX_FRAG_UNSPEC,
0268     ROCKER_TLV_TX_FRAG,     /* nest */
0269
0270     __ROCKER_TLV_TX_FRAG_MAX,
0271     ROCKER_TLV_TX_FRAG_MAX = __ROCKER_TLV_TX_FRAG_MAX - 1,
0272 };
0273
0274 enum {
0275     ROCKER_TLV_TX_FRAG_ATTR_UNSPEC,
0276     ROCKER_TLV_TX_FRAG_ATTR_ADDR,   /* u64 */
0277     ROCKER_TLV_TX_FRAG_ATTR_LEN,    /* u16 */
0278
0279     __ROCKER_TLV_TX_FRAG_ATTR_MAX,
0280     ROCKER_TLV_TX_FRAG_ATTR_MAX = __ROCKER_TLV_TX_FRAG_ATTR_MAX - 1,
0281 };
0282
0283 /* cmd info nested for OF-DPA msgs */
0284 enum {
0285     ROCKER_TLV_OF_DPA_UNSPEC,
0286     ROCKER_TLV_OF_DPA_TABLE_ID,     /* u16 */
0287     ROCKER_TLV_OF_DPA_PRIORITY,     /* u32 */
0288     ROCKER_TLV_OF_DPA_HARDTIME,     /* u32 */
0289     ROCKER_TLV_OF_DPA_IDLETIME,     /* u32 */
0290     ROCKER_TLV_OF_DPA_COOKIE,       /* u64 */
0291     ROCKER_TLV_OF_DPA_IN_PPORT,     /* u32 */
0292     ROCKER_TLV_OF_DPA_IN_PPORT_MASK,    /* u32 */
0293     ROCKER_TLV_OF_DPA_OUT_PPORT,        /* u32 */
0294     ROCKER_TLV_OF_DPA_GOTO_TABLE_ID,    /* u16 */
0295     ROCKER_TLV_OF_DPA_GROUP_ID,     /* u32 */
0296     ROCKER_TLV_OF_DPA_GROUP_ID_LOWER,   /* u32 */
0297     ROCKER_TLV_OF_DPA_GROUP_COUNT,      /* u16 */
0298     ROCKER_TLV_OF_DPA_GROUP_IDS,        /* u32 array */
0299     ROCKER_TLV_OF_DPA_VLAN_ID,      /* __be16 */
0300     ROCKER_TLV_OF_DPA_VLAN_ID_MASK,     /* __be16 */
0301     ROCKER_TLV_OF_DPA_VLAN_PCP,     /* __be16 */
0302     ROCKER_TLV_OF_DPA_VLAN_PCP_MASK,    /* __be16 */
0303     ROCKER_TLV_OF_DPA_VLAN_PCP_ACTION,  /* u8 */
0304     ROCKER_TLV_OF_DPA_NEW_VLAN_ID,      /* __be16 */
0305     ROCKER_TLV_OF_DPA_NEW_VLAN_PCP,     /* u8 */
0306     ROCKER_TLV_OF_DPA_TUNNEL_ID,        /* u32 */
0307     ROCKER_TLV_OF_DPA_TUNNEL_LPORT,     /* u32 */
0308     ROCKER_TLV_OF_DPA_ETHERTYPE,        /* __be16 */
0309     ROCKER_TLV_OF_DPA_DST_MAC,      /* binary */
0310     ROCKER_TLV_OF_DPA_DST_MAC_MASK,     /* binary */
0311     ROCKER_TLV_OF_DPA_SRC_MAC,      /* binary */
0312     ROCKER_TLV_OF_DPA_SRC_MAC_MASK,     /* binary */
0313     ROCKER_TLV_OF_DPA_IP_PROTO,     /* u8 */
0314     ROCKER_TLV_OF_DPA_IP_PROTO_MASK,    /* u8 */
0315     ROCKER_TLV_OF_DPA_IP_DSCP,      /* u8 */
0316     ROCKER_TLV_OF_DPA_IP_DSCP_MASK,     /* u8 */
0317     ROCKER_TLV_OF_DPA_IP_DSCP_ACTION,   /* u8 */
0318     ROCKER_TLV_OF_DPA_NEW_IP_DSCP,      /* u8 */
0319     ROCKER_TLV_OF_DPA_IP_ECN,       /* u8 */
0320     ROCKER_TLV_OF_DPA_IP_ECN_MASK,      /* u8 */
0321     ROCKER_TLV_OF_DPA_DST_IP,       /* __be32 */
0322     ROCKER_TLV_OF_DPA_DST_IP_MASK,      /* __be32 */
0323     ROCKER_TLV_OF_DPA_SRC_IP,       /* __be32 */
0324     ROCKER_TLV_OF_DPA_SRC_IP_MASK,      /* __be32 */
0325     ROCKER_TLV_OF_DPA_DST_IPV6,     /* binary */
0326     ROCKER_TLV_OF_DPA_DST_IPV6_MASK,    /* binary */
0327     ROCKER_TLV_OF_DPA_SRC_IPV6,     /* binary */
0328     ROCKER_TLV_OF_DPA_SRC_IPV6_MASK,    /* binary */
0329     ROCKER_TLV_OF_DPA_SRC_ARP_IP,       /* __be32 */
0330     ROCKER_TLV_OF_DPA_SRC_ARP_IP_MASK,  /* __be32 */
0331     ROCKER_TLV_OF_DPA_L4_DST_PORT,      /* __be16 */
0332     ROCKER_TLV_OF_DPA_L4_DST_PORT_MASK, /* __be16 */
0333     ROCKER_TLV_OF_DPA_L4_SRC_PORT,      /* __be16 */
0334     ROCKER_TLV_OF_DPA_L4_SRC_PORT_MASK, /* __be16 */
0335     ROCKER_TLV_OF_DPA_ICMP_TYPE,        /* u8 */
0336     ROCKER_TLV_OF_DPA_ICMP_TYPE_MASK,   /* u8 */
0337     ROCKER_TLV_OF_DPA_ICMP_CODE,        /* u8 */
0338     ROCKER_TLV_OF_DPA_ICMP_CODE_MASK,   /* u8 */
0339     ROCKER_TLV_OF_DPA_IPV6_LABEL,       /* __be32 */
0340     ROCKER_TLV_OF_DPA_IPV6_LABEL_MASK,  /* __be32 */
0341     ROCKER_TLV_OF_DPA_QUEUE_ID_ACTION,  /* u8 */
0342     ROCKER_TLV_OF_DPA_NEW_QUEUE_ID,     /* u8 */
0343     ROCKER_TLV_OF_DPA_CLEAR_ACTIONS,    /* u32 */
0344     ROCKER_TLV_OF_DPA_POP_VLAN,     /* u8 */
0345     ROCKER_TLV_OF_DPA_TTL_CHECK,        /* u8 */
0346     ROCKER_TLV_OF_DPA_COPY_CPU_ACTION,  /* u8 */
0347
0348     __ROCKER_TLV_OF_DPA_MAX,
0349     ROCKER_TLV_OF_DPA_MAX = __ROCKER_TLV_OF_DPA_MAX - 1,
0350 };
0351
0352 /* OF-DPA table IDs */
0353
0354 enum rocker_of_dpa_table_id {
0355     ROCKER_OF_DPA_TABLE_ID_INGRESS_PORT = 0,
0356     ROCKER_OF_DPA_TABLE_ID_VLAN = 10,
0357     ROCKER_OF_DPA_TABLE_ID_TERMINATION_MAC = 20,
0358     ROCKER_OF_DPA_TABLE_ID_UNICAST_ROUTING = 30,
0359     ROCKER_OF_DPA_TABLE_ID_MULTICAST_ROUTING = 40,
0360     ROCKER_OF_DPA_TABLE_ID_BRIDGING = 50,
0361     ROCKER_OF_DPA_TABLE_ID_ACL_POLICY = 60,
0362 };
0363
0364 /* OF-DPA flow stats */
0365 enum {
0366     ROCKER_TLV_OF_DPA_FLOW_STAT_UNSPEC,
0367     ROCKER_TLV_OF_DPA_FLOW_STAT_DURATION,   /* u32 */
0368     ROCKER_TLV_OF_DPA_FLOW_STAT_RX_PKTS,    /* u64 */
0369     ROCKER_TLV_OF_DPA_FLOW_STAT_TX_PKTS,    /* u64 */
0370
0371     __ROCKER_TLV_OF_DPA_FLOW_STAT_MAX,
0372     ROCKER_TLV_OF_DPA_FLOW_STAT_MAX = __ROCKER_TLV_OF_DPA_FLOW_STAT_MAX - 1,
0373 };
0374
0375 /* OF-DPA group types */
0376 enum rocker_of_dpa_group_type {
0377     ROCKER_OF_DPA_GROUP_TYPE_L2_INTERFACE = 0,
0378     ROCKER_OF_DPA_GROUP_TYPE_L2_REWRITE,
0379     ROCKER_OF_DPA_GROUP_TYPE_L3_UCAST,
0380     ROCKER_OF_DPA_GROUP_TYPE_L2_MCAST,
0381     ROCKER_OF_DPA_GROUP_TYPE_L2_FLOOD,
0382     ROCKER_OF_DPA_GROUP_TYPE_L3_INTERFACE,
0383     ROCKER_OF_DPA_GROUP_TYPE_L3_MCAST,
0384     ROCKER_OF_DPA_GROUP_TYPE_L3_ECMP,
0385     ROCKER_OF_DPA_GROUP_TYPE_L2_OVERLAY,
0386 };
0387
0388 /* OF-DPA group L2 overlay types */
0389 enum rocker_of_dpa_overlay_type {
0390     ROCKER_OF_DPA_OVERLAY_TYPE_FLOOD_UCAST = 0,
0391     ROCKER_OF_DPA_OVERLAY_TYPE_FLOOD_MCAST,
0392     ROCKER_OF_DPA_OVERLAY_TYPE_MCAST_UCAST,
0393     ROCKER_OF_DPA_OVERLAY_TYPE_MCAST_MCAST,
0394 };
0395
0396 /* OF-DPA group ID encoding */
0397 #define ROCKER_GROUP_TYPE_SHIFT 28
0398 #define ROCKER_GROUP_TYPE_MASK 0xf0000000
0399 #define ROCKER_GROUP_VLAN_SHIFT 16
0400 #define ROCKER_GROUP_VLAN_MASK 0x0fff0000
0401 #define ROCKER_GROUP_PORT_SHIFT 0
0402 #define ROCKER_GROUP_PORT_MASK 0x0000ffff
0403 #define ROCKER_GROUP_TUNNEL_ID_SHIFT 12
0404 #define ROCKER_GROUP_TUNNEL_ID_MASK 0x0ffff000
0405 #define ROCKER_GROUP_SUBTYPE_SHIFT 10
0406 #define ROCKER_GROUP_SUBTYPE_MASK 0x00000c00
0407 #define ROCKER_GROUP_INDEX_SHIFT 0
0408 #define ROCKER_GROUP_INDEX_MASK 0x0000ffff
0409 #define ROCKER_GROUP_INDEX_LONG_SHIFT 0
0410 #define ROCKER_GROUP_INDEX_LONG_MASK 0x0fffffff
0411
0412 #define ROCKER_GROUP_TYPE_GET(group_id) \
0413     (((group_id) & ROCKER_GROUP_TYPE_MASK) >> ROCKER_GROUP_TYPE_SHIFT)
0414 #define ROCKER_GROUP_TYPE_SET(type) \
0415     (((type) << ROCKER_GROUP_TYPE_SHIFT) & ROCKER_GROUP_TYPE_MASK)
0416 #define ROCKER_GROUP_VLAN_GET(group_id) \
0417     (((group_id) & ROCKER_GROUP_VLAN_ID_MASK) >> ROCKER_GROUP_VLAN_ID_SHIFT)
0418 #define ROCKER_GROUP_VLAN_SET(vlan_id) \
0419     (((vlan_id) << ROCKER_GROUP_VLAN_SHIFT) & ROCKER_GROUP_VLAN_MASK)
0420 #define ROCKER_GROUP_PORT_GET(group_id) \
0421     (((group_id) & ROCKER_GROUP_PORT_MASK) >> ROCKER_GROUP_PORT_SHIFT)
0422 #define ROCKER_GROUP_PORT_SET(port) \
0423     (((port) << ROCKER_GROUP_PORT_SHIFT) & ROCKER_GROUP_PORT_MASK)
0424 #define ROCKER_GROUP_INDEX_GET(group_id) \
0425     (((group_id) & ROCKER_GROUP_INDEX_MASK) >> ROCKER_GROUP_INDEX_SHIFT)
0426 #define ROCKER_GROUP_INDEX_SET(index) \
0427     (((index) << ROCKER_GROUP_INDEX_SHIFT) & ROCKER_GROUP_INDEX_MASK)
0428 #define ROCKER_GROUP_INDEX_LONG_GET(group_id) \
0429     (((group_id) & ROCKER_GROUP_INDEX_LONG_MASK) >> \
0430      ROCKER_GROUP_INDEX_LONG_SHIFT)
0431 #define ROCKER_GROUP_INDEX_LONG_SET(index) \
0432     (((index) << ROCKER_GROUP_INDEX_LONG_SHIFT) & \
0433      ROCKER_GROUP_INDEX_LONG_MASK)
0434
0435 #define ROCKER_GROUP_NONE 0
0436 #define ROCKER_GROUP_L2_INTERFACE(vlan_id, port) \
0437     (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_INTERFACE) |\
0438      ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_PORT_SET(port))
0439 #define ROCKER_GROUP_L2_REWRITE(index) \
0440     (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_REWRITE) |\
0441      ROCKER_GROUP_INDEX_LONG_SET(index))
0442 #define ROCKER_GROUP_L2_MCAST(vlan_id, index) \
0443     (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_MCAST) |\
0444      ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_INDEX_SET(index))
0445 #define ROCKER_GROUP_L2_FLOOD(vlan_id, index) \
0446     (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_FLOOD) |\
0447     ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_INDEX_SET(index))
0448 #define ROCKER_GROUP_L3_UNICAST(index) \
0449     (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L3_UCAST) |\
0450      ROCKER_GROUP_INDEX_LONG_SET(index))
0451
0452 /* Rocker general purpose registers */
0453 #define ROCKER_CONTROL          0x0300
0454 #define ROCKER_PORT_PHYS_COUNT      0x0304
0455 #define ROCKER_PORT_PHYS_LINK_STATUS    0x0310 /* 8-byte */
0456 #define ROCKER_PORT_PHYS_ENABLE     0x0318 /* 8-byte */
0457 #define ROCKER_SWITCH_ID        0x0320 /* 8-byte */
0458
0459 /* Rocker control bits */
0460 #define ROCKER_CONTROL_RESET        BIT(0)
0461
0462 #endif