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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
0003  */
0004 
0005 /* Qualcomm Technologies, Inc. EMAC Gigabit Ethernet Driver */
0006 
0007 #include <linux/if_ether.h>
0008 #include <linux/if_vlan.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/io.h>
0011 #include <linux/module.h>
0012 #include <linux/of.h>
0013 #include <linux/of_net.h>
0014 #include <linux/of_device.h>
0015 #include <linux/phy.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/acpi.h>
0018 #include "emac.h"
0019 #include "emac-mac.h"
0020 #include "emac-phy.h"
0021 #include "emac-sgmii.h"
0022 
0023 #define EMAC_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK |  \
0024         NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
0025 
0026 #define EMAC_RRD_SIZE                        4
0027 /* The RRD size if timestamping is enabled: */
0028 #define EMAC_TS_RRD_SIZE                     6
0029 #define EMAC_TPD_SIZE                        4
0030 #define EMAC_RFD_SIZE                        2
0031 
0032 #define REG_MAC_RX_STATUS_BIN        EMAC_RXMAC_STATC_REG0
0033 #define REG_MAC_RX_STATUS_END       EMAC_RXMAC_STATC_REG22
0034 #define REG_MAC_TX_STATUS_BIN        EMAC_TXMAC_STATC_REG0
0035 #define REG_MAC_TX_STATUS_END       EMAC_TXMAC_STATC_REG24
0036 
0037 #define RXQ0_NUM_RFD_PREF_DEF                    8
0038 #define TXQ0_NUM_TPD_PREF_DEF                    5
0039 
0040 #define EMAC_PREAMBLE_DEF                    7
0041 
0042 #define DMAR_DLY_CNT_DEF                    15
0043 #define DMAW_DLY_CNT_DEF                     4
0044 
0045 #define IMR_NORMAL_MASK     (ISR_ERROR | ISR_OVER | ISR_TX_PKT)
0046 
0047 #define ISR_TX_PKT      (\
0048     TX_PKT_INT      |\
0049     TX_PKT_INT1     |\
0050     TX_PKT_INT2     |\
0051     TX_PKT_INT3)
0052 
0053 #define ISR_OVER        (\
0054     RFD0_UR_INT     |\
0055     RFD1_UR_INT     |\
0056     RFD2_UR_INT     |\
0057     RFD3_UR_INT     |\
0058     RFD4_UR_INT     |\
0059     RXF_OF_INT      |\
0060     TXF_UR_INT)
0061 
0062 #define ISR_ERROR       (\
0063     DMAR_TO_INT     |\
0064     DMAW_TO_INT     |\
0065     TXQ_TO_INT)
0066 
0067 /* in sync with enum emac_clk_id */
0068 static const char * const emac_clk_name[] = {
0069     "axi_clk", "cfg_ahb_clk", "high_speed_clk", "mdio_clk", "tx_clk",
0070     "rx_clk", "sys_clk"
0071 };
0072 
0073 void emac_reg_update32(void __iomem *addr, u32 mask, u32 val)
0074 {
0075     u32 data = readl(addr);
0076 
0077     writel(((data & ~mask) | val), addr);
0078 }
0079 
0080 /* reinitialize */
0081 int emac_reinit_locked(struct emac_adapter *adpt)
0082 {
0083     int ret;
0084 
0085     mutex_lock(&adpt->reset_lock);
0086 
0087     emac_mac_down(adpt);
0088     emac_sgmii_reset(adpt);
0089     ret = emac_mac_up(adpt);
0090 
0091     mutex_unlock(&adpt->reset_lock);
0092 
0093     return ret;
0094 }
0095 
0096 /* NAPI */
0097 static int emac_napi_rtx(struct napi_struct *napi, int budget)
0098 {
0099     struct emac_rx_queue *rx_q =
0100         container_of(napi, struct emac_rx_queue, napi);
0101     struct emac_adapter *adpt = netdev_priv(rx_q->netdev);
0102     struct emac_irq *irq = rx_q->irq;
0103     int work_done = 0;
0104 
0105     emac_mac_rx_process(adpt, rx_q, &work_done, budget);
0106 
0107     if (work_done < budget) {
0108         napi_complete_done(napi, work_done);
0109 
0110         irq->mask |= rx_q->intr;
0111         writel(irq->mask, adpt->base + EMAC_INT_MASK);
0112     }
0113 
0114     return work_done;
0115 }
0116 
0117 /* Transmit the packet */
0118 static netdev_tx_t emac_start_xmit(struct sk_buff *skb,
0119                    struct net_device *netdev)
0120 {
0121     struct emac_adapter *adpt = netdev_priv(netdev);
0122 
0123     return emac_mac_tx_buf_send(adpt, &adpt->tx_q, skb);
0124 }
0125 
0126 static irqreturn_t emac_isr(int _irq, void *data)
0127 {
0128     struct emac_irq *irq = data;
0129     struct emac_adapter *adpt =
0130         container_of(irq, struct emac_adapter, irq);
0131     struct emac_rx_queue *rx_q = &adpt->rx_q;
0132     u32 isr, status;
0133 
0134     /* disable the interrupt */
0135     writel(0, adpt->base + EMAC_INT_MASK);
0136 
0137     isr = readl_relaxed(adpt->base + EMAC_INT_STATUS);
0138 
0139     status = isr & irq->mask;
0140     if (status == 0)
0141         goto exit;
0142 
0143     if (status & ISR_ERROR) {
0144         net_err_ratelimited("%s: error interrupt 0x%lx\n",
0145                     adpt->netdev->name, status & ISR_ERROR);
0146         /* reset MAC */
0147         schedule_work(&adpt->work_thread);
0148     }
0149 
0150     /* Schedule the napi for receive queue with interrupt
0151      * status bit set
0152      */
0153     if (status & rx_q->intr) {
0154         if (napi_schedule_prep(&rx_q->napi)) {
0155             irq->mask &= ~rx_q->intr;
0156             __napi_schedule(&rx_q->napi);
0157         }
0158     }
0159 
0160     if (status & TX_PKT_INT)
0161         emac_mac_tx_process(adpt, &adpt->tx_q);
0162 
0163     if (status & ISR_OVER)
0164         net_warn_ratelimited("%s: TX/RX overflow interrupt\n",
0165                      adpt->netdev->name);
0166 
0167 exit:
0168     /* enable the interrupt */
0169     writel(irq->mask, adpt->base + EMAC_INT_MASK);
0170 
0171     return IRQ_HANDLED;
0172 }
0173 
0174 /* Configure VLAN tag strip/insert feature */
0175 static int emac_set_features(struct net_device *netdev,
0176                  netdev_features_t features)
0177 {
0178     netdev_features_t changed = features ^ netdev->features;
0179     struct emac_adapter *adpt = netdev_priv(netdev);
0180 
0181     /* We only need to reprogram the hardware if the VLAN tag features
0182      * have changed, and if it's already running.
0183      */
0184     if (!(changed & (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX)))
0185         return 0;
0186 
0187     if (!netif_running(netdev))
0188         return 0;
0189 
0190     /* emac_mac_mode_config() uses netdev->features to configure the EMAC,
0191      * so make sure it's set first.
0192      */
0193     netdev->features = features;
0194 
0195     return emac_reinit_locked(adpt);
0196 }
0197 
0198 /* Configure Multicast and Promiscuous modes */
0199 static void emac_rx_mode_set(struct net_device *netdev)
0200 {
0201     struct emac_adapter *adpt = netdev_priv(netdev);
0202     struct netdev_hw_addr *ha;
0203 
0204     emac_mac_mode_config(adpt);
0205 
0206     /* update multicast address filtering */
0207     emac_mac_multicast_addr_clear(adpt);
0208     netdev_for_each_mc_addr(ha, netdev)
0209         emac_mac_multicast_addr_set(adpt, ha->addr);
0210 }
0211 
0212 /* Change the Maximum Transfer Unit (MTU) */
0213 static int emac_change_mtu(struct net_device *netdev, int new_mtu)
0214 {
0215     struct emac_adapter *adpt = netdev_priv(netdev);
0216 
0217     netif_dbg(adpt, hw, adpt->netdev,
0218           "changing MTU from %d to %d\n", netdev->mtu,
0219           new_mtu);
0220     netdev->mtu = new_mtu;
0221 
0222     if (netif_running(netdev))
0223         return emac_reinit_locked(adpt);
0224 
0225     return 0;
0226 }
0227 
0228 /* Called when the network interface is made active */
0229 static int emac_open(struct net_device *netdev)
0230 {
0231     struct emac_adapter *adpt = netdev_priv(netdev);
0232     struct emac_irq *irq = &adpt->irq;
0233     int ret;
0234 
0235     ret = request_irq(irq->irq, emac_isr, 0, "emac-core0", irq);
0236     if (ret) {
0237         netdev_err(adpt->netdev, "could not request emac-core0 irq\n");
0238         return ret;
0239     }
0240 
0241     /* allocate rx/tx dma buffer & descriptors */
0242     ret = emac_mac_rx_tx_rings_alloc_all(adpt);
0243     if (ret) {
0244         netdev_err(adpt->netdev, "error allocating rx/tx rings\n");
0245         free_irq(irq->irq, irq);
0246         return ret;
0247     }
0248 
0249     ret = emac_sgmii_open(adpt);
0250     if (ret) {
0251         emac_mac_rx_tx_rings_free_all(adpt);
0252         free_irq(irq->irq, irq);
0253         return ret;
0254     }
0255 
0256     ret = emac_mac_up(adpt);
0257     if (ret) {
0258         emac_mac_rx_tx_rings_free_all(adpt);
0259         free_irq(irq->irq, irq);
0260         emac_sgmii_close(adpt);
0261         return ret;
0262     }
0263 
0264     return 0;
0265 }
0266 
0267 /* Called when the network interface is disabled */
0268 static int emac_close(struct net_device *netdev)
0269 {
0270     struct emac_adapter *adpt = netdev_priv(netdev);
0271 
0272     mutex_lock(&adpt->reset_lock);
0273 
0274     emac_sgmii_close(adpt);
0275     emac_mac_down(adpt);
0276     emac_mac_rx_tx_rings_free_all(adpt);
0277 
0278     free_irq(adpt->irq.irq, &adpt->irq);
0279 
0280     mutex_unlock(&adpt->reset_lock);
0281 
0282     return 0;
0283 }
0284 
0285 /* Respond to a TX hang */
0286 static void emac_tx_timeout(struct net_device *netdev, unsigned int txqueue)
0287 {
0288     struct emac_adapter *adpt = netdev_priv(netdev);
0289 
0290     schedule_work(&adpt->work_thread);
0291 }
0292 
0293 /**
0294  * emac_update_hw_stats - read the EMAC stat registers
0295  * @adpt: pointer to adapter struct
0296  *
0297  * Reads the stats registers and write the values to adpt->stats.
0298  *
0299  * adpt->stats.lock must be held while calling this function,
0300  * and while reading from adpt->stats.
0301  */
0302 void emac_update_hw_stats(struct emac_adapter *adpt)
0303 {
0304     struct emac_stats *stats = &adpt->stats;
0305     u64 *stats_itr = &adpt->stats.rx_ok;
0306     void __iomem *base = adpt->base;
0307     unsigned int addr;
0308 
0309     addr = REG_MAC_RX_STATUS_BIN;
0310     while (addr <= REG_MAC_RX_STATUS_END) {
0311         *stats_itr += readl_relaxed(base + addr);
0312         stats_itr++;
0313         addr += sizeof(u32);
0314     }
0315 
0316     /* additional rx status */
0317     stats->rx_crc_align += readl_relaxed(base + EMAC_RXMAC_STATC_REG23);
0318     stats->rx_jabbers += readl_relaxed(base + EMAC_RXMAC_STATC_REG24);
0319 
0320     /* update tx status */
0321     addr = REG_MAC_TX_STATUS_BIN;
0322     stats_itr = &stats->tx_ok;
0323 
0324     while (addr <= REG_MAC_TX_STATUS_END) {
0325         *stats_itr += readl_relaxed(base + addr);
0326         stats_itr++;
0327         addr += sizeof(u32);
0328     }
0329 
0330     /* additional tx status */
0331     stats->tx_col += readl_relaxed(base + EMAC_TXMAC_STATC_REG25);
0332 }
0333 
0334 /* Provide network statistics info for the interface */
0335 static void emac_get_stats64(struct net_device *netdev,
0336                  struct rtnl_link_stats64 *net_stats)
0337 {
0338     struct emac_adapter *adpt = netdev_priv(netdev);
0339     struct emac_stats *stats = &adpt->stats;
0340 
0341     spin_lock(&stats->lock);
0342 
0343     emac_update_hw_stats(adpt);
0344 
0345     /* return parsed statistics */
0346     net_stats->rx_packets = stats->rx_ok;
0347     net_stats->tx_packets = stats->tx_ok;
0348     net_stats->rx_bytes = stats->rx_byte_cnt;
0349     net_stats->tx_bytes = stats->tx_byte_cnt;
0350     net_stats->multicast = stats->rx_mcast;
0351     net_stats->collisions = stats->tx_1_col + stats->tx_2_col * 2 +
0352                 stats->tx_late_col + stats->tx_abort_col;
0353 
0354     net_stats->rx_errors = stats->rx_frag + stats->rx_fcs_err +
0355                    stats->rx_len_err + stats->rx_sz_ov +
0356                    stats->rx_align_err;
0357     net_stats->rx_fifo_errors = stats->rx_rxf_ov;
0358     net_stats->rx_length_errors = stats->rx_len_err;
0359     net_stats->rx_crc_errors = stats->rx_fcs_err;
0360     net_stats->rx_frame_errors = stats->rx_align_err;
0361     net_stats->rx_over_errors = stats->rx_rxf_ov;
0362     net_stats->rx_missed_errors = stats->rx_rxf_ov;
0363 
0364     net_stats->tx_errors = stats->tx_late_col + stats->tx_abort_col +
0365                    stats->tx_underrun + stats->tx_trunc;
0366     net_stats->tx_fifo_errors = stats->tx_underrun;
0367     net_stats->tx_aborted_errors = stats->tx_abort_col;
0368     net_stats->tx_window_errors = stats->tx_late_col;
0369 
0370     spin_unlock(&stats->lock);
0371 }
0372 
0373 static const struct net_device_ops emac_netdev_ops = {
0374     .ndo_open       = emac_open,
0375     .ndo_stop       = emac_close,
0376     .ndo_validate_addr  = eth_validate_addr,
0377     .ndo_start_xmit     = emac_start_xmit,
0378     .ndo_set_mac_address    = eth_mac_addr,
0379     .ndo_change_mtu     = emac_change_mtu,
0380     .ndo_eth_ioctl      = phy_do_ioctl_running,
0381     .ndo_tx_timeout     = emac_tx_timeout,
0382     .ndo_get_stats64    = emac_get_stats64,
0383     .ndo_set_features       = emac_set_features,
0384     .ndo_set_rx_mode        = emac_rx_mode_set,
0385 };
0386 
0387 /* Watchdog task routine, called to reinitialize the EMAC */
0388 static void emac_work_thread(struct work_struct *work)
0389 {
0390     struct emac_adapter *adpt =
0391         container_of(work, struct emac_adapter, work_thread);
0392 
0393     emac_reinit_locked(adpt);
0394 }
0395 
0396 /* Initialize various data structures  */
0397 static void emac_init_adapter(struct emac_adapter *adpt)
0398 {
0399     u32 reg;
0400 
0401     adpt->rrd_size = EMAC_RRD_SIZE;
0402     adpt->tpd_size = EMAC_TPD_SIZE;
0403     adpt->rfd_size = EMAC_RFD_SIZE;
0404 
0405     /* descriptors */
0406     adpt->tx_desc_cnt = EMAC_DEF_TX_DESCS;
0407     adpt->rx_desc_cnt = EMAC_DEF_RX_DESCS;
0408 
0409     /* dma */
0410     adpt->dma_order = emac_dma_ord_out;
0411     adpt->dmar_block = emac_dma_req_4096;
0412     adpt->dmaw_block = emac_dma_req_128;
0413     adpt->dmar_dly_cnt = DMAR_DLY_CNT_DEF;
0414     adpt->dmaw_dly_cnt = DMAW_DLY_CNT_DEF;
0415     adpt->tpd_burst = TXQ0_NUM_TPD_PREF_DEF;
0416     adpt->rfd_burst = RXQ0_NUM_RFD_PREF_DEF;
0417 
0418     /* irq moderator */
0419     reg = ((EMAC_DEF_RX_IRQ_MOD >> 1) << IRQ_MODERATOR2_INIT_SHFT) |
0420           ((EMAC_DEF_TX_IRQ_MOD >> 1) << IRQ_MODERATOR_INIT_SHFT);
0421     adpt->irq_mod = reg;
0422 
0423     /* others */
0424     adpt->preamble = EMAC_PREAMBLE_DEF;
0425 
0426     /* default to automatic flow control */
0427     adpt->automatic = true;
0428 
0429     /* Disable single-pause-frame mode by default */
0430     adpt->single_pause_mode = false;
0431 }
0432 
0433 /* Get the clock */
0434 static int emac_clks_get(struct platform_device *pdev,
0435              struct emac_adapter *adpt)
0436 {
0437     unsigned int i;
0438 
0439     for (i = 0; i < EMAC_CLK_CNT; i++) {
0440         struct clk *clk = devm_clk_get(&pdev->dev, emac_clk_name[i]);
0441 
0442         if (IS_ERR(clk)) {
0443             dev_err(&pdev->dev,
0444                 "could not claim clock %s (error=%li)\n",
0445                 emac_clk_name[i], PTR_ERR(clk));
0446 
0447             return PTR_ERR(clk);
0448         }
0449 
0450         adpt->clk[i] = clk;
0451     }
0452 
0453     return 0;
0454 }
0455 
0456 /* Initialize clocks */
0457 static int emac_clks_phase1_init(struct platform_device *pdev,
0458                  struct emac_adapter *adpt)
0459 {
0460     int ret;
0461 
0462     /* On ACPI platforms, clocks are controlled by firmware and/or
0463      * ACPI, not by drivers.
0464      */
0465     if (has_acpi_companion(&pdev->dev))
0466         return 0;
0467 
0468     ret = emac_clks_get(pdev, adpt);
0469     if (ret)
0470         return ret;
0471 
0472     ret = clk_prepare_enable(adpt->clk[EMAC_CLK_AXI]);
0473     if (ret)
0474         return ret;
0475 
0476     ret = clk_prepare_enable(adpt->clk[EMAC_CLK_CFG_AHB]);
0477     if (ret)
0478         goto disable_clk_axi;
0479 
0480     ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 19200000);
0481     if (ret)
0482         goto disable_clk_cfg_ahb;
0483 
0484     ret = clk_prepare_enable(adpt->clk[EMAC_CLK_HIGH_SPEED]);
0485     if (ret)
0486         goto disable_clk_cfg_ahb;
0487 
0488     return 0;
0489 
0490 disable_clk_cfg_ahb:
0491     clk_disable_unprepare(adpt->clk[EMAC_CLK_CFG_AHB]);
0492 disable_clk_axi:
0493     clk_disable_unprepare(adpt->clk[EMAC_CLK_AXI]);
0494 
0495     return ret;
0496 }
0497 
0498 /* Enable clocks; needs emac_clks_phase1_init to be called before */
0499 static int emac_clks_phase2_init(struct platform_device *pdev,
0500                  struct emac_adapter *adpt)
0501 {
0502     int ret;
0503 
0504     if (has_acpi_companion(&pdev->dev))
0505         return 0;
0506 
0507     ret = clk_set_rate(adpt->clk[EMAC_CLK_TX], 125000000);
0508     if (ret)
0509         return ret;
0510 
0511     ret = clk_prepare_enable(adpt->clk[EMAC_CLK_TX]);
0512     if (ret)
0513         return ret;
0514 
0515     ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 125000000);
0516     if (ret)
0517         return ret;
0518 
0519     ret = clk_set_rate(adpt->clk[EMAC_CLK_MDIO], 25000000);
0520     if (ret)
0521         return ret;
0522 
0523     ret = clk_prepare_enable(adpt->clk[EMAC_CLK_MDIO]);
0524     if (ret)
0525         return ret;
0526 
0527     ret = clk_prepare_enable(adpt->clk[EMAC_CLK_RX]);
0528     if (ret)
0529         return ret;
0530 
0531     return clk_prepare_enable(adpt->clk[EMAC_CLK_SYS]);
0532 }
0533 
0534 static void emac_clks_teardown(struct emac_adapter *adpt)
0535 {
0536 
0537     unsigned int i;
0538 
0539     for (i = 0; i < EMAC_CLK_CNT; i++)
0540         clk_disable_unprepare(adpt->clk[i]);
0541 }
0542 
0543 /* Get the resources */
0544 static int emac_probe_resources(struct platform_device *pdev,
0545                 struct emac_adapter *adpt)
0546 {
0547     struct net_device *netdev = adpt->netdev;
0548     int ret = 0;
0549 
0550     /* get mac address */
0551     if (device_get_ethdev_address(&pdev->dev, netdev))
0552         eth_hw_addr_random(netdev);
0553 
0554     /* Core 0 interrupt */
0555     ret = platform_get_irq(pdev, 0);
0556     if (ret < 0)
0557         return ret;
0558     adpt->irq.irq = ret;
0559 
0560     /* base register address */
0561     adpt->base = devm_platform_ioremap_resource(pdev, 0);
0562     if (IS_ERR(adpt->base))
0563         return PTR_ERR(adpt->base);
0564 
0565     /* CSR register address */
0566     adpt->csr = devm_platform_ioremap_resource(pdev, 1);
0567     if (IS_ERR(adpt->csr))
0568         return PTR_ERR(adpt->csr);
0569 
0570     netdev->base_addr = (unsigned long)adpt->base;
0571 
0572     return 0;
0573 }
0574 
0575 static const struct of_device_id emac_dt_match[] = {
0576     {
0577         .compatible = "qcom,fsm9900-emac",
0578     },
0579     {}
0580 };
0581 MODULE_DEVICE_TABLE(of, emac_dt_match);
0582 
0583 #if IS_ENABLED(CONFIG_ACPI)
0584 static const struct acpi_device_id emac_acpi_match[] = {
0585     {
0586         .id = "QCOM8070",
0587     },
0588     {}
0589 };
0590 MODULE_DEVICE_TABLE(acpi, emac_acpi_match);
0591 #endif
0592 
0593 static int emac_probe(struct platform_device *pdev)
0594 {
0595     struct net_device *netdev;
0596     struct emac_adapter *adpt;
0597     struct emac_sgmii *phy;
0598     u16 devid, revid;
0599     u32 reg;
0600     int ret;
0601 
0602     /* The TPD buffer address is limited to:
0603      * 1. PTP:  45bits. (Driver doesn't support yet.)
0604      * 2. NON-PTP:  46bits.
0605      */
0606     ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(46));
0607     if (ret) {
0608         dev_err(&pdev->dev, "could not set DMA mask\n");
0609         return ret;
0610     }
0611 
0612     netdev = alloc_etherdev(sizeof(struct emac_adapter));
0613     if (!netdev)
0614         return -ENOMEM;
0615 
0616     dev_set_drvdata(&pdev->dev, netdev);
0617     SET_NETDEV_DEV(netdev, &pdev->dev);
0618     emac_set_ethtool_ops(netdev);
0619 
0620     adpt = netdev_priv(netdev);
0621     adpt->netdev = netdev;
0622     adpt->msg_enable = EMAC_MSG_DEFAULT;
0623 
0624     phy = &adpt->phy;
0625     atomic_set(&phy->decode_error_count, 0);
0626 
0627     mutex_init(&adpt->reset_lock);
0628     spin_lock_init(&adpt->stats.lock);
0629 
0630     adpt->irq.mask = RX_PKT_INT0 | IMR_NORMAL_MASK;
0631 
0632     ret = emac_probe_resources(pdev, adpt);
0633     if (ret)
0634         goto err_undo_netdev;
0635 
0636     /* initialize clocks */
0637     ret = emac_clks_phase1_init(pdev, adpt);
0638     if (ret) {
0639         dev_err(&pdev->dev, "could not initialize clocks\n");
0640         goto err_undo_netdev;
0641     }
0642 
0643     netdev->watchdog_timeo = EMAC_WATCHDOG_TIME;
0644     netdev->irq = adpt->irq.irq;
0645 
0646     netdev->netdev_ops = &emac_netdev_ops;
0647 
0648     emac_init_adapter(adpt);
0649 
0650     /* init external phy */
0651     ret = emac_phy_config(pdev, adpt);
0652     if (ret)
0653         goto err_undo_clocks;
0654 
0655     /* init internal sgmii phy */
0656     ret = emac_sgmii_config(pdev, adpt);
0657     if (ret)
0658         goto err_undo_mdiobus;
0659 
0660     /* enable clocks */
0661     ret = emac_clks_phase2_init(pdev, adpt);
0662     if (ret) {
0663         dev_err(&pdev->dev, "could not initialize clocks\n");
0664         goto err_undo_mdiobus;
0665     }
0666 
0667     /* set hw features */
0668     netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
0669             NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
0670             NETIF_F_HW_VLAN_CTAG_TX;
0671     netdev->hw_features = netdev->features;
0672 
0673     netdev->vlan_features |= NETIF_F_SG | NETIF_F_HW_CSUM |
0674                  NETIF_F_TSO | NETIF_F_TSO6;
0675 
0676     /* MTU range: 46 - 9194 */
0677     netdev->min_mtu = EMAC_MIN_ETH_FRAME_SIZE -
0678               (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
0679     netdev->max_mtu = EMAC_MAX_ETH_FRAME_SIZE -
0680               (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
0681 
0682     INIT_WORK(&adpt->work_thread, emac_work_thread);
0683 
0684     /* Initialize queues */
0685     emac_mac_rx_tx_ring_init_all(pdev, adpt);
0686 
0687     netif_napi_add(netdev, &adpt->rx_q.napi, emac_napi_rtx,
0688                NAPI_POLL_WEIGHT);
0689 
0690     ret = register_netdev(netdev);
0691     if (ret) {
0692         dev_err(&pdev->dev, "could not register net device\n");
0693         goto err_undo_napi;
0694     }
0695 
0696     reg =  readl_relaxed(adpt->base + EMAC_DMA_MAS_CTRL);
0697     devid = (reg & DEV_ID_NUM_BMSK)  >> DEV_ID_NUM_SHFT;
0698     revid = (reg & DEV_REV_NUM_BMSK) >> DEV_REV_NUM_SHFT;
0699     reg = readl_relaxed(adpt->base + EMAC_CORE_HW_VERSION);
0700 
0701     netif_info(adpt, probe, netdev,
0702            "hardware id %d.%d, hardware version %d.%d.%d\n",
0703            devid, revid,
0704            (reg & MAJOR_BMSK) >> MAJOR_SHFT,
0705            (reg & MINOR_BMSK) >> MINOR_SHFT,
0706            (reg & STEP_BMSK)  >> STEP_SHFT);
0707 
0708     return 0;
0709 
0710 err_undo_napi:
0711     netif_napi_del(&adpt->rx_q.napi);
0712 err_undo_mdiobus:
0713     put_device(&adpt->phydev->mdio.dev);
0714     mdiobus_unregister(adpt->mii_bus);
0715 err_undo_clocks:
0716     emac_clks_teardown(adpt);
0717 err_undo_netdev:
0718     free_netdev(netdev);
0719 
0720     return ret;
0721 }
0722 
0723 static int emac_remove(struct platform_device *pdev)
0724 {
0725     struct net_device *netdev = dev_get_drvdata(&pdev->dev);
0726     struct emac_adapter *adpt = netdev_priv(netdev);
0727 
0728     unregister_netdev(netdev);
0729     netif_napi_del(&adpt->rx_q.napi);
0730 
0731     emac_clks_teardown(adpt);
0732 
0733     put_device(&adpt->phydev->mdio.dev);
0734     mdiobus_unregister(adpt->mii_bus);
0735 
0736     if (adpt->phy.digital)
0737         iounmap(adpt->phy.digital);
0738     iounmap(adpt->phy.base);
0739 
0740     free_netdev(netdev);
0741 
0742     return 0;
0743 }
0744 
0745 static void emac_shutdown(struct platform_device *pdev)
0746 {
0747     struct net_device *netdev = dev_get_drvdata(&pdev->dev);
0748     struct emac_adapter *adpt = netdev_priv(netdev);
0749 
0750     if (netdev->flags & IFF_UP) {
0751         /* Closing the SGMII turns off its interrupts */
0752         emac_sgmii_close(adpt);
0753 
0754         /* Resetting the MAC turns off all DMA and its interrupts */
0755         emac_mac_reset(adpt);
0756     }
0757 }
0758 
0759 static struct platform_driver emac_platform_driver = {
0760     .probe  = emac_probe,
0761     .remove = emac_remove,
0762     .driver = {
0763         .name       = "qcom-emac",
0764         .of_match_table = emac_dt_match,
0765         .acpi_match_table = ACPI_PTR(emac_acpi_match),
0766     },
0767     .shutdown = emac_shutdown,
0768 };
0769 
0770 module_platform_driver(emac_platform_driver);
0771 
0772 MODULE_LICENSE("GPL v2");
0773 MODULE_ALIAS("platform:qcom-emac");
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