qualcomm/emac/emac-phy.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
0003  */
0004
0005 /* Qualcomm Technologies, Inc. EMAC PHY Controller driver.
0006  */
0007
0008 #include <linux/of_mdio.h>
0009 #include <linux/phy.h>
0010 #include <linux/iopoll.h>
0011 #include <linux/acpi.h>
0012 #include "emac.h"
0013
0014 /* EMAC base register offsets */
0015 #define EMAC_MDIO_CTRL                                        0x001414
0016 #define EMAC_PHY_STS                                          0x001418
0017 #define EMAC_MDIO_EX_CTRL                                     0x001440
0018
0019 /* EMAC_MDIO_CTRL */
0020 #define MDIO_MODE                                              BIT(30)
0021 #define MDIO_PR                                                BIT(29)
0022 #define MDIO_AP_EN                                             BIT(28)
0023 #define MDIO_BUSY                                              BIT(27)
0024 #define MDIO_CLK_SEL_BMSK                                    0x7000000
0025 #define MDIO_CLK_SEL_SHFT                                           24
0026 #define MDIO_START                                             BIT(23)
0027 #define SUP_PREAMBLE                                           BIT(22)
0028 #define MDIO_RD_NWR                                            BIT(21)
0029 #define MDIO_REG_ADDR_BMSK                                    0x1f0000
0030 #define MDIO_REG_ADDR_SHFT                                          16
0031 #define MDIO_DATA_BMSK                                          0xffff
0032 #define MDIO_DATA_SHFT                                               0
0033
0034 /* EMAC_PHY_STS */
0035 #define PHY_ADDR_BMSK                                         0x1f0000
0036 #define PHY_ADDR_SHFT                                               16
0037
0038 #define MDIO_CLK_25_4                                                0
0039 #define MDIO_CLK_25_28                                               7
0040
0041 #define MDIO_WAIT_TIMES                                           1000
0042 #define MDIO_STATUS_DELAY_TIME                                       1
0043
0044 static int emac_mdio_read(struct mii_bus *bus, int addr, int regnum)
0045 {
0046     struct emac_adapter *adpt = bus->priv;
0047     u32 reg;
0048
0049     emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK,
0050               (addr << PHY_ADDR_SHFT));
0051
0052     reg = SUP_PREAMBLE |
0053           ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) |
0054           ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) |
0055           MDIO_START | MDIO_RD_NWR;
0056
0057     writel(reg, adpt->base + EMAC_MDIO_CTRL);
0058
0059     if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg,
0060                    !(reg & (MDIO_START | MDIO_BUSY)),
0061                    MDIO_STATUS_DELAY_TIME, MDIO_WAIT_TIMES * 100))
0062         return -EIO;
0063
0064     return (reg >> MDIO_DATA_SHFT) & MDIO_DATA_BMSK;
0065 }
0066
0067 static int emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
0068 {
0069     struct emac_adapter *adpt = bus->priv;
0070     u32 reg;
0071
0072     emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK,
0073               (addr << PHY_ADDR_SHFT));
0074
0075     reg = SUP_PREAMBLE |
0076         ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) |
0077         ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) |
0078         ((val << MDIO_DATA_SHFT) & MDIO_DATA_BMSK) |
0079         MDIO_START;
0080
0081     writel(reg, adpt->base + EMAC_MDIO_CTRL);
0082
0083     if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg,
0084                    !(reg & (MDIO_START | MDIO_BUSY)),
0085                    MDIO_STATUS_DELAY_TIME, MDIO_WAIT_TIMES * 100))
0086         return -EIO;
0087
0088     return 0;
0089 }
0090
0091 /* Configure the MDIO bus and connect the external PHY */
0092 int emac_phy_config(struct platform_device *pdev, struct emac_adapter *adpt)
0093 {
0094     struct device_node *np = pdev->dev.of_node;
0095     struct mii_bus *mii_bus;
0096     int ret;
0097
0098     /* Create the mii_bus object for talking to the MDIO bus */
0099     adpt->mii_bus = mii_bus = devm_mdiobus_alloc(&pdev->dev);
0100     if (!mii_bus)
0101         return -ENOMEM;
0102
0103     mii_bus->name = "emac-mdio";
0104     snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
0105     mii_bus->read = emac_mdio_read;
0106     mii_bus->write = emac_mdio_write;
0107     mii_bus->parent = &pdev->dev;
0108     mii_bus->priv = adpt;
0109
0110     if (has_acpi_companion(&pdev->dev)) {
0111         u32 phy_addr;
0112
0113         ret = mdiobus_register(mii_bus);
0114         if (ret) {
0115             dev_err(&pdev->dev, "could not register mdio bus\n");
0116             return ret;
0117         }
0118         ret = device_property_read_u32(&pdev->dev, "phy-channel",
0119                            &phy_addr);
0120         if (ret)
0121             /* If we can't read a valid phy address, then assume
0122              * that there is only one phy on this mdio bus.
0123              */
0124             adpt->phydev = phy_find_first(mii_bus);
0125         else
0126             adpt->phydev = mdiobus_get_phy(mii_bus, phy_addr);
0127
0128         /* of_phy_find_device() claims a reference to the phydev,
0129          * so we do that here manually as well. When the driver
0130          * later unloads, it can unilaterally drop the reference
0131          * without worrying about ACPI vs DT.
0132          */
0133         if (adpt->phydev)
0134             get_device(&adpt->phydev->mdio.dev);
0135     } else {
0136         struct device_node *phy_np;
0137
0138         ret = of_mdiobus_register(mii_bus, np);
0139         if (ret) {
0140             dev_err(&pdev->dev, "could not register mdio bus\n");
0141             return ret;
0142         }
0143
0144         phy_np = of_parse_phandle(np, "phy-handle", 0);
0145         adpt->phydev = of_phy_find_device(phy_np);
0146         of_node_put(phy_np);
0147     }
0148
0149     if (!adpt->phydev) {
0150         dev_err(&pdev->dev, "could not find external phy\n");
0151         mdiobus_unregister(mii_bus);
0152         return -ENODEV;
0153     }
0154
0155     return 0;
0156 }