qualcomm/emac/emac-mac.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
0003  */
0004
0005 /* EMAC DMA HW engine uses three rings:
0006  * Tx:
0007  *   TPD: Transmit Packet Descriptor ring.
0008  * Rx:
0009  *   RFD: Receive Free Descriptor ring.
0010  *     Ring of descriptors with empty buffers to be filled by Rx HW.
0011  *   RRD: Receive Return Descriptor ring.
0012  *     Ring of descriptors with buffers filled with received data.
0013  */
0014
0015 #ifndef _EMAC_HW_H_
0016 #define _EMAC_HW_H_
0017
0018 /* EMAC_CSR register offsets */
0019 #define EMAC_EMAC_WRAPPER_CSR1                                0x000000
0020 #define EMAC_EMAC_WRAPPER_CSR2                                0x000004
0021 #define EMAC_EMAC_WRAPPER_TX_TS_LO                            0x000104
0022 #define EMAC_EMAC_WRAPPER_TX_TS_HI                            0x000108
0023 #define EMAC_EMAC_WRAPPER_TX_TS_INX                           0x00010c
0024
0025 /* DMA Order Settings */
0026 enum emac_dma_order {
0027     emac_dma_ord_in = 1,
0028     emac_dma_ord_enh = 2,
0029     emac_dma_ord_out = 4
0030 };
0031
0032 enum emac_dma_req_block {
0033     emac_dma_req_128 = 0,
0034     emac_dma_req_256 = 1,
0035     emac_dma_req_512 = 2,
0036     emac_dma_req_1024 = 3,
0037     emac_dma_req_2048 = 4,
0038     emac_dma_req_4096 = 5
0039 };
0040
0041 /* Returns the value of bits idx...idx+n_bits */
0042 #define BITS_GET(val, lo, hi) ((le32_to_cpu(val) & GENMASK((hi), (lo))) >> lo)
0043 #define BITS_SET(val, lo, hi, new_val) \
0044     val = cpu_to_le32((le32_to_cpu(val) & (~GENMASK((hi), (lo)))) | \
0045         (((new_val) << (lo)) & GENMASK((hi), (lo))))
0046
0047 /* RRD (Receive Return Descriptor) */
0048 struct emac_rrd {
0049     u32 word[6];
0050
0051 /* number of RFD */
0052 #define RRD_NOR(rrd)            BITS_GET((rrd)->word[0], 16, 19)
0053 /* start consumer index of rfd-ring */
0054 #define RRD_SI(rrd)         BITS_GET((rrd)->word[0], 20, 31)
0055 /* vlan-tag (CVID, CFI and PRI) */
0056 #define RRD_CVALN_TAG(rrd)      BITS_GET((rrd)->word[2], 0, 15)
0057 /* length of the packet */
0058 #define RRD_PKT_SIZE(rrd)       BITS_GET((rrd)->word[3], 0, 13)
0059 /* L4(TCP/UDP) checksum failed */
0060 #define RRD_L4F(rrd)            BITS_GET((rrd)->word[3], 14, 14)
0061 /* vlan tagged */
0062 #define RRD_CVTAG(rrd)          BITS_GET((rrd)->word[3], 16, 16)
0063 /* When set, indicates that the descriptor is updated by the IP core.
0064  * When cleared, indicates that the descriptor is invalid.
0065  */
0066 #define RRD_UPDT(rrd)           BITS_GET((rrd)->word[3], 31, 31)
0067 #define RRD_UPDT_SET(rrd, val)      BITS_SET((rrd)->word[3], 31, 31, val)
0068 /* timestamp low */
0069 #define RRD_TS_LOW(rrd)         BITS_GET((rrd)->word[4], 0, 29)
0070 /* timestamp high */
0071 #define RRD_TS_HI(rrd)          le32_to_cpu((rrd)->word[5])
0072 };
0073
0074 /* TPD (Transmit Packet Descriptor) */
0075 struct emac_tpd {
0076     u32             word[4];
0077
0078 /* Number of bytes of the transmit packet. (include 4-byte CRC) */
0079 #define TPD_BUF_LEN_SET(tpd, val)   BITS_SET((tpd)->word[0], 0, 15, val)
0080 /* Custom Checksum Offload: When set, ask IP core to offload custom checksum */
0081 #define TPD_CSX_SET(tpd, val)       BITS_SET((tpd)->word[1], 8, 8, val)
0082 /* TCP Large Send Offload: When set, ask IP core to do offload TCP Large Send */
0083 #define TPD_LSO(tpd)            BITS_GET((tpd)->word[1], 12, 12)
0084 #define TPD_LSO_SET(tpd, val)       BITS_SET((tpd)->word[1], 12, 12, val)
0085 /*  Large Send Offload Version: When set, indicates this is an LSOv2
0086  * (for both IPv4 and IPv6). When cleared, indicates this is an LSOv1
0087  * (only for IPv4).
0088  */
0089 #define TPD_LSOV_SET(tpd, val)      BITS_SET((tpd)->word[1], 13, 13, val)
0090 /* IPv4 packet: When set, indicates this is an  IPv4 packet, this bit is only
0091  * for LSOV2 format.
0092  */
0093 #define TPD_IPV4_SET(tpd, val)      BITS_SET((tpd)->word[1], 16, 16, val)
0094 /* 0: Ethernet   frame (DA+SA+TYPE+DATA+CRC)
0095  * 1: IEEE 802.3 frame (DA+SA+LEN+DSAP+SSAP+CTL+ORG+TYPE+DATA+CRC)
0096  */
0097 #define TPD_TYP_SET(tpd, val)       BITS_SET((tpd)->word[1], 17, 17, val)
0098 /* Low-32bit Buffer Address */
0099 #define TPD_BUFFER_ADDR_L_SET(tpd, val) ((tpd)->word[2] = cpu_to_le32(val))
0100 /* CVLAN Tag to be inserted if INS_VLAN_TAG is set, CVLAN TPID based on global
0101  * register configuration.
0102  */
0103 #define TPD_CVLAN_TAG_SET(tpd, val) BITS_SET((tpd)->word[3], 0, 15, val)
0104 /*  Insert CVlan Tag: When set, ask MAC to insert CVLAN TAG to outgoing packet
0105  */
0106 #define TPD_INSTC_SET(tpd, val)     BITS_SET((tpd)->word[3], 17, 17, val)
0107 /* High-14bit Buffer Address, So, the 64b-bit address is
0108  * {DESC_CTRL_11_TX_DATA_HIADDR[17:0],(register) BUFFER_ADDR_H, BUFFER_ADDR_L}
0109  * Extend TPD_BUFFER_ADDR_H to [31, 18], because we never enable timestamping.
0110  */
0111 #define TPD_BUFFER_ADDR_H_SET(tpd, val) BITS_SET((tpd)->word[3], 18, 31, val)
0112 /* Format D. Word offset from the 1st byte of this packet to start to calculate
0113  * the custom checksum.
0114  */
0115 #define TPD_PAYLOAD_OFFSET_SET(tpd, val) BITS_SET((tpd)->word[1], 0, 7, val)
0116 /*  Format D. Word offset from the 1st byte of this packet to fill the custom
0117  * checksum to
0118  */
0119 #define TPD_CXSUM_OFFSET_SET(tpd, val)  BITS_SET((tpd)->word[1], 18, 25, val)
0120
0121 /* Format C. TCP Header offset from the 1st byte of this packet. (byte unit) */
0122 #define TPD_TCPHDR_OFFSET_SET(tpd, val) BITS_SET((tpd)->word[1], 0, 7, val)
0123 /* Format C. MSS (Maximum Segment Size) got from the protocol layer. (byte unit)
0124  */
0125 #define TPD_MSS_SET(tpd, val)       BITS_SET((tpd)->word[1], 18, 30, val)
0126 /* packet length in ext tpd */
0127 #define TPD_PKT_LEN_SET(tpd, val)   ((tpd)->word[2] = cpu_to_le32(val))
0128 };
0129
0130 /* emac_ring_header represents a single, contiguous block of DMA space
0131  * mapped for the three descriptor rings (tpd, rfd, rrd)
0132  */
0133 struct emac_ring_header {
0134     void            *v_addr;    /* virtual address */
0135     dma_addr_t      dma_addr;   /* dma address */
0136     size_t          size;       /* length in bytes */
0137     size_t          used;
0138 };
0139
0140 /* emac_buffer is wrapper around a pointer to a socket buffer
0141  * so a DMA handle can be stored along with the skb
0142  */
0143 struct emac_buffer {
0144     struct sk_buff      *skb;       /* socket buffer */
0145     u16         length;     /* rx buffer length */
0146     dma_addr_t      dma_addr;   /* dma address */
0147 };
0148
0149 /* receive free descriptor (rfd) ring */
0150 struct emac_rfd_ring {
0151     struct emac_buffer  *rfbuff;
0152     u32         *v_addr;    /* virtual address */
0153     dma_addr_t      dma_addr;   /* dma address */
0154     size_t          size;       /* length in bytes */
0155     unsigned int        count;      /* number of desc in the ring */
0156     unsigned int        produce_idx;
0157     unsigned int        process_idx;
0158     unsigned int        consume_idx;    /* unused */
0159 };
0160
0161 /* Receive Return Desciptor (RRD) ring */
0162 struct emac_rrd_ring {
0163     u32         *v_addr;    /* virtual address */
0164     dma_addr_t      dma_addr;   /* physical address */
0165     size_t          size;       /* length in bytes */
0166     unsigned int        count;      /* number of desc in the ring */
0167     unsigned int        produce_idx;    /* unused */
0168     unsigned int        consume_idx;
0169 };
0170
0171 /* Rx queue */
0172 struct emac_rx_queue {
0173     struct net_device   *netdev;    /* netdev ring belongs to */
0174     struct emac_rrd_ring    rrd;
0175     struct emac_rfd_ring    rfd;
0176     struct napi_struct  napi;
0177     struct emac_irq     *irq;
0178
0179     u32         intr;
0180     u32         produce_mask;
0181     u32         process_mask;
0182     u32         consume_mask;
0183
0184     u16         produce_reg;
0185     u16         process_reg;
0186     u16         consume_reg;
0187
0188     u8          produce_shift;
0189     u8          process_shft;
0190     u8          consume_shift;
0191 };
0192
0193 /* Transimit Packet Descriptor (tpd) ring */
0194 struct emac_tpd_ring {
0195     struct emac_buffer  *tpbuff;
0196     u32         *v_addr;    /* virtual address */
0197     dma_addr_t      dma_addr;   /* dma address */
0198
0199     size_t          size;       /* length in bytes */
0200     unsigned int        count;      /* number of desc in the ring */
0201     unsigned int        produce_idx;
0202     unsigned int        consume_idx;
0203     unsigned int        last_produce_idx;
0204 };
0205
0206 /* Tx queue */
0207 struct emac_tx_queue {
0208     struct emac_tpd_ring    tpd;
0209
0210     u32         produce_mask;
0211     u32         consume_mask;
0212
0213     u16         max_packets;    /* max packets per interrupt */
0214     u16         produce_reg;
0215     u16         consume_reg;
0216
0217     u8          produce_shift;
0218     u8          consume_shift;
0219 };
0220
0221 struct emac_adapter;
0222
0223 int  emac_mac_up(struct emac_adapter *adpt);
0224 void emac_mac_down(struct emac_adapter *adpt);
0225 void emac_mac_reset(struct emac_adapter *adpt);
0226 void emac_mac_stop(struct emac_adapter *adpt);
0227 void emac_mac_mode_config(struct emac_adapter *adpt);
0228 void emac_mac_rx_process(struct emac_adapter *adpt, struct emac_rx_queue *rx_q,
0229              int *num_pkts, int max_pkts);
0230 netdev_tx_t emac_mac_tx_buf_send(struct emac_adapter *adpt,
0231                  struct emac_tx_queue *tx_q,
0232                  struct sk_buff *skb);
0233 void emac_mac_tx_process(struct emac_adapter *adpt, struct emac_tx_queue *tx_q);
0234 void emac_mac_rx_tx_ring_init_all(struct platform_device *pdev,
0235                   struct emac_adapter *adpt);
0236 int  emac_mac_rx_tx_rings_alloc_all(struct emac_adapter *adpt);
0237 void emac_mac_rx_tx_rings_free_all(struct emac_adapter *adpt);
0238 void emac_mac_multicast_addr_clear(struct emac_adapter *adpt);
0239 void emac_mac_multicast_addr_set(struct emac_adapter *adpt, u8 *addr);
0240
0241 #endif /*_EMAC_HW_H_*/