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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * QLogic qlcnic NIC Driver
0004  * Copyright (c) 2009-2013 QLogic Corporation
0005  */
0006 
0007 #include "qlcnic.h"
0008 #include "qlcnic_hw.h"
0009 
0010 struct crb_addr_pair {
0011     u32 addr;
0012     u32 data;
0013 };
0014 
0015 #define QLCNIC_MAX_CRB_XFORM 60
0016 static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
0017 
0018 #define crb_addr_transform(name) \
0019     (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
0020     QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
0021 
0022 #define QLCNIC_ADDR_ERROR (0xffffffff)
0023 
0024 static int
0025 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
0026 
0027 static void crb_addr_transform_setup(void)
0028 {
0029     crb_addr_transform(XDMA);
0030     crb_addr_transform(TIMR);
0031     crb_addr_transform(SRE);
0032     crb_addr_transform(SQN3);
0033     crb_addr_transform(SQN2);
0034     crb_addr_transform(SQN1);
0035     crb_addr_transform(SQN0);
0036     crb_addr_transform(SQS3);
0037     crb_addr_transform(SQS2);
0038     crb_addr_transform(SQS1);
0039     crb_addr_transform(SQS0);
0040     crb_addr_transform(RPMX7);
0041     crb_addr_transform(RPMX6);
0042     crb_addr_transform(RPMX5);
0043     crb_addr_transform(RPMX4);
0044     crb_addr_transform(RPMX3);
0045     crb_addr_transform(RPMX2);
0046     crb_addr_transform(RPMX1);
0047     crb_addr_transform(RPMX0);
0048     crb_addr_transform(ROMUSB);
0049     crb_addr_transform(SN);
0050     crb_addr_transform(QMN);
0051     crb_addr_transform(QMS);
0052     crb_addr_transform(PGNI);
0053     crb_addr_transform(PGND);
0054     crb_addr_transform(PGN3);
0055     crb_addr_transform(PGN2);
0056     crb_addr_transform(PGN1);
0057     crb_addr_transform(PGN0);
0058     crb_addr_transform(PGSI);
0059     crb_addr_transform(PGSD);
0060     crb_addr_transform(PGS3);
0061     crb_addr_transform(PGS2);
0062     crb_addr_transform(PGS1);
0063     crb_addr_transform(PGS0);
0064     crb_addr_transform(PS);
0065     crb_addr_transform(PH);
0066     crb_addr_transform(NIU);
0067     crb_addr_transform(I2Q);
0068     crb_addr_transform(EG);
0069     crb_addr_transform(MN);
0070     crb_addr_transform(MS);
0071     crb_addr_transform(CAS2);
0072     crb_addr_transform(CAS1);
0073     crb_addr_transform(CAS0);
0074     crb_addr_transform(CAM);
0075     crb_addr_transform(C2C1);
0076     crb_addr_transform(C2C0);
0077     crb_addr_transform(SMB);
0078     crb_addr_transform(OCM0);
0079     crb_addr_transform(I2C0);
0080 }
0081 
0082 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
0083 {
0084     struct qlcnic_recv_context *recv_ctx;
0085     struct qlcnic_host_rds_ring *rds_ring;
0086     struct qlcnic_rx_buffer *rx_buf;
0087     int i, ring;
0088 
0089     recv_ctx = adapter->recv_ctx;
0090     for (ring = 0; ring < adapter->max_rds_rings; ring++) {
0091         rds_ring = &recv_ctx->rds_rings[ring];
0092         for (i = 0; i < rds_ring->num_desc; ++i) {
0093             rx_buf = &(rds_ring->rx_buf_arr[i]);
0094             if (rx_buf->skb == NULL)
0095                 continue;
0096 
0097             dma_unmap_single(&adapter->pdev->dev, rx_buf->dma,
0098                      rds_ring->dma_size, DMA_FROM_DEVICE);
0099 
0100             dev_kfree_skb_any(rx_buf->skb);
0101         }
0102     }
0103 }
0104 
0105 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
0106 {
0107     struct qlcnic_recv_context *recv_ctx;
0108     struct qlcnic_host_rds_ring *rds_ring;
0109     struct qlcnic_rx_buffer *rx_buf;
0110     int i, ring;
0111 
0112     recv_ctx = adapter->recv_ctx;
0113     for (ring = 0; ring < adapter->max_rds_rings; ring++) {
0114         rds_ring = &recv_ctx->rds_rings[ring];
0115 
0116         INIT_LIST_HEAD(&rds_ring->free_list);
0117 
0118         rx_buf = rds_ring->rx_buf_arr;
0119         for (i = 0; i < rds_ring->num_desc; i++) {
0120             list_add_tail(&rx_buf->list,
0121                     &rds_ring->free_list);
0122             rx_buf++;
0123         }
0124     }
0125 }
0126 
0127 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter,
0128                    struct qlcnic_host_tx_ring *tx_ring)
0129 {
0130     struct qlcnic_cmd_buffer *cmd_buf;
0131     struct qlcnic_skb_frag *buffrag;
0132     int i, j;
0133 
0134     spin_lock(&tx_ring->tx_clean_lock);
0135 
0136     cmd_buf = tx_ring->cmd_buf_arr;
0137     for (i = 0; i < tx_ring->num_desc; i++) {
0138         buffrag = cmd_buf->frag_array;
0139         if (buffrag->dma) {
0140             dma_unmap_single(&adapter->pdev->dev, buffrag->dma,
0141                      buffrag->length, DMA_TO_DEVICE);
0142             buffrag->dma = 0ULL;
0143         }
0144         for (j = 1; j < cmd_buf->frag_count; j++) {
0145             buffrag++;
0146             if (buffrag->dma) {
0147                 dma_unmap_page(&adapter->pdev->dev,
0148                            buffrag->dma, buffrag->length,
0149                            DMA_TO_DEVICE);
0150                 buffrag->dma = 0ULL;
0151             }
0152         }
0153         if (cmd_buf->skb) {
0154             dev_kfree_skb_any(cmd_buf->skb);
0155             cmd_buf->skb = NULL;
0156         }
0157         cmd_buf++;
0158     }
0159 
0160     spin_unlock(&tx_ring->tx_clean_lock);
0161 }
0162 
0163 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
0164 {
0165     struct qlcnic_recv_context *recv_ctx;
0166     struct qlcnic_host_rds_ring *rds_ring;
0167     int ring;
0168 
0169     recv_ctx = adapter->recv_ctx;
0170 
0171     if (recv_ctx->rds_rings == NULL)
0172         return;
0173 
0174     for (ring = 0; ring < adapter->max_rds_rings; ring++) {
0175         rds_ring = &recv_ctx->rds_rings[ring];
0176         vfree(rds_ring->rx_buf_arr);
0177         rds_ring->rx_buf_arr = NULL;
0178     }
0179     kfree(recv_ctx->rds_rings);
0180 }
0181 
0182 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
0183 {
0184     struct qlcnic_recv_context *recv_ctx;
0185     struct qlcnic_host_rds_ring *rds_ring;
0186     struct qlcnic_host_sds_ring *sds_ring;
0187     struct qlcnic_rx_buffer *rx_buf;
0188     int ring, i;
0189 
0190     recv_ctx = adapter->recv_ctx;
0191 
0192     rds_ring = kcalloc(adapter->max_rds_rings,
0193                sizeof(struct qlcnic_host_rds_ring), GFP_KERNEL);
0194     if (rds_ring == NULL)
0195         goto err_out;
0196 
0197     recv_ctx->rds_rings = rds_ring;
0198 
0199     for (ring = 0; ring < adapter->max_rds_rings; ring++) {
0200         rds_ring = &recv_ctx->rds_rings[ring];
0201         switch (ring) {
0202         case RCV_RING_NORMAL:
0203             rds_ring->num_desc = adapter->num_rxd;
0204             rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
0205             rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
0206             break;
0207 
0208         case RCV_RING_JUMBO:
0209             rds_ring->num_desc = adapter->num_jumbo_rxd;
0210             rds_ring->dma_size =
0211                 QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
0212 
0213             if (adapter->ahw->capabilities &
0214                 QLCNIC_FW_CAPABILITY_HW_LRO)
0215                 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
0216 
0217             rds_ring->skb_size =
0218                 rds_ring->dma_size + NET_IP_ALIGN;
0219             break;
0220         }
0221         rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
0222         if (rds_ring->rx_buf_arr == NULL)
0223             goto err_out;
0224 
0225         INIT_LIST_HEAD(&rds_ring->free_list);
0226         /*
0227          * Now go through all of them, set reference handles
0228          * and put them in the queues.
0229          */
0230         rx_buf = rds_ring->rx_buf_arr;
0231         for (i = 0; i < rds_ring->num_desc; i++) {
0232             list_add_tail(&rx_buf->list,
0233                     &rds_ring->free_list);
0234             rx_buf->ref_handle = i;
0235             rx_buf++;
0236         }
0237         spin_lock_init(&rds_ring->lock);
0238     }
0239 
0240     for (ring = 0; ring < adapter->drv_sds_rings; ring++) {
0241         sds_ring = &recv_ctx->sds_rings[ring];
0242         sds_ring->irq = adapter->msix_entries[ring].vector;
0243         sds_ring->adapter = adapter;
0244         sds_ring->num_desc = adapter->num_rxd;
0245         if (qlcnic_82xx_check(adapter)) {
0246             if (qlcnic_check_multi_tx(adapter) &&
0247                 !adapter->ahw->diag_test)
0248                 sds_ring->tx_ring = &adapter->tx_ring[ring];
0249             else
0250                 sds_ring->tx_ring = &adapter->tx_ring[0];
0251         }
0252         for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
0253             INIT_LIST_HEAD(&sds_ring->free_list[i]);
0254     }
0255 
0256     return 0;
0257 
0258 err_out:
0259     qlcnic_free_sw_resources(adapter);
0260     return -ENOMEM;
0261 }
0262 
0263 /*
0264  * Utility to translate from internal Phantom CRB address
0265  * to external PCI CRB address.
0266  */
0267 static u32 qlcnic_decode_crb_addr(u32 addr)
0268 {
0269     int i;
0270     u32 base_addr, offset, pci_base;
0271 
0272     crb_addr_transform_setup();
0273 
0274     pci_base = QLCNIC_ADDR_ERROR;
0275     base_addr = addr & 0xfff00000;
0276     offset = addr & 0x000fffff;
0277 
0278     for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
0279         if (crb_addr_xform[i] == base_addr) {
0280             pci_base = i << 20;
0281             break;
0282         }
0283     }
0284     if (pci_base == QLCNIC_ADDR_ERROR)
0285         return pci_base;
0286     else
0287         return pci_base + offset;
0288 }
0289 
0290 #define QLCNIC_MAX_ROM_WAIT_USEC    100
0291 
0292 static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
0293 {
0294     long timeout = 0;
0295     long done = 0;
0296     int err = 0;
0297 
0298     cond_resched();
0299     while (done == 0) {
0300         done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS, &err);
0301         done &= 2;
0302         if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
0303             dev_err(&adapter->pdev->dev,
0304                 "Timeout reached  waiting for rom done");
0305             return -EIO;
0306         }
0307         udelay(1);
0308     }
0309     return 0;
0310 }
0311 
0312 static int do_rom_fast_read(struct qlcnic_adapter *adapter,
0313                 u32 addr, u32 *valp)
0314 {
0315     int err = 0;
0316 
0317     QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
0318     QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
0319     QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
0320     QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
0321     if (qlcnic_wait_rom_done(adapter)) {
0322         dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
0323         return -EIO;
0324     }
0325     /* reset abyte_cnt and dummy_byte_cnt */
0326     QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
0327     udelay(10);
0328     QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
0329 
0330     *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA, &err);
0331     if (err == -EIO)
0332         return err;
0333     return 0;
0334 }
0335 
0336 static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
0337                   u8 *bytes, size_t size)
0338 {
0339     int addridx;
0340     int ret = 0;
0341 
0342     for (addridx = addr; addridx < (addr + size); addridx += 4) {
0343         int v;
0344         ret = do_rom_fast_read(adapter, addridx, &v);
0345         if (ret != 0)
0346             break;
0347         *(__le32 *)bytes = cpu_to_le32(v);
0348         bytes += 4;
0349     }
0350 
0351     return ret;
0352 }
0353 
0354 int
0355 qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
0356                 u8 *bytes, size_t size)
0357 {
0358     int ret;
0359 
0360     ret = qlcnic_rom_lock(adapter);
0361     if (ret < 0)
0362         return ret;
0363 
0364     ret = do_rom_fast_read_words(adapter, addr, bytes, size);
0365 
0366     qlcnic_rom_unlock(adapter);
0367     return ret;
0368 }
0369 
0370 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp)
0371 {
0372     int ret;
0373 
0374     if (qlcnic_rom_lock(adapter) != 0)
0375         return -EIO;
0376 
0377     ret = do_rom_fast_read(adapter, addr, valp);
0378     qlcnic_rom_unlock(adapter);
0379     return ret;
0380 }
0381 
0382 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
0383 {
0384     int addr, err = 0;
0385     int i, n, init_delay;
0386     struct crb_addr_pair *buf;
0387     unsigned offset;
0388     u32 off, val;
0389     struct pci_dev *pdev = adapter->pdev;
0390 
0391     QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0);
0392     QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0);
0393 
0394     /* Halt all the indiviual PEGs and other blocks */
0395     /* disable all I2Q */
0396     QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0);
0397     QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0);
0398     QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0);
0399     QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0);
0400     QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0);
0401     QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0);
0402 
0403     /* disable all niu interrupts */
0404     QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff);
0405     /* disable xge rx/tx */
0406     QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00);
0407     /* disable xg1 rx/tx */
0408     QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00);
0409     /* disable sideband mac */
0410     QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00);
0411     /* disable ap0 mac */
0412     QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00);
0413     /* disable ap1 mac */
0414     QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00);
0415 
0416     /* halt sre */
0417     val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000, &err);
0418     if (err == -EIO)
0419         return err;
0420     QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1)));
0421 
0422     /* halt epg */
0423     QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1);
0424 
0425     /* halt timers */
0426     QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0);
0427     QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0);
0428     QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0);
0429     QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0);
0430     QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0);
0431     QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0);
0432     /* halt pegs */
0433     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1);
0434     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1);
0435     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1);
0436     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1);
0437     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1);
0438     msleep(20);
0439 
0440     /* big hammer don't reset CAM block on reset */
0441     QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
0442 
0443     /* Init HW CRB block */
0444     if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
0445             qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
0446         dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
0447         return -EIO;
0448     }
0449     offset = n & 0xffffU;
0450     n = (n >> 16) & 0xffffU;
0451 
0452     if (n >= 1024) {
0453         dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
0454         return -EIO;
0455     }
0456 
0457     buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
0458     if (buf == NULL)
0459         return -ENOMEM;
0460 
0461     for (i = 0; i < n; i++) {
0462         if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
0463         qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
0464             kfree(buf);
0465             return -EIO;
0466         }
0467 
0468         buf[i].addr = addr;
0469         buf[i].data = val;
0470     }
0471 
0472     for (i = 0; i < n; i++) {
0473 
0474         off = qlcnic_decode_crb_addr(buf[i].addr);
0475         if (off == QLCNIC_ADDR_ERROR) {
0476             dev_err(&pdev->dev, "CRB init value out of range %x\n",
0477                     buf[i].addr);
0478             continue;
0479         }
0480         off += QLCNIC_PCI_CRBSPACE;
0481 
0482         if (off & 1)
0483             continue;
0484 
0485         /* skipping cold reboot MAGIC */
0486         if (off == QLCNIC_CAM_RAM(0x1fc))
0487             continue;
0488         if (off == (QLCNIC_CRB_I2C0 + 0x1c))
0489             continue;
0490         if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
0491             continue;
0492         if (off == (ROMUSB_GLB + 0xa8))
0493             continue;
0494         if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
0495             continue;
0496         if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
0497             continue;
0498         if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
0499             continue;
0500         if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
0501             continue;
0502         /* skip the function enable register */
0503         if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
0504             continue;
0505         if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
0506             continue;
0507         if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
0508             continue;
0509 
0510         init_delay = 1;
0511         /* After writing this register, HW needs time for CRB */
0512         /* to quiet down (else crb_window returns 0xffffffff) */
0513         if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
0514             init_delay = 1000;
0515 
0516         QLCWR32(adapter, off, buf[i].data);
0517 
0518         msleep(init_delay);
0519     }
0520     kfree(buf);
0521 
0522     /* Initialize protocol process engine */
0523     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
0524     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
0525     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
0526     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
0527     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
0528     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
0529     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
0530     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
0531     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
0532     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
0533     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
0534     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
0535     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
0536     usleep_range(1000, 1500);
0537 
0538     QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
0539     QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
0540 
0541     return 0;
0542 }
0543 
0544 static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
0545 {
0546     u32 val;
0547     int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
0548 
0549     do {
0550         val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE);
0551 
0552         switch (val) {
0553         case PHAN_INITIALIZE_COMPLETE:
0554         case PHAN_INITIALIZE_ACK:
0555             return 0;
0556         case PHAN_INITIALIZE_FAILED:
0557             goto out_err;
0558         default:
0559             break;
0560         }
0561 
0562         msleep(QLCNIC_CMDPEG_CHECK_DELAY);
0563 
0564     } while (--retries);
0565 
0566     QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE,
0567                 PHAN_INITIALIZE_FAILED);
0568 
0569 out_err:
0570     dev_err(&adapter->pdev->dev, "Command Peg initialization not "
0571               "complete, state: 0x%x.\n", val);
0572     return -EIO;
0573 }
0574 
0575 static int
0576 qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
0577 {
0578     u32 val;
0579     int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
0580 
0581     do {
0582         val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE);
0583 
0584         if (val == PHAN_PEG_RCV_INITIALIZED)
0585             return 0;
0586 
0587         msleep(QLCNIC_RCVPEG_CHECK_DELAY);
0588 
0589     } while (--retries);
0590 
0591     dev_err(&adapter->pdev->dev, "Receive Peg initialization not complete, state: 0x%x.\n",
0592         val);
0593     return -EIO;
0594 }
0595 
0596 int
0597 qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
0598 {
0599     int err;
0600 
0601     err = qlcnic_cmd_peg_ready(adapter);
0602     if (err)
0603         return err;
0604 
0605     err = qlcnic_receive_peg_ready(adapter);
0606     if (err)
0607         return err;
0608 
0609     QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
0610 
0611     return err;
0612 }
0613 
0614 int
0615 qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
0616 
0617     int timeo;
0618     u32 val;
0619 
0620     val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
0621     val = QLC_DEV_GET_DRV(val, adapter->portnum);
0622     if ((val & 0x3) != QLCNIC_TYPE_NIC) {
0623         dev_err(&adapter->pdev->dev,
0624             "Not an Ethernet NIC func=%u\n", val);
0625         return -EIO;
0626     }
0627     adapter->ahw->physical_port = (val >> 2);
0628     if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
0629         timeo = QLCNIC_INIT_TIMEOUT_SECS;
0630 
0631     adapter->dev_init_timeo = timeo;
0632 
0633     if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
0634         timeo = QLCNIC_RESET_TIMEOUT_SECS;
0635 
0636     adapter->reset_ack_timeo = timeo;
0637 
0638     return 0;
0639 }
0640 
0641 static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
0642                 struct qlcnic_flt_entry *region_entry)
0643 {
0644     struct qlcnic_flt_header flt_hdr;
0645     struct qlcnic_flt_entry *flt_entry;
0646     int i = 0, ret;
0647     u32 entry_size;
0648 
0649     memset(region_entry, 0, sizeof(struct qlcnic_flt_entry));
0650     ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION,
0651                      (u8 *)&flt_hdr,
0652                      sizeof(struct qlcnic_flt_header));
0653     if (ret) {
0654         dev_warn(&adapter->pdev->dev,
0655              "error reading flash layout header\n");
0656         return -EIO;
0657     }
0658 
0659     entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
0660     flt_entry = vzalloc(entry_size);
0661     if (flt_entry == NULL)
0662         return -EIO;
0663 
0664     ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION +
0665                      sizeof(struct qlcnic_flt_header),
0666                      (u8 *)flt_entry, entry_size);
0667     if (ret) {
0668         dev_warn(&adapter->pdev->dev,
0669              "error reading flash layout entries\n");
0670         goto err_out;
0671     }
0672 
0673     while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) {
0674         if (flt_entry[i].region == region)
0675             break;
0676         i++;
0677     }
0678     if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) {
0679         dev_warn(&adapter->pdev->dev,
0680              "region=%x not found in %d regions\n", region, i);
0681         ret = -EIO;
0682         goto err_out;
0683     }
0684     memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry));
0685 
0686 err_out:
0687     vfree(flt_entry);
0688     return ret;
0689 }
0690 
0691 int
0692 qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
0693 {
0694     struct qlcnic_flt_entry fw_entry;
0695     u32 ver = -1, min_ver;
0696     int ret;
0697 
0698     if (adapter->ahw->revision_id == QLCNIC_P3P_C0)
0699         ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION,
0700                          &fw_entry);
0701     else
0702         ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION,
0703                          &fw_entry);
0704 
0705     if (!ret)
0706         /* 0-4:-signature,  4-8:-fw version */
0707         qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4,
0708                      (int *)&ver);
0709     else
0710         qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET,
0711                      (int *)&ver);
0712 
0713     ver = QLCNIC_DECODE_VERSION(ver);
0714     min_ver = QLCNIC_MIN_FW_VERSION;
0715 
0716     if (ver < min_ver) {
0717         dev_err(&adapter->pdev->dev,
0718             "firmware version %d.%d.%d unsupported."
0719             "Min supported version %d.%d.%d\n",
0720             _major(ver), _minor(ver), _build(ver),
0721             _major(min_ver), _minor(min_ver), _build(min_ver));
0722         return -EINVAL;
0723     }
0724 
0725     return 0;
0726 }
0727 
0728 static int
0729 qlcnic_has_mn(struct qlcnic_adapter *adapter)
0730 {
0731     u32 capability = 0;
0732     int err = 0;
0733 
0734     capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY, &err);
0735     if (err == -EIO)
0736         return err;
0737     if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
0738         return 1;
0739 
0740     return 0;
0741 }
0742 
0743 static
0744 struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
0745 {
0746     u32 i, entries;
0747     struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
0748     entries = le32_to_cpu(directory->num_entries);
0749 
0750     for (i = 0; i < entries; i++) {
0751 
0752         u32 offs = le32_to_cpu(directory->findex) +
0753                i * le32_to_cpu(directory->entry_size);
0754         u32 tab_type = le32_to_cpu(*((__le32 *)&unirom[offs] + 8));
0755 
0756         if (tab_type == section)
0757             return (struct uni_table_desc *) &unirom[offs];
0758     }
0759 
0760     return NULL;
0761 }
0762 
0763 #define FILEHEADER_SIZE (14 * 4)
0764 
0765 static int
0766 qlcnic_validate_header(struct qlcnic_adapter *adapter)
0767 {
0768     const u8 *unirom = adapter->fw->data;
0769     struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
0770     u32 entries, entry_size, tab_size, fw_file_size;
0771 
0772     fw_file_size = adapter->fw->size;
0773 
0774     if (fw_file_size < FILEHEADER_SIZE)
0775         return -EINVAL;
0776 
0777     entries = le32_to_cpu(directory->num_entries);
0778     entry_size = le32_to_cpu(directory->entry_size);
0779     tab_size = le32_to_cpu(directory->findex) + (entries * entry_size);
0780 
0781     if (fw_file_size < tab_size)
0782         return -EINVAL;
0783 
0784     return 0;
0785 }
0786 
0787 static int
0788 qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
0789 {
0790     struct uni_table_desc *tab_desc;
0791     struct uni_data_desc *descr;
0792     u32 offs, tab_size, data_size, idx;
0793     const u8 *unirom = adapter->fw->data;
0794     __le32 temp;
0795 
0796     temp = *((__le32 *)&unirom[adapter->file_prd_off] +
0797          QLCNIC_UNI_BOOTLD_IDX_OFF);
0798     idx = le32_to_cpu(temp);
0799     tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
0800 
0801     if (!tab_desc)
0802         return -EINVAL;
0803 
0804     tab_size = le32_to_cpu(tab_desc->findex) +
0805            le32_to_cpu(tab_desc->entry_size) * (idx + 1);
0806 
0807     if (adapter->fw->size < tab_size)
0808         return -EINVAL;
0809 
0810     offs = le32_to_cpu(tab_desc->findex) +
0811            le32_to_cpu(tab_desc->entry_size) * idx;
0812     descr = (struct uni_data_desc *)&unirom[offs];
0813 
0814     data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
0815 
0816     if (adapter->fw->size < data_size)
0817         return -EINVAL;
0818 
0819     return 0;
0820 }
0821 
0822 static int
0823 qlcnic_validate_fw(struct qlcnic_adapter *adapter)
0824 {
0825     struct uni_table_desc *tab_desc;
0826     struct uni_data_desc *descr;
0827     const u8 *unirom = adapter->fw->data;
0828     u32 offs, tab_size, data_size, idx;
0829     __le32 temp;
0830 
0831     temp = *((__le32 *)&unirom[adapter->file_prd_off] +
0832          QLCNIC_UNI_FIRMWARE_IDX_OFF);
0833     idx = le32_to_cpu(temp);
0834     tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
0835 
0836     if (!tab_desc)
0837         return -EINVAL;
0838 
0839     tab_size = le32_to_cpu(tab_desc->findex) +
0840            le32_to_cpu(tab_desc->entry_size) * (idx + 1);
0841 
0842     if (adapter->fw->size < tab_size)
0843         return -EINVAL;
0844 
0845     offs = le32_to_cpu(tab_desc->findex) +
0846            le32_to_cpu(tab_desc->entry_size) * idx;
0847     descr = (struct uni_data_desc *)&unirom[offs];
0848     data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
0849 
0850     if (adapter->fw->size < data_size)
0851         return -EINVAL;
0852 
0853     return 0;
0854 }
0855 
0856 static int
0857 qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
0858 {
0859     struct uni_table_desc *ptab_descr;
0860     const u8 *unirom = adapter->fw->data;
0861     int mn_present = qlcnic_has_mn(adapter);
0862     u32 entries, entry_size, tab_size, i;
0863     __le32 temp;
0864 
0865     ptab_descr = qlcnic_get_table_desc(unirom,
0866                 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
0867     if (!ptab_descr)
0868         return -EINVAL;
0869 
0870     entries = le32_to_cpu(ptab_descr->num_entries);
0871     entry_size = le32_to_cpu(ptab_descr->entry_size);
0872     tab_size = le32_to_cpu(ptab_descr->findex) + (entries * entry_size);
0873 
0874     if (adapter->fw->size < tab_size)
0875         return -EINVAL;
0876 
0877 nomn:
0878     for (i = 0; i < entries; i++) {
0879 
0880         u32 flags, file_chiprev, offs;
0881         u8 chiprev = adapter->ahw->revision_id;
0882         u32 flagbit;
0883 
0884         offs = le32_to_cpu(ptab_descr->findex) +
0885                i * le32_to_cpu(ptab_descr->entry_size);
0886         temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_FLAGS_OFF);
0887         flags = le32_to_cpu(temp);
0888         temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_CHIP_REV_OFF);
0889         file_chiprev = le32_to_cpu(temp);
0890 
0891         flagbit = mn_present ? 1 : 2;
0892 
0893         if ((chiprev == file_chiprev) &&
0894                     ((1ULL << flagbit) & flags)) {
0895             adapter->file_prd_off = offs;
0896             return 0;
0897         }
0898     }
0899     if (mn_present) {
0900         mn_present = 0;
0901         goto nomn;
0902     }
0903     return -EINVAL;
0904 }
0905 
0906 static int
0907 qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
0908 {
0909     if (qlcnic_validate_header(adapter)) {
0910         dev_err(&adapter->pdev->dev,
0911                 "unified image: header validation failed\n");
0912         return -EINVAL;
0913     }
0914 
0915     if (qlcnic_validate_product_offs(adapter)) {
0916         dev_err(&adapter->pdev->dev,
0917                 "unified image: product validation failed\n");
0918         return -EINVAL;
0919     }
0920 
0921     if (qlcnic_validate_bootld(adapter)) {
0922         dev_err(&adapter->pdev->dev,
0923                 "unified image: bootld validation failed\n");
0924         return -EINVAL;
0925     }
0926 
0927     if (qlcnic_validate_fw(adapter)) {
0928         dev_err(&adapter->pdev->dev,
0929                 "unified image: firmware validation failed\n");
0930         return -EINVAL;
0931     }
0932 
0933     return 0;
0934 }
0935 
0936 static
0937 struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
0938             u32 section, u32 idx_offset)
0939 {
0940     const u8 *unirom = adapter->fw->data;
0941     struct uni_table_desc *tab_desc;
0942     u32 offs, idx;
0943     __le32 temp;
0944 
0945     temp = *((__le32 *)&unirom[adapter->file_prd_off] + idx_offset);
0946     idx = le32_to_cpu(temp);
0947 
0948     tab_desc = qlcnic_get_table_desc(unirom, section);
0949 
0950     if (tab_desc == NULL)
0951         return NULL;
0952 
0953     offs = le32_to_cpu(tab_desc->findex) +
0954            le32_to_cpu(tab_desc->entry_size) * idx;
0955 
0956     return (struct uni_data_desc *)&unirom[offs];
0957 }
0958 
0959 static u8 *
0960 qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
0961 {
0962     u32 offs = QLCNIC_BOOTLD_START;
0963     struct uni_data_desc *data_desc;
0964 
0965     data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_BOOTLD,
0966                      QLCNIC_UNI_BOOTLD_IDX_OFF);
0967 
0968     if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
0969         offs = le32_to_cpu(data_desc->findex);
0970 
0971     return (u8 *)&adapter->fw->data[offs];
0972 }
0973 
0974 static u8 *
0975 qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
0976 {
0977     u32 offs = QLCNIC_IMAGE_START;
0978     struct uni_data_desc *data_desc;
0979 
0980     data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
0981                      QLCNIC_UNI_FIRMWARE_IDX_OFF);
0982     if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
0983         offs = le32_to_cpu(data_desc->findex);
0984 
0985     return (u8 *)&adapter->fw->data[offs];
0986 }
0987 
0988 static u32 qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
0989 {
0990     struct uni_data_desc *data_desc;
0991     const u8 *unirom = adapter->fw->data;
0992 
0993     data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
0994                      QLCNIC_UNI_FIRMWARE_IDX_OFF);
0995 
0996     if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
0997         return le32_to_cpu(data_desc->size);
0998     else
0999         return le32_to_cpu(*(__le32 *)&unirom[QLCNIC_FW_SIZE_OFFSET]);
1000 }
1001 
1002 static u32 qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
1003 {
1004     struct uni_data_desc *fw_data_desc;
1005     const struct firmware *fw = adapter->fw;
1006     u32 major, minor, sub;
1007     __le32 version_offset;
1008     const u8 *ver_str;
1009     int i, ret;
1010 
1011     if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1012         version_offset = *(__le32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET];
1013         return le32_to_cpu(version_offset);
1014     }
1015 
1016     fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
1017             QLCNIC_UNI_FIRMWARE_IDX_OFF);
1018     ver_str = fw->data + le32_to_cpu(fw_data_desc->findex) +
1019           le32_to_cpu(fw_data_desc->size) - 17;
1020 
1021     for (i = 0; i < 12; i++) {
1022         if (!strncmp(&ver_str[i], "REV=", 4)) {
1023             ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
1024                     &major, &minor, &sub);
1025             if (ret != 3)
1026                 return 0;
1027             else
1028                 return major + (minor << 8) + (sub << 16);
1029         }
1030     }
1031 
1032     return 0;
1033 }
1034 
1035 static u32 qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
1036 {
1037     const struct firmware *fw = adapter->fw;
1038     u32 bios_ver, prd_off = adapter->file_prd_off;
1039     u8 *version_offset;
1040     __le32 temp;
1041 
1042     if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1043         version_offset = (u8 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET];
1044         return le32_to_cpu(*(__le32 *)version_offset);
1045     }
1046 
1047     temp = *((__le32 *)(&fw->data[prd_off]) + QLCNIC_UNI_BIOS_VERSION_OFF);
1048     bios_ver = le32_to_cpu(temp);
1049 
1050     return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
1051 }
1052 
1053 static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
1054 {
1055     if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
1056         dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
1057 
1058     qlcnic_pcie_sem_unlock(adapter, 2);
1059 }
1060 
1061 static int
1062 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
1063 {
1064     u32 heartbeat, ret = -EIO;
1065     int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
1066 
1067     adapter->heartbeat = QLC_SHARED_REG_RD32(adapter,
1068                          QLCNIC_PEG_ALIVE_COUNTER);
1069 
1070     do {
1071         msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
1072         heartbeat = QLC_SHARED_REG_RD32(adapter,
1073                         QLCNIC_PEG_ALIVE_COUNTER);
1074         if (heartbeat != adapter->heartbeat) {
1075             ret = QLCNIC_RCODE_SUCCESS;
1076             break;
1077         }
1078     } while (--retries);
1079 
1080     return ret;
1081 }
1082 
1083 int
1084 qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
1085 {
1086     if ((adapter->flags & QLCNIC_FW_HANG) ||
1087             qlcnic_check_fw_hearbeat(adapter)) {
1088         qlcnic_rom_lock_recovery(adapter);
1089         return 1;
1090     }
1091 
1092     if (adapter->need_fw_reset)
1093         return 1;
1094 
1095     if (adapter->fw)
1096         return 1;
1097 
1098     return 0;
1099 }
1100 
1101 static const char *fw_name[] = {
1102     QLCNIC_UNIFIED_ROMIMAGE_NAME,
1103     QLCNIC_FLASH_ROMIMAGE_NAME,
1104 };
1105 
1106 int
1107 qlcnic_load_firmware(struct qlcnic_adapter *adapter)
1108 {
1109     __le64 *ptr64;
1110     u32 i, flashaddr, size;
1111     const struct firmware *fw = adapter->fw;
1112     struct pci_dev *pdev = adapter->pdev;
1113 
1114     dev_info(&pdev->dev, "loading firmware from %s\n",
1115          fw_name[adapter->ahw->fw_type]);
1116 
1117     if (fw) {
1118         u64 data;
1119 
1120         size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1121 
1122         ptr64 = (__le64 *)qlcnic_get_bootld_offs(adapter);
1123         flashaddr = QLCNIC_BOOTLD_START;
1124 
1125         for (i = 0; i < size; i++) {
1126             data = le64_to_cpu(ptr64[i]);
1127 
1128             if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
1129                 return -EIO;
1130 
1131             flashaddr += 8;
1132         }
1133 
1134         size = qlcnic_get_fw_size(adapter) / 8;
1135 
1136         ptr64 = (__le64 *)qlcnic_get_fw_offs(adapter);
1137         flashaddr = QLCNIC_IMAGE_START;
1138 
1139         for (i = 0; i < size; i++) {
1140             data = le64_to_cpu(ptr64[i]);
1141 
1142             if (qlcnic_pci_mem_write_2M(adapter,
1143                         flashaddr, data))
1144                 return -EIO;
1145 
1146             flashaddr += 8;
1147         }
1148 
1149         size = qlcnic_get_fw_size(adapter) % 8;
1150         if (size) {
1151             data = le64_to_cpu(ptr64[i]);
1152 
1153             if (qlcnic_pci_mem_write_2M(adapter,
1154                         flashaddr, data))
1155                 return -EIO;
1156         }
1157 
1158     } else {
1159         u64 data;
1160         u32 hi, lo;
1161         int ret;
1162         struct qlcnic_flt_entry bootld_entry;
1163 
1164         ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION,
1165                     &bootld_entry);
1166         if (!ret) {
1167             size = bootld_entry.size / 8;
1168             flashaddr = bootld_entry.start_addr;
1169         } else {
1170             size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1171             flashaddr = QLCNIC_BOOTLD_START;
1172             dev_info(&pdev->dev,
1173                 "using legacy method to get flash fw region");
1174         }
1175 
1176         for (i = 0; i < size; i++) {
1177             if (qlcnic_rom_fast_read(adapter,
1178                     flashaddr, (int *)&lo) != 0)
1179                 return -EIO;
1180             if (qlcnic_rom_fast_read(adapter,
1181                     flashaddr + 4, (int *)&hi) != 0)
1182                 return -EIO;
1183 
1184             data = (((u64)hi << 32) | lo);
1185 
1186             if (qlcnic_pci_mem_write_2M(adapter,
1187                         flashaddr, data))
1188                 return -EIO;
1189 
1190             flashaddr += 8;
1191         }
1192     }
1193     usleep_range(1000, 1500);
1194 
1195     QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
1196     QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
1197     return 0;
1198 }
1199 
1200 static int
1201 qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
1202 {
1203     u32 val;
1204     u32 ver, bios, min_size;
1205     struct pci_dev *pdev = adapter->pdev;
1206     const struct firmware *fw = adapter->fw;
1207     u8 fw_type = adapter->ahw->fw_type;
1208 
1209     if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
1210         if (qlcnic_validate_unified_romimage(adapter))
1211             return -EINVAL;
1212 
1213         min_size = QLCNIC_UNI_FW_MIN_SIZE;
1214     } else {
1215         val = le32_to_cpu(*(__le32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
1216         if (val != QLCNIC_BDINFO_MAGIC)
1217             return -EINVAL;
1218 
1219         min_size = QLCNIC_FW_MIN_SIZE;
1220     }
1221 
1222     if (fw->size < min_size)
1223         return -EINVAL;
1224 
1225     val = qlcnic_get_fw_version(adapter);
1226     ver = QLCNIC_DECODE_VERSION(val);
1227 
1228     if (ver < QLCNIC_MIN_FW_VERSION) {
1229         dev_err(&pdev->dev,
1230                 "%s: firmware version %d.%d.%d unsupported\n",
1231         fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
1232         return -EINVAL;
1233     }
1234 
1235     val = qlcnic_get_bios_version(adapter);
1236     qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
1237     if (val != bios) {
1238         dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1239                 fw_name[fw_type]);
1240         return -EINVAL;
1241     }
1242 
1243     QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC);
1244     return 0;
1245 }
1246 
1247 static void
1248 qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
1249 {
1250     u8 fw_type;
1251 
1252     switch (adapter->ahw->fw_type) {
1253     case QLCNIC_UNKNOWN_ROMIMAGE:
1254         fw_type = QLCNIC_UNIFIED_ROMIMAGE;
1255         break;
1256 
1257     case QLCNIC_UNIFIED_ROMIMAGE:
1258     default:
1259         fw_type = QLCNIC_FLASH_ROMIMAGE;
1260         break;
1261     }
1262 
1263     adapter->ahw->fw_type = fw_type;
1264 }
1265 
1266 
1267 
1268 void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
1269 {
1270     struct pci_dev *pdev = adapter->pdev;
1271     int rc;
1272 
1273     adapter->ahw->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
1274 
1275 next:
1276     qlcnic_get_next_fwtype(adapter);
1277 
1278     if (adapter->ahw->fw_type == QLCNIC_FLASH_ROMIMAGE) {
1279         adapter->fw = NULL;
1280     } else {
1281         rc = request_firmware(&adapter->fw,
1282                       fw_name[adapter->ahw->fw_type],
1283                       &pdev->dev);
1284         if (rc != 0)
1285             goto next;
1286 
1287         rc = qlcnic_validate_firmware(adapter);
1288         if (rc != 0) {
1289             release_firmware(adapter->fw);
1290             usleep_range(1000, 1500);
1291             goto next;
1292         }
1293     }
1294 }
1295 
1296 
1297 void
1298 qlcnic_release_firmware(struct qlcnic_adapter *adapter)
1299 {
1300     release_firmware(adapter->fw);
1301     adapter->fw = NULL;
1302 }
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