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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * QLogic qlcnic NIC Driver
0004  * Copyright (c) 2009-2013 QLogic Corporation
0005  */
0006 
0007 #include "qlcnic.h"
0008 
0009 static const struct qlcnic_mailbox_metadata qlcnic_mbx_tbl[] = {
0010     {QLCNIC_CMD_CREATE_RX_CTX, 4, 1},
0011     {QLCNIC_CMD_DESTROY_RX_CTX, 2, 1},
0012     {QLCNIC_CMD_CREATE_TX_CTX, 4, 1},
0013     {QLCNIC_CMD_DESTROY_TX_CTX, 3, 1},
0014     {QLCNIC_CMD_INTRPT_TEST, 4, 1},
0015     {QLCNIC_CMD_SET_MTU, 4, 1},
0016     {QLCNIC_CMD_READ_PHY, 4, 2},
0017     {QLCNIC_CMD_WRITE_PHY, 5, 1},
0018     {QLCNIC_CMD_READ_HW_REG, 4, 1},
0019     {QLCNIC_CMD_GET_FLOW_CTL, 4, 2},
0020     {QLCNIC_CMD_SET_FLOW_CTL, 4, 1},
0021     {QLCNIC_CMD_READ_MAX_MTU, 4, 2},
0022     {QLCNIC_CMD_READ_MAX_LRO, 4, 2},
0023     {QLCNIC_CMD_MAC_ADDRESS, 4, 3},
0024     {QLCNIC_CMD_GET_PCI_INFO, 4, 1},
0025     {QLCNIC_CMD_GET_NIC_INFO, 4, 1},
0026     {QLCNIC_CMD_SET_NIC_INFO, 4, 1},
0027     {QLCNIC_CMD_GET_ESWITCH_CAPABILITY, 4, 3},
0028     {QLCNIC_CMD_TOGGLE_ESWITCH, 4, 1},
0029     {QLCNIC_CMD_GET_ESWITCH_STATUS, 4, 3},
0030     {QLCNIC_CMD_SET_PORTMIRRORING, 4, 1},
0031     {QLCNIC_CMD_CONFIGURE_ESWITCH, 4, 1},
0032     {QLCNIC_CMD_GET_MAC_STATS, 4, 1},
0033     {QLCNIC_CMD_GET_ESWITCH_PORT_CONFIG, 4, 3},
0034     {QLCNIC_CMD_GET_ESWITCH_STATS, 4, 1},
0035     {QLCNIC_CMD_CONFIG_PORT, 4, 1},
0036     {QLCNIC_CMD_TEMP_SIZE, 4, 4},
0037     {QLCNIC_CMD_GET_TEMP_HDR, 4, 1},
0038     {QLCNIC_CMD_82XX_SET_DRV_VER, 4, 1},
0039     {QLCNIC_CMD_GET_LED_STATUS, 4, 2},
0040     {QLCNIC_CMD_MQ_TX_CONFIG_INTR, 2, 3},
0041     {QLCNIC_CMD_DCB_QUERY_CAP, 1, 2},
0042     {QLCNIC_CMD_DCB_QUERY_PARAM, 4, 1},
0043 };
0044 
0045 static inline u32 qlcnic_get_cmd_signature(struct qlcnic_hardware_context *ahw)
0046 {
0047     return (ahw->pci_func & 0xff) | ((ahw->fw_hal_version & 0xff) << 8) |
0048            (0xcafe << 16);
0049 }
0050 
0051 /* Allocate mailbox registers */
0052 int qlcnic_82xx_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
0053                    struct qlcnic_adapter *adapter, u32 type)
0054 {
0055     int i, size;
0056     const struct qlcnic_mailbox_metadata *mbx_tbl;
0057 
0058     mbx_tbl = qlcnic_mbx_tbl;
0059     size = ARRAY_SIZE(qlcnic_mbx_tbl);
0060     for (i = 0; i < size; i++) {
0061         if (type == mbx_tbl[i].cmd) {
0062             mbx->req.num = mbx_tbl[i].in_args;
0063             mbx->rsp.num = mbx_tbl[i].out_args;
0064             mbx->req.arg = kcalloc(mbx->req.num,
0065                            sizeof(u32), GFP_ATOMIC);
0066             if (!mbx->req.arg)
0067                 return -ENOMEM;
0068             mbx->rsp.arg = kcalloc(mbx->rsp.num,
0069                            sizeof(u32), GFP_ATOMIC);
0070             if (!mbx->rsp.arg) {
0071                 kfree(mbx->req.arg);
0072                 mbx->req.arg = NULL;
0073                 return -ENOMEM;
0074             }
0075             mbx->req.arg[0] = type;
0076             break;
0077         }
0078     }
0079     return 0;
0080 }
0081 
0082 /* Free up mailbox registers */
0083 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *cmd)
0084 {
0085     kfree(cmd->req.arg);
0086     cmd->req.arg = NULL;
0087     kfree(cmd->rsp.arg);
0088     cmd->rsp.arg = NULL;
0089 }
0090 
0091 static u32
0092 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
0093 {
0094     u32 rsp;
0095     int timeout = 0, err = 0;
0096 
0097     do {
0098         /* give atleast 1ms for firmware to respond */
0099         mdelay(1);
0100 
0101         if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
0102             return QLCNIC_CDRP_RSP_TIMEOUT;
0103 
0104         rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET, &err);
0105     } while (!QLCNIC_CDRP_IS_RSP(rsp));
0106 
0107     return rsp;
0108 }
0109 
0110 int qlcnic_82xx_issue_cmd(struct qlcnic_adapter *adapter,
0111               struct qlcnic_cmd_args *cmd)
0112 {
0113     int i, err = 0;
0114     u32 rsp;
0115     u32 signature;
0116     struct pci_dev *pdev = adapter->pdev;
0117     struct qlcnic_hardware_context *ahw = adapter->ahw;
0118     const char *fmt;
0119 
0120     signature = qlcnic_get_cmd_signature(ahw);
0121 
0122     /* Acquire semaphore before accessing CRB */
0123     if (qlcnic_api_lock(adapter)) {
0124         cmd->rsp.arg[0] = QLCNIC_RCODE_TIMEOUT;
0125         return cmd->rsp.arg[0];
0126     }
0127 
0128     QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
0129     for (i = 1; i < cmd->req.num; i++)
0130         QLCWR32(adapter, QLCNIC_CDRP_ARG(i), cmd->req.arg[i]);
0131     QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET,
0132         QLCNIC_CDRP_FORM_CMD(cmd->req.arg[0]));
0133     rsp = qlcnic_poll_rsp(adapter);
0134 
0135     if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
0136         dev_err(&pdev->dev, "command timeout, response = 0x%x\n", rsp);
0137         cmd->rsp.arg[0] = QLCNIC_RCODE_TIMEOUT;
0138     } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
0139         cmd->rsp.arg[0] = QLCRD32(adapter, QLCNIC_CDRP_ARG(1), &err);
0140         switch (cmd->rsp.arg[0]) {
0141         case QLCNIC_RCODE_INVALID_ARGS:
0142             fmt = "CDRP invalid args: [%d]\n";
0143             break;
0144         case QLCNIC_RCODE_NOT_SUPPORTED:
0145         case QLCNIC_RCODE_NOT_IMPL:
0146             fmt = "CDRP command not supported: [%d]\n";
0147             break;
0148         case QLCNIC_RCODE_NOT_PERMITTED:
0149             fmt = "CDRP requested action not permitted: [%d]\n";
0150             break;
0151         case QLCNIC_RCODE_INVALID:
0152             fmt = "CDRP invalid or unknown cmd received: [%d]\n";
0153             break;
0154         case QLCNIC_RCODE_TIMEOUT:
0155             fmt = "CDRP command timeout: [%d]\n";
0156             break;
0157         default:
0158             fmt = "CDRP command failed: [%d]\n";
0159             break;
0160         }
0161         dev_err(&pdev->dev, fmt, cmd->rsp.arg[0]);
0162         qlcnic_dump_mbx(adapter, cmd);
0163     } else if (rsp == QLCNIC_CDRP_RSP_OK)
0164         cmd->rsp.arg[0] = QLCNIC_RCODE_SUCCESS;
0165 
0166     for (i = 1; i < cmd->rsp.num; i++)
0167         cmd->rsp.arg[i] = QLCRD32(adapter, QLCNIC_CDRP_ARG(i), &err);
0168 
0169     /* Release semaphore */
0170     qlcnic_api_unlock(adapter);
0171     return cmd->rsp.arg[0];
0172 }
0173 
0174 int qlcnic_fw_cmd_set_drv_version(struct qlcnic_adapter *adapter, u32 fw_cmd)
0175 {
0176     struct qlcnic_cmd_args cmd;
0177     u32 arg1, arg2, arg3;
0178     char drv_string[12];
0179     int err = 0;
0180 
0181     memset(drv_string, 0, sizeof(drv_string));
0182     snprintf(drv_string, sizeof(drv_string), "%d"".""%d"".""%d",
0183          _QLCNIC_LINUX_MAJOR, _QLCNIC_LINUX_MINOR,
0184          _QLCNIC_LINUX_SUBVERSION);
0185 
0186     err = qlcnic_alloc_mbx_args(&cmd, adapter, fw_cmd);
0187     if (err)
0188         return err;
0189 
0190     memcpy(&arg1, drv_string, sizeof(u32));
0191     memcpy(&arg2, drv_string + 4, sizeof(u32));
0192     memcpy(&arg3, drv_string + 8, sizeof(u32));
0193 
0194     cmd.req.arg[1] = arg1;
0195     cmd.req.arg[2] = arg2;
0196     cmd.req.arg[3] = arg3;
0197 
0198     err = qlcnic_issue_cmd(adapter, &cmd);
0199     if (err) {
0200         dev_info(&adapter->pdev->dev,
0201              "Failed to set driver version in firmware\n");
0202         err = -EIO;
0203     }
0204     qlcnic_free_mbx_args(&cmd);
0205     return err;
0206 }
0207 
0208 int
0209 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
0210 {
0211     int err = 0;
0212     struct qlcnic_cmd_args cmd;
0213     struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
0214 
0215     if (recv_ctx->state != QLCNIC_HOST_CTX_STATE_ACTIVE)
0216         return err;
0217     err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_SET_MTU);
0218     if (err)
0219         return err;
0220 
0221     cmd.req.arg[1] = recv_ctx->context_id;
0222     cmd.req.arg[2] = mtu;
0223 
0224     err = qlcnic_issue_cmd(adapter, &cmd);
0225     if (err) {
0226         dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
0227         err = -EIO;
0228     }
0229     qlcnic_free_mbx_args(&cmd);
0230     return err;
0231 }
0232 
0233 int qlcnic_82xx_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
0234 {
0235     struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
0236     struct qlcnic_hardware_context *ahw = adapter->ahw;
0237     dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
0238     struct net_device *netdev = adapter->netdev;
0239     u32 temp_intr_crb_mode, temp_rds_crb_mode;
0240     struct qlcnic_cardrsp_rds_ring *prsp_rds;
0241     struct qlcnic_cardrsp_sds_ring *prsp_sds;
0242     struct qlcnic_hostrq_rds_ring *prq_rds;
0243     struct qlcnic_hostrq_sds_ring *prq_sds;
0244     struct qlcnic_host_rds_ring *rds_ring;
0245     struct qlcnic_host_sds_ring *sds_ring;
0246     struct qlcnic_cardrsp_rx_ctx *prsp;
0247     struct qlcnic_hostrq_rx_ctx *prq;
0248     u8 i, nrds_rings, nsds_rings;
0249     struct qlcnic_cmd_args cmd;
0250     size_t rq_size, rsp_size;
0251     u32 cap, reg, val, reg2;
0252     u64 phys_addr;
0253     u16 temp_u16;
0254     void *addr;
0255     int err;
0256 
0257     nrds_rings = adapter->max_rds_rings;
0258     nsds_rings = adapter->drv_sds_rings;
0259 
0260     rq_size = SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
0261                    nsds_rings);
0262     rsp_size = SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
0263                      nsds_rings);
0264 
0265     addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
0266                   &hostrq_phys_addr, GFP_KERNEL);
0267     if (addr == NULL)
0268         return -ENOMEM;
0269     prq = addr;
0270 
0271     addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
0272             &cardrsp_phys_addr, GFP_KERNEL);
0273     if (addr == NULL) {
0274         err = -ENOMEM;
0275         goto out_free_rq;
0276     }
0277     prsp = addr;
0278 
0279     prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
0280 
0281     cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
0282                         | QLCNIC_CAP0_VALIDOFF);
0283     cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
0284 
0285     if (qlcnic_check_multi_tx(adapter) &&
0286         !adapter->ahw->diag_test) {
0287         cap |= QLCNIC_CAP0_TX_MULTI;
0288     } else {
0289         temp_u16 = offsetof(struct qlcnic_hostrq_rx_ctx, msix_handler);
0290         prq->valid_field_offset = cpu_to_le16(temp_u16);
0291         prq->txrx_sds_binding = nsds_rings - 1;
0292         temp_intr_crb_mode = QLCNIC_HOST_INT_CRB_MODE_SHARED;
0293         prq->host_int_crb_mode = cpu_to_le32(temp_intr_crb_mode);
0294         temp_rds_crb_mode = QLCNIC_HOST_RDS_CRB_MODE_UNIQUE;
0295         prq->host_rds_crb_mode = cpu_to_le32(temp_rds_crb_mode);
0296     }
0297 
0298     prq->capabilities[0] = cpu_to_le32(cap);
0299 
0300     prq->num_rds_rings = cpu_to_le16(nrds_rings);
0301     prq->num_sds_rings = cpu_to_le16(nsds_rings);
0302     prq->rds_ring_offset = 0;
0303 
0304     val = le32_to_cpu(prq->rds_ring_offset) +
0305         (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
0306     prq->sds_ring_offset = cpu_to_le32(val);
0307 
0308     prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
0309             le32_to_cpu(prq->rds_ring_offset));
0310 
0311     for (i = 0; i < nrds_rings; i++) {
0312         rds_ring = &recv_ctx->rds_rings[i];
0313         rds_ring->producer = 0;
0314         prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
0315         prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
0316         prq_rds[i].ring_kind = cpu_to_le32(i);
0317         prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
0318     }
0319 
0320     prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
0321             le32_to_cpu(prq->sds_ring_offset));
0322 
0323     for (i = 0; i < nsds_rings; i++) {
0324         sds_ring = &recv_ctx->sds_rings[i];
0325         sds_ring->consumer = 0;
0326         memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
0327         prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
0328         prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
0329         if (qlcnic_check_multi_tx(adapter) &&
0330             !adapter->ahw->diag_test)
0331             prq_sds[i].msi_index = cpu_to_le16(ahw->intr_tbl[i].id);
0332         else
0333             prq_sds[i].msi_index = cpu_to_le16(i);
0334     }
0335 
0336     phys_addr = hostrq_phys_addr;
0337     err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CREATE_RX_CTX);
0338     if (err)
0339         goto out_free_rsp;
0340 
0341     cmd.req.arg[1] = MSD(phys_addr);
0342     cmd.req.arg[2] = LSD(phys_addr);
0343     cmd.req.arg[3] = rq_size;
0344     err = qlcnic_issue_cmd(adapter, &cmd);
0345     if (err) {
0346         dev_err(&adapter->pdev->dev,
0347             "Failed to create rx ctx in firmware%d\n", err);
0348         goto out_free_rsp;
0349     }
0350 
0351     prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
0352              &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
0353 
0354     for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
0355         rds_ring = &recv_ctx->rds_rings[i];
0356         reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
0357         rds_ring->crb_rcv_producer = ahw->pci_base0 + reg;
0358     }
0359 
0360     prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
0361             &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
0362 
0363     for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
0364         sds_ring = &recv_ctx->sds_rings[i];
0365         reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
0366         if (qlcnic_check_multi_tx(adapter) && !adapter->ahw->diag_test)
0367             reg2 = ahw->intr_tbl[i].src;
0368         else
0369             reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
0370 
0371         sds_ring->crb_intr_mask = ahw->pci_base0 + reg2;
0372         sds_ring->crb_sts_consumer = ahw->pci_base0 + reg;
0373     }
0374 
0375     recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
0376     recv_ctx->context_id = le16_to_cpu(prsp->context_id);
0377     recv_ctx->virt_port = prsp->virt_port;
0378 
0379     netdev_info(netdev, "Rx Context[%d] Created, state 0x%x\n",
0380             recv_ctx->context_id, recv_ctx->state);
0381     qlcnic_free_mbx_args(&cmd);
0382 
0383 out_free_rsp:
0384     dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp,
0385               cardrsp_phys_addr);
0386 out_free_rq:
0387     dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr);
0388 
0389     return err;
0390 }
0391 
0392 void qlcnic_82xx_fw_cmd_del_rx_ctx(struct qlcnic_adapter *adapter)
0393 {
0394     int err;
0395     struct qlcnic_cmd_args cmd;
0396     struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
0397 
0398     err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DESTROY_RX_CTX);
0399     if (err)
0400         return;
0401 
0402     cmd.req.arg[1] = recv_ctx->context_id;
0403     err = qlcnic_issue_cmd(adapter, &cmd);
0404     if (err)
0405         dev_err(&adapter->pdev->dev,
0406             "Failed to destroy rx ctx in firmware\n");
0407 
0408     recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
0409     qlcnic_free_mbx_args(&cmd);
0410 }
0411 
0412 int qlcnic_82xx_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter,
0413                      struct qlcnic_host_tx_ring *tx_ring,
0414                      int ring)
0415 {
0416     struct qlcnic_hardware_context *ahw = adapter->ahw;
0417     struct net_device *netdev = adapter->netdev;
0418     struct qlcnic_hostrq_tx_ctx *prq;
0419     struct qlcnic_hostrq_cds_ring   *prq_cds;
0420     struct qlcnic_cardrsp_tx_ctx    *prsp;
0421     struct qlcnic_cmd_args cmd;
0422     u32 temp, intr_mask, temp_int_crb_mode;
0423     dma_addr_t rq_phys_addr, rsp_phys_addr;
0424     int temp_nsds_rings, index, err;
0425     void *rq_addr, *rsp_addr;
0426     size_t rq_size, rsp_size;
0427     u64 phys_addr;
0428     u16 msix_id;
0429 
0430     /* reset host resources */
0431     tx_ring->producer = 0;
0432     tx_ring->sw_consumer = 0;
0433     *(tx_ring->hw_consumer) = 0;
0434 
0435     rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
0436     rq_addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
0437                      &rq_phys_addr, GFP_KERNEL);
0438     if (!rq_addr)
0439         return -ENOMEM;
0440 
0441     rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
0442     rsp_addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
0443                       &rsp_phys_addr, GFP_KERNEL);
0444     if (!rsp_addr) {
0445         err = -ENOMEM;
0446         goto out_free_rq;
0447     }
0448 
0449     prq = rq_addr;
0450     prsp = rsp_addr;
0451 
0452     prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
0453 
0454     temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
0455         QLCNIC_CAP0_LSO);
0456     if (qlcnic_check_multi_tx(adapter) && !adapter->ahw->diag_test)
0457         temp |= QLCNIC_CAP0_TX_MULTI;
0458 
0459     prq->capabilities[0] = cpu_to_le32(temp);
0460 
0461     if (qlcnic_check_multi_tx(adapter) &&
0462         !adapter->ahw->diag_test) {
0463         temp_nsds_rings = adapter->drv_sds_rings;
0464         index = temp_nsds_rings + ring;
0465         msix_id = ahw->intr_tbl[index].id;
0466         prq->msi_index = cpu_to_le16(msix_id);
0467     } else {
0468         temp_int_crb_mode = QLCNIC_HOST_INT_CRB_MODE_SHARED;
0469         prq->host_int_crb_mode = cpu_to_le32(temp_int_crb_mode);
0470         prq->msi_index = 0;
0471     }
0472 
0473     prq->interrupt_ctl = 0;
0474     prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
0475 
0476     prq_cds = &prq->cds_ring;
0477 
0478     prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
0479     prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
0480 
0481     phys_addr = rq_phys_addr;
0482 
0483     err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CREATE_TX_CTX);
0484     if (err)
0485         goto out_free_rsp;
0486 
0487     cmd.req.arg[1] = MSD(phys_addr);
0488     cmd.req.arg[2] = LSD(phys_addr);
0489     cmd.req.arg[3] = rq_size;
0490     err = qlcnic_issue_cmd(adapter, &cmd);
0491 
0492     if (err == QLCNIC_RCODE_SUCCESS) {
0493         tx_ring->state = le32_to_cpu(prsp->host_ctx_state);
0494         temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
0495         tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp;
0496         tx_ring->ctx_id = le16_to_cpu(prsp->context_id);
0497         if (qlcnic_check_multi_tx(adapter) &&
0498             !adapter->ahw->diag_test &&
0499             (adapter->flags & QLCNIC_MSIX_ENABLED)) {
0500             index = adapter->drv_sds_rings + ring;
0501             intr_mask = ahw->intr_tbl[index].src;
0502             tx_ring->crb_intr_mask = ahw->pci_base0 + intr_mask;
0503         }
0504 
0505         netdev_info(netdev, "Tx Context[0x%x] Created, state 0x%x\n",
0506                 tx_ring->ctx_id, tx_ring->state);
0507     } else {
0508         netdev_err(netdev, "Failed to create tx ctx in firmware%d\n",
0509                err);
0510         err = -EIO;
0511     }
0512     qlcnic_free_mbx_args(&cmd);
0513 
0514 out_free_rsp:
0515     dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr,
0516               rsp_phys_addr);
0517 out_free_rq:
0518     dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr);
0519 
0520     return err;
0521 }
0522 
0523 void qlcnic_82xx_fw_cmd_del_tx_ctx(struct qlcnic_adapter *adapter,
0524                    struct qlcnic_host_tx_ring *tx_ring)
0525 {
0526     struct qlcnic_cmd_args cmd;
0527     int ret;
0528 
0529     ret = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DESTROY_TX_CTX);
0530     if (ret)
0531         return;
0532 
0533     cmd.req.arg[1] = tx_ring->ctx_id;
0534     if (qlcnic_issue_cmd(adapter, &cmd))
0535         dev_err(&adapter->pdev->dev,
0536             "Failed to destroy tx ctx in firmware\n");
0537     qlcnic_free_mbx_args(&cmd);
0538 }
0539 
0540 int
0541 qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config)
0542 {
0543     int err;
0544     struct qlcnic_cmd_args cmd;
0545 
0546     err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CONFIG_PORT);
0547     if (err)
0548         return err;
0549 
0550     cmd.req.arg[1] = config;
0551     err = qlcnic_issue_cmd(adapter, &cmd);
0552     qlcnic_free_mbx_args(&cmd);
0553     return err;
0554 }
0555 
0556 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
0557 {
0558     void *addr;
0559     int err, ring;
0560     struct qlcnic_recv_context *recv_ctx;
0561     struct qlcnic_host_rds_ring *rds_ring;
0562     struct qlcnic_host_sds_ring *sds_ring;
0563     struct qlcnic_host_tx_ring *tx_ring;
0564     __le32 *ptr;
0565 
0566     struct pci_dev *pdev = adapter->pdev;
0567 
0568     recv_ctx = adapter->recv_ctx;
0569 
0570     for (ring = 0; ring < adapter->drv_tx_rings; ring++) {
0571         tx_ring = &adapter->tx_ring[ring];
0572         ptr = (__le32 *)dma_alloc_coherent(&pdev->dev, sizeof(u32),
0573                            &tx_ring->hw_cons_phys_addr,
0574                            GFP_KERNEL);
0575         if (ptr == NULL) {
0576             err = -ENOMEM;
0577             goto err_out_free;
0578         }
0579 
0580         tx_ring->hw_consumer = ptr;
0581         /* cmd desc ring */
0582         addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring),
0583                       &tx_ring->phys_addr,
0584                       GFP_KERNEL);
0585         if (addr == NULL) {
0586             err = -ENOMEM;
0587             goto err_out_free;
0588         }
0589 
0590         tx_ring->desc_head = addr;
0591     }
0592 
0593     for (ring = 0; ring < adapter->max_rds_rings; ring++) {
0594         rds_ring = &recv_ctx->rds_rings[ring];
0595         addr = dma_alloc_coherent(&adapter->pdev->dev,
0596                       RCV_DESC_RINGSIZE(rds_ring),
0597                       &rds_ring->phys_addr, GFP_KERNEL);
0598         if (addr == NULL) {
0599             err = -ENOMEM;
0600             goto err_out_free;
0601         }
0602         rds_ring->desc_head = addr;
0603 
0604     }
0605 
0606     for (ring = 0; ring < adapter->drv_sds_rings; ring++) {
0607         sds_ring = &recv_ctx->sds_rings[ring];
0608 
0609         addr = dma_alloc_coherent(&adapter->pdev->dev,
0610                       STATUS_DESC_RINGSIZE(sds_ring),
0611                       &sds_ring->phys_addr, GFP_KERNEL);
0612         if (addr == NULL) {
0613             err = -ENOMEM;
0614             goto err_out_free;
0615         }
0616         sds_ring->desc_head = addr;
0617     }
0618 
0619     return 0;
0620 
0621 err_out_free:
0622     qlcnic_free_hw_resources(adapter);
0623     return err;
0624 }
0625 
0626 int qlcnic_fw_create_ctx(struct qlcnic_adapter *dev)
0627 {
0628     int i, err, ring;
0629 
0630     if (dev->flags & QLCNIC_NEED_FLR) {
0631         pci_reset_function(dev->pdev);
0632         dev->flags &= ~QLCNIC_NEED_FLR;
0633     }
0634 
0635     if (qlcnic_83xx_check(dev) && (dev->flags & QLCNIC_MSIX_ENABLED)) {
0636         if (dev->ahw->diag_test != QLCNIC_LOOPBACK_TEST) {
0637             err = qlcnic_83xx_config_intrpt(dev, 1);
0638             if (err)
0639                 return err;
0640         }
0641     }
0642 
0643     if (qlcnic_82xx_check(dev) && (dev->flags & QLCNIC_MSIX_ENABLED) &&
0644         qlcnic_check_multi_tx(dev) && !dev->ahw->diag_test) {
0645         err = qlcnic_82xx_mq_intrpt(dev, 1);
0646         if (err)
0647             return err;
0648     }
0649 
0650     err = qlcnic_fw_cmd_create_rx_ctx(dev);
0651     if (err)
0652         goto err_out;
0653 
0654     for (ring = 0; ring < dev->drv_tx_rings; ring++) {
0655         err = qlcnic_fw_cmd_create_tx_ctx(dev,
0656                           &dev->tx_ring[ring],
0657                           ring);
0658         if (err) {
0659             qlcnic_fw_cmd_del_rx_ctx(dev);
0660             if (ring == 0)
0661                 goto err_out;
0662 
0663             for (i = 0; i < ring; i++)
0664                 qlcnic_fw_cmd_del_tx_ctx(dev, &dev->tx_ring[i]);
0665 
0666             goto err_out;
0667         }
0668     }
0669 
0670     set_bit(__QLCNIC_FW_ATTACHED, &dev->state);
0671 
0672     return 0;
0673 
0674 err_out:
0675     if (qlcnic_82xx_check(dev) && (dev->flags & QLCNIC_MSIX_ENABLED) &&
0676         qlcnic_check_multi_tx(dev) && !dev->ahw->diag_test)
0677             qlcnic_82xx_config_intrpt(dev, 0);
0678 
0679     if (qlcnic_83xx_check(dev) && (dev->flags & QLCNIC_MSIX_ENABLED)) {
0680         if (dev->ahw->diag_test != QLCNIC_LOOPBACK_TEST)
0681             qlcnic_83xx_config_intrpt(dev, 0);
0682     }
0683 
0684     return err;
0685 }
0686 
0687 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
0688 {
0689     int ring;
0690 
0691     if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
0692         qlcnic_fw_cmd_del_rx_ctx(adapter);
0693         for (ring = 0; ring < adapter->drv_tx_rings; ring++)
0694             qlcnic_fw_cmd_del_tx_ctx(adapter,
0695                          &adapter->tx_ring[ring]);
0696 
0697         if (qlcnic_82xx_check(adapter) &&
0698             (adapter->flags & QLCNIC_MSIX_ENABLED) &&
0699             qlcnic_check_multi_tx(adapter) &&
0700             !adapter->ahw->diag_test)
0701                 qlcnic_82xx_config_intrpt(adapter, 0);
0702 
0703         if (qlcnic_83xx_check(adapter) &&
0704             (adapter->flags & QLCNIC_MSIX_ENABLED)) {
0705             if (adapter->ahw->diag_test != QLCNIC_LOOPBACK_TEST)
0706                 qlcnic_83xx_config_intrpt(adapter, 0);
0707         }
0708         /* Allow dma queues to drain after context reset */
0709         mdelay(20);
0710     }
0711 }
0712 
0713 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
0714 {
0715     struct qlcnic_recv_context *recv_ctx;
0716     struct qlcnic_host_rds_ring *rds_ring;
0717     struct qlcnic_host_sds_ring *sds_ring;
0718     struct qlcnic_host_tx_ring *tx_ring;
0719     int ring;
0720 
0721     recv_ctx = adapter->recv_ctx;
0722 
0723     for (ring = 0; ring < adapter->drv_tx_rings; ring++) {
0724         tx_ring = &adapter->tx_ring[ring];
0725         if (tx_ring->hw_consumer != NULL) {
0726             dma_free_coherent(&adapter->pdev->dev, sizeof(u32),
0727                       tx_ring->hw_consumer,
0728                       tx_ring->hw_cons_phys_addr);
0729 
0730             tx_ring->hw_consumer = NULL;
0731         }
0732 
0733         if (tx_ring->desc_head != NULL) {
0734             dma_free_coherent(&adapter->pdev->dev,
0735                       TX_DESC_RINGSIZE(tx_ring),
0736                       tx_ring->desc_head,
0737                       tx_ring->phys_addr);
0738             tx_ring->desc_head = NULL;
0739         }
0740     }
0741 
0742     for (ring = 0; ring < adapter->max_rds_rings; ring++) {
0743         rds_ring = &recv_ctx->rds_rings[ring];
0744 
0745         if (rds_ring->desc_head != NULL) {
0746             dma_free_coherent(&adapter->pdev->dev,
0747                     RCV_DESC_RINGSIZE(rds_ring),
0748                     rds_ring->desc_head,
0749                     rds_ring->phys_addr);
0750             rds_ring->desc_head = NULL;
0751         }
0752     }
0753 
0754     for (ring = 0; ring < adapter->drv_sds_rings; ring++) {
0755         sds_ring = &recv_ctx->sds_rings[ring];
0756 
0757         if (sds_ring->desc_head != NULL) {
0758             dma_free_coherent(&adapter->pdev->dev,
0759                 STATUS_DESC_RINGSIZE(sds_ring),
0760                 sds_ring->desc_head,
0761                 sds_ring->phys_addr);
0762             sds_ring->desc_head = NULL;
0763         }
0764     }
0765 }
0766 
0767 int qlcnic_82xx_config_intrpt(struct qlcnic_adapter *adapter, u8 op_type)
0768 {
0769     struct qlcnic_hardware_context *ahw = adapter->ahw;
0770     struct net_device *netdev = adapter->netdev;
0771     struct qlcnic_cmd_args cmd;
0772     u32 type, val;
0773     int i, err = 0;
0774 
0775     for (i = 0; i < ahw->num_msix; i++) {
0776         err = qlcnic_alloc_mbx_args(&cmd, adapter,
0777                         QLCNIC_CMD_MQ_TX_CONFIG_INTR);
0778         if (err)
0779             return err;
0780         type = op_type ? QLCNIC_INTRPT_ADD : QLCNIC_INTRPT_DEL;
0781         val = type | (ahw->intr_tbl[i].type << 4);
0782         if (ahw->intr_tbl[i].type == QLCNIC_INTRPT_MSIX)
0783             val |= (ahw->intr_tbl[i].id << 16);
0784         cmd.req.arg[1] = val;
0785         err = qlcnic_issue_cmd(adapter, &cmd);
0786         if (err) {
0787             netdev_err(netdev, "Failed to %s interrupts %d\n",
0788                    op_type == QLCNIC_INTRPT_ADD ? "Add" :
0789                    "Delete", err);
0790             qlcnic_free_mbx_args(&cmd);
0791             return err;
0792         }
0793         val = cmd.rsp.arg[1];
0794         if (LSB(val)) {
0795             netdev_info(netdev,
0796                     "failed to configure interrupt for %d\n",
0797                     ahw->intr_tbl[i].id);
0798             continue;
0799         }
0800         if (op_type) {
0801             ahw->intr_tbl[i].id = MSW(val);
0802             ahw->intr_tbl[i].enabled = 1;
0803             ahw->intr_tbl[i].src = cmd.rsp.arg[2];
0804         } else {
0805             ahw->intr_tbl[i].id = i;
0806             ahw->intr_tbl[i].enabled = 0;
0807             ahw->intr_tbl[i].src = 0;
0808         }
0809         qlcnic_free_mbx_args(&cmd);
0810     }
0811 
0812     return err;
0813 }
0814 
0815 int qlcnic_82xx_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac,
0816                 u8 function)
0817 {
0818     int err, i;
0819     struct qlcnic_cmd_args cmd;
0820     u32 mac_low, mac_high;
0821 
0822     err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_MAC_ADDRESS);
0823     if (err)
0824         return err;
0825 
0826     cmd.req.arg[1] = function | BIT_8;
0827     err = qlcnic_issue_cmd(adapter, &cmd);
0828 
0829     if (err == QLCNIC_RCODE_SUCCESS) {
0830         mac_low = cmd.rsp.arg[1];
0831         mac_high = cmd.rsp.arg[2];
0832 
0833         for (i = 0; i < 2; i++)
0834             mac[i] = (u8) (mac_high >> ((1 - i) * 8));
0835         for (i = 2; i < 6; i++)
0836             mac[i] = (u8) (mac_low >> ((5 - i) * 8));
0837     } else {
0838         dev_err(&adapter->pdev->dev,
0839             "Failed to get mac address%d\n", err);
0840         err = -EIO;
0841     }
0842     qlcnic_free_mbx_args(&cmd);
0843     return err;
0844 }
0845 
0846 /* Get info of a NIC partition */
0847 int qlcnic_82xx_get_nic_info(struct qlcnic_adapter *adapter,
0848                  struct qlcnic_info *npar_info, u8 func_id)
0849 {
0850     int err;
0851     dma_addr_t nic_dma_t;
0852     const struct qlcnic_info_le *nic_info;
0853     void *nic_info_addr;
0854     struct qlcnic_cmd_args cmd;
0855     size_t  nic_size = sizeof(struct qlcnic_info_le);
0856 
0857     nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
0858                        &nic_dma_t, GFP_KERNEL);
0859     if (!nic_info_addr)
0860         return -ENOMEM;
0861 
0862     nic_info = nic_info_addr;
0863 
0864     err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
0865     if (err)
0866         goto out_free_dma;
0867 
0868     cmd.req.arg[1] = MSD(nic_dma_t);
0869     cmd.req.arg[2] = LSD(nic_dma_t);
0870     cmd.req.arg[3] = (func_id << 16 | nic_size);
0871     err = qlcnic_issue_cmd(adapter, &cmd);
0872     if (err != QLCNIC_RCODE_SUCCESS) {
0873         dev_err(&adapter->pdev->dev,
0874             "Failed to get nic info%d\n", err);
0875         err = -EIO;
0876     } else {
0877         npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
0878         npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
0879         npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
0880         npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
0881         npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
0882         npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
0883         npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
0884         npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
0885         npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
0886         npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
0887     }
0888 
0889     qlcnic_free_mbx_args(&cmd);
0890 out_free_dma:
0891     dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
0892               nic_dma_t);
0893 
0894     return err;
0895 }
0896 
0897 /* Configure a NIC partition */
0898 int qlcnic_82xx_set_nic_info(struct qlcnic_adapter *adapter,
0899                  struct qlcnic_info *nic)
0900 {
0901     int err = -EIO;
0902     dma_addr_t nic_dma_t;
0903     void *nic_info_addr;
0904     struct qlcnic_cmd_args cmd;
0905     struct qlcnic_info_le *nic_info;
0906     size_t nic_size = sizeof(struct qlcnic_info_le);
0907 
0908     if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
0909         return err;
0910 
0911     nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
0912                        &nic_dma_t, GFP_KERNEL);
0913     if (!nic_info_addr)
0914         return -ENOMEM;
0915 
0916     nic_info = nic_info_addr;
0917 
0918     nic_info->pci_func = cpu_to_le16(nic->pci_func);
0919     nic_info->op_mode = cpu_to_le16(nic->op_mode);
0920     nic_info->phys_port = cpu_to_le16(nic->phys_port);
0921     nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
0922     nic_info->capabilities = cpu_to_le32(nic->capabilities);
0923     nic_info->max_mac_filters = nic->max_mac_filters;
0924     nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
0925     nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
0926     nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
0927     nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
0928 
0929     err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_SET_NIC_INFO);
0930     if (err)
0931         goto out_free_dma;
0932 
0933     cmd.req.arg[1] = MSD(nic_dma_t);
0934     cmd.req.arg[2] = LSD(nic_dma_t);
0935     cmd.req.arg[3] = ((nic->pci_func << 16) | nic_size);
0936     err = qlcnic_issue_cmd(adapter, &cmd);
0937 
0938     if (err != QLCNIC_RCODE_SUCCESS) {
0939         dev_err(&adapter->pdev->dev,
0940             "Failed to set nic info%d\n", err);
0941         err = -EIO;
0942     }
0943 
0944     qlcnic_free_mbx_args(&cmd);
0945 out_free_dma:
0946     dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
0947               nic_dma_t);
0948 
0949     return err;
0950 }
0951 
0952 /* Get PCI Info of a partition */
0953 int qlcnic_82xx_get_pci_info(struct qlcnic_adapter *adapter,
0954                  struct qlcnic_pci_info *pci_info)
0955 {
0956     struct qlcnic_hardware_context *ahw = adapter->ahw;
0957     size_t npar_size = sizeof(struct qlcnic_pci_info_le);
0958     size_t pci_size = npar_size * ahw->max_vnic_func;
0959     u16 nic = 0, fcoe = 0, iscsi = 0;
0960     struct qlcnic_pci_info_le *npar;
0961     struct qlcnic_cmd_args cmd;
0962     dma_addr_t pci_info_dma_t;
0963     void *pci_info_addr;
0964     int err = 0, i;
0965 
0966     pci_info_addr = dma_alloc_coherent(&adapter->pdev->dev, pci_size,
0967                        &pci_info_dma_t, GFP_KERNEL);
0968     if (!pci_info_addr)
0969         return -ENOMEM;
0970 
0971     npar = pci_info_addr;
0972     err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_PCI_INFO);
0973     if (err)
0974         goto out_free_dma;
0975 
0976     cmd.req.arg[1] = MSD(pci_info_dma_t);
0977     cmd.req.arg[2] = LSD(pci_info_dma_t);
0978     cmd.req.arg[3] = pci_size;
0979     err = qlcnic_issue_cmd(adapter, &cmd);
0980 
0981     ahw->total_nic_func = 0;
0982     if (err == QLCNIC_RCODE_SUCCESS) {
0983         for (i = 0; i < ahw->max_vnic_func; i++, npar++, pci_info++) {
0984             pci_info->id = le16_to_cpu(npar->id);
0985             pci_info->active = le16_to_cpu(npar->active);
0986             if (!pci_info->active)
0987                 continue;
0988             pci_info->type = le16_to_cpu(npar->type);
0989             err = qlcnic_get_pci_func_type(adapter, pci_info->type,
0990                                &nic, &fcoe, &iscsi);
0991             pci_info->default_port =
0992                 le16_to_cpu(npar->default_port);
0993             pci_info->tx_min_bw =
0994                 le16_to_cpu(npar->tx_min_bw);
0995             pci_info->tx_max_bw =
0996                 le16_to_cpu(npar->tx_max_bw);
0997             memcpy(pci_info->mac, npar->mac, ETH_ALEN);
0998         }
0999     } else {
1000         dev_err(&adapter->pdev->dev,
1001             "Failed to get PCI Info%d\n", err);
1002         err = -EIO;
1003     }
1004 
1005     ahw->total_nic_func = nic;
1006     ahw->total_pci_func = nic + fcoe + iscsi;
1007     if (ahw->total_nic_func == 0 || ahw->total_pci_func == 0) {
1008         dev_err(&adapter->pdev->dev,
1009             "%s: Invalid function count: total nic func[%x], total pci func[%x]\n",
1010             __func__, ahw->total_nic_func, ahw->total_pci_func);
1011         err = -EIO;
1012     }
1013     qlcnic_free_mbx_args(&cmd);
1014 out_free_dma:
1015     dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr,
1016         pci_info_dma_t);
1017 
1018     return err;
1019 }
1020 
1021 /* Configure eSwitch for port mirroring */
1022 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
1023                  u8 enable_mirroring, u8 pci_func)
1024 {
1025     struct device *dev = &adapter->pdev->dev;
1026     struct qlcnic_cmd_args cmd;
1027     int err = -EIO;
1028     u32 arg1;
1029 
1030     if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC ||
1031         !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE)) {
1032         dev_err(&adapter->pdev->dev, "%s: Not a management function\n",
1033             __func__);
1034         return err;
1035     }
1036 
1037     arg1 = id | (enable_mirroring ? BIT_4 : 0);
1038     arg1 |= pci_func << 8;
1039 
1040     err = qlcnic_alloc_mbx_args(&cmd, adapter,
1041                     QLCNIC_CMD_SET_PORTMIRRORING);
1042     if (err)
1043         return err;
1044 
1045     cmd.req.arg[1] = arg1;
1046     err = qlcnic_issue_cmd(adapter, &cmd);
1047 
1048     if (err != QLCNIC_RCODE_SUCCESS)
1049         dev_err(dev, "Failed to configure port mirroring for vNIC function %d on eSwitch %d\n",
1050             pci_func, id);
1051     else
1052         dev_info(dev, "Configured port mirroring for vNIC function %d on eSwitch %d\n",
1053              pci_func, id);
1054     qlcnic_free_mbx_args(&cmd);
1055 
1056     return err;
1057 }
1058 
1059 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
1060         const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
1061 
1062     size_t stats_size = sizeof(struct qlcnic_esw_stats_le);
1063     struct qlcnic_esw_stats_le *stats;
1064     dma_addr_t stats_dma_t;
1065     void *stats_addr;
1066     u32 arg1;
1067     struct qlcnic_cmd_args cmd;
1068     int err;
1069 
1070     if (esw_stats == NULL)
1071         return -ENOMEM;
1072 
1073     if ((adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) &&
1074         (func != adapter->ahw->pci_func)) {
1075         dev_err(&adapter->pdev->dev,
1076             "Not privilege to query stats for func=%d", func);
1077         return -EIO;
1078     }
1079 
1080     stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
1081                     &stats_dma_t, GFP_KERNEL);
1082     if (!stats_addr)
1083         return -ENOMEM;
1084 
1085     arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
1086     arg1 |= rx_tx << 15 | stats_size << 16;
1087 
1088     err = qlcnic_alloc_mbx_args(&cmd, adapter,
1089                     QLCNIC_CMD_GET_ESWITCH_STATS);
1090     if (err)
1091         goto out_free_dma;
1092 
1093     cmd.req.arg[1] = arg1;
1094     cmd.req.arg[2] = MSD(stats_dma_t);
1095     cmd.req.arg[3] = LSD(stats_dma_t);
1096     err = qlcnic_issue_cmd(adapter, &cmd);
1097 
1098     if (!err) {
1099         stats = stats_addr;
1100         esw_stats->context_id = le16_to_cpu(stats->context_id);
1101         esw_stats->version = le16_to_cpu(stats->version);
1102         esw_stats->size = le16_to_cpu(stats->size);
1103         esw_stats->multicast_frames =
1104                 le64_to_cpu(stats->multicast_frames);
1105         esw_stats->broadcast_frames =
1106                 le64_to_cpu(stats->broadcast_frames);
1107         esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
1108         esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
1109         esw_stats->local_frames = le64_to_cpu(stats->local_frames);
1110         esw_stats->errors = le64_to_cpu(stats->errors);
1111         esw_stats->numbytes = le64_to_cpu(stats->numbytes);
1112     }
1113 
1114     qlcnic_free_mbx_args(&cmd);
1115 out_free_dma:
1116     dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
1117               stats_dma_t);
1118 
1119     return err;
1120 }
1121 
1122 /* This routine will retrieve the MAC statistics from firmware */
1123 int qlcnic_get_mac_stats(struct qlcnic_adapter *adapter,
1124         struct qlcnic_mac_statistics *mac_stats)
1125 {
1126     struct qlcnic_mac_statistics_le *stats;
1127     struct qlcnic_cmd_args cmd;
1128     size_t stats_size = sizeof(struct qlcnic_mac_statistics_le);
1129     dma_addr_t stats_dma_t;
1130     void *stats_addr;
1131     int err;
1132 
1133     if (mac_stats == NULL)
1134         return -ENOMEM;
1135 
1136     stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
1137                     &stats_dma_t, GFP_KERNEL);
1138     if (!stats_addr)
1139         return -ENOMEM;
1140 
1141     err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_MAC_STATS);
1142     if (err)
1143         goto out_free_dma;
1144 
1145     cmd.req.arg[1] = stats_size << 16;
1146     cmd.req.arg[2] = MSD(stats_dma_t);
1147     cmd.req.arg[3] = LSD(stats_dma_t);
1148     err = qlcnic_issue_cmd(adapter, &cmd);
1149     if (!err) {
1150         stats = stats_addr;
1151         mac_stats->mac_tx_frames = le64_to_cpu(stats->mac_tx_frames);
1152         mac_stats->mac_tx_bytes = le64_to_cpu(stats->mac_tx_bytes);
1153         mac_stats->mac_tx_mcast_pkts =
1154                     le64_to_cpu(stats->mac_tx_mcast_pkts);
1155         mac_stats->mac_tx_bcast_pkts =
1156                     le64_to_cpu(stats->mac_tx_bcast_pkts);
1157         mac_stats->mac_rx_frames = le64_to_cpu(stats->mac_rx_frames);
1158         mac_stats->mac_rx_bytes = le64_to_cpu(stats->mac_rx_bytes);
1159         mac_stats->mac_rx_mcast_pkts =
1160                     le64_to_cpu(stats->mac_rx_mcast_pkts);
1161         mac_stats->mac_rx_length_error =
1162                 le64_to_cpu(stats->mac_rx_length_error);
1163         mac_stats->mac_rx_length_small =
1164                 le64_to_cpu(stats->mac_rx_length_small);
1165         mac_stats->mac_rx_length_large =
1166                 le64_to_cpu(stats->mac_rx_length_large);
1167         mac_stats->mac_rx_jabber = le64_to_cpu(stats->mac_rx_jabber);
1168         mac_stats->mac_rx_dropped = le64_to_cpu(stats->mac_rx_dropped);
1169         mac_stats->mac_rx_crc_error = le64_to_cpu(stats->mac_rx_crc_error);
1170     } else {
1171         dev_err(&adapter->pdev->dev,
1172             "%s: Get mac stats failed, err=%d.\n", __func__, err);
1173     }
1174 
1175     qlcnic_free_mbx_args(&cmd);
1176 
1177 out_free_dma:
1178     dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
1179               stats_dma_t);
1180 
1181     return err;
1182 }
1183 
1184 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
1185         const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
1186 
1187     struct __qlcnic_esw_statistics port_stats;
1188     u8 i;
1189     int ret = -EIO;
1190 
1191     if (esw_stats == NULL)
1192         return -ENOMEM;
1193     if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1194         return -EIO;
1195     if (adapter->npars == NULL)
1196         return -EIO;
1197 
1198     memset(esw_stats, 0, sizeof(u64));
1199     esw_stats->unicast_frames = QLCNIC_STATS_NOT_AVAIL;
1200     esw_stats->multicast_frames = QLCNIC_STATS_NOT_AVAIL;
1201     esw_stats->broadcast_frames = QLCNIC_STATS_NOT_AVAIL;
1202     esw_stats->dropped_frames = QLCNIC_STATS_NOT_AVAIL;
1203     esw_stats->errors = QLCNIC_STATS_NOT_AVAIL;
1204     esw_stats->local_frames = QLCNIC_STATS_NOT_AVAIL;
1205     esw_stats->numbytes = QLCNIC_STATS_NOT_AVAIL;
1206     esw_stats->context_id = eswitch;
1207 
1208     for (i = 0; i < adapter->ahw->total_nic_func; i++) {
1209         if (adapter->npars[i].phy_port != eswitch)
1210             continue;
1211 
1212         memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
1213         if (qlcnic_get_port_stats(adapter, adapter->npars[i].pci_func,
1214                       rx_tx, &port_stats))
1215             continue;
1216 
1217         esw_stats->size = port_stats.size;
1218         esw_stats->version = port_stats.version;
1219         QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
1220                         port_stats.unicast_frames);
1221         QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
1222                         port_stats.multicast_frames);
1223         QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
1224                         port_stats.broadcast_frames);
1225         QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
1226                         port_stats.dropped_frames);
1227         QLCNIC_ADD_ESW_STATS(esw_stats->errors,
1228                         port_stats.errors);
1229         QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
1230                         port_stats.local_frames);
1231         QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
1232                         port_stats.numbytes);
1233         ret = 0;
1234     }
1235     return ret;
1236 }
1237 
1238 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
1239         const u8 port, const u8 rx_tx)
1240 {
1241     struct qlcnic_hardware_context *ahw = adapter->ahw;
1242     struct qlcnic_cmd_args cmd;
1243     int err;
1244     u32 arg1;
1245 
1246     if (ahw->op_mode != QLCNIC_MGMT_FUNC)
1247         return -EIO;
1248 
1249     if (func_esw == QLCNIC_STATS_PORT) {
1250         if (port >= ahw->max_vnic_func)
1251             goto err_ret;
1252     } else if (func_esw == QLCNIC_STATS_ESWITCH) {
1253         if (port >= QLCNIC_NIU_MAX_XG_PORTS)
1254             goto err_ret;
1255     } else {
1256         goto err_ret;
1257     }
1258 
1259     if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
1260         goto err_ret;
1261 
1262     arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
1263     arg1 |= BIT_14 | rx_tx << 15;
1264 
1265     err = qlcnic_alloc_mbx_args(&cmd, adapter,
1266                     QLCNIC_CMD_GET_ESWITCH_STATS);
1267     if (err)
1268         return err;
1269 
1270     cmd.req.arg[1] = arg1;
1271     err = qlcnic_issue_cmd(adapter, &cmd);
1272     qlcnic_free_mbx_args(&cmd);
1273     return err;
1274 
1275 err_ret:
1276     dev_err(&adapter->pdev->dev,
1277         "Invalid args func_esw %d port %d rx_ctx %d\n",
1278         func_esw, port, rx_tx);
1279     return -EIO;
1280 }
1281 
1282 static int __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1283                         u32 *arg1, u32 *arg2)
1284 {
1285     struct device *dev = &adapter->pdev->dev;
1286     struct qlcnic_cmd_args cmd;
1287     u8 pci_func = *arg1 >> 8;
1288     int err;
1289 
1290     err = qlcnic_alloc_mbx_args(&cmd, adapter,
1291                     QLCNIC_CMD_GET_ESWITCH_PORT_CONFIG);
1292     if (err)
1293         return err;
1294 
1295     cmd.req.arg[1] = *arg1;
1296     err = qlcnic_issue_cmd(adapter, &cmd);
1297     *arg1 = cmd.rsp.arg[1];
1298     *arg2 = cmd.rsp.arg[2];
1299     qlcnic_free_mbx_args(&cmd);
1300 
1301     if (err == QLCNIC_RCODE_SUCCESS)
1302         dev_info(dev, "Get eSwitch port config for vNIC function %d\n",
1303              pci_func);
1304     else
1305         dev_err(dev, "Failed to get eswitch port config for vNIC function %d\n",
1306             pci_func);
1307     return err;
1308 }
1309 /* Configure eSwitch port
1310 op_mode = 0 for setting default port behavior
1311 op_mode = 1 for setting  vlan id
1312 op_mode = 2 for deleting vlan id
1313 op_type = 0 for vlan_id
1314 op_type = 1 for port vlan_id
1315 */
1316 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1317         struct qlcnic_esw_func_cfg *esw_cfg)
1318 {
1319     struct device *dev = &adapter->pdev->dev;
1320     struct qlcnic_cmd_args cmd;
1321     int err = -EIO, index;
1322     u32 arg1, arg2 = 0;
1323     u8 pci_func;
1324 
1325     if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) {
1326         dev_err(&adapter->pdev->dev, "%s: Not a management function\n",
1327             __func__);
1328         return err;
1329     }
1330 
1331     pci_func = esw_cfg->pci_func;
1332     index = qlcnic_is_valid_nic_func(adapter, pci_func);
1333     if (index < 0)
1334         return err;
1335     arg1 = (adapter->npars[index].phy_port & BIT_0);
1336     arg1 |= (pci_func << 8);
1337 
1338     if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1339         return err;
1340     arg1 &= ~(0x0ff << 8);
1341     arg1 |= (pci_func << 8);
1342     arg1 &= ~(BIT_2 | BIT_3);
1343     switch (esw_cfg->op_mode) {
1344     case QLCNIC_PORT_DEFAULTS:
1345         arg1 |= (BIT_4 | BIT_6 | BIT_7);
1346         arg2 |= (BIT_0 | BIT_1);
1347         if (adapter->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1348             arg2 |= (BIT_2 | BIT_3);
1349         if (!(esw_cfg->discard_tagged))
1350             arg1 &= ~BIT_4;
1351         if (!(esw_cfg->promisc_mode))
1352             arg1 &= ~BIT_6;
1353         if (!(esw_cfg->mac_override))
1354             arg1 &= ~BIT_7;
1355         if (!(esw_cfg->mac_anti_spoof))
1356             arg2 &= ~BIT_0;
1357         if (!(esw_cfg->offload_flags & BIT_0))
1358             arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1359         if (!(esw_cfg->offload_flags & BIT_1))
1360             arg2 &= ~BIT_2;
1361         if (!(esw_cfg->offload_flags & BIT_2))
1362             arg2 &= ~BIT_3;
1363         break;
1364     case QLCNIC_ADD_VLAN:
1365             arg1 &= ~(0x0ffff << 16);
1366             arg1 |= (BIT_2 | BIT_5);
1367             arg1 |= (esw_cfg->vlan_id << 16);
1368             break;
1369     case QLCNIC_DEL_VLAN:
1370             arg1 |= (BIT_3 | BIT_5);
1371             arg1 &= ~(0x0ffff << 16);
1372             break;
1373     default:
1374         dev_err(&adapter->pdev->dev, "%s: Invalid opmode 0x%x\n",
1375             __func__, esw_cfg->op_mode);
1376         return err;
1377     }
1378 
1379     err = qlcnic_alloc_mbx_args(&cmd, adapter,
1380                     QLCNIC_CMD_CONFIGURE_ESWITCH);
1381     if (err)
1382         return err;
1383 
1384     cmd.req.arg[1] = arg1;
1385     cmd.req.arg[2] = arg2;
1386     err = qlcnic_issue_cmd(adapter, &cmd);
1387     qlcnic_free_mbx_args(&cmd);
1388 
1389     if (err != QLCNIC_RCODE_SUCCESS)
1390         dev_err(dev, "Failed to configure eswitch for vNIC function %d\n",
1391             pci_func);
1392     else
1393         dev_info(dev, "Configured eSwitch for vNIC function %d\n",
1394              pci_func);
1395 
1396     return err;
1397 }
1398 
1399 int
1400 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1401             struct qlcnic_esw_func_cfg *esw_cfg)
1402 {
1403     u32 arg1, arg2;
1404     int index;
1405     u8 phy_port;
1406 
1407     if (adapter->ahw->op_mode == QLCNIC_MGMT_FUNC) {
1408         index = qlcnic_is_valid_nic_func(adapter, esw_cfg->pci_func);
1409         if (index < 0)
1410             return -EIO;
1411         phy_port = adapter->npars[index].phy_port;
1412     } else {
1413         phy_port = adapter->ahw->physical_port;
1414     }
1415     arg1 = phy_port;
1416     arg1 |= (esw_cfg->pci_func << 8);
1417     if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1418         return -EIO;
1419 
1420     esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1421     esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1422     esw_cfg->promisc_mode = !!(arg1 & BIT_6);
1423     esw_cfg->mac_override = !!(arg1 & BIT_7);
1424     esw_cfg->vlan_id = LSW(arg1 >> 16);
1425     esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1426     esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);
1427 
1428     return 0;
1429 }
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