qlogic/qed/qed_sp.h

0001 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
0002 /* QLogic qed NIC Driver
0003  * Copyright (c) 2015-2017  QLogic Corporation
0004  * Copyright (c) 2019-2020 Marvell International Ltd.
0005  */
0006
0007 #ifndef _QED_SP_H
0008 #define _QED_SP_H
0009
0010 #include <linux/types.h>
0011 #include <linux/kernel.h>
0012 #include <linux/list.h>
0013 #include <linux/slab.h>
0014 #include <linux/spinlock.h>
0015 #include <linux/qed/qed_chain.h>
0016 #include "qed.h"
0017 #include "qed_hsi.h"
0018
0019 enum spq_mode {
0020     QED_SPQ_MODE_BLOCK,     /* Client will poll a designated mem. address */
0021     QED_SPQ_MODE_CB,        /* Client supplies a callback */
0022     QED_SPQ_MODE_EBLOCK,    /* QED should block until completion */
0023 };
0024
0025 struct qed_spq_comp_cb {
0026     void    (*function)(struct qed_hwfn *p_hwfn,
0027                 void *cookie,
0028                 union event_ring_data *data,
0029                 u8 fw_return_code);
0030     void    *cookie;
0031 };
0032
0033 /**
0034  * qed_eth_cqe_completion(): handles the completion of a
0035  *                           ramrod on the cqe ring.
0036  *
0037  * @p_hwfn: HW device data.
0038  * @cqe: CQE.
0039  *
0040  * Return: Int.
0041  */
0042 int qed_eth_cqe_completion(struct qed_hwfn *p_hwfn,
0043                struct eth_slow_path_rx_cqe *cqe);
0044
0045  /*  QED Slow-hwfn queue interface */
0046 union ramrod_data {
0047     struct pf_start_ramrod_data pf_start;
0048     struct pf_update_ramrod_data pf_update;
0049     struct rx_queue_start_ramrod_data rx_queue_start;
0050     struct rx_queue_update_ramrod_data rx_queue_update;
0051     struct rx_queue_stop_ramrod_data rx_queue_stop;
0052     struct tx_queue_start_ramrod_data tx_queue_start;
0053     struct tx_queue_stop_ramrod_data tx_queue_stop;
0054     struct vport_start_ramrod_data vport_start;
0055     struct vport_stop_ramrod_data vport_stop;
0056     struct rx_update_gft_filter_ramrod_data rx_update_gft;
0057     struct vport_update_ramrod_data vport_update;
0058     struct core_rx_start_ramrod_data core_rx_queue_start;
0059     struct core_rx_stop_ramrod_data core_rx_queue_stop;
0060     struct core_tx_start_ramrod_data core_tx_queue_start;
0061     struct core_tx_stop_ramrod_data core_tx_queue_stop;
0062     struct vport_filter_update_ramrod_data vport_filter_update;
0063
0064     struct rdma_init_func_ramrod_data rdma_init_func;
0065     struct rdma_close_func_ramrod_data rdma_close_func;
0066     struct rdma_register_tid_ramrod_data rdma_register_tid;
0067     struct rdma_deregister_tid_ramrod_data rdma_deregister_tid;
0068     struct roce_create_qp_resp_ramrod_data roce_create_qp_resp;
0069     struct roce_create_qp_req_ramrod_data roce_create_qp_req;
0070     struct roce_modify_qp_resp_ramrod_data roce_modify_qp_resp;
0071     struct roce_modify_qp_req_ramrod_data roce_modify_qp_req;
0072     struct roce_query_qp_resp_ramrod_data roce_query_qp_resp;
0073     struct roce_query_qp_req_ramrod_data roce_query_qp_req;
0074     struct roce_destroy_qp_resp_ramrod_data roce_destroy_qp_resp;
0075     struct roce_destroy_qp_req_ramrod_data roce_destroy_qp_req;
0076     struct roce_init_func_ramrod_data roce_init_func;
0077     struct rdma_create_cq_ramrod_data rdma_create_cq;
0078     struct rdma_destroy_cq_ramrod_data rdma_destroy_cq;
0079     struct rdma_srq_create_ramrod_data rdma_create_srq;
0080     struct rdma_srq_destroy_ramrod_data rdma_destroy_srq;
0081     struct rdma_srq_modify_ramrod_data rdma_modify_srq;
0082     struct iwarp_create_qp_ramrod_data iwarp_create_qp;
0083     struct iwarp_tcp_offload_ramrod_data iwarp_tcp_offload;
0084     struct iwarp_mpa_offload_ramrod_data iwarp_mpa_offload;
0085     struct iwarp_modify_qp_ramrod_data iwarp_modify_qp;
0086     struct iwarp_init_func_ramrod_data iwarp_init_func;
0087     struct fcoe_init_ramrod_params fcoe_init;
0088     struct fcoe_conn_offload_ramrod_params fcoe_conn_ofld;
0089     struct fcoe_conn_terminate_ramrod_params fcoe_conn_terminate;
0090     struct fcoe_stat_ramrod_params fcoe_stat;
0091
0092     struct iscsi_init_ramrod_params iscsi_init;
0093     struct iscsi_spe_conn_offload iscsi_conn_offload;
0094     struct iscsi_conn_update_ramrod_params iscsi_conn_update;
0095     struct iscsi_spe_conn_mac_update iscsi_conn_mac_update;
0096     struct iscsi_spe_conn_termination iscsi_conn_terminate;
0097
0098     struct nvmetcp_init_ramrod_params nvmetcp_init;
0099     struct nvmetcp_spe_conn_offload nvmetcp_conn_offload;
0100     struct nvmetcp_conn_update_ramrod_params nvmetcp_conn_update;
0101     struct nvmetcp_spe_conn_termination nvmetcp_conn_terminate;
0102
0103     struct vf_start_ramrod_data vf_start;
0104     struct vf_stop_ramrod_data vf_stop;
0105 };
0106
0107 #define EQ_MAX_CREDIT   0xffffffff
0108
0109 enum spq_priority {
0110     QED_SPQ_PRIORITY_NORMAL,
0111     QED_SPQ_PRIORITY_HIGH,
0112 };
0113
0114 union qed_spq_req_comp {
0115     struct qed_spq_comp_cb  cb;
0116     u64         *done_addr;
0117 };
0118
0119 struct qed_spq_comp_done {
0120     unsigned int    done;
0121     u8      fw_return_code;
0122 };
0123
0124 struct qed_spq_entry {
0125     struct list_head        list;
0126
0127     u8              flags;
0128
0129     /* HSI slow path element */
0130     struct slow_path_element    elem;
0131
0132     union ramrod_data       ramrod;
0133
0134     enum spq_priority       priority;
0135
0136     /* pending queue for this entry */
0137     struct list_head        *queue;
0138
0139     enum spq_mode           comp_mode;
0140     struct qed_spq_comp_cb      comp_cb;
0141     struct qed_spq_comp_done    comp_done; /* SPQ_MODE_EBLOCK */
0142
0143     /* Posted entry for unlimited list entry in EBLOCK mode */
0144     struct qed_spq_entry        *post_ent;
0145 };
0146
0147 struct qed_eq {
0148     struct qed_chain    chain;
0149     u8          eq_sb_index;    /* index within the SB */
0150     __le16          *p_fw_cons;     /* ptr to index value */
0151 };
0152
0153 struct qed_consq {
0154     struct qed_chain chain;
0155 };
0156
0157 typedef int (*qed_spq_async_comp_cb)(struct qed_hwfn *p_hwfn, u8 opcode,
0158                      __le16 echo, union event_ring_data *data,
0159                      u8 fw_return_code);
0160
0161 int
0162 qed_spq_register_async_cb(struct qed_hwfn *p_hwfn,
0163               enum protocol_type protocol_id,
0164               qed_spq_async_comp_cb cb);
0165
0166 void
0167 qed_spq_unregister_async_cb(struct qed_hwfn *p_hwfn,
0168                 enum protocol_type protocol_id);
0169
0170 struct qed_spq {
0171     spinlock_t      lock; /* SPQ lock */
0172
0173     struct list_head    unlimited_pending;
0174     struct list_head    pending;
0175     struct list_head    completion_pending;
0176     struct list_head    free_pool;
0177
0178     struct qed_chain    chain;
0179
0180     /* allocated dma-able memory for spq entries (+ramrod data) */
0181     dma_addr_t      p_phys;
0182     struct qed_spq_entry    *p_virt;
0183
0184 #define SPQ_RING_SIZE \
0185     (CORE_SPQE_PAGE_SIZE_BYTES / sizeof(struct slow_path_element))
0186
0187     /* Bitmap for handling out-of-order completions */
0188     DECLARE_BITMAP(p_comp_bitmap, SPQ_RING_SIZE);
0189     u8          comp_bitmap_idx;
0190
0191     /* Statistics */
0192     u32         unlimited_pending_count;
0193     u32         normal_count;
0194     u32         high_count;
0195     u32         comp_sent_count;
0196     u32         comp_count;
0197
0198     u32         cid;
0199     u32         db_addr_offset;
0200     struct core_db_data db_data;
0201     qed_spq_async_comp_cb   async_comp_cb[MAX_PROTOCOL_TYPE];
0202 };
0203
0204 /**
0205  * qed_spq_post(): Posts a Slow hwfn request to FW, or lacking that
0206  *                 Pends it to the future list.
0207  *
0208  * @p_hwfn: HW device data.
0209  * @p_ent: Ent.
0210  * @fw_return_code: Return code from firmware.
0211  *
0212  * Return: Int.
0213  */
0214 int qed_spq_post(struct qed_hwfn *p_hwfn,
0215          struct qed_spq_entry *p_ent,
0216          u8 *fw_return_code);
0217
0218 /**
0219  * qed_spq_alloc(): Alloocates & initializes the SPQ and EQ.
0220  *
0221  * @p_hwfn: HW device data.
0222  *
0223  * Return: Int.
0224  */
0225 int qed_spq_alloc(struct qed_hwfn *p_hwfn);
0226
0227 /**
0228  * qed_spq_setup(): Reset the SPQ to its start state.
0229  *
0230  * @p_hwfn: HW device data.
0231  *
0232  * Return: Void.
0233  */
0234 void qed_spq_setup(struct qed_hwfn *p_hwfn);
0235
0236 /**
0237  * qed_spq_free(): Deallocates the given SPQ struct.
0238  *
0239  * @p_hwfn: HW device data.
0240  *
0241  * Return: Void.
0242  */
0243 void qed_spq_free(struct qed_hwfn *p_hwfn);
0244
0245 /**
0246  * qed_spq_get_entry(): Obtain an entrry from the spq
0247  *                      free pool list.
0248  *
0249  * @p_hwfn: HW device data.
0250  * @pp_ent: PP ENT.
0251  *
0252  * Return: Int.
0253  */
0254 int
0255 qed_spq_get_entry(struct qed_hwfn *p_hwfn,
0256           struct qed_spq_entry **pp_ent);
0257
0258 /**
0259  * qed_spq_return_entry(): Return an entry to spq free pool list.
0260  *
0261  * @p_hwfn: HW device data.
0262  * @p_ent: P ENT.
0263  *
0264  * Return: Void.
0265  */
0266 void qed_spq_return_entry(struct qed_hwfn *p_hwfn,
0267               struct qed_spq_entry *p_ent);
0268 /**
0269  * qed_eq_alloc(): Allocates & initializes an EQ struct.
0270  *
0271  * @p_hwfn: HW device data.
0272  * @num_elem: number of elements in the eq.
0273  *
0274  * Return: Int.
0275  */
0276 int qed_eq_alloc(struct qed_hwfn *p_hwfn, u16 num_elem);
0277
0278 /**
0279  * qed_eq_setup(): Reset the EQ to its start state.
0280  *
0281  * @p_hwfn: HW device data.
0282  *
0283  * Return: Void.
0284  */
0285 void qed_eq_setup(struct qed_hwfn *p_hwfn);
0286
0287 /**
0288  * qed_eq_free(): deallocates the given EQ struct.
0289  *
0290  * @p_hwfn: HW device data.
0291  *
0292  * Return: Void.
0293  */
0294 void qed_eq_free(struct qed_hwfn *p_hwfn);
0295
0296 /**
0297  * qed_eq_prod_update(): update the FW with default EQ producer.
0298  *
0299  * @p_hwfn: HW device data.
0300  * @prod: Prod.
0301  *
0302  * Return: Void.
0303  */
0304 void qed_eq_prod_update(struct qed_hwfn *p_hwfn,
0305             u16 prod);
0306
0307 /**
0308  * qed_eq_completion(): Completes currently pending EQ elements.
0309  *
0310  * @p_hwfn: HW device data.
0311  * @cookie: Cookie.
0312  *
0313  * Return: Int.
0314  */
0315 int qed_eq_completion(struct qed_hwfn *p_hwfn,
0316               void *cookie);
0317
0318 /**
0319  * qed_spq_completion(): Completes a single event.
0320  *
0321  * @p_hwfn: HW device data.
0322  * @echo: echo value from cookie (used for determining completion).
0323  * @fw_return_code: FW return code.
0324  * @p_data: data from cookie (used in callback function if applicable).
0325  *
0326  * Return: Int.
0327  */
0328 int qed_spq_completion(struct qed_hwfn *p_hwfn,
0329                __le16 echo,
0330                u8 fw_return_code,
0331                union event_ring_data *p_data);
0332
0333 /**
0334  * qed_spq_get_cid(): Given p_hwfn, return cid for the hwfn's SPQ.
0335  *
0336  * @p_hwfn: HW device data.
0337  *
0338  * Return: u32 - SPQ CID.
0339  */
0340 u32 qed_spq_get_cid(struct qed_hwfn *p_hwfn);
0341
0342 /**
0343  * qed_consq_alloc(): Allocates & initializes an ConsQ struct.
0344  *
0345  * @p_hwfn: HW device data.
0346  *
0347  * Return: Int.
0348  */
0349 int qed_consq_alloc(struct qed_hwfn *p_hwfn);
0350
0351 /**
0352  * qed_consq_setup(): Reset the ConsQ to its start state.
0353  *
0354  * @p_hwfn: HW device data.
0355  *
0356  * Return Void.
0357  */
0358 void qed_consq_setup(struct qed_hwfn *p_hwfn);
0359
0360 /**
0361  * qed_consq_free(): deallocates the given ConsQ struct.
0362  *
0363  * @p_hwfn: HW device data.
0364  *
0365  * Return Void.
0366  */
0367 void qed_consq_free(struct qed_hwfn *p_hwfn);
0368 int qed_spq_pend_post(struct qed_hwfn *p_hwfn);
0369
0370 /* Slow-hwfn low-level commands (Ramrods) function definitions. */
0371
0372 #define QED_SP_EQ_COMPLETION  0x01
0373 #define QED_SP_CQE_COMPLETION 0x02
0374
0375 struct qed_sp_init_data {
0376     u32         cid;
0377     u16         opaque_fid;
0378
0379     /* Information regarding operation upon sending & completion */
0380     enum spq_mode       comp_mode;
0381     struct qed_spq_comp_cb *p_comp_data;
0382 };
0383
0384 /**
0385  * qed_sp_destroy_request(): Returns a SPQ entry to the pool / frees the
0386  *                           entry if allocated. Should be called on in error
0387  *                           flows after initializing the SPQ entry
0388  *                           and before posting it.
0389  *
0390  * @p_hwfn: HW device data.
0391  * @p_ent: Ent.
0392  *
0393  * Return: Void.
0394  */
0395 void qed_sp_destroy_request(struct qed_hwfn *p_hwfn,
0396                 struct qed_spq_entry *p_ent);
0397
0398 int qed_sp_init_request(struct qed_hwfn *p_hwfn,
0399             struct qed_spq_entry **pp_ent,
0400             u8 cmd,
0401             u8 protocol,
0402             struct qed_sp_init_data *p_data);
0403
0404 /**
0405  * qed_sp_pf_start(): PF Function Start Ramrod.
0406  *
0407  * @p_hwfn: HW device data.
0408  * @p_ptt: P_ptt.
0409  * @p_tunn: P_tunn.
0410  * @allow_npar_tx_switch: Allow NPAR TX Switch.
0411  *
0412  * Return: Int.
0413  *
0414  * This ramrod is sent to initialize a physical function (PF). It will
0415  * configure the function related parameters and write its completion to the
0416  * event ring specified in the parameters.
0417  *
0418  * Ramrods complete on the common event ring for the PF. This ring is
0419  * allocated by the driver on host memory and its parameters are written
0420  * to the internal RAM of the UStorm by the Function Start Ramrod.
0421  *
0422  */
0423
0424 int qed_sp_pf_start(struct qed_hwfn *p_hwfn,
0425             struct qed_ptt *p_ptt,
0426             struct qed_tunnel_info *p_tunn,
0427             bool allow_npar_tx_switch);
0428
0429 /**
0430  * qed_sp_pf_update(): PF Function Update Ramrod.
0431  *
0432  * @p_hwfn: HW device data.
0433  *
0434  * Return: Int.
0435  *
0436  * This ramrod updates function-related parameters. Every parameter can be
0437  * updated independently, according to configuration flags.
0438  */
0439
0440 int qed_sp_pf_update(struct qed_hwfn *p_hwfn);
0441
0442 /**
0443  * qed_sp_pf_update_stag(): Update firmware of new outer tag.
0444  *
0445  * @p_hwfn: HW device data.
0446  *
0447  * Return: Int.
0448  */
0449 int qed_sp_pf_update_stag(struct qed_hwfn *p_hwfn);
0450
0451 /**
0452  * qed_sp_pf_update_ufp(): PF ufp update Ramrod.
0453  *
0454  * @p_hwfn: HW device data.
0455  *
0456  * Return: Int.
0457  */
0458 int qed_sp_pf_update_ufp(struct qed_hwfn *p_hwfn);
0459
0460 int qed_sp_pf_stop(struct qed_hwfn *p_hwfn);
0461
0462 int qed_sp_pf_update_tunn_cfg(struct qed_hwfn *p_hwfn,
0463                   struct qed_ptt *p_ptt,
0464                   struct qed_tunnel_info *p_tunn,
0465                   enum spq_mode comp_mode,
0466                   struct qed_spq_comp_cb *p_comp_data);
0467 /**
0468  * qed_sp_heartbeat_ramrod(): Send empty Ramrod.
0469  *
0470  * @p_hwfn: HW device data.
0471  *
0472  * Return: Int.
0473  */
0474
0475 int qed_sp_heartbeat_ramrod(struct qed_hwfn *p_hwfn);
0476
0477 #endif