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0001 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
0002 /* QLogic qed NIC Driver
0003  * Copyright (c) 2015-2017  QLogic Corporation
0004  * Copyright (c) 2019-2020 Marvell International Ltd.
0005  */
0006 
0007 #ifndef _QED_INIT_OPS_H
0008 #define _QED_INIT_OPS_H
0009 
0010 #include <linux/types.h>
0011 #include <linux/slab.h>
0012 #include "qed.h"
0013 
0014 /**
0015  * qed_init_iro_array(): init iro_arr.
0016  *
0017  * @cdev: Qed dev pointer.
0018  *
0019  * Return: Void.
0020  */
0021 void qed_init_iro_array(struct qed_dev *cdev);
0022 
0023 /**
0024  * qed_init_run(): Run the init-sequence.
0025  *
0026  * @p_hwfn: HW device data.
0027  * @p_ptt: P_ptt.
0028  * @phase: Phase.
0029  * @phase_id: Phase ID.
0030  * @modes: Mode.
0031  *
0032  * Return: _qed_status_t
0033  */
0034 int qed_init_run(struct qed_hwfn *p_hwfn,
0035          struct qed_ptt *p_ptt,
0036          int phase,
0037          int phase_id,
0038          int modes);
0039 
0040 /**
0041  * qed_init_alloc(): Allocate RT array, Store 'values' ptrs.
0042  *
0043  * @p_hwfn: HW device data.
0044  *
0045  * Return: _qed_status_t.
0046  */
0047 int qed_init_alloc(struct qed_hwfn *p_hwfn);
0048 
0049 /**
0050  * qed_init_free(): Init HW function deallocate.
0051  *
0052  * @p_hwfn: HW device data.
0053  *
0054  * Return: Void.
0055  */
0056 void qed_init_free(struct qed_hwfn *p_hwfn);
0057 
0058 /**
0059  * qed_init_store_rt_reg(): Store a configuration value in the RT array.
0060  *
0061  * @p_hwfn: HW device data.
0062  * @rt_offset: RT offset.
0063  * @val: Val.
0064  *
0065  * Return: Void.
0066  */
0067 void qed_init_store_rt_reg(struct qed_hwfn *p_hwfn,
0068                u32 rt_offset,
0069                u32 val);
0070 
0071 #define STORE_RT_REG(hwfn, offset, val) \
0072     qed_init_store_rt_reg(hwfn, offset, val)
0073 
0074 #define OVERWRITE_RT_REG(hwfn, offset, val) \
0075     qed_init_store_rt_reg(hwfn, offset, val)
0076 
0077 void qed_init_store_rt_agg(struct qed_hwfn *p_hwfn,
0078                u32 rt_offset,
0079                u32 *val,
0080                size_t size);
0081 
0082 #define STORE_RT_REG_AGG(hwfn, offset, val) \
0083     qed_init_store_rt_agg(hwfn, offset, (u32 *)&(val), sizeof(val))
0084 
0085 /**
0086  * qed_gtt_init(): Initialize GTT global windows and set admin window
0087  *                 related params of GTT/PTT to default values.
0088  *
0089  * @p_hwfn: HW device data.
0090  *
0091  * Return Void.
0092  */
0093 void qed_gtt_init(struct qed_hwfn *p_hwfn);
0094 #endif