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0008 #include <linux/netdevice.h>
0009 #include <linux/delay.h>
0010 #include <linux/slab.h>
0011 #include <linux/if_vlan.h>
0012 #include <net/checksum.h>
0013 #include "netxen_nic.h"
0014 #include "netxen_nic_hw.h"
0015
0016 struct crb_addr_pair {
0017 u32 addr;
0018 u32 data;
0019 };
0020
0021 #define NETXEN_MAX_CRB_XFORM 60
0022 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
0023 #define NETXEN_ADDR_ERROR (0xffffffff)
0024
0025 #define crb_addr_transform(name) \
0026 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
0027 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
0028
0029 #define NETXEN_NIC_XDMA_RESET 0x8000ff
0030
0031 static void
0032 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
0033 struct nx_host_rds_ring *rds_ring);
0034 static int netxen_p3_has_mn(struct netxen_adapter *adapter);
0035
0036 static void crb_addr_transform_setup(void)
0037 {
0038 crb_addr_transform(XDMA);
0039 crb_addr_transform(TIMR);
0040 crb_addr_transform(SRE);
0041 crb_addr_transform(SQN3);
0042 crb_addr_transform(SQN2);
0043 crb_addr_transform(SQN1);
0044 crb_addr_transform(SQN0);
0045 crb_addr_transform(SQS3);
0046 crb_addr_transform(SQS2);
0047 crb_addr_transform(SQS1);
0048 crb_addr_transform(SQS0);
0049 crb_addr_transform(RPMX7);
0050 crb_addr_transform(RPMX6);
0051 crb_addr_transform(RPMX5);
0052 crb_addr_transform(RPMX4);
0053 crb_addr_transform(RPMX3);
0054 crb_addr_transform(RPMX2);
0055 crb_addr_transform(RPMX1);
0056 crb_addr_transform(RPMX0);
0057 crb_addr_transform(ROMUSB);
0058 crb_addr_transform(SN);
0059 crb_addr_transform(QMN);
0060 crb_addr_transform(QMS);
0061 crb_addr_transform(PGNI);
0062 crb_addr_transform(PGND);
0063 crb_addr_transform(PGN3);
0064 crb_addr_transform(PGN2);
0065 crb_addr_transform(PGN1);
0066 crb_addr_transform(PGN0);
0067 crb_addr_transform(PGSI);
0068 crb_addr_transform(PGSD);
0069 crb_addr_transform(PGS3);
0070 crb_addr_transform(PGS2);
0071 crb_addr_transform(PGS1);
0072 crb_addr_transform(PGS0);
0073 crb_addr_transform(PS);
0074 crb_addr_transform(PH);
0075 crb_addr_transform(NIU);
0076 crb_addr_transform(I2Q);
0077 crb_addr_transform(EG);
0078 crb_addr_transform(MN);
0079 crb_addr_transform(MS);
0080 crb_addr_transform(CAS2);
0081 crb_addr_transform(CAS1);
0082 crb_addr_transform(CAS0);
0083 crb_addr_transform(CAM);
0084 crb_addr_transform(C2C1);
0085 crb_addr_transform(C2C0);
0086 crb_addr_transform(SMB);
0087 crb_addr_transform(OCM0);
0088 crb_addr_transform(I2C0);
0089 }
0090
0091 void netxen_release_rx_buffers(struct netxen_adapter *adapter)
0092 {
0093 struct netxen_recv_context *recv_ctx;
0094 struct nx_host_rds_ring *rds_ring;
0095 struct netxen_rx_buffer *rx_buf;
0096 int i, ring;
0097
0098 recv_ctx = &adapter->recv_ctx;
0099 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
0100 rds_ring = &recv_ctx->rds_rings[ring];
0101 for (i = 0; i < rds_ring->num_desc; ++i) {
0102 rx_buf = &(rds_ring->rx_buf_arr[i]);
0103 if (rx_buf->state == NETXEN_BUFFER_FREE)
0104 continue;
0105 dma_unmap_single(&adapter->pdev->dev, rx_buf->dma,
0106 rds_ring->dma_size, DMA_FROM_DEVICE);
0107 if (rx_buf->skb != NULL)
0108 dev_kfree_skb_any(rx_buf->skb);
0109 }
0110 }
0111 }
0112
0113 void netxen_release_tx_buffers(struct netxen_adapter *adapter)
0114 {
0115 struct netxen_cmd_buffer *cmd_buf;
0116 struct netxen_skb_frag *buffrag;
0117 int i, j;
0118 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
0119
0120 spin_lock_bh(&adapter->tx_clean_lock);
0121 cmd_buf = tx_ring->cmd_buf_arr;
0122 for (i = 0; i < tx_ring->num_desc; i++) {
0123 buffrag = cmd_buf->frag_array;
0124 if (buffrag->dma) {
0125 dma_unmap_single(&adapter->pdev->dev, buffrag->dma,
0126 buffrag->length, DMA_TO_DEVICE);
0127 buffrag->dma = 0ULL;
0128 }
0129 for (j = 1; j < cmd_buf->frag_count; j++) {
0130 buffrag++;
0131 if (buffrag->dma) {
0132 dma_unmap_page(&adapter->pdev->dev,
0133 buffrag->dma, buffrag->length,
0134 DMA_TO_DEVICE);
0135 buffrag->dma = 0ULL;
0136 }
0137 }
0138 if (cmd_buf->skb) {
0139 dev_kfree_skb_any(cmd_buf->skb);
0140 cmd_buf->skb = NULL;
0141 }
0142 cmd_buf++;
0143 }
0144 spin_unlock_bh(&adapter->tx_clean_lock);
0145 }
0146
0147 void netxen_free_sw_resources(struct netxen_adapter *adapter)
0148 {
0149 struct netxen_recv_context *recv_ctx;
0150 struct nx_host_rds_ring *rds_ring;
0151 struct nx_host_tx_ring *tx_ring;
0152 int ring;
0153
0154 recv_ctx = &adapter->recv_ctx;
0155
0156 if (recv_ctx->rds_rings == NULL)
0157 goto skip_rds;
0158
0159 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
0160 rds_ring = &recv_ctx->rds_rings[ring];
0161 vfree(rds_ring->rx_buf_arr);
0162 rds_ring->rx_buf_arr = NULL;
0163 }
0164 kfree(recv_ctx->rds_rings);
0165
0166 skip_rds:
0167 if (adapter->tx_ring == NULL)
0168 return;
0169
0170 tx_ring = adapter->tx_ring;
0171 vfree(tx_ring->cmd_buf_arr);
0172 kfree(tx_ring);
0173 adapter->tx_ring = NULL;
0174 }
0175
0176 int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
0177 {
0178 struct netxen_recv_context *recv_ctx;
0179 struct nx_host_rds_ring *rds_ring;
0180 struct nx_host_sds_ring *sds_ring;
0181 struct nx_host_tx_ring *tx_ring;
0182 struct netxen_rx_buffer *rx_buf;
0183 int ring, i;
0184
0185 struct netxen_cmd_buffer *cmd_buf_arr;
0186 struct net_device *netdev = adapter->netdev;
0187
0188 tx_ring = kzalloc(sizeof(struct nx_host_tx_ring), GFP_KERNEL);
0189 if (tx_ring == NULL)
0190 return -ENOMEM;
0191
0192 adapter->tx_ring = tx_ring;
0193
0194 tx_ring->num_desc = adapter->num_txd;
0195 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
0196
0197 cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring));
0198 if (cmd_buf_arr == NULL)
0199 goto err_out;
0200
0201 tx_ring->cmd_buf_arr = cmd_buf_arr;
0202
0203 recv_ctx = &adapter->recv_ctx;
0204
0205 rds_ring = kcalloc(adapter->max_rds_rings,
0206 sizeof(struct nx_host_rds_ring), GFP_KERNEL);
0207 if (rds_ring == NULL)
0208 goto err_out;
0209
0210 recv_ctx->rds_rings = rds_ring;
0211
0212 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
0213 rds_ring = &recv_ctx->rds_rings[ring];
0214 switch (ring) {
0215 case RCV_RING_NORMAL:
0216 rds_ring->num_desc = adapter->num_rxd;
0217 if (adapter->ahw.cut_through) {
0218 rds_ring->dma_size =
0219 NX_CT_DEFAULT_RX_BUF_LEN;
0220 rds_ring->skb_size =
0221 NX_CT_DEFAULT_RX_BUF_LEN;
0222 } else {
0223 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
0224 rds_ring->dma_size =
0225 NX_P3_RX_BUF_MAX_LEN;
0226 else
0227 rds_ring->dma_size =
0228 NX_P2_RX_BUF_MAX_LEN;
0229 rds_ring->skb_size =
0230 rds_ring->dma_size + NET_IP_ALIGN;
0231 }
0232 break;
0233
0234 case RCV_RING_JUMBO:
0235 rds_ring->num_desc = adapter->num_jumbo_rxd;
0236 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
0237 rds_ring->dma_size =
0238 NX_P3_RX_JUMBO_BUF_MAX_LEN;
0239 else
0240 rds_ring->dma_size =
0241 NX_P2_RX_JUMBO_BUF_MAX_LEN;
0242
0243 if (adapter->capabilities & NX_CAP0_HW_LRO)
0244 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA;
0245
0246 rds_ring->skb_size =
0247 rds_ring->dma_size + NET_IP_ALIGN;
0248 break;
0249
0250 case RCV_RING_LRO:
0251 rds_ring->num_desc = adapter->num_lro_rxd;
0252 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH;
0253 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
0254 break;
0255
0256 }
0257 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
0258 if (rds_ring->rx_buf_arr == NULL)
0259
0260 goto err_out;
0261
0262 INIT_LIST_HEAD(&rds_ring->free_list);
0263
0264
0265
0266
0267 rx_buf = rds_ring->rx_buf_arr;
0268 for (i = 0; i < rds_ring->num_desc; i++) {
0269 list_add_tail(&rx_buf->list,
0270 &rds_ring->free_list);
0271 rx_buf->ref_handle = i;
0272 rx_buf->state = NETXEN_BUFFER_FREE;
0273 rx_buf++;
0274 }
0275 spin_lock_init(&rds_ring->lock);
0276 }
0277
0278 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
0279 sds_ring = &recv_ctx->sds_rings[ring];
0280 sds_ring->irq = adapter->msix_entries[ring].vector;
0281 sds_ring->adapter = adapter;
0282 sds_ring->num_desc = adapter->num_rxd;
0283
0284 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
0285 INIT_LIST_HEAD(&sds_ring->free_list[i]);
0286 }
0287
0288 return 0;
0289
0290 err_out:
0291 netxen_free_sw_resources(adapter);
0292 return -ENOMEM;
0293 }
0294
0295
0296
0297
0298
0299 static u32 netxen_decode_crb_addr(u32 addr)
0300 {
0301 int i;
0302 u32 base_addr, offset, pci_base;
0303
0304 crb_addr_transform_setup();
0305
0306 pci_base = NETXEN_ADDR_ERROR;
0307 base_addr = addr & 0xfff00000;
0308 offset = addr & 0x000fffff;
0309
0310 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
0311 if (crb_addr_xform[i] == base_addr) {
0312 pci_base = i << 20;
0313 break;
0314 }
0315 }
0316 if (pci_base == NETXEN_ADDR_ERROR)
0317 return pci_base;
0318 else
0319 return pci_base + offset;
0320 }
0321
0322 #define NETXEN_MAX_ROM_WAIT_USEC 100
0323
0324 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
0325 {
0326 long timeout = 0;
0327 long done = 0;
0328
0329 cond_resched();
0330
0331 while (done == 0) {
0332 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
0333 done &= 2;
0334 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) {
0335 dev_err(&adapter->pdev->dev,
0336 "Timeout reached waiting for rom done");
0337 return -EIO;
0338 }
0339 udelay(1);
0340 }
0341 return 0;
0342 }
0343
0344 static int do_rom_fast_read(struct netxen_adapter *adapter,
0345 int addr, int *valp)
0346 {
0347 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
0348 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
0349 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
0350 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
0351 if (netxen_wait_rom_done(adapter)) {
0352 printk("Error waiting for rom done\n");
0353 return -EIO;
0354 }
0355
0356 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
0357 udelay(10);
0358 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
0359
0360 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
0361 return 0;
0362 }
0363
0364 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
0365 u8 *bytes, size_t size)
0366 {
0367 int addridx;
0368 int ret = 0;
0369
0370 for (addridx = addr; addridx < (addr + size); addridx += 4) {
0371 int v;
0372 ret = do_rom_fast_read(adapter, addridx, &v);
0373 if (ret != 0)
0374 break;
0375 *(__le32 *)bytes = cpu_to_le32(v);
0376 bytes += 4;
0377 }
0378
0379 return ret;
0380 }
0381
0382 int
0383 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
0384 u8 *bytes, size_t size)
0385 {
0386 int ret;
0387
0388 ret = netxen_rom_lock(adapter);
0389 if (ret < 0)
0390 return ret;
0391
0392 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
0393
0394 netxen_rom_unlock(adapter);
0395 return ret;
0396 }
0397
0398 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
0399 {
0400 int ret;
0401
0402 if (netxen_rom_lock(adapter) != 0)
0403 return -EIO;
0404
0405 ret = do_rom_fast_read(adapter, addr, valp);
0406 netxen_rom_unlock(adapter);
0407 return ret;
0408 }
0409
0410 #define NETXEN_BOARDTYPE 0x4008
0411 #define NETXEN_BOARDNUM 0x400c
0412 #define NETXEN_CHIPNUM 0x4010
0413
0414 int netxen_pinit_from_rom(struct netxen_adapter *adapter)
0415 {
0416 int addr, val;
0417 int i, n, init_delay = 0;
0418 struct crb_addr_pair *buf;
0419 unsigned offset;
0420 u32 off;
0421
0422
0423 netxen_rom_lock(adapter);
0424 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xfeffffff);
0425 netxen_rom_unlock(adapter);
0426
0427 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
0428 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
0429 (n != 0xcafecafe) ||
0430 netxen_rom_fast_read(adapter, 4, &n) != 0) {
0431 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
0432 "n: %08x\n", netxen_nic_driver_name, n);
0433 return -EIO;
0434 }
0435 offset = n & 0xffffU;
0436 n = (n >> 16) & 0xffffU;
0437 } else {
0438 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
0439 !(n & 0x80000000)) {
0440 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
0441 "n: %08x\n", netxen_nic_driver_name, n);
0442 return -EIO;
0443 }
0444 offset = 1;
0445 n &= ~0x80000000;
0446 }
0447
0448 if (n >= 1024) {
0449 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
0450 " initialized.\n", __func__, n);
0451 return -EIO;
0452 }
0453
0454 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
0455 if (buf == NULL)
0456 return -ENOMEM;
0457
0458 for (i = 0; i < n; i++) {
0459 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
0460 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
0461 kfree(buf);
0462 return -EIO;
0463 }
0464
0465 buf[i].addr = addr;
0466 buf[i].data = val;
0467
0468 }
0469
0470 for (i = 0; i < n; i++) {
0471
0472 off = netxen_decode_crb_addr(buf[i].addr);
0473 if (off == NETXEN_ADDR_ERROR) {
0474 printk(KERN_ERR"CRB init value out of range %x\n",
0475 buf[i].addr);
0476 continue;
0477 }
0478 off += NETXEN_PCI_CRBSPACE;
0479
0480 if (off & 1)
0481 continue;
0482
0483
0484 if (off == NETXEN_CAM_RAM(0x1fc))
0485 continue;
0486
0487 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
0488 if (off == (NETXEN_CRB_I2C0 + 0x1c))
0489 continue;
0490
0491 if (off == (ROMUSB_GLB + 0xbc))
0492 continue;
0493 if (off == (ROMUSB_GLB + 0xa8))
0494 continue;
0495 if (off == (ROMUSB_GLB + 0xc8))
0496 continue;
0497 if (off == (ROMUSB_GLB + 0x24))
0498 continue;
0499 if (off == (ROMUSB_GLB + 0x1c))
0500 continue;
0501 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET)
0502 continue;
0503 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18) &&
0504 !NX_IS_REVISION_P3P(adapter->ahw.revision_id))
0505 buf[i].data = 0x1020;
0506
0507 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
0508 continue;
0509 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
0510 continue;
0511 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
0512 continue;
0513 }
0514
0515 init_delay = 1;
0516
0517
0518 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
0519 init_delay = 1000;
0520 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
0521
0522 buf[i].data = NETXEN_NIC_XDMA_RESET;
0523 buf[i].data = 0x8000ff;
0524 }
0525 }
0526
0527 NXWR32(adapter, off, buf[i].data);
0528
0529 msleep(init_delay);
0530 }
0531 kfree(buf);
0532
0533
0534
0535
0536 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
0537 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
0538 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
0539 }
0540
0541
0542 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
0543
0544 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
0545
0546 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
0547
0548
0549
0550
0551 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
0552 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
0553
0554 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
0555 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
0556
0557 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
0558 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
0559
0560 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
0561 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
0562 return 0;
0563 }
0564
0565 static struct uni_table_desc *nx_get_table_desc(const u8 *unirom, int section)
0566 {
0567 uint32_t i;
0568 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
0569 __le32 entries = cpu_to_le32(directory->num_entries);
0570
0571 for (i = 0; i < entries; i++) {
0572
0573 __le32 offs = cpu_to_le32(directory->findex) +
0574 (i * cpu_to_le32(directory->entry_size));
0575 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
0576
0577 if (tab_type == section)
0578 return (struct uni_table_desc *) &unirom[offs];
0579 }
0580
0581 return NULL;
0582 }
0583
0584 #define QLCNIC_FILEHEADER_SIZE (14 * 4)
0585
0586 static int
0587 netxen_nic_validate_header(struct netxen_adapter *adapter)
0588 {
0589 const u8 *unirom = adapter->fw->data;
0590 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
0591 u32 fw_file_size = adapter->fw->size;
0592 u32 tab_size;
0593 __le32 entries;
0594 __le32 entry_size;
0595
0596 if (fw_file_size < QLCNIC_FILEHEADER_SIZE)
0597 return -EINVAL;
0598
0599 entries = cpu_to_le32(directory->num_entries);
0600 entry_size = cpu_to_le32(directory->entry_size);
0601 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
0602
0603 if (fw_file_size < tab_size)
0604 return -EINVAL;
0605
0606 return 0;
0607 }
0608
0609 static int
0610 netxen_nic_validate_bootld(struct netxen_adapter *adapter)
0611 {
0612 struct uni_table_desc *tab_desc;
0613 struct uni_data_desc *descr;
0614 const u8 *unirom = adapter->fw->data;
0615 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
0616 NX_UNI_BOOTLD_IDX_OFF));
0617 u32 offs;
0618 u32 tab_size;
0619 u32 data_size;
0620
0621 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_BOOTLD);
0622
0623 if (!tab_desc)
0624 return -EINVAL;
0625
0626 tab_size = cpu_to_le32(tab_desc->findex) +
0627 (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
0628
0629 if (adapter->fw->size < tab_size)
0630 return -EINVAL;
0631
0632 offs = cpu_to_le32(tab_desc->findex) +
0633 (cpu_to_le32(tab_desc->entry_size) * (idx));
0634 descr = (struct uni_data_desc *)&unirom[offs];
0635
0636 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
0637
0638 if (adapter->fw->size < data_size)
0639 return -EINVAL;
0640
0641 return 0;
0642 }
0643
0644 static int
0645 netxen_nic_validate_fw(struct netxen_adapter *adapter)
0646 {
0647 struct uni_table_desc *tab_desc;
0648 struct uni_data_desc *descr;
0649 const u8 *unirom = adapter->fw->data;
0650 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
0651 NX_UNI_FIRMWARE_IDX_OFF));
0652 u32 offs;
0653 u32 tab_size;
0654 u32 data_size;
0655
0656 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_FW);
0657
0658 if (!tab_desc)
0659 return -EINVAL;
0660
0661 tab_size = cpu_to_le32(tab_desc->findex) +
0662 (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
0663
0664 if (adapter->fw->size < tab_size)
0665 return -EINVAL;
0666
0667 offs = cpu_to_le32(tab_desc->findex) +
0668 (cpu_to_le32(tab_desc->entry_size) * (idx));
0669 descr = (struct uni_data_desc *)&unirom[offs];
0670 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
0671
0672 if (adapter->fw->size < data_size)
0673 return -EINVAL;
0674
0675 return 0;
0676 }
0677
0678
0679 static int
0680 netxen_nic_validate_product_offs(struct netxen_adapter *adapter)
0681 {
0682 struct uni_table_desc *ptab_descr;
0683 const u8 *unirom = adapter->fw->data;
0684 int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ?
0685 1 : netxen_p3_has_mn(adapter);
0686 __le32 entries;
0687 __le32 entry_size;
0688 u32 tab_size;
0689 u32 i;
0690
0691 ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL);
0692 if (ptab_descr == NULL)
0693 return -EINVAL;
0694
0695 entries = cpu_to_le32(ptab_descr->num_entries);
0696 entry_size = cpu_to_le32(ptab_descr->entry_size);
0697 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
0698
0699 if (adapter->fw->size < tab_size)
0700 return -EINVAL;
0701
0702 nomn:
0703 for (i = 0; i < entries; i++) {
0704
0705 __le32 flags, file_chiprev, offs;
0706 u8 chiprev = adapter->ahw.revision_id;
0707 uint32_t flagbit;
0708
0709 offs = cpu_to_le32(ptab_descr->findex) +
0710 (i * cpu_to_le32(ptab_descr->entry_size));
0711 flags = cpu_to_le32(*((int *)&unirom[offs] + NX_UNI_FLAGS_OFF));
0712 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
0713 NX_UNI_CHIP_REV_OFF));
0714
0715 flagbit = mn_present ? 1 : 2;
0716
0717 if ((chiprev == file_chiprev) &&
0718 ((1ULL << flagbit) & flags)) {
0719 adapter->file_prd_off = offs;
0720 return 0;
0721 }
0722 }
0723
0724 if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
0725 mn_present = 0;
0726 goto nomn;
0727 }
0728
0729 return -EINVAL;
0730 }
0731
0732 static int
0733 netxen_nic_validate_unified_romimage(struct netxen_adapter *adapter)
0734 {
0735 if (netxen_nic_validate_header(adapter)) {
0736 dev_err(&adapter->pdev->dev,
0737 "unified image: header validation failed\n");
0738 return -EINVAL;
0739 }
0740
0741 if (netxen_nic_validate_product_offs(adapter)) {
0742 dev_err(&adapter->pdev->dev,
0743 "unified image: product validation failed\n");
0744 return -EINVAL;
0745 }
0746
0747 if (netxen_nic_validate_bootld(adapter)) {
0748 dev_err(&adapter->pdev->dev,
0749 "unified image: bootld validation failed\n");
0750 return -EINVAL;
0751 }
0752
0753 if (netxen_nic_validate_fw(adapter)) {
0754 dev_err(&adapter->pdev->dev,
0755 "unified image: firmware validation failed\n");
0756 return -EINVAL;
0757 }
0758
0759 return 0;
0760 }
0761
0762 static struct uni_data_desc *nx_get_data_desc(struct netxen_adapter *adapter,
0763 u32 section, u32 idx_offset)
0764 {
0765 const u8 *unirom = adapter->fw->data;
0766 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
0767 idx_offset));
0768 struct uni_table_desc *tab_desc;
0769 __le32 offs;
0770
0771 tab_desc = nx_get_table_desc(unirom, section);
0772
0773 if (tab_desc == NULL)
0774 return NULL;
0775
0776 offs = cpu_to_le32(tab_desc->findex) +
0777 (cpu_to_le32(tab_desc->entry_size) * idx);
0778
0779 return (struct uni_data_desc *)&unirom[offs];
0780 }
0781
0782 static u8 *
0783 nx_get_bootld_offs(struct netxen_adapter *adapter)
0784 {
0785 u32 offs = NETXEN_BOOTLD_START;
0786
0787 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
0788 offs = cpu_to_le32((nx_get_data_desc(adapter,
0789 NX_UNI_DIR_SECT_BOOTLD,
0790 NX_UNI_BOOTLD_IDX_OFF))->findex);
0791
0792 return (u8 *)&adapter->fw->data[offs];
0793 }
0794
0795 static u8 *
0796 nx_get_fw_offs(struct netxen_adapter *adapter)
0797 {
0798 u32 offs = NETXEN_IMAGE_START;
0799
0800 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
0801 offs = cpu_to_le32((nx_get_data_desc(adapter,
0802 NX_UNI_DIR_SECT_FW,
0803 NX_UNI_FIRMWARE_IDX_OFF))->findex);
0804
0805 return (u8 *)&adapter->fw->data[offs];
0806 }
0807
0808 static __le32
0809 nx_get_fw_size(struct netxen_adapter *adapter)
0810 {
0811 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
0812 return cpu_to_le32((nx_get_data_desc(adapter,
0813 NX_UNI_DIR_SECT_FW,
0814 NX_UNI_FIRMWARE_IDX_OFF))->size);
0815 else
0816 return cpu_to_le32(
0817 *(u32 *)&adapter->fw->data[NX_FW_SIZE_OFFSET]);
0818 }
0819
0820 static __le32
0821 nx_get_fw_version(struct netxen_adapter *adapter)
0822 {
0823 struct uni_data_desc *fw_data_desc;
0824 const struct firmware *fw = adapter->fw;
0825 __le32 major, minor, sub;
0826 const u8 *ver_str;
0827 int i, ret = 0;
0828
0829 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) {
0830
0831 fw_data_desc = nx_get_data_desc(adapter,
0832 NX_UNI_DIR_SECT_FW, NX_UNI_FIRMWARE_IDX_OFF);
0833 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
0834 cpu_to_le32(fw_data_desc->size) - 17;
0835
0836 for (i = 0; i < 12; i++) {
0837 if (!strncmp(&ver_str[i], "REV=", 4)) {
0838 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
0839 &major, &minor, &sub);
0840 break;
0841 }
0842 }
0843
0844 if (ret != 3)
0845 return 0;
0846
0847 return major + (minor << 8) + (sub << 16);
0848
0849 } else
0850 return cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
0851 }
0852
0853 static __le32
0854 nx_get_bios_version(struct netxen_adapter *adapter)
0855 {
0856 const struct firmware *fw = adapter->fw;
0857 __le32 bios_ver, prd_off = adapter->file_prd_off;
0858
0859 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) {
0860 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
0861 + NX_UNI_BIOS_VERSION_OFF));
0862 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) +
0863 (bios_ver >> 24);
0864 } else
0865 return cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
0866
0867 }
0868
0869 int
0870 netxen_need_fw_reset(struct netxen_adapter *adapter)
0871 {
0872 u32 count, old_count;
0873 u32 val, version, major, minor, build;
0874 int i, timeout;
0875 u8 fw_type;
0876
0877
0878 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
0879 return 1;
0880
0881 if (adapter->need_fw_reset)
0882 return 1;
0883
0884
0885 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
0886 return 1;
0887
0888 old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
0889
0890 for (i = 0; i < 10; i++) {
0891
0892 timeout = msleep_interruptible(200);
0893 if (timeout) {
0894 NXWR32(adapter, CRB_CMDPEG_STATE,
0895 PHAN_INITIALIZE_FAILED);
0896 return -EINTR;
0897 }
0898
0899 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
0900 if (count != old_count)
0901 break;
0902 }
0903
0904
0905 if (count == old_count)
0906 return 1;
0907
0908
0909 if (adapter->fw) {
0910
0911 val = nx_get_fw_version(adapter);
0912
0913 version = NETXEN_DECODE_VERSION(val);
0914
0915 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
0916 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
0917 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
0918
0919 if (version > NETXEN_VERSION_CODE(major, minor, build))
0920 return 1;
0921
0922 if (version == NETXEN_VERSION_CODE(major, minor, build) &&
0923 adapter->fw_type != NX_UNIFIED_ROMIMAGE) {
0924
0925 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
0926 fw_type = (val & 0x4) ?
0927 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
0928
0929 if (adapter->fw_type != fw_type)
0930 return 1;
0931 }
0932 }
0933
0934 return 0;
0935 }
0936
0937 #define NETXEN_MIN_P3_FW_SUPP NETXEN_VERSION_CODE(4, 0, 505)
0938
0939 int
0940 netxen_check_flash_fw_compatibility(struct netxen_adapter *adapter)
0941 {
0942 u32 flash_fw_ver, min_fw_ver;
0943
0944 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
0945 return 0;
0946
0947 if (netxen_rom_fast_read(adapter,
0948 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) {
0949 dev_err(&adapter->pdev->dev, "Unable to read flash fw"
0950 "version\n");
0951 return -EIO;
0952 }
0953
0954 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver);
0955 min_fw_ver = NETXEN_MIN_P3_FW_SUPP;
0956 if (flash_fw_ver >= min_fw_ver)
0957 return 0;
0958
0959 dev_info(&adapter->pdev->dev, "Flash fw[%d.%d.%d] is < min fw supported"
0960 "[4.0.505]. Please update firmware on flash\n",
0961 _major(flash_fw_ver), _minor(flash_fw_ver),
0962 _build(flash_fw_ver));
0963 return -EINVAL;
0964 }
0965
0966 static char *fw_name[] = {
0967 NX_P2_MN_ROMIMAGE_NAME,
0968 NX_P3_CT_ROMIMAGE_NAME,
0969 NX_P3_MN_ROMIMAGE_NAME,
0970 NX_UNIFIED_ROMIMAGE_NAME,
0971 NX_FLASH_ROMIMAGE_NAME,
0972 };
0973
0974 int
0975 netxen_load_firmware(struct netxen_adapter *adapter)
0976 {
0977 u64 *ptr64;
0978 u32 i, flashaddr, size;
0979 const struct firmware *fw = adapter->fw;
0980 struct pci_dev *pdev = adapter->pdev;
0981
0982 dev_info(&pdev->dev, "loading firmware from %s\n",
0983 fw_name[adapter->fw_type]);
0984
0985 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
0986 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
0987
0988 if (fw) {
0989 __le64 data;
0990
0991 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
0992
0993 ptr64 = (u64 *)nx_get_bootld_offs(adapter);
0994 flashaddr = NETXEN_BOOTLD_START;
0995
0996 for (i = 0; i < size; i++) {
0997 data = cpu_to_le64(ptr64[i]);
0998
0999 if (adapter->pci_mem_write(adapter, flashaddr, data))
1000 return -EIO;
1001
1002 flashaddr += 8;
1003 }
1004
1005 size = (__force u32)nx_get_fw_size(adapter) / 8;
1006
1007 ptr64 = (u64 *)nx_get_fw_offs(adapter);
1008 flashaddr = NETXEN_IMAGE_START;
1009
1010 for (i = 0; i < size; i++) {
1011 data = cpu_to_le64(ptr64[i]);
1012
1013 if (adapter->pci_mem_write(adapter,
1014 flashaddr, data))
1015 return -EIO;
1016
1017 flashaddr += 8;
1018 }
1019
1020 size = (__force u32)nx_get_fw_size(adapter) % 8;
1021 if (size) {
1022 data = cpu_to_le64(ptr64[i]);
1023
1024 if (adapter->pci_mem_write(adapter,
1025 flashaddr, data))
1026 return -EIO;
1027 }
1028
1029 } else {
1030 u64 data;
1031 u32 hi, lo;
1032
1033 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
1034 flashaddr = NETXEN_BOOTLD_START;
1035
1036 for (i = 0; i < size; i++) {
1037 if (netxen_rom_fast_read(adapter,
1038 flashaddr, (int *)&lo) != 0)
1039 return -EIO;
1040 if (netxen_rom_fast_read(adapter,
1041 flashaddr + 4, (int *)&hi) != 0)
1042 return -EIO;
1043
1044
1045 data = (((u64)hi << 32) | lo);
1046
1047 if (adapter->pci_mem_write(adapter,
1048 flashaddr, data))
1049 return -EIO;
1050
1051 flashaddr += 8;
1052 }
1053 }
1054 msleep(1);
1055
1056 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) {
1057 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x18, 0x1020);
1058 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001e);
1059 } else if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
1060 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
1061 else {
1062 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
1063 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
1064 }
1065
1066 return 0;
1067 }
1068
1069 static int
1070 netxen_validate_firmware(struct netxen_adapter *adapter)
1071 {
1072 __le32 val;
1073 __le32 flash_fw_ver;
1074 u32 file_fw_ver, min_ver, bios;
1075 struct pci_dev *pdev = adapter->pdev;
1076 const struct firmware *fw = adapter->fw;
1077 u8 fw_type = adapter->fw_type;
1078 u32 crbinit_fix_fw;
1079
1080 if (fw_type == NX_UNIFIED_ROMIMAGE) {
1081 if (netxen_nic_validate_unified_romimage(adapter))
1082 return -EINVAL;
1083 } else {
1084 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
1085 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
1086 return -EINVAL;
1087
1088 if (fw->size < NX_FW_MIN_SIZE)
1089 return -EINVAL;
1090 }
1091
1092 val = nx_get_fw_version(adapter);
1093
1094 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
1095 min_ver = NETXEN_MIN_P3_FW_SUPP;
1096 else
1097 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
1098
1099 file_fw_ver = NETXEN_DECODE_VERSION(val);
1100
1101 if ((_major(file_fw_ver) > _NETXEN_NIC_LINUX_MAJOR) ||
1102 (file_fw_ver < min_ver)) {
1103 dev_err(&pdev->dev,
1104 "%s: firmware version %d.%d.%d unsupported\n",
1105 fw_name[fw_type], _major(file_fw_ver), _minor(file_fw_ver),
1106 _build(file_fw_ver));
1107 return -EINVAL;
1108 }
1109 val = nx_get_bios_version(adapter);
1110 if (netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios))
1111 return -EIO;
1112 if ((__force u32)val != bios) {
1113 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1114 fw_name[fw_type]);
1115 return -EINVAL;
1116 }
1117
1118 if (netxen_rom_fast_read(adapter,
1119 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) {
1120 dev_err(&pdev->dev, "Unable to read flash fw version\n");
1121 return -EIO;
1122 }
1123 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver);
1124
1125
1126 crbinit_fix_fw = NETXEN_VERSION_CODE(4, 0, 554);
1127 if (file_fw_ver >= crbinit_fix_fw && flash_fw_ver < crbinit_fix_fw &&
1128 NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
1129 dev_err(&pdev->dev, "Incompatibility detected between driver "
1130 "and firmware version on flash. This configuration "
1131 "is not recommended. Please update the firmware on "
1132 "flash immediately\n");
1133 return -EINVAL;
1134 }
1135
1136
1137 if (!netxen_p3_has_mn(adapter) ||
1138 NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1139 if (flash_fw_ver > file_fw_ver) {
1140 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
1141 fw_name[fw_type]);
1142 return -EINVAL;
1143 }
1144 }
1145
1146 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
1147 return 0;
1148 }
1149
1150 static void
1151 nx_get_next_fwtype(struct netxen_adapter *adapter)
1152 {
1153 u8 fw_type;
1154
1155 switch (adapter->fw_type) {
1156 case NX_UNKNOWN_ROMIMAGE:
1157 fw_type = NX_UNIFIED_ROMIMAGE;
1158 break;
1159
1160 case NX_UNIFIED_ROMIMAGE:
1161 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id))
1162 fw_type = NX_FLASH_ROMIMAGE;
1163 else if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1164 fw_type = NX_P2_MN_ROMIMAGE;
1165 else if (netxen_p3_has_mn(adapter))
1166 fw_type = NX_P3_MN_ROMIMAGE;
1167 else
1168 fw_type = NX_P3_CT_ROMIMAGE;
1169 break;
1170
1171 case NX_P3_MN_ROMIMAGE:
1172 fw_type = NX_P3_CT_ROMIMAGE;
1173 break;
1174
1175 case NX_P2_MN_ROMIMAGE:
1176 case NX_P3_CT_ROMIMAGE:
1177 default:
1178 fw_type = NX_FLASH_ROMIMAGE;
1179 break;
1180 }
1181
1182 adapter->fw_type = fw_type;
1183 }
1184
1185 static int
1186 netxen_p3_has_mn(struct netxen_adapter *adapter)
1187 {
1188 u32 capability, flashed_ver;
1189 capability = 0;
1190
1191
1192 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1193 return 1;
1194
1195 netxen_rom_fast_read(adapter,
1196 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
1197 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
1198
1199 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
1200
1201 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
1202 if (capability & NX_PEG_TUNE_MN_PRESENT)
1203 return 1;
1204 }
1205 return 0;
1206 }
1207
1208 void netxen_request_firmware(struct netxen_adapter *adapter)
1209 {
1210 struct pci_dev *pdev = adapter->pdev;
1211 int rc = 0;
1212
1213 adapter->fw_type = NX_UNKNOWN_ROMIMAGE;
1214
1215 next:
1216 nx_get_next_fwtype(adapter);
1217
1218 if (adapter->fw_type == NX_FLASH_ROMIMAGE) {
1219 adapter->fw = NULL;
1220 } else {
1221 rc = request_firmware(&adapter->fw,
1222 fw_name[adapter->fw_type], &pdev->dev);
1223 if (rc != 0)
1224 goto next;
1225
1226 rc = netxen_validate_firmware(adapter);
1227 if (rc != 0) {
1228 release_firmware(adapter->fw);
1229 msleep(1);
1230 goto next;
1231 }
1232 }
1233 }
1234
1235
1236 void
1237 netxen_release_firmware(struct netxen_adapter *adapter)
1238 {
1239 release_firmware(adapter->fw);
1240 adapter->fw = NULL;
1241 }
1242
1243 int netxen_init_dummy_dma(struct netxen_adapter *adapter)
1244 {
1245 u64 addr;
1246 u32 hi, lo;
1247
1248 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
1249 return 0;
1250
1251 adapter->dummy_dma.addr = dma_alloc_coherent(&adapter->pdev->dev,
1252 NETXEN_HOST_DUMMY_DMA_SIZE,
1253 &adapter->dummy_dma.phys_addr,
1254 GFP_KERNEL);
1255 if (adapter->dummy_dma.addr == NULL) {
1256 dev_err(&adapter->pdev->dev,
1257 "ERROR: Could not allocate dummy DMA memory\n");
1258 return -ENOMEM;
1259 }
1260
1261 addr = (uint64_t) adapter->dummy_dma.phys_addr;
1262 hi = (addr >> 32) & 0xffffffff;
1263 lo = addr & 0xffffffff;
1264
1265 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
1266 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
1267
1268 return 0;
1269 }
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279 void netxen_free_dummy_dma(struct netxen_adapter *adapter)
1280 {
1281 int i = 100;
1282 u32 ctrl;
1283
1284 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
1285 return;
1286
1287 if (!adapter->dummy_dma.addr)
1288 return;
1289
1290 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1291 if ((ctrl & 0x1) != 0) {
1292 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2));
1293
1294 while ((ctrl & 0x1) != 0) {
1295
1296 msleep(50);
1297
1298 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1299
1300 if (--i == 0)
1301 break;
1302 }
1303 }
1304
1305 if (i) {
1306 dma_free_coherent(&adapter->pdev->dev,
1307 NETXEN_HOST_DUMMY_DMA_SIZE,
1308 adapter->dummy_dma.addr,
1309 adapter->dummy_dma.phys_addr);
1310 adapter->dummy_dma.addr = NULL;
1311 } else
1312 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n");
1313 }
1314
1315 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
1316 {
1317 u32 val = 0;
1318 int retries = 60;
1319
1320 if (pegtune_val)
1321 return 0;
1322
1323 do {
1324 val = NXRD32(adapter, CRB_CMDPEG_STATE);
1325 switch (val) {
1326 case PHAN_INITIALIZE_COMPLETE:
1327 case PHAN_INITIALIZE_ACK:
1328 return 0;
1329 case PHAN_INITIALIZE_FAILED:
1330 goto out_err;
1331 default:
1332 break;
1333 }
1334
1335 msleep(500);
1336
1337 } while (--retries);
1338
1339 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
1340
1341 out_err:
1342 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
1343 return -EIO;
1344 }
1345
1346 static int
1347 netxen_receive_peg_ready(struct netxen_adapter *adapter)
1348 {
1349 u32 val = 0;
1350 int retries = 2000;
1351
1352 do {
1353 val = NXRD32(adapter, CRB_RCVPEG_STATE);
1354
1355 if (val == PHAN_PEG_RCV_INITIALIZED)
1356 return 0;
1357
1358 msleep(10);
1359
1360 } while (--retries);
1361
1362 pr_err("Receive Peg initialization not complete, state: 0x%x.\n", val);
1363 return -EIO;
1364 }
1365
1366 int netxen_init_firmware(struct netxen_adapter *adapter)
1367 {
1368 int err;
1369
1370 err = netxen_receive_peg_ready(adapter);
1371 if (err)
1372 return err;
1373
1374 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1375 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1376 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1377
1378 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1379 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1380
1381 return err;
1382 }
1383
1384 static void
1385 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1386 {
1387 u32 cable_OUI;
1388 u16 cable_len;
1389 u16 link_speed;
1390 u8 link_status, module, duplex, autoneg;
1391 struct net_device *netdev = adapter->netdev;
1392
1393 adapter->has_link_events = 1;
1394
1395 cable_OUI = msg->body[1] & 0xffffffff;
1396 cable_len = (msg->body[1] >> 32) & 0xffff;
1397 link_speed = (msg->body[1] >> 48) & 0xffff;
1398
1399 link_status = msg->body[2] & 0xff;
1400 duplex = (msg->body[2] >> 16) & 0xff;
1401 autoneg = (msg->body[2] >> 24) & 0xff;
1402
1403 module = (msg->body[2] >> 8) & 0xff;
1404 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1405 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1406 netdev->name, cable_OUI, cable_len);
1407 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1408 printk(KERN_INFO "%s: unsupported cable length %d\n",
1409 netdev->name, cable_len);
1410 }
1411
1412
1413 if (duplex == LINKEVENT_FULL_DUPLEX)
1414 adapter->link_duplex = DUPLEX_FULL;
1415 else
1416 adapter->link_duplex = DUPLEX_HALF;
1417 adapter->module_type = module;
1418 adapter->link_autoneg = autoneg;
1419 adapter->link_speed = link_speed;
1420
1421 netxen_advert_link_change(adapter, link_status);
1422 }
1423
1424 static void
1425 netxen_handle_fw_message(int desc_cnt, int index,
1426 struct nx_host_sds_ring *sds_ring)
1427 {
1428 nx_fw_msg_t msg;
1429 struct status_desc *desc;
1430 int i = 0, opcode;
1431
1432 while (desc_cnt > 0 && i < 8) {
1433 desc = &sds_ring->desc_head[index];
1434 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1435 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1436
1437 index = get_next_index(index, sds_ring->num_desc);
1438 desc_cnt--;
1439 }
1440
1441 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1442 switch (opcode) {
1443 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1444 netxen_handle_linkevent(sds_ring->adapter, &msg);
1445 break;
1446 default:
1447 break;
1448 }
1449 }
1450
1451 static int
1452 netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1453 struct nx_host_rds_ring *rds_ring,
1454 struct netxen_rx_buffer *buffer)
1455 {
1456 struct sk_buff *skb;
1457 dma_addr_t dma;
1458 struct pci_dev *pdev = adapter->pdev;
1459
1460 buffer->skb = netdev_alloc_skb(adapter->netdev, rds_ring->skb_size);
1461 if (!buffer->skb)
1462 return 1;
1463
1464 skb = buffer->skb;
1465
1466 if (!adapter->ahw.cut_through)
1467 skb_reserve(skb, 2);
1468
1469 dma = dma_map_single(&pdev->dev, skb->data, rds_ring->dma_size,
1470 DMA_FROM_DEVICE);
1471
1472 if (dma_mapping_error(&pdev->dev, dma)) {
1473 dev_kfree_skb_any(skb);
1474 buffer->skb = NULL;
1475 return 1;
1476 }
1477
1478 buffer->skb = skb;
1479 buffer->dma = dma;
1480 buffer->state = NETXEN_BUFFER_BUSY;
1481
1482 return 0;
1483 }
1484
1485 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1486 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1487 {
1488 struct netxen_rx_buffer *buffer;
1489 struct sk_buff *skb;
1490
1491 buffer = &rds_ring->rx_buf_arr[index];
1492
1493 dma_unmap_single(&adapter->pdev->dev, buffer->dma, rds_ring->dma_size,
1494 DMA_FROM_DEVICE);
1495
1496 skb = buffer->skb;
1497 if (!skb)
1498 goto no_skb;
1499
1500 if (likely((adapter->netdev->features & NETIF_F_RXCSUM)
1501 && cksum == STATUS_CKSUM_OK)) {
1502 adapter->stats.csummed++;
1503 skb->ip_summed = CHECKSUM_UNNECESSARY;
1504 } else
1505 skb->ip_summed = CHECKSUM_NONE;
1506
1507 buffer->skb = NULL;
1508 no_skb:
1509 buffer->state = NETXEN_BUFFER_FREE;
1510 return skb;
1511 }
1512
1513 static struct netxen_rx_buffer *
1514 netxen_process_rcv(struct netxen_adapter *adapter,
1515 struct nx_host_sds_ring *sds_ring,
1516 int ring, u64 sts_data0)
1517 {
1518 struct net_device *netdev = adapter->netdev;
1519 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1520 struct netxen_rx_buffer *buffer;
1521 struct sk_buff *skb;
1522 struct nx_host_rds_ring *rds_ring;
1523 int index, length, cksum, pkt_offset;
1524
1525 if (unlikely(ring >= adapter->max_rds_rings))
1526 return NULL;
1527
1528 rds_ring = &recv_ctx->rds_rings[ring];
1529
1530 index = netxen_get_sts_refhandle(sts_data0);
1531 if (unlikely(index >= rds_ring->num_desc))
1532 return NULL;
1533
1534 buffer = &rds_ring->rx_buf_arr[index];
1535
1536 length = netxen_get_sts_totallength(sts_data0);
1537 cksum = netxen_get_sts_status(sts_data0);
1538 pkt_offset = netxen_get_sts_pkt_offset(sts_data0);
1539
1540 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1541 if (!skb)
1542 return buffer;
1543
1544 if (length > rds_ring->skb_size)
1545 skb_put(skb, rds_ring->skb_size);
1546 else
1547 skb_put(skb, length);
1548
1549
1550 if (pkt_offset)
1551 skb_pull(skb, pkt_offset);
1552
1553 skb->protocol = eth_type_trans(skb, netdev);
1554
1555 napi_gro_receive(&sds_ring->napi, skb);
1556
1557 adapter->stats.rx_pkts++;
1558 adapter->stats.rxbytes += length;
1559
1560 return buffer;
1561 }
1562
1563 #define TCP_HDR_SIZE 20
1564 #define TCP_TS_OPTION_SIZE 12
1565 #define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE)
1566
1567 static struct netxen_rx_buffer *
1568 netxen_process_lro(struct netxen_adapter *adapter,
1569 struct nx_host_sds_ring *sds_ring,
1570 int ring, u64 sts_data0, u64 sts_data1)
1571 {
1572 struct net_device *netdev = adapter->netdev;
1573 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1574 struct netxen_rx_buffer *buffer;
1575 struct sk_buff *skb;
1576 struct nx_host_rds_ring *rds_ring;
1577 struct iphdr *iph;
1578 struct tcphdr *th;
1579 bool push, timestamp;
1580 int l2_hdr_offset, l4_hdr_offset;
1581 int index;
1582 u16 lro_length, length, data_offset;
1583 u32 seq_number;
1584 u8 vhdr_len = 0;
1585
1586 if (unlikely(ring >= adapter->max_rds_rings))
1587 return NULL;
1588
1589 rds_ring = &recv_ctx->rds_rings[ring];
1590
1591 index = netxen_get_lro_sts_refhandle(sts_data0);
1592 if (unlikely(index >= rds_ring->num_desc))
1593 return NULL;
1594
1595 buffer = &rds_ring->rx_buf_arr[index];
1596
1597 timestamp = netxen_get_lro_sts_timestamp(sts_data0);
1598 lro_length = netxen_get_lro_sts_length(sts_data0);
1599 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0);
1600 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0);
1601 push = netxen_get_lro_sts_push_flag(sts_data0);
1602 seq_number = netxen_get_lro_sts_seq_number(sts_data1);
1603
1604 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
1605 if (!skb)
1606 return buffer;
1607
1608 if (timestamp)
1609 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE;
1610 else
1611 data_offset = l4_hdr_offset + TCP_HDR_SIZE;
1612
1613 skb_put(skb, lro_length + data_offset);
1614
1615 skb_pull(skb, l2_hdr_offset);
1616 skb->protocol = eth_type_trans(skb, netdev);
1617
1618 if (skb->protocol == htons(ETH_P_8021Q))
1619 vhdr_len = VLAN_HLEN;
1620 iph = (struct iphdr *)(skb->data + vhdr_len);
1621 th = (struct tcphdr *)((skb->data + vhdr_len) + (iph->ihl << 2));
1622
1623 length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
1624 csum_replace2(&iph->check, iph->tot_len, htons(length));
1625 iph->tot_len = htons(length);
1626 th->psh = push;
1627 th->seq = htonl(seq_number);
1628
1629 length = skb->len;
1630
1631 if (adapter->flags & NETXEN_FW_MSS_CAP)
1632 skb_shinfo(skb)->gso_size = netxen_get_lro_sts_mss(sts_data1);
1633
1634 netif_receive_skb(skb);
1635
1636 adapter->stats.lro_pkts++;
1637 adapter->stats.rxbytes += length;
1638
1639 return buffer;
1640 }
1641
1642 #define netxen_merge_rx_buffers(list, head) \
1643 do { list_splice_tail_init(list, head); } while (0);
1644
1645 int
1646 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
1647 {
1648 struct netxen_adapter *adapter = sds_ring->adapter;
1649
1650 struct list_head *cur;
1651
1652 struct status_desc *desc;
1653 struct netxen_rx_buffer *rxbuf;
1654
1655 u32 consumer = sds_ring->consumer;
1656
1657 int count = 0;
1658 u64 sts_data0, sts_data1;
1659 int opcode, ring = 0, desc_cnt;
1660
1661 while (count < max) {
1662 desc = &sds_ring->desc_head[consumer];
1663 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
1664
1665 if (!(sts_data0 & STATUS_OWNER_HOST))
1666 break;
1667
1668 desc_cnt = netxen_get_sts_desc_cnt(sts_data0);
1669
1670 opcode = netxen_get_sts_opcode(sts_data0);
1671
1672 switch (opcode) {
1673 case NETXEN_NIC_RXPKT_DESC:
1674 case NETXEN_OLD_RXPKT_DESC:
1675 case NETXEN_NIC_SYN_OFFLOAD:
1676 ring = netxen_get_sts_type(sts_data0);
1677 rxbuf = netxen_process_rcv(adapter, sds_ring,
1678 ring, sts_data0);
1679 break;
1680 case NETXEN_NIC_LRO_DESC:
1681 ring = netxen_get_lro_sts_type(sts_data0);
1682 sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
1683 rxbuf = netxen_process_lro(adapter, sds_ring,
1684 ring, sts_data0, sts_data1);
1685 break;
1686 case NETXEN_NIC_RESPONSE_DESC:
1687 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1688 goto skip;
1689 default:
1690 goto skip;
1691 }
1692
1693 WARN_ON(desc_cnt > 1);
1694
1695 if (rxbuf)
1696 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1697
1698 skip:
1699 for (; desc_cnt > 0; desc_cnt--) {
1700 desc = &sds_ring->desc_head[consumer];
1701 desc->status_desc_data[0] =
1702 cpu_to_le64(STATUS_OWNER_PHANTOM);
1703 consumer = get_next_index(consumer, sds_ring->num_desc);
1704 }
1705 count++;
1706 }
1707
1708 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1709 struct nx_host_rds_ring *rds_ring =
1710 &adapter->recv_ctx.rds_rings[ring];
1711
1712 if (!list_empty(&sds_ring->free_list[ring])) {
1713 list_for_each(cur, &sds_ring->free_list[ring]) {
1714 rxbuf = list_entry(cur,
1715 struct netxen_rx_buffer, list);
1716 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1717 }
1718 spin_lock(&rds_ring->lock);
1719 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1720 &rds_ring->free_list);
1721 spin_unlock(&rds_ring->lock);
1722 }
1723
1724 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1725 }
1726
1727 if (count) {
1728 sds_ring->consumer = consumer;
1729 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer);
1730 }
1731
1732 return count;
1733 }
1734
1735
1736 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1737 {
1738 u32 sw_consumer, hw_consumer;
1739 int count = 0, i;
1740 struct netxen_cmd_buffer *buffer;
1741 struct pci_dev *pdev = adapter->pdev;
1742 struct net_device *netdev = adapter->netdev;
1743 struct netxen_skb_frag *frag;
1744 int done = 0;
1745 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1746
1747 if (!spin_trylock_bh(&adapter->tx_clean_lock))
1748 return 1;
1749
1750 sw_consumer = tx_ring->sw_consumer;
1751 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1752
1753 while (sw_consumer != hw_consumer) {
1754 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
1755 if (buffer->skb) {
1756 frag = &buffer->frag_array[0];
1757 dma_unmap_single(&pdev->dev, frag->dma, frag->length,
1758 DMA_TO_DEVICE);
1759 frag->dma = 0ULL;
1760 for (i = 1; i < buffer->frag_count; i++) {
1761 frag++;
1762 dma_unmap_page(&pdev->dev, frag->dma,
1763 frag->length, DMA_TO_DEVICE);
1764 frag->dma = 0ULL;
1765 }
1766
1767 adapter->stats.xmitfinished++;
1768 dev_kfree_skb_any(buffer->skb);
1769 buffer->skb = NULL;
1770 }
1771
1772 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
1773 if (++count >= MAX_STATUS_HANDLE)
1774 break;
1775 }
1776
1777 tx_ring->sw_consumer = sw_consumer;
1778
1779 if (count && netif_running(netdev)) {
1780 smp_mb();
1781
1782 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev))
1783 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH)
1784 netif_wake_queue(netdev);
1785 adapter->tx_timeo_cnt = 0;
1786 }
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1801 done = (sw_consumer == hw_consumer);
1802 spin_unlock_bh(&adapter->tx_clean_lock);
1803
1804 return done;
1805 }
1806
1807 void
1808 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1809 struct nx_host_rds_ring *rds_ring)
1810 {
1811 struct rcv_desc *pdesc;
1812 struct netxen_rx_buffer *buffer;
1813 int producer, count = 0;
1814 netxen_ctx_msg msg = 0;
1815 struct list_head *head;
1816
1817 producer = rds_ring->producer;
1818
1819 head = &rds_ring->free_list;
1820 while (!list_empty(head)) {
1821
1822 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1823
1824 if (!buffer->skb) {
1825 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1826 break;
1827 }
1828
1829 count++;
1830 list_del(&buffer->list);
1831
1832
1833 pdesc = &rds_ring->desc_head[producer];
1834 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1835 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1836 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1837
1838 producer = get_next_index(producer, rds_ring->num_desc);
1839 }
1840
1841 if (count) {
1842 rds_ring->producer = producer;
1843 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1844 (producer-1) & (rds_ring->num_desc-1));
1845
1846 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1847
1848
1849
1850
1851
1852 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1853 netxen_set_msg_privid(msg);
1854 netxen_set_msg_count(msg,
1855 ((producer - 1) &
1856 (rds_ring->num_desc - 1)));
1857 netxen_set_msg_ctxid(msg, adapter->portnum);
1858 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1859 NXWRIO(adapter, DB_NORMALIZE(adapter,
1860 NETXEN_RCV_PRODUCER_OFFSET), msg);
1861 }
1862 }
1863 }
1864
1865 static void
1866 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1867 struct nx_host_rds_ring *rds_ring)
1868 {
1869 struct rcv_desc *pdesc;
1870 struct netxen_rx_buffer *buffer;
1871 int producer, count = 0;
1872 struct list_head *head;
1873
1874 if (!spin_trylock(&rds_ring->lock))
1875 return;
1876
1877 producer = rds_ring->producer;
1878
1879 head = &rds_ring->free_list;
1880 while (!list_empty(head)) {
1881
1882 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1883
1884 if (!buffer->skb) {
1885 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1886 break;
1887 }
1888
1889 count++;
1890 list_del(&buffer->list);
1891
1892
1893 pdesc = &rds_ring->desc_head[producer];
1894 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1895 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1896 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1897
1898 producer = get_next_index(producer, rds_ring->num_desc);
1899 }
1900
1901 if (count) {
1902 rds_ring->producer = producer;
1903 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1904 (producer - 1) & (rds_ring->num_desc - 1));
1905 }
1906 spin_unlock(&rds_ring->lock);
1907 }
1908
1909 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1910 {
1911 memset(&adapter->stats, 0, sizeof(adapter->stats));
1912 }
1913